1 1.1 skrll /* $NetBSD: pci_machdep.h,v 1.1 2025/01/01 17:53:08 skrll Exp $ */ 2 1.1 skrll 3 1.1 skrll /*- 4 1.1 skrll * Copyright (c) 2023 The NetBSD Foundation, Inc. 5 1.1 skrll * All rights reserved. 6 1.1 skrll * 7 1.1 skrll * This code is derived from software contributed to The NetBSD Foundation 8 1.1 skrll * by Nick Hudson 9 1.1 skrll * 10 1.1 skrll * Redistribution and use in source and binary forms, with or without 11 1.1 skrll * modification, are permitted provided that the following conditions 12 1.1 skrll * are met: 13 1.1 skrll * 1. Redistributions of source code must retain the above copyright 14 1.1 skrll * notice, this list of conditions and the following disclaimer. 15 1.1 skrll * 2. Redistributions in binary form must reproduce the above copyright 16 1.1 skrll * notice, this list of conditions and the following disclaimer in the 17 1.1 skrll * documentation and/or other materials provided with the distribution. 18 1.1 skrll * 19 1.1 skrll * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 1.1 skrll * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 1.1 skrll * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 1.1 skrll * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 1.1 skrll * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 1.1 skrll * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 1.1 skrll * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 1.1 skrll * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 1.1 skrll * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 1.1 skrll * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 1.1 skrll * POSSIBILITY OF SUCH DAMAGE. 30 1.1 skrll */ 31 1.1 skrll 32 1.1 skrll /* 33 1.1 skrll * Copyright (c) 1996 Carnegie-Mellon University. 34 1.1 skrll * All rights reserved. 35 1.1 skrll * 36 1.1 skrll * Author: Chris G. Demetriou 37 1.1 skrll * 38 1.1 skrll * Permission to use, copy, modify and distribute this software and 39 1.1 skrll * its documentation is hereby granted, provided that both the copyright 40 1.1 skrll * notice and this permission notice appear in all copies of the 41 1.1 skrll * software, derivative works or modified versions, and any portions 42 1.1 skrll * thereof, and that both notices appear in supporting documentation. 43 1.1 skrll * 44 1.1 skrll * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 45 1.1 skrll * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 46 1.1 skrll * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 47 1.1 skrll * 48 1.1 skrll * Carnegie Mellon requests users of this software to return to 49 1.1 skrll * 50 1.1 skrll * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 51 1.1 skrll * School of Computer Science 52 1.1 skrll * Carnegie Mellon University 53 1.1 skrll * Pittsburgh PA 15213-3890 54 1.1 skrll * 55 1.1 skrll * any improvements or extensions that they make and grant Carnegie the 56 1.1 skrll * rights to redistribute these changes. 57 1.1 skrll */ 58 1.1 skrll 59 1.1 skrll #ifndef _RISCV_PCI_MACHDEP_H_ 60 1.1 skrll #define _RISCV_PCI_MACHDEP_H_ 61 1.1 skrll 62 1.1 skrll /* 63 1.1 skrll * Machine-specific definitions for PCI autoconfiguration. 64 1.1 skrll */ 65 1.1 skrll 66 1.1 skrll #define __HAVE_PCI_GET_SEGMENT 67 1.1 skrll 68 1.1 skrll #ifdef _LP64 69 1.1 skrll #define _PCI_HAVE_DMA64 70 1.1 skrll #endif 71 1.1 skrll 72 1.1 skrll #include <sys/errno.h> 73 1.1 skrll 74 1.1 skrll /* 75 1.1 skrll * Types provided to machine-independent PCI code 76 1.1 skrll */ 77 1.1 skrll typedef struct riscv_pci_chipset *pci_chipset_tag_t; 78 1.1 skrll typedef u_long pcitag_t; 79 1.1 skrll typedef uint64_t pci_intr_handle_t; 80 1.1 skrll 81 1.1 skrll /* 82 1.1 skrll * pci_intr_handle_t fields 83 1.1 skrll */ 84 1.1 skrll #define RISCV_PCI_INTR_MSI_VEC __BITS(42, 32) 85 1.1 skrll #define RISCV_PCI_INTR_MPSAFE __BIT(31) 86 1.1 skrll #define RISCV_PCI_INTR_MSIX __BIT(30) 87 1.1 skrll #define RISCV_PCI_INTR_MSI __BIT(29) 88 1.1 skrll #define RISCV_PCI_INTR_FRAME __BITS(23, 16) 89 1.1 skrll #define RISCV_PCI_INTR_IRQ __BITS(15, 0) 90 1.1 skrll 91 1.1 skrll #ifdef __HAVE_PCI_MSI_MSIX 92 1.1 skrll /* 93 1.1 skrll * PCI MSI/MSI-X support 94 1.1 skrll */ 95 1.1 skrll typedef enum { 96 1.1 skrll PCI_INTR_TYPE_INTX = 0, 97 1.1 skrll PCI_INTR_TYPE_MSI, 98 1.1 skrll PCI_INTR_TYPE_MSIX, 99 1.1 skrll PCI_INTR_TYPE_SIZE, 100 1.1 skrll } pci_intr_type_t; 101 1.1 skrll #endif /* __HAVE_PCI_MSI_MSIX */ 102 1.1 skrll 103 1.1 skrll /* 104 1.1 skrll * Forward declarations. 105 1.1 skrll */ 106 1.1 skrll struct pci_attach_args; 107 1.1 skrll 108 1.1 skrll /* 109 1.1 skrll * riscv-specific PCI structure and type definitions. 110 1.1 skrll * NOT TO BE USED DIRECTLY BY MACHINE INDEPENDENT CODE. 111 1.1 skrll */ 112 1.1 skrll struct riscv_pci_chipset { 113 1.1 skrll void *pc_conf_v; 114 1.1 skrll void (*pc_attach_hook)(device_t, device_t, 115 1.1 skrll struct pcibus_attach_args *); 116 1.1 skrll int (*pc_bus_maxdevs)(void *, int); 117 1.1 skrll pcitag_t (*pc_make_tag)(void *, int, int, int); 118 1.1 skrll void (*pc_decompose_tag)(void *, pcitag_t, int *, 119 1.1 skrll int *, int *); 120 1.1 skrll u_int (*pc_get_segment)(void *); 121 1.1 skrll #if 0 122 1.1 skrll // XXXNH devid? 123 1.1 skrll uint32_t (*pc_get_devid)(void *, uint32_t); 124 1.1 skrll #endif 125 1.1 skrll uint32_t (*pc_get_frameid)(void *, uint32_t); 126 1.1 skrll pcireg_t (*pc_conf_read)(void *, pcitag_t, int); 127 1.1 skrll void (*pc_conf_write)(void *, pcitag_t, int, pcireg_t); 128 1.1 skrll 129 1.1 skrll void *pc_intr_v; 130 1.1 skrll int (*pc_intr_map)(const struct pci_attach_args *, 131 1.1 skrll pci_intr_handle_t *); 132 1.1 skrll const char *(*pc_intr_string)(void *, pci_intr_handle_t, 133 1.1 skrll char *, size_t); 134 1.1 skrll const struct evcnt *(*pc_intr_evcnt)(void *, pci_intr_handle_t); 135 1.1 skrll int (*pc_intr_setattr)(void *, pci_intr_handle_t *, 136 1.1 skrll int, uint64_t); 137 1.1 skrll void *(*pc_intr_establish)(void *, pci_intr_handle_t, 138 1.1 skrll int, int (*)(void *), void *, const char *); 139 1.1 skrll void (*pc_intr_disestablish)(void *, void *); 140 1.1 skrll 141 1.1 skrll #ifdef __HAVE_PCI_CONF_HOOK 142 1.1 skrll int (*pc_conf_hook)(void *, int, int, int, pcireg_t); 143 1.1 skrll #endif 144 1.1 skrll void (*pc_conf_interrupt)(void *, int, int, int, int, int *); 145 1.1 skrll 146 1.1 skrll #ifdef __HAVE_PCI_MSI_MSIX 147 1.1 skrll void *pc_msi_v; 148 1.1 skrll pci_intr_type_t (*pc_intr_type)(void *, pci_intr_handle_t); 149 1.1 skrll int (*pc_intr_alloc)(const struct pci_attach_args *, 150 1.1 skrll pci_intr_handle_t **, int *, pci_intr_type_t); 151 1.1 skrll void (*pc_intr_release)(void *, pci_intr_handle_t *, int); 152 1.1 skrll int (*pc_intx_alloc)(const struct pci_attach_args *, 153 1.1 skrll pci_intr_handle_t **); 154 1.1 skrll int (*pc_msi_alloc)(const struct pci_attach_args *, 155 1.1 skrll pci_intr_handle_t **, int *); 156 1.1 skrll int (*pc_msi_alloc_exact)(const struct pci_attach_args *, 157 1.1 skrll pci_intr_handle_t **, int); 158 1.1 skrll int (*pc_msix_alloc)(const struct pci_attach_args *, 159 1.1 skrll pci_intr_handle_t **, int *); 160 1.1 skrll int (*pc_msix_alloc_exact)(const struct pci_attach_args *, 161 1.1 skrll pci_intr_handle_t **, int); 162 1.1 skrll int (*pc_msix_alloc_map)(const struct pci_attach_args *, 163 1.1 skrll pci_intr_handle_t **, u_int *, int); 164 1.1 skrll #endif 165 1.1 skrll 166 1.1 skrll uint32_t pc_cfg_cmd; 167 1.1 skrll }; 168 1.1 skrll 169 1.1 skrll /* 170 1.1 skrll * Functions provided to machine-independent PCI code. 171 1.1 skrll */ 172 1.1 skrll //XXXNH static inlines.. 173 1.1 skrll #define pci_attach_hook(p, s, pba) \ 174 1.1 skrll (*(pba)->pba_pc->pc_attach_hook)((p), (s), (pba)) 175 1.1 skrll #define pci_bus_maxdevs(c, b) \ 176 1.1 skrll (*(c)->pc_bus_maxdevs)((c)->pc_conf_v, (b)) 177 1.1 skrll #define pci_make_tag(c, b, d, f) \ 178 1.1 skrll (*(c)->pc_make_tag)((c)->pc_conf_v, (b), (d), (f)) 179 1.1 skrll #define pci_decompose_tag(c, t, bp, dp, fp) \ 180 1.1 skrll (*(c)->pc_decompose_tag)((c)->pc_conf_v, (t), (bp), (dp), (fp)) 181 1.1 skrll #define pci_get_segment(c) \ 182 1.1 skrll ((c)->pc_get_segment ? (*(c)->pc_get_segment)((c)->pc_conf_v) : 0) 183 1.1 skrll #define pci_get_devid(c, d) \ 184 1.1 skrll ((c)->pc_get_devid ? (*(c)->pc_get_devid)((c)->pc_conf_v, (d)) : (d)) 185 1.1 skrll #define pci_get_frameid(c, d) \ 186 1.1 skrll ((c)->pc_get_frameid ? (*(c)->pc_get_frameid)((c)->pc_conf_v, (d)) : 0) 187 1.1 skrll #define pci_conf_read(c, t, r) \ 188 1.1 skrll (*(c)->pc_conf_read)((c)->pc_conf_v, (t), (r)) 189 1.1 skrll #define pci_conf_write(c, t, r, v) \ 190 1.1 skrll (*(c)->pc_conf_write)((c)->pc_conf_v, (t), (r), (v)) 191 1.1 skrll #define pci_intr_map(pa, ihp) \ 192 1.1 skrll (*(pa)->pa_pc->pc_intr_map)((pa), (ihp)) 193 1.1 skrll #define pci_intr_string(c, ih, buf, len) \ 194 1.1 skrll (*(c)->pc_intr_string)((c)->pc_intr_v, (ih), (buf), (len)) 195 1.1 skrll #define pci_intr_evcnt(c, ih) \ 196 1.1 skrll (*(c)->pc_intr_evcnt)((c)->pc_intr_v, (ih)) 197 1.1 skrll #define pci_intr_establish(c, ih, l, h, a) \ 198 1.1 skrll (*(c)->pc_intr_establish)((c)->pc_intr_v, (ih), (l), (h), (a), NULL) 199 1.1 skrll #define pci_intr_disestablish(c, iv) \ 200 1.1 skrll (*(c)->pc_intr_disestablish)((c)->pc_intr_v, (iv)) 201 1.1 skrll #ifdef __HAVE_PCI_CONF_HOOK 202 1.1 skrll #define pci_conf_hook(c, b, d, f, id) \ 203 1.1 skrll (*(c)->pc_conf_hook)((c)->pc_conf_v, (b), (d), (f), (id)) 204 1.1 skrll #endif 205 1.1 skrll #define pci_conf_interrupt(c, b, d, i, s, p) \ 206 1.1 skrll (*(c)->pc_conf_interrupt)((c)->pc_conf_v, (b), (d), (i), (s), (p)) 207 1.1 skrll 208 1.1 skrll static inline int 209 1.1 skrll pci_intr_setattr(pci_chipset_tag_t pc, pci_intr_handle_t *ihp, 210 1.1 skrll int attr, uint64_t data) 211 1.1 skrll { 212 1.1 skrll if (!pc->pc_intr_setattr) 213 1.1 skrll return ENODEV; 214 1.1 skrll return pc->pc_intr_setattr(pc, ihp, attr, data); 215 1.1 skrll } 216 1.1 skrll 217 1.1 skrll static inline void * 218 1.1 skrll pci_intr_establish_xname(pci_chipset_tag_t pc, pci_intr_handle_t ih, 219 1.1 skrll int level, int (*fn)(void *), void *arg, const char *xname) 220 1.1 skrll { 221 1.1 skrll return pc->pc_intr_establish(pc->pc_intr_v, ih, level, fn, arg, xname); 222 1.1 skrll } 223 1.1 skrll 224 1.1 skrll #ifdef __HAVE_PCI_MSI_MSIX 225 1.1 skrll pci_intr_type_t 226 1.1 skrll pci_intr_type(pci_chipset_tag_t, pci_intr_handle_t); 227 1.1 skrll int pci_intr_alloc(const struct pci_attach_args *, pci_intr_handle_t **, 228 1.1 skrll int *, pci_intr_type_t); 229 1.1 skrll void pci_intr_release(pci_chipset_tag_t, pci_intr_handle_t *, int); 230 1.1 skrll int pci_intx_alloc(const struct pci_attach_args *, pci_intr_handle_t **); 231 1.1 skrll int pci_msi_alloc(const struct pci_attach_args *, pci_intr_handle_t **, 232 1.1 skrll int *); 233 1.1 skrll int pci_msi_alloc_exact(const struct pci_attach_args *, 234 1.1 skrll pci_intr_handle_t **, int); 235 1.1 skrll int pci_msix_alloc(const struct pci_attach_args *, pci_intr_handle_t **, 236 1.1 skrll int *); 237 1.1 skrll int pci_msix_alloc_exact(const struct pci_attach_args *, 238 1.1 skrll pci_intr_handle_t **, int); 239 1.1 skrll int pci_msix_alloc_map(const struct pci_attach_args *, pci_intr_handle_t **, 240 1.1 skrll u_int *, int); 241 1.1 skrll #endif /* __HAVE_PCI_MSI_MSIX */ 242 1.1 skrll 243 1.1 skrll #endif /* _RISCV_PCI_MACHDEP_H_ */ 244