jh7110_trng.c revision 1.2
1 /* $NetBSD: jh7110_trng.c,v 1.2 2025/02/09 09:09:49 skrll Exp $ */ 2 3 /*- 4 * Copyright (c) 2025 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Nick Hudson 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: jh7110_trng.c,v 1.2 2025/02/09 09:09:49 skrll Exp $"); 34 35 #include <sys/param.h> 36 37 #include <sys/bus.h> 38 #include <sys/device.h> 39 #include <sys/condvar.h> 40 #include <sys/mutex.h> 41 #include <sys/rndsource.h> 42 43 #include <dev/fdt/fdtvar.h> 44 45 46 struct jh7110_trng_softc { 47 device_t sc_dev; 48 bus_space_tag_t sc_bst; 49 bus_space_handle_t sc_bsh; 50 int sc_phandle; 51 52 kmutex_t sc_lock; 53 kcondvar_t sc_cv; 54 void * sc_ih; 55 bool sc_reseeddone; 56 size_t sc_bytes_wanted; 57 58 krndsource_t sc_rndsource; 59 }; 60 61 62 #define RD4(sc, reg) \ 63 bus_space_read_4((sc)->sc_bst, (sc)->sc_bsh, (reg)) 64 #define WR4(sc, reg, val) \ 65 bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val)) 66 67 68 /* Register definitions */ 69 // https://doc-en.rvspace.org/JH7110/TRM/JH7110_TRM/control_registers_trng.html?hl=trng 70 #define JH7110_TRNG_CTRL 0x0000 71 #define JH7110_TRNG_CTRL_NOP 0x0 72 #define JH7110_TRNG_CTRL_RANDOMIZE 0x1 73 #define JH7110_TRNG_CTRL_RANDOM_RESEED 0x2 74 #define JH7110_TRNG_CTRL_NONCE_RESEED 0x3 75 #define JH7110_TRNG_STAT 0x0004 76 #define JH7110_TRNG_STAT_SEEDED __BIT(9) 77 78 #define JH7110_TRNG_MODE 0x0008 79 #define JH7110_TRNG_MODE_R256 __BIT(3) 80 #define JH7110_TRNG_SMODE 0x000c 81 #define JH7110_TRNG_IENABLE 0x0010 82 #define JH7110_TRNG_IENABLE_GLOBAL __BIT(31) 83 #define JH7110_TRNG_IENABLE_LFSR_LOCKUP __BIT(4) 84 #define JH7110_TRNG_IENABLE_RQST_LOCKUP __BIT(3) 85 #define JH7110_TRNG_IENABLE_AGE_ALARM __BIT(2) 86 #define JH7110_TRNG_IENABLE_SEED_DONE __BIT(1) 87 #define JH7110_TRNG_IENABLE_RAND_RDY __BIT(0) 88 #define JH7110_TRNG_ISTATUS 0x0014 89 #define JH7110_TRNG_ISTATUS_LFSR_LOCKUP __BIT(4) 90 #define JH7110_TRNG_ISTATUS_RQST_LOCKUP __BIT(3) 91 #define JH7110_TRNG_ISTATUS_AGE_ALARM __BIT(2) 92 #define JH7110_TRNG_ISTATUS_SEED_DONE __BIT(1) 93 #define JH7110_TRNG_ISTATUS_RAND_RDY __BIT(0) 94 #define JH7110_TRNG_FEATURES 0x001c 95 #define JH7110_TRNG_FEATURES_MM_RESET_STATE __BIT(3) 96 #define JH7110_TRNG_FEATURES_RAND_SEED_AVAIL __BIT(2) 97 #define JH7110_TRNG_FEATURES_MAX_RAND_LENGTH __BITS(1,0) 98 99 #define JH7110_TRNG_FEATURES_BITS \ 100 "\177\020" /* New bitmask */ \ 101 "f\003\01mode reset state\0" /* bit 3 (1) */ \ 102 "=\x0" "test mode\0" \ 103 "=\x1" "mission mode\0" \ 104 "f\002\01ring oscillator\0" /* bit 2 (1) */ \ 105 "=\x0" "not preset\0" \ 106 "=\x1" "present\0" \ 107 "f\000\02max rand length\0" /* bits 0 .. 1 */ \ 108 "=\x0" "128-bit\0" \ 109 "=\x1" "256-bit\0" \ 110 "\0" 111 112 113 #define JH7110_TRNG_DATA0 0x0020 114 #define JH7110_TRNG_DATA1 0x0024 115 #define JH7110_TRNG_DATA2 0x0028 116 #define JH7110_TRNG_DATA3 0x002c 117 #define JH7110_TRNG_DATA4 0x0030 118 #define JH7110_TRNG_DATA5 0x0034 119 #define JH7110_TRNG_DATA6 0x0038 120 #define JH7110_TRNG_DATA7 0x003c 121 122 #define JH7110_TRNG_BCONF 0x0068 123 #define JH7110_TRNG_BCONF_AUTO_RESEED_LOOPBACK __BIT(5) 124 #define JH7110_TRNG_BCONF_MODE_AFTER_RST __BIT(4) 125 #define JH7110_TRNG_BCONF_PRNG_LEN_AFTER_RST __BIT(3) 126 #define JH7110_TRNG_BCONF_MAX_PRNG_LEN __BIT(2) 127 #define JH7110_TRNG_BCONF_BITS \ 128 "\177\020" /* New bitmask */ \ 129 "f\005\01auto reseed loopback\0" /* bit 5 (1) */ \ 130 "=\x0" "not present\0" \ 131 "=\x1" "present\0" \ 132 "f\004\01mode after reset\0" /* bit 4 (1) */ \ 133 "=\x0" "test mode\0" \ 134 "=\x1" "mission mode\0" \ 135 "f\003\01PRNG after reset\0" /* bit 3 (1) */ \ 136 "=\x0" "not preset\0" \ 137 "=\x1" "present\0" \ 138 "f\002\01max PRNG length\0" /* bit 2 (1) */ \ 139 "=\x0" "128-bit\0" \ 140 "=\x1" "256-bit\0" \ 141 "\0" 142 143 144 #define RD4(sc, reg) \ 145 bus_space_read_4((sc)->sc_bst, (sc)->sc_bsh, (reg)) 146 #define WR4(sc, reg, val) \ 147 bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val)) 148 149 150 static void 151 jh7110_trng_irqenable(struct jh7110_trng_softc *sc) 152 { 153 WR4(sc, JH7110_TRNG_IENABLE, 154 JH7110_TRNG_IENABLE_GLOBAL | 155 JH7110_TRNG_IENABLE_SEED_DONE | 156 JH7110_TRNG_IENABLE_RAND_RDY | 157 JH7110_TRNG_IENABLE_LFSR_LOCKUP); 158 } 159 160 static void 161 jh7110_trng_irqdisable(struct jh7110_trng_softc *sc) 162 { 163 WR4(sc, JH7110_TRNG_IENABLE, 0); 164 } 165 166 static void 167 jh7110_trng_probe(struct jh7110_trng_softc *sc, uint32_t istat) 168 { 169 KASSERT(mutex_owned(&sc->sc_lock)); 170 171 if (sc->sc_bytes_wanted != 0) { 172 uint32_t data[8]; 173 const uint32_t stat = RD4(sc, JH7110_TRNG_STAT); 174 175 if (stat & JH7110_TRNG_STAT_SEEDED) { 176 if (istat & JH7110_TRNG_ISTATUS_RAND_RDY) { 177 178 WR4(sc, JH7110_TRNG_ISTATUS, 179 JH7110_TRNG_ISTATUS_RAND_RDY); 180 181 data[0] = RD4(sc, JH7110_TRNG_DATA0); 182 data[1] = RD4(sc, JH7110_TRNG_DATA1); 183 data[2] = RD4(sc, JH7110_TRNG_DATA2); 184 data[3] = RD4(sc, JH7110_TRNG_DATA3); 185 data[4] = RD4(sc, JH7110_TRNG_DATA4); 186 data[5] = RD4(sc, JH7110_TRNG_DATA5); 187 data[6] = RD4(sc, JH7110_TRNG_DATA6); 188 data[7] = RD4(sc, JH7110_TRNG_DATA7); 189 190 rnd_add_data_sync(&sc->sc_rndsource, &data, 191 sizeof(data), sizeof(data) * NBBY); 192 193 sc->sc_bytes_wanted -= 194 MIN(sc->sc_bytes_wanted, sizeof(data)); 195 196 if (sc->sc_bytes_wanted == 0) 197 jh7110_trng_irqdisable(sc); 198 } 199 } else { 200 WR4(sc, JH7110_TRNG_CTRL, 201 JH7110_TRNG_CTRL_RANDOM_RESEED); 202 } 203 explicit_memset(data, 0, sizeof data); 204 } 205 if (sc->sc_bytes_wanted != 0) { 206 WR4(sc, JH7110_TRNG_CTRL, 207 JH7110_TRNG_CTRL_RANDOMIZE); 208 } 209 } 210 211 static void 212 jh7110_trng_get(size_t bytes_wanted, void *arg) 213 { 214 struct jh7110_trng_softc * const sc = arg; 215 216 mutex_enter(&sc->sc_lock); 217 sc->sc_bytes_wanted += bytes_wanted; 218 219 jh7110_trng_irqenable(sc); 220 221 const uint32_t istat = RD4(sc, JH7110_TRNG_ISTATUS); 222 jh7110_trng_probe(sc, istat); 223 224 mutex_exit(&sc->sc_lock); 225 } 226 227 228 static int 229 jh7110_trng_intr(void *priv) 230 { 231 struct jh7110_trng_softc * const sc = priv; 232 233 mutex_enter(&sc->sc_lock); 234 235 const uint32_t istat = RD4(sc, JH7110_TRNG_ISTATUS); 236 237 if (istat & JH7110_TRNG_ISTATUS_RAND_RDY) { 238 KASSERT(RD4(sc, JH7110_TRNG_STAT) & JH7110_TRNG_STAT_SEEDED); 239 jh7110_trng_probe(sc, istat); 240 //sc->sc_randready = true; 241 242 } 243 244 if (istat & JH7110_TRNG_ISTATUS_SEED_DONE) 245 sc->sc_reseeddone = true; 246 247 #if 0 248 if (istat & JH7110_TRNG_ISTATUS_LFSR_LOCKUP) { 249 sc->sc_reseeddone = false; 250 } 251 #endif 252 WR4(sc, JH7110_TRNG_ISTATUS, istat); 253 254 if (sc->sc_reseeddone) 255 cv_broadcast(&sc->sc_cv); 256 257 mutex_exit(&sc->sc_lock); 258 259 return 1; 260 } 261 262 263 static void 264 jh7110_trng_init(struct jh7110_trng_softc *sc) 265 { 266 /* Mask and clear all interrupts. */ 267 WR4(sc, JH7110_TRNG_IENABLE, 0U); 268 WR4(sc, JH7110_TRNG_ISTATUS, ~0U); 269 270 WR4(sc, JH7110_TRNG_MODE, JH7110_TRNG_MODE_R256); 271 272 mutex_enter(&sc->sc_lock); 273 274 jh7110_trng_irqenable(sc); 275 276 sc->sc_reseeddone = false; 277 WR4(sc, JH7110_TRNG_CTRL, JH7110_TRNG_CTRL_RANDOM_RESEED); 278 279 while (!sc->sc_reseeddone) { 280 const int error = cv_timedwait(&sc->sc_cv, &sc->sc_lock, 1); 281 if (error) { 282 printf("%s: timedout\n", __func__); 283 mutex_exit(&sc->sc_lock); 284 return; 285 } 286 } 287 mutex_exit(&sc->sc_lock); 288 } 289 290 static void 291 jh7110_trng_attach_i(device_t self) 292 { 293 struct jh7110_trng_softc * const sc = device_private(self); 294 295 jh7110_trng_init(sc); 296 297 /* set up an rndsource */ 298 rndsource_setcb(&sc->sc_rndsource, &jh7110_trng_get, sc); 299 rnd_attach_source(&sc->sc_rndsource, device_xname(self), RND_TYPE_RNG, 300 RND_FLAG_COLLECT_VALUE | RND_FLAG_HASCB); 301 } 302 303 /* Compat string(s) */ 304 static const struct device_compatible_entry compat_data[] = { 305 { .compat = "starfive,jh7110-trng" }, 306 DEVICE_COMPAT_EOL 307 }; 308 309 310 static int 311 jh7110_trng_match(device_t parent, cfdata_t cf, void *aux) 312 { 313 struct fdt_attach_args * const faa = aux; 314 315 return of_compatible_match(faa->faa_phandle, compat_data); 316 } 317 318 static void 319 jh7110_trng_attach(device_t parent, device_t self, void *aux) 320 { 321 struct jh7110_trng_softc * const sc = device_private(self); 322 struct fdt_attach_args * const faa = aux; 323 const int phandle = faa->faa_phandle; 324 bus_space_tag_t bst = faa->faa_bst; 325 bus_addr_t addr; 326 bus_size_t size; 327 int error; 328 329 if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) { 330 aprint_error(": couldn't get registers\n"); 331 return; 332 } 333 334 error = bus_space_map(bst, addr, size, 0, &sc->sc_bsh); 335 if (error) { 336 aprint_error(": couldn't map %#" PRIxBUSADDR ": %d", addr, 337 error); 338 return; 339 } 340 341 /* Enable the hclk clock. */ 342 error = fdtbus_clock_enable(phandle, "hclk", true); 343 if (error) { 344 aprint_error(": couldn't enable 'hclk' clock\n"); 345 return; 346 } 347 348 /* Enable the hclk clock. */ 349 error = fdtbus_clock_enable(phandle, "ahb", true); 350 if (error) { 351 aprint_error(": couldn't enable 'ahb' clock\n"); 352 return; 353 } 354 355 /* Get a reset handle if we need and try to deassert it. */ 356 struct fdtbus_reset * const rst = fdtbus_reset_get_index(phandle, 0); 357 if (rst != NULL) { 358 if (fdtbus_reset_deassert(rst) != 0) { 359 aprint_error(": couldn't de-assert reset\n"); 360 return; 361 } 362 } 363 364 sc->sc_dev = self; 365 sc->sc_phandle = phandle; 366 sc->sc_bst = bst; 367 368 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_VM); 369 cv_init(&sc->sc_cv, "jh7110trng"); 370 371 aprint_naive("\n"); 372 aprint_normal(": JH7110 TRNG\n"); 373 374 char buf[256]; 375 376 snprintb(buf, sizeof(buf), JH7110_TRNG_FEATURES_BITS, 377 RD4(sc, JH7110_TRNG_FEATURES)); 378 aprint_verbose_dev(sc->sc_dev, "Features : %s\n", buf); 379 380 snprintb(buf, sizeof(buf), JH7110_TRNG_BCONF_BITS, 381 RD4(sc, JH7110_TRNG_BCONF)); 382 aprint_verbose_dev(sc->sc_dev, "Build config: %s\n", buf); 383 384 char intrstr[128]; 385 if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) { 386 aprint_error_dev(self, "failed to decode interrupt\n"); 387 return; 388 } 389 390 sc->sc_ih = fdtbus_intr_establish_xname(phandle, 0, IPL_VM, 391 FDT_INTR_MPSAFE, jh7110_trng_intr, sc, device_xname(self)); 392 if (sc->sc_ih == NULL) { 393 aprint_error_dev(self, "failed to establish interrupt on %s\n", 394 intrstr); 395 return; 396 } 397 aprint_normal_dev(self, "interrupting on %s\n", intrstr); 398 399 config_interrupts(self, jh7110_trng_attach_i); 400 } 401 402 CFATTACH_DECL_NEW(jh7110_trng, sizeof(struct jh7110_trng_softc), 403 jh7110_trng_match, jh7110_trng_attach, NULL, NULL); 404
Indexes created Tue Sep 30 20:09:53 GMT 2025