intr.h revision 1.12.14.1 1 1.12.14.1 nisimura /* $NetBSD: intr.h,v 1.12.14.1 2007/05/04 10:34:13 nisimura Exp $ */
2 1.1 briggs
3 1.1 briggs /*-
4 1.1 briggs * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 1.1 briggs * All rights reserved.
6 1.1 briggs *
7 1.1 briggs * This code is derived from software contributed to The NetBSD Foundation
8 1.1 briggs * by Charles M. Hannum.
9 1.1 briggs *
10 1.1 briggs * Redistribution and use in source and binary forms, with or without
11 1.1 briggs * modification, are permitted provided that the following conditions
12 1.1 briggs * are met:
13 1.1 briggs * 1. Redistributions of source code must retain the above copyright
14 1.1 briggs * notice, this list of conditions and the following disclaimer.
15 1.1 briggs * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 briggs * notice, this list of conditions and the following disclaimer in the
17 1.1 briggs * documentation and/or other materials provided with the distribution.
18 1.1 briggs * 3. All advertising materials mentioning features or use of this software
19 1.1 briggs * must display the following acknowledgement:
20 1.1 briggs * This product includes software developed by the NetBSD
21 1.1 briggs * Foundation, Inc. and its contributors.
22 1.1 briggs * 4. Neither the name of The NetBSD Foundation nor the names of its
23 1.1 briggs * contributors may be used to endorse or promote products derived
24 1.1 briggs * from this software without specific prior written permission.
25 1.1 briggs *
26 1.1 briggs * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 1.1 briggs * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 1.1 briggs * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 1.1 briggs * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 1.1 briggs * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 1.1 briggs * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 1.1 briggs * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 1.1 briggs * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 1.1 briggs * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 1.1 briggs * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 1.1 briggs * POSSIBILITY OF SUCH DAMAGE.
37 1.1 briggs */
38 1.1 briggs
39 1.12.14.1 nisimura #ifndef _MACHINE_INTR_H_
40 1.12.14.1 nisimura #define _MACHINE_INTR_H_
41 1.1 briggs
42 1.1 briggs /* Interrupt priority `levels'. */
43 1.12.14.1 nisimura #define IPL_NONE 0 /* nothing */
44 1.12.14.1 nisimura #define IPL_SOFTCLOCK 1 /* timeouts */
45 1.12.14.1 nisimura #define IPL_SOFTNET 2 /* protocol stacks */
46 1.12.14.1 nisimura #define IPL_BIO 3 /* block I/O */
47 1.12.14.1 nisimura #define IPL_NET 4 /* network */
48 1.12.14.1 nisimura #define IPL_SOFTSERIAL 5 /* serial */
49 1.12.14.1 nisimura #define IPL_AUDIO 6 /* audio */
50 1.12.14.1 nisimura #define IPL_TTY 7 /* terminal */
51 1.12.14.1 nisimura #define IPL_LPT IPL_TTY
52 1.12.14.1 nisimura #define IPL_VM 8 /* memory allocation */
53 1.12.14.1 nisimura #define IPL_CLOCK 9
54 1.12.14.1 nisimura #define IPL_STATCLOCK 10 /* clock */
55 1.12.14.1 nisimura #define IPL_SCHED 11
56 1.12.14.1 nisimura #define IPL_SERIAL 12 /* serial */
57 1.12.14.1 nisimura #define IPL_LOCK 13
58 1.12.14.1 nisimura #define IPL_HIGH 14 /* everything */
59 1.12.14.1 nisimura #define NIPL 15
60 1.1 briggs
61 1.1 briggs /* Interrupt sharing types. */
62 1.1 briggs #define IST_NONE 0 /* none */
63 1.1 briggs #define IST_PULSE 1 /* pulsed */
64 1.1 briggs #define IST_EDGE 2 /* edge-triggered */
65 1.1 briggs #define IST_LEVEL 3 /* level-triggered */
66 1.1 briggs
67 1.1 briggs #ifndef _LOCORE
68 1.12.14.1 nisimura #include <powerpc/softintr.h>
69 1.12.14.1 nisimura #include <machine/cpu.h>
70 1.12.14.1 nisimura
71 1.1 briggs /*
72 1.1 briggs * Interrupt handler chains. intr_establish() inserts a handler into
73 1.1 briggs * the list. The handler is called with its (single) argument.
74 1.1 briggs */
75 1.1 briggs struct intrhand {
76 1.1 briggs int (*ih_fun)(void *);
77 1.1 briggs void *ih_arg;
78 1.1 briggs struct intrhand *ih_next;
79 1.1 briggs int ih_level;
80 1.1 briggs int ih_irq;
81 1.1 briggs };
82 1.1 briggs
83 1.12.14.1 nisimura #include <sys/device.h>
84 1.1 briggs
85 1.12.14.1 nisimura int splraise(int);
86 1.12.14.1 nisimura int spllower(int);
87 1.12.14.1 nisimura void softintr(int);
88 1.12.14.1 nisimura void splx(int);
89 1.1 briggs
90 1.12.14.1 nisimura void do_pending_int(void);
91 1.1 briggs
92 1.12.14.1 nisimura void init_intr_ivr(void);
93 1.12.14.1 nisimura void init_intr_openpic(void);
94 1.1 briggs
95 1.12.14.1 nisimura void enable_intr(void);
96 1.12.14.1 nisimura void disable_intr(void);
97 1.1 briggs
98 1.12.14.1 nisimura void *intr_establish(int, int, int, int (*)(void *), void *);
99 1.12.14.1 nisimura void intr_disestablish(void *);
100 1.1 briggs
101 1.12.14.1 nisimura const char *intr_typename(int);
102 1.1 briggs
103 1.12.14.1 nisimura void softnet(int);
104 1.12.14.1 nisimura void softserial(void);
105 1.12.14.1 nisimura int isa_intr(void);
106 1.12.14.1 nisimura void isa_intr_mask(int);
107 1.12.14.1 nisimura void isa_intr_clr(int);
108 1.12.14.1 nisimura void isa_setirqstat(int, int, int);
109 1.1 briggs
110 1.12.14.1 nisimura extern int imen;
111 1.12.14.1 nisimura extern int imask[];
112 1.12.14.1 nisimura extern struct intrhand *intrhand[];
113 1.1 briggs
114 1.12.14.1 nisimura #define ICU_LEN 64
115 1.1 briggs
116 1.12.14.1 nisimura #if 1 /* PIC_I8259 */
117 1.12.14.1 nisimura #define IRQ_SLAVE 2
118 1.12.14.1 nisimura #define LEGAL_IRQ(x) ((x) >= 0 && (x) < ICU_LEN && (x) != IRQ_SLAVE)
119 1.12.14.1 nisimura #define I8259_INTR_NUM 16
120 1.12.14.1 nisimura #define OPENPIC_INTR_NUM ((ICU_LEN)-(I8259_INTR_NUM))
121 1.12.14.1 nisimura #else
122 1.12.14.1 nisimura #define LEGAL_IRQ(x) ((x) >= 0 && (x) < ICU_LEN)
123 1.12.14.1 nisimura #define OPENPIC_INTR_NUM (0)
124 1.12.14.1 nisimura #endif
125 1.12.14.1 nisimura
126 1.12.14.1 nisimura /* Soft interrupt masks. */
127 1.12.14.1 nisimura #define SIR_CLOCK 28
128 1.12.14.1 nisimura #define SIR_NET 29
129 1.12.14.1 nisimura #define SIR_SERIAL 30
130 1.12.14.1 nisimura #define SPL_CLOCK 31
131 1.12.14.1 nisimura
132 1.12.14.1 nisimura #define setsoftclock() softintr(SIR_CLOCK);
133 1.12.14.1 nisimura #define setsoftnet() softintr(SIR_NET);
134 1.12.14.1 nisimura #define setsoftserial() softintr(SIR_SERIAL);
135 1.1 briggs
136 1.12.14.1 nisimura /*#define splx(x) spllower(x)*/
137 1.1 briggs #define spl0() spllower(0)
138 1.1 briggs
139 1.11 yamt typedef int ipl_t;
140 1.11 yamt typedef struct {
141 1.11 yamt ipl_t _ipl;
142 1.11 yamt } ipl_cookie_t;
143 1.11 yamt
144 1.11 yamt static inline ipl_cookie_t
145 1.11 yamt makeiplcookie(ipl_t ipl)
146 1.11 yamt {
147 1.11 yamt
148 1.11 yamt return (ipl_cookie_t){._ipl = ipl};
149 1.11 yamt }
150 1.11 yamt
151 1.11 yamt static inline int
152 1.11 yamt splraiseipl(ipl_cookie_t icookie)
153 1.11 yamt {
154 1.11 yamt
155 1.11 yamt return splraise(imask[icookie._ipl]);
156 1.11 yamt }
157 1.11 yamt
158 1.12.14.1 nisimura #include <sys/spl.h>
159 1.12.14.1 nisimura
160 1.1 briggs #endif /* !_LOCORE */
161 1.1 briggs
162 1.12.14.1 nisimura #endif /* !_MACHINE_INTR_H_ */
163