entry.S revision 1.2.4.2
1 1.2.4.2 bouyer /* $NetBSD: entry.S,v 1.2.4.2 2011/03/06 15:07:55 bouyer Exp $ */ 2 1.2.4.2 bouyer 3 1.2.4.2 bouyer #include <powerpc/psl.h> 4 1.2.4.2 bouyer #include <powerpc/spr.h> 5 1.2.4.2 bouyer #include <powerpc/oea/spr.h> 6 1.2.4.2 bouyer #include <powerpc/oea/bat.h> 7 1.2.4.2 bouyer #include <powerpc/oea/hid.h> 8 1.2.4.2 bouyer 9 1.2.4.2 bouyer .text 10 1.2.4.2 bouyer .globl _start 11 1.2.4.2 bouyer _start: 12 1.2.4.2 bouyer /* 13 1.2.4.2 bouyer * Save possible argc and argv values from the firmware, usually 14 1.2.4.2 bouyer * passed in r3 and r4. 15 1.2.4.2 bouyer * When started with "bootm", as a Linux kernel module, r6 and r7 16 1.2.4.2 bouyer * point to the start and end address of the bootargs. 17 1.2.4.2 bouyer */ 18 1.2.4.2 bouyer mr 30,3 19 1.2.4.2 bouyer mr 31,4 20 1.2.4.2 bouyer mr 28,6 21 1.2.4.2 bouyer mr 29,7 22 1.2.4.2 bouyer 23 1.2.4.2 bouyer /* 24 1.2.4.2 bouyer * U-Boot/PPCBoot forgets to flush the cache when using the "bootm" 25 1.2.4.2 bouyer * command, so we have to do that now. 26 1.2.4.2 bouyer */ 27 1.2.4.2 bouyer lis 3,_start@ha 28 1.2.4.2 bouyer addi 3,3,_start@l 29 1.2.4.2 bouyer andi. 3,3,~31@l 30 1.2.4.2 bouyer lis 4,(_edata+31)@ha 31 1.2.4.2 bouyer addi 4,4,(_edata+31)@l 32 1.2.4.2 bouyer mr 5,3 33 1.2.4.2 bouyer 10: 34 1.2.4.2 bouyer dcbst 0,5 35 1.2.4.2 bouyer addi 5,5,32 36 1.2.4.2 bouyer cmplw 5,4 37 1.2.4.2 bouyer ble 10b 38 1.2.4.2 bouyer sync 39 1.2.4.2 bouyer 11: 40 1.2.4.2 bouyer icbi 0,3 41 1.2.4.2 bouyer addi 3,3,32 42 1.2.4.2 bouyer cmplw 3,4 43 1.2.4.2 bouyer ble 11b 44 1.2.4.2 bouyer sync 45 1.2.4.2 bouyer isync 46 1.2.4.2 bouyer 47 1.2.4.2 bouyer mfspr 11,SPR_HID0 48 1.2.4.2 bouyer andi. 0,11,HID0_DCE 49 1.2.4.2 bouyer ori 11,11,HID0_ICE 50 1.2.4.2 bouyer ori 8,11,HID0_ICFI 51 1.2.4.2 bouyer bne 1f /* don't invalidate the D-cache */ 52 1.2.4.2 bouyer ori 8,8,HID0_DCFI /* unless it wasn't enabled */ 53 1.2.4.2 bouyer 1: 54 1.2.4.2 bouyer mfmsr 0 55 1.2.4.2 bouyer andi. 0,0,PSL_DR 56 1.2.4.2 bouyer beq 2f 57 1.2.4.2 bouyer lis 5, 0xfec00000@ha /* CONFIG_ADDR of PCI */ 58 1.2.4.2 bouyer lis 6, 0xfee00000@ha /* CONFIG_DATA of PCI */ 59 1.2.4.2 bouyer mfspr 3,SPR_DBAT0U 60 1.2.4.2 bouyer mfspr 4,SPR_DBAT0L 61 1.2.4.2 bouyer bl dbat_sanity_check 62 1.2.4.2 bouyer beq 3f 63 1.2.4.2 bouyer mfspr 3,SPR_DBAT1U 64 1.2.4.2 bouyer mfspr 4,SPR_DBAT1L 65 1.2.4.2 bouyer bl dbat_sanity_check 66 1.2.4.2 bouyer beq 3f 67 1.2.4.2 bouyer mfspr 3,SPR_DBAT2U 68 1.2.4.2 bouyer mfspr 4,SPR_DBAT2L 69 1.2.4.2 bouyer bl dbat_sanity_check 70 1.2.4.2 bouyer beq 3f 71 1.2.4.2 bouyer mfspr 3,SPR_DBAT3U 72 1.2.4.2 bouyer mfspr 4,SPR_DBAT3L 73 1.2.4.2 bouyer bl dbat_sanity_check 74 1.2.4.2 bouyer beq 3f 75 1.2.4.2 bouyer 76 1.2.4.2 bouyer 2: /* Disable D-cache */ 77 1.2.4.2 bouyer li 0,HID0_DCE 78 1.2.4.2 bouyer andc 11,11,0 79 1.2.4.2 bouyer b 4f 80 1.2.4.2 bouyer 81 1.2.4.2 bouyer 3: /* Enable D-cache */ 82 1.2.4.2 bouyer ori 11,11,HID0_DCE 83 1.2.4.2 bouyer 84 1.2.4.2 bouyer 4: 85 1.2.4.2 bouyer lis 1,BAT123@ha 86 1.2.4.2 bouyer addi 1,1,BAT123@l 87 1.2.4.2 bouyer lwz 3,0(1) 88 1.2.4.2 bouyer lwz 4,4(1) 89 1.2.4.2 bouyer mtdbatl 1,3 90 1.2.4.2 bouyer mtdbatu 1,4 91 1.2.4.2 bouyer lwz 3,8(1) 92 1.2.4.2 bouyer lwz 4,12(1) 93 1.2.4.2 bouyer mtdbatl 2,3 94 1.2.4.2 bouyer mtdbatu 2,4 95 1.2.4.2 bouyer lwz 3,16(1) 96 1.2.4.2 bouyer lwz 4,20(1) 97 1.2.4.2 bouyer mtdbatl 3,3 98 1.2.4.2 bouyer mtdbatu 3,4 99 1.2.4.2 bouyer 100 1.2.4.2 bouyer sync 101 1.2.4.2 bouyer mtspr SPR_HID0,8 /* enable and invalidate caches */ 102 1.2.4.2 bouyer sync 103 1.2.4.2 bouyer mtspr SPR_HID0,11 /* enable caches */ 104 1.2.4.2 bouyer sync 105 1.2.4.2 bouyer isync 106 1.2.4.2 bouyer 107 1.2.4.2 bouyer /* make sure .bss gets zeroed. */ 108 1.2.4.2 bouyer li 0,0 109 1.2.4.2 bouyer lis 8,edata@ha 110 1.2.4.2 bouyer addi 8,8,edata@l 111 1.2.4.2 bouyer lis 9,end@ha 112 1.2.4.2 bouyer addi 9,9,end@l 113 1.2.4.2 bouyer 5: cmpw 0,8,9 /* edata & end are >= word aligned */ 114 1.2.4.2 bouyer bge 6f 115 1.2.4.2 bouyer stw 0,0(8) 116 1.2.4.2 bouyer addi 8,8,4 117 1.2.4.2 bouyer b 5b 118 1.2.4.2 bouyer 119 1.2.4.2 bouyer 6: 120 1.2.4.2 bouyer /* prepare stack at +1MB from _start. */ 121 1.2.4.2 bouyer lis 1,_start@h 122 1.2.4.2 bouyer ori 1,1,_start@l 123 1.2.4.2 bouyer addis 1,1,0x10 124 1.2.4.2 bouyer addi 1,1,-4 125 1.2.4.2 bouyer 126 1.2.4.2 bouyer bl brdsetup 127 1.2.4.2 bouyer mr 3,30 128 1.2.4.2 bouyer mr 4,31 129 1.2.4.2 bouyer mr 5,28 130 1.2.4.2 bouyer mr 6,29 131 1.2.4.2 bouyer bl main 132 1.2.4.2 bouyer 133 1.2.4.2 bouyer hang: b hang 134 1.2.4.2 bouyer /* NOTREACHED */ 135 1.2.4.2 bouyer 136 1.2.4.2 bouyer dbat_sanity_check: 137 1.2.4.2 bouyer andi. 0,3,BAT_Vs 138 1.2.4.2 bouyer beq 2f 139 1.2.4.2 bouyer andi. 0,4,BAT_I|BAT_PP_RW 140 1.2.4.2 bouyer cmpwi 0,0,BAT_I|BAT_PP_RW 141 1.2.4.2 bouyer bnelr 142 1.2.4.2 bouyer rlwinm 0,3,15,4,14 143 1.2.4.2 bouyer andis. 3,3,0xfffe0000@ha /* BAT_EPI */ 144 1.2.4.2 bouyer andis. 4,4,BAT_RPN@ha 145 1.2.4.2 bouyer cmplw 0,3,4 146 1.2.4.2 bouyer bnelr 147 1.2.4.2 bouyer add 4,4,0 148 1.2.4.2 bouyer oris 4,4,0x0001ffff@ha 149 1.2.4.2 bouyer ori 4,4,0x0001ffff@l 150 1.2.4.2 bouyer cmplw 0,3,5 151 1.2.4.2 bouyer bgt 1f 152 1.2.4.2 bouyer cmplw 0,5,4 153 1.2.4.2 bouyer bgt 1f 154 1.2.4.2 bouyer li 5,0 155 1.2.4.2 bouyer 1: cmplw 0,3,6 156 1.2.4.2 bouyer bgt 2f 157 1.2.4.2 bouyer cmplw 0,6,4 158 1.2.4.2 bouyer bgt 2f 159 1.2.4.2 bouyer li 6,0 160 1.2.4.2 bouyer 2: cmplw 0,5,6 161 1.2.4.2 bouyer blr 162 1.2.4.2 bouyer 163 1.2.4.2 bouyer /* 164 1.2.4.2 bouyer * run(startsym, endsym, howto, bootinfo, entry) 165 1.2.4.2 bouyer */ 166 1.2.4.2 bouyer .globl run 167 1.2.4.2 bouyer run: 168 1.2.4.2 bouyer mtctr 7 /* hat trick jump to entry point */ 169 1.2.4.2 bouyer bctr 170 1.2.4.2 bouyer 171 1.2.4.2 bouyer /* 172 1.2.4.2 bouyer * reverse endian access to mimic outw/outl/inw/inl 173 1.2.4.2 bouyer */ 174 1.2.4.2 bouyer .globl out16rb 175 1.2.4.2 bouyer .globl iohtole16 176 1.2.4.2 bouyer out16rb: 177 1.2.4.2 bouyer iohtole16: 178 1.2.4.2 bouyer sthbrx 4,0,3 179 1.2.4.2 bouyer eieio 180 1.2.4.2 bouyer blr 181 1.2.4.2 bouyer 182 1.2.4.2 bouyer .globl out32rb 183 1.2.4.2 bouyer .globl iohtole32 184 1.2.4.2 bouyer out32rb: 185 1.2.4.2 bouyer iohtole32: 186 1.2.4.2 bouyer stwbrx 4,0,3 187 1.2.4.2 bouyer eieio 188 1.2.4.2 bouyer blr 189 1.2.4.2 bouyer 190 1.2.4.2 bouyer .global in16rb 191 1.2.4.2 bouyer .global iole16toh 192 1.2.4.2 bouyer in16rb: 193 1.2.4.2 bouyer iole16toh: 194 1.2.4.2 bouyer lhbrx 3,0,3 195 1.2.4.2 bouyer eieio 196 1.2.4.2 bouyer blr 197 1.2.4.2 bouyer 198 1.2.4.2 bouyer .global in32rb 199 1.2.4.2 bouyer .global iole32toh 200 1.2.4.2 bouyer in32rb: 201 1.2.4.2 bouyer iole32toh: 202 1.2.4.2 bouyer lwbrx 3,0,3 203 1.2.4.2 bouyer eieio 204 1.2.4.2 bouyer blr 205 1.2.4.2 bouyer 206 1.2.4.2 bouyer .data 207 1.2.4.2 bouyer #define xBATL(pa, wimg, pp) \ 208 1.2.4.2 bouyer ((pa) | (wimg) | (pp)) 209 1.2.4.2 bouyer #define xBATU(va, len, v) \ 210 1.2.4.2 bouyer ((va) | ((len) & BAT_BL) | ((v) & BAT_V)) 211 1.2.4.2 bouyer BAT123: 212 1.2.4.2 bouyer .long xBATL(0x80000000, BAT_I|BAT_G, BAT_PP_RW) 213 1.2.4.2 bouyer .long xBATU(0x80000000, BAT_BL_256M, BAT_Vs) 214 1.2.4.2 bouyer .long xBATL(0xfc000000, BAT_I|BAT_G, BAT_PP_RW) 215 1.2.4.2 bouyer .long xBATU(0xfc000000, BAT_BL_64M, BAT_Vs) 216 1.2.4.2 bouyer .long 0 217 1.2.4.2 bouyer .long 0 218
Indexes created Wed Oct 22 13:09:56 GMT 2025