entry.S revision 1.3
1 /* $NetBSD: entry.S,v 1.3 2011/03/13 15:23:43 phx Exp $ */ 2 3 #include <powerpc/psl.h> 4 #include <powerpc/spr.h> 5 #include <powerpc/oea/spr.h> 6 #include <powerpc/oea/bat.h> 7 #include <powerpc/oea/hid.h> 8 9 .text 10 .globl _start 11 _start: 12 /* 13 * Save possible argc and argv values from the firmware, usually 14 * passed in r3 and r4. 15 * When started with "bootm", as a Linux kernel module, r6 and r7 16 * point to the start and end address of the bootargs. 17 */ 18 mr 30,3 19 mr 31,4 20 mr 28,6 21 mr 29,7 22 23 /* 24 * U-Boot/PPCBoot forgets to flush the cache when using the "bootm" 25 * command, so we have to do that now. 26 */ 27 lis 11,_start@ha 28 addi 11,11,_start@l 29 andi. 11,11,~31@l 30 lis 12,(_edata+31)@ha 31 addi 12,12,(_edata+31)@l 32 bl syncicache 33 34 mfspr 11,SPR_HID0 35 andi. 0,11,HID0_DCE 36 ori 11,11,HID0_ICE 37 ori 8,11,HID0_ICFI 38 bne 1f /* don't invalidate the D-cache */ 39 ori 8,8,HID0_DCFI /* unless it wasn't enabled */ 40 1: 41 mfmsr 0 42 andi. 0,0,PSL_DR 43 beq 2f 44 lis 5, 0xfec00000@ha /* CONFIG_ADDR of PCI */ 45 lis 6, 0xfee00000@ha /* CONFIG_DATA of PCI */ 46 mfspr 3,SPR_DBAT0U 47 mfspr 4,SPR_DBAT0L 48 bl dbat_sanity_check 49 beq 3f 50 mfspr 3,SPR_DBAT1U 51 mfspr 4,SPR_DBAT1L 52 bl dbat_sanity_check 53 beq 3f 54 mfspr 3,SPR_DBAT2U 55 mfspr 4,SPR_DBAT2L 56 bl dbat_sanity_check 57 beq 3f 58 mfspr 3,SPR_DBAT3U 59 mfspr 4,SPR_DBAT3L 60 bl dbat_sanity_check 61 beq 3f 62 63 2: /* Disable D-cache */ 64 li 0,HID0_DCE 65 andc 11,11,0 66 b 4f 67 68 3: /* Enable D-cache */ 69 ori 11,11,HID0_DCE 70 71 4: 72 lis 1,BAT123@ha 73 addi 1,1,BAT123@l 74 lwz 3,0(1) 75 lwz 4,4(1) 76 mtdbatl 1,3 77 mtdbatu 1,4 78 lwz 3,8(1) 79 lwz 4,12(1) 80 mtdbatl 2,3 81 mtdbatu 2,4 82 lwz 3,16(1) 83 lwz 4,20(1) 84 mtdbatl 3,3 85 mtdbatu 3,4 86 87 sync 88 mtspr SPR_HID0,8 /* enable and invalidate caches */ 89 sync 90 mtspr SPR_HID0,11 /* enable caches */ 91 sync 92 isync 93 94 /* make sure .bss gets zeroed. */ 95 li 0,0 96 lis 8,edata@ha 97 addi 8,8,edata@l 98 lis 9,end@ha 99 addi 9,9,end@l 100 5: cmpw 0,8,9 /* edata & end are >= word aligned */ 101 bge 6f 102 stw 0,0(8) 103 addi 8,8,4 104 b 5b 105 106 6: 107 /* prepare stack at +1MB from _start. */ 108 lis 1,_start@h 109 ori 1,1,_start@l 110 addis 1,1,0x10 111 addi 1,1,-4 112 113 bl brdsetup 114 mr 3,30 115 mr 4,31 116 mr 5,28 117 mr 6,29 118 bl main 119 120 hang: b hang 121 /* NOTREACHED */ 122 123 dbat_sanity_check: 124 andi. 0,3,BAT_Vs 125 beq 2f 126 andi. 0,4,BAT_I|BAT_PP_RW 127 cmpwi 0,0,BAT_I|BAT_PP_RW 128 bnelr 129 rlwinm 0,3,15,4,14 130 andis. 3,3,0xfffe0000@ha /* BAT_EPI */ 131 andis. 4,4,BAT_RPN@ha 132 cmplw 0,3,4 133 bnelr 134 add 4,4,0 135 oris 4,4,0x0001ffff@ha 136 ori 4,4,0x0001ffff@l 137 cmplw 0,3,5 138 bgt 1f 139 cmplw 0,5,4 140 bgt 1f 141 li 5,0 142 1: cmplw 0,3,6 143 bgt 2f 144 cmplw 0,6,4 145 bgt 2f 146 li 6,0 147 2: cmplw 0,5,6 148 blr 149 150 /* 151 * run(startsym, endsym, howto, bootinfo, entry) 152 */ 153 .globl run 154 run: 155 mtctr 7 /* hat trick jump to entry point */ 156 bctr 157 158 /* 159 * newaltboot(argc, argv, altboot_base, altboot_len) 160 * To be executed in a safe memory region. Copies the new altboot from 161 * altboot_base to 0x1000000 and starts it there. 162 */ 163 .globl newaltboot 164 newaltboot: 165 lis 7,0x1000000@h 166 mr 11,7 167 subi 7,7,4 168 subi 5,5,4 169 add 12,11,6 170 addi 6,6,3 171 srawi 6,6,2 172 mtctr 6 173 1: lwzu 8,4(5) 174 stwu 8,4(7) 175 bdnz+ 1b 176 mtctr 11 177 addi 12,12,31 178 bl syncicache 179 bctr 180 syncicache: 181 /* r11=start, r12=end, r10=scratch */ 182 mr 10,11 183 2: dcbst 0,10 184 addi 10,10,32 185 cmplw 10,12 186 ble 2b 187 sync 188 3: icbi 0,11 189 addi 11,11,32 190 cmplw 11,12 191 ble 3b 192 sync 193 isync 194 blr 195 .globl newaltboot_end 196 newaltboot_end: 197 198 /* 199 * reverse endian access to mimic outw/outl/inw/inl 200 */ 201 .globl out16rb 202 .globl iohtole16 203 out16rb: 204 iohtole16: 205 sthbrx 4,0,3 206 eieio 207 blr 208 209 .globl out32rb 210 .globl iohtole32 211 out32rb: 212 iohtole32: 213 stwbrx 4,0,3 214 eieio 215 blr 216 217 .global in16rb 218 .global iole16toh 219 in16rb: 220 iole16toh: 221 lhbrx 3,0,3 222 eieio 223 blr 224 225 .global in32rb 226 .global iole32toh 227 in32rb: 228 iole32toh: 229 lwbrx 3,0,3 230 eieio 231 blr 232 233 .data 234 #define xBATL(pa, wimg, pp) \ 235 ((pa) | (wimg) | (pp)) 236 #define xBATU(va, len, v) \ 237 ((va) | ((len) & BAT_BL) | ((v) & BAT_V)) 238 BAT123: 239 .long xBATL(0x80000000, BAT_I|BAT_G, BAT_PP_RW) 240 .long xBATU(0x80000000, BAT_BL_256M, BAT_Vs) 241 .long xBATL(0xfc000000, BAT_I|BAT_G, BAT_PP_RW) 242 .long xBATU(0xfc000000, BAT_BL_64M, BAT_Vs) 243 .long 0 244 .long 0 245
Indexes created Thu Oct 02 01:09:59 GMT 2025