1 1.1 nisimura /* $NetBSD: kse.c,v 1.1 2011/01/23 01:05:30 nisimura Exp $ */ 2 1.1 nisimura 3 1.1 nisimura /*- 4 1.1 nisimura * Copyright (c) 2008 The NetBSD Foundation, Inc. 5 1.1 nisimura * All rights reserved. 6 1.1 nisimura * 7 1.1 nisimura * This code is derived from software contributed to The NetBSD Foundation 8 1.1 nisimura * by Tohru Nishimura. 9 1.1 nisimura * 10 1.1 nisimura * Redistribution and use in source and binary forms, with or without 11 1.1 nisimura * modification, are permitted provided that the following conditions 12 1.1 nisimura * are met: 13 1.1 nisimura * 1. Redistributions of source code must retain the above copyright 14 1.1 nisimura * notice, this list of conditions and the following disclaimer. 15 1.1 nisimura * 2. Redistributions in binary form must reproduce the above copyright 16 1.1 nisimura * notice, this list of conditions and the following disclaimer in the 17 1.1 nisimura * documentation and/or other materials provided with the distribution. 18 1.1 nisimura * 19 1.1 nisimura * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 1.1 nisimura * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 1.1 nisimura * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 1.1 nisimura * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 1.1 nisimura * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 1.1 nisimura * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 1.1 nisimura * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 1.1 nisimura * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 1.1 nisimura * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 1.1 nisimura * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 1.1 nisimura * POSSIBILITY OF SUCH DAMAGE. 30 1.1 nisimura */ 31 1.1 nisimura 32 1.1 nisimura #include <sys/param.h> 33 1.1 nisimura 34 1.1 nisimura #include <netinet/in.h> 35 1.1 nisimura #include <netinet/in_systm.h> 36 1.1 nisimura 37 1.1 nisimura #include <lib/libsa/stand.h> 38 1.1 nisimura #include <lib/libsa/net.h> 39 1.1 nisimura 40 1.1 nisimura #include "globals.h" 41 1.1 nisimura 42 1.1 nisimura /* 43 1.1 nisimura * - reverse endian access every CSR. 44 1.1 nisimura * - no VTOPHYS() translation, vaddr_t == paddr_t. 45 1.1 nisimura * - PIPT writeback cache aware. 46 1.1 nisimura */ 47 1.1 nisimura #define CSR_READ_4(l, r) in32rb((l)->csr+(r)) 48 1.1 nisimura #define CSR_WRITE_4(l, r, v) out32rb((l)->csr+(r), (v)) 49 1.1 nisimura #define CSR_READ_2(l, r) in16rb((l)->csr+(r)) 50 1.1 nisimura #define CSR_WRITE_2(l, r, v) out16rb((l)->csr+(r), (v)) 51 1.1 nisimura #define VTOPHYS(va) (uint32_t)(va) 52 1.1 nisimura #define DEVTOV(pa) (uint32_t)(pa) 53 1.1 nisimura #define wbinv(adr, siz) _wbinv(VTOPHYS(adr), (uint32_t)(siz)) 54 1.1 nisimura #define inv(adr, siz) _inv(VTOPHYS(adr), (uint32_t)(siz)) 55 1.1 nisimura #define DELAY(n) delay(n) 56 1.1 nisimura #define ALLOC(T,A) (T *)allocaligned(sizeof(T),(A)) 57 1.1 nisimura 58 1.1 nisimura struct desc { 59 1.1 nisimura uint32_t xd0, xd1, xd2, xd3; 60 1.1 nisimura }; 61 1.1 nisimura #define T0_OWN (1U<<31) /* desc is ready to Tx */ 62 1.1 nisimura #define T1_IC (1U<<31) /* post interrupt on complete */ 63 1.1 nisimura #define T1_FS (1U<<30) /* first segment of frame */ 64 1.1 nisimura #define T1_LS (1U<<29) /* last segment of frame */ 65 1.1 nisimura #define T1_TER (1U<<25) /* end of ring */ 66 1.1 nisimura #define T1_SPN 0x00300000 /* 21:20 switch port 1/2 */ 67 1.1 nisimura #define T1_TBS_MASK 0x7ff /* segment size 10:0 */ 68 1.1 nisimura 69 1.1 nisimura #define R0_OWN (1U<<31) /* desc is empty */ 70 1.1 nisimura #define R0_FS (1U<<30) /* first segment of frame */ 71 1.1 nisimura #define R0_LS (1U<<29) /* last segment of frame */ 72 1.1 nisimura #define R0_IPE (1U<<28) /* IP checksum error */ 73 1.1 nisimura #define R0_TCPE (1U<<27) /* TCP checksum error */ 74 1.1 nisimura #define R0_UDPE (1U<<26) /* UDP checksum error */ 75 1.1 nisimura #define R0_ES (1U<<25) /* error summary */ 76 1.1 nisimura #define R0_MF (1U<<24) /* multicast frame */ 77 1.1 nisimura #define R0_SPN 0x00300000 /* 21:20 switch port 1/2 */ 78 1.1 nisimura #define R0_RE (1U<<19) /* MII reported error */ 79 1.1 nisimura #define R0_TL (1U<<18) /* frame too long, beyond 1518 */ 80 1.1 nisimura #define R0_RF (1U<<17) /* damaged runt frame */ 81 1.1 nisimura #define R0_CE (1U<<16) /* CRC error */ 82 1.1 nisimura #define R0_FT (1U<<15) /* frame type */ 83 1.1 nisimura #define R0_FL_MASK 0x7ff /* frame length 10:0 */ 84 1.1 nisimura #define R1_RER (1U<<25) /* end of ring */ 85 1.1 nisimura #define R1_RBS_MASK 0x7fc /* segment size 10:0 */ 86 1.1 nisimura 87 1.1 nisimura #define MDTXC 0x000 /* DMA transmit control */ 88 1.1 nisimura #define MDRXC 0x004 /* DMA receive control */ 89 1.1 nisimura #define MDTSC 0x008 /* DMA transmit start */ 90 1.1 nisimura #define MDRSC 0x00c /* DMA receive start */ 91 1.1 nisimura #define TDLB 0x010 /* transmit descriptor list base */ 92 1.1 nisimura #define RDLB 0x014 /* receive descriptor list base */ 93 1.1 nisimura #define MARL 0x200 /* MAC address low */ 94 1.1 nisimura #define MARM 0x202 /* MAC address middle */ 95 1.1 nisimura #define MARH 0x204 /* MAC address high */ 96 1.1 nisimura #define CIDR 0x400 /* chip ID and enable */ 97 1.1 nisimura #define P1CR4 0x512 /* port 1 control 4 */ 98 1.1 nisimura #define P1SR 0x514 /* port 1 status */ 99 1.1 nisimura 100 1.1 nisimura #define FRAMESIZE 1536 101 1.1 nisimura 102 1.1 nisimura struct local { 103 1.1 nisimura struct desc txd[2]; 104 1.1 nisimura struct desc rxd[2]; 105 1.1 nisimura uint8_t rxstore[2][FRAMESIZE]; 106 1.1 nisimura unsigned csr, tx, rx; 107 1.1 nisimura }; 108 1.1 nisimura 109 1.1 nisimura static void mii_dealan(struct local *, unsigned); 110 1.1 nisimura 111 1.1 nisimura int 112 1.1 nisimura kse_match(unsigned tag, void *data) 113 1.1 nisimura { 114 1.1 nisimura unsigned v; 115 1.1 nisimura 116 1.1 nisimura v = pcicfgread(tag, PCI_ID_REG); 117 1.1 nisimura switch (v) { 118 1.1 nisimura case PCI_DEVICE(0x16c6, 0x8841): 119 1.1 nisimura case PCI_DEVICE(0x16c6, 0x8842): 120 1.1 nisimura return 1; 121 1.1 nisimura } 122 1.1 nisimura return 0; 123 1.1 nisimura } 124 1.1 nisimura 125 1.1 nisimura void * 126 1.1 nisimura kse_init(unsigned tag, void *data) 127 1.1 nisimura { 128 1.1 nisimura struct local *l; 129 1.1 nisimura struct desc *txd, *rxd; 130 1.1 nisimura unsigned i, val, fdx; 131 1.1 nisimura uint8_t *en; 132 1.1 nisimura 133 1.1 nisimura l = ALLOC(struct local, 32); /* desc alignment */ 134 1.1 nisimura memset(l, 0, sizeof(struct local)); 135 1.1 nisimura l->csr = DEVTOV(pcicfgread(tag, 0x10)); 136 1.1 nisimura 137 1.1 nisimura en = data; 138 1.1 nisimura i = CSR_READ_2(l, MARL); 139 1.1 nisimura en[0] = i; 140 1.1 nisimura en[1] = i >> 8; 141 1.1 nisimura i = CSR_READ_2(l, MARM); 142 1.1 nisimura en[2] = i; 143 1.1 nisimura en[3] = i >> 8; 144 1.1 nisimura i = CSR_READ_2(l, MARH); 145 1.1 nisimura en[4] = i; 146 1.1 nisimura en[5] = i >> 8; 147 1.1 nisimura 148 1.1 nisimura printf("MAC address %02x:%02x:%02x:%02x:%02x:%02x\n", 149 1.1 nisimura en[0], en[1], en[2], en[3], en[4], en[5]); 150 1.1 nisimura 151 1.1 nisimura CSR_WRITE_2(l, CIDR, 1); 152 1.1 nisimura 153 1.1 nisimura mii_dealan(l, 5); 154 1.1 nisimura 155 1.1 nisimura val = pcicfgread(tag, PCI_ID_REG); 156 1.1 nisimura if (PCI_PRODUCT(val) == 0x8841) { 157 1.1 nisimura val = CSR_READ_2(l, P1SR); 158 1.1 nisimura fdx = !!(val & (1U << 9)); 159 1.1 nisimura printf("%s", (val & (1U << 8)) ? "100Mbps" : "10Mbps"); 160 1.1 nisimura if (fdx) 161 1.1 nisimura printf("-FDX"); 162 1.1 nisimura printf("\n"); 163 1.1 nisimura } 164 1.1 nisimura 165 1.1 nisimura txd = &l->txd[0]; 166 1.1 nisimura rxd = &l->rxd[0]; 167 1.1 nisimura rxd[0].xd0 = htole32(R0_OWN); 168 1.1 nisimura rxd[0].xd1 = htole32(FRAMESIZE); 169 1.1 nisimura rxd[0].xd2 = htole32(VTOPHYS(l->rxstore[0])); 170 1.1 nisimura rxd[0].xd3 = htole32(VTOPHYS(&rxd[1])); 171 1.1 nisimura rxd[1].xd0 = htole32(R0_OWN); 172 1.1 nisimura rxd[1].xd1 = htole32(R1_RER | FRAMESIZE); 173 1.1 nisimura rxd[1].xd2 = htole32(VTOPHYS(l->rxstore[1])); 174 1.1 nisimura rxd[1].xd3 = htole32(VTOPHYS(&rxd[0])); 175 1.1 nisimura l->tx = l->rx = 0; 176 1.1 nisimura 177 1.1 nisimura CSR_WRITE_4(l, TDLB, VTOPHYS(txd)); 178 1.1 nisimura CSR_WRITE_4(l, RDLB, VTOPHYS(rxd)); 179 1.1 nisimura CSR_WRITE_4(l, MDTXC, 07); /* stretch short, add CRC, Tx enable */ 180 1.1 nisimura CSR_WRITE_4(l, MDRXC, 01); /* Rx enable */ 181 1.1 nisimura CSR_WRITE_4(l, MDRSC, 01); /* start receiving */ 182 1.1 nisimura 183 1.1 nisimura return l; 184 1.1 nisimura } 185 1.1 nisimura 186 1.1 nisimura int 187 1.1 nisimura kse_send(void *dev, char *buf, unsigned len) 188 1.1 nisimura { 189 1.1 nisimura struct local *l = dev; 190 1.1 nisimura volatile struct desc *txd; 191 1.1 nisimura unsigned txstat, loop; 192 1.1 nisimura 193 1.1 nisimura wbinv(buf, len); 194 1.1 nisimura txd = &l->txd[l->tx]; 195 1.1 nisimura txd->xd2 = htole32(VTOPHYS(buf)); 196 1.1 nisimura txd->xd1 = htole32(T1_FS | T1_LS | (len & T1_TBS_MASK)); 197 1.1 nisimura txd->xd0 = htole32(T0_OWN); 198 1.1 nisimura wbinv(txd, sizeof(struct desc)); 199 1.1 nisimura CSR_WRITE_4(l, MDTSC, 01); /* start transmission */ 200 1.1 nisimura loop = 100; 201 1.1 nisimura do { 202 1.1 nisimura txstat = le32toh(txd->xd0); 203 1.1 nisimura if ((txstat & T0_OWN) == 0) 204 1.1 nisimura goto done; 205 1.1 nisimura DELAY(10); 206 1.1 nisimura inv(txd, sizeof(struct desc)); 207 1.1 nisimura } while (--loop != 0); 208 1.1 nisimura printf("xmit failed\n"); 209 1.1 nisimura return -1; 210 1.1 nisimura done: 211 1.1 nisimura l->tx ^= 1; 212 1.1 nisimura return len; 213 1.1 nisimura } 214 1.1 nisimura 215 1.1 nisimura int 216 1.1 nisimura kse_recv(void *dev, char *buf, unsigned maxlen, unsigned timo) 217 1.1 nisimura { 218 1.1 nisimura struct local *l = dev; 219 1.1 nisimura volatile struct desc *rxd; 220 1.1 nisimura unsigned bound, rxstat, len; 221 1.1 nisimura uint8_t *ptr; 222 1.1 nisimura 223 1.1 nisimura bound = 1000 * timo; 224 1.1 nisimura printf("recving with %u sec. timeout\n", timo); 225 1.1 nisimura again: 226 1.1 nisimura rxd = &l->rxd[l->rx]; 227 1.1 nisimura do { 228 1.1 nisimura inv(rxd, sizeof(struct desc)); 229 1.1 nisimura rxstat = le32toh(rxd->xd0); 230 1.1 nisimura if ((rxstat & R0_OWN) == 0) 231 1.1 nisimura goto gotone; 232 1.1 nisimura DELAY(1000); /* 1 milli second */ 233 1.1 nisimura } while (--bound > 0); 234 1.1 nisimura errno = 0; 235 1.1 nisimura return -1; 236 1.1 nisimura gotone: 237 1.1 nisimura if (rxstat & R0_ES) { 238 1.1 nisimura rxd->xd0 = htole32(R0_OWN); 239 1.1 nisimura wbinv(rxd, sizeof(struct desc)); 240 1.1 nisimura l->rx ^= 1; 241 1.1 nisimura CSR_WRITE_4(l, MDRSC, 01); /* restart receiving */ 242 1.1 nisimura goto again; 243 1.1 nisimura } 244 1.1 nisimura /* good frame */ 245 1.1 nisimura len = (rxstat & R0_FL_MASK) - 4 /* HASFCS */; 246 1.1 nisimura if (len > maxlen) 247 1.1 nisimura len = maxlen; 248 1.1 nisimura ptr = l->rxstore[l->rx]; 249 1.1 nisimura inv(ptr, len); 250 1.1 nisimura memcpy(buf, ptr, len); 251 1.1 nisimura rxd->xd0 = htole32(R0_OWN); 252 1.1 nisimura wbinv(rxd, sizeof(struct desc)); 253 1.1 nisimura l->rx ^= 1; 254 1.1 nisimura CSR_WRITE_4(l, MDRSC, 01); /* necessary? */ 255 1.1 nisimura return len; 256 1.1 nisimura } 257 1.1 nisimura 258 1.1 nisimura void 259 1.1 nisimura mii_dealan(struct local *l, unsigned timo) 260 1.1 nisimura { 261 1.1 nisimura unsigned val, bound; 262 1.1 nisimura 263 1.1 nisimura val = (1U << 13) | (1U << 7) | 0x1f /* advertise all caps */; 264 1.1 nisimura CSR_WRITE_2(l, P1CR4, val); 265 1.1 nisimura bound = getsecs() + timo; 266 1.1 nisimura do { 267 1.1 nisimura val = CSR_READ_2(l, P1SR); 268 1.1 nisimura if (val & (1U << 5)) /* link is found up */ 269 1.1 nisimura break; 270 1.1 nisimura DELAY(10 * 1000); 271 1.1 nisimura } while (getsecs() < bound); 272 1.1 nisimura return; 273 1.1 nisimura } 274