crime.c revision 1.38
1 /* $NetBSD: crime.c,v 1.38 2015/02/18 16:47:58 macallan Exp $ */ 2 3 /* 4 * Copyright (c) 2004 Christopher SEKIYA 5 * Copyright (c) 2000 Soren S. Jorvang 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed for the 19 * NetBSD Project. See http://www.NetBSD.org/ for 20 * information about NetBSD. 21 * 4. The name of the author may not be used to endorse or promote products 22 * derived from this software without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 25 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 26 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 27 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 28 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 29 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 30 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 31 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 32 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 33 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 34 */ 35 36 /* 37 * O2 CRIME 38 */ 39 40 #include <sys/cdefs.h> 41 __KERNEL_RCSID(0, "$NetBSD: crime.c,v 1.38 2015/02/18 16:47:58 macallan Exp $"); 42 43 #include <sys/param.h> 44 #include <sys/device.h> 45 #include <sys/systm.h> 46 #include <sys/kernel.h> 47 #include <sys/cpu.h> 48 49 #include <machine/locore.h> 50 #include <machine/autoconf.h> 51 #include <sys/bus.h> 52 #include <machine/intr.h> 53 #include <machine/machtype.h> 54 #include <machine/sysconf.h> 55 56 #include <sgimips/dev/crimevar.h> 57 #include <sgimips/dev/crimereg.h> 58 #include <sgimips/mace/macevar.h> 59 60 #include "locators.h" 61 62 #define DISABLE_CRIME_WATCHDOG 63 64 static int crime_match(device_t, struct cfdata *, void *); 65 static void crime_attach(device_t, device_t, void *); 66 static void crime_mem_reset(void); 67 static void crime_cpu_reset(void); 68 static void crime_bus_reset(void); 69 void crime_watchdog_reset(void); 70 void crime_watchdog_disable(void); 71 void crime_intr(vaddr_t, uint32_t, uint32_t); 72 void *crime_intr_establish(int, int, int (*)(void *), void *); 73 74 static bus_space_tag_t crm_iot; 75 static bus_space_handle_t crm_ioh; 76 77 CFATTACH_DECL_NEW(crime, sizeof(struct crime_softc), 78 crime_match, crime_attach, NULL, NULL); 79 80 #define CRIME_NINTR 32 /* XXX */ 81 82 struct { 83 int (*func)(void *); 84 void *arg; 85 } crime[CRIME_NINTR]; 86 87 static int 88 crime_match(device_t parent, struct cfdata *match, void *aux) 89 { 90 91 /* 92 * The CRIME is in the O2. 93 */ 94 if (mach_type == MACH_SGI_IP32) 95 return 1; 96 97 return 0; 98 } 99 100 static void 101 crime_attach(device_t parent, device_t self, void *aux) 102 { 103 struct mainbus_attach_args *ma = aux; 104 struct cpu_info * const ci = curcpu(); 105 struct crime_softc *sc = device_private(self); 106 uint64_t crm_id; 107 uint64_t baseline, endline; 108 uint32_t startctr, endctr, cps; 109 110 sc->sc_dev = self; 111 crm_iot = normal_memt; 112 113 if (bus_space_map(crm_iot, ma->ma_addr, 0x1000, 114 BUS_SPACE_MAP_LINEAR, &crm_ioh)) 115 panic("%s: can't map I/O space", __func__); 116 117 crm_id = bus_space_read_8(crm_iot, crm_ioh, CRIME_REV); 118 119 aprint_naive(": system ASIC"); 120 121 switch ((crm_id & CRIME_ID_IDBITS) >> CRIME_ID_IDSHIFT) { 122 case 0x0b: 123 aprint_normal(": rev 1.5"); 124 break; 125 126 case 0x0a: 127 if ((crm_id >> 32) == 0) 128 aprint_normal(": rev 1.1"); 129 else if ((crm_id >> 32) == 1) 130 aprint_normal(": rev 1.3"); 131 else 132 aprint_normal(": rev 1.4"); 133 break; 134 135 case 0x00: 136 aprint_normal(": Petty CRIME"); 137 break; 138 139 default: 140 aprint_normal(": Unknown CRIME"); 141 break; 142 } 143 144 aprint_normal(" (CRIME_ID: %" PRIu64 ")\n", crm_id); 145 146 /* reset CRIME CPU & memory error registers */ 147 crime_mem_reset(); 148 crime_cpu_reset(); 149 150 crime_watchdog_disable(); 151 152 #define CRIME_TIMER_FREQ 66666666 /* crime clock is 66.7MHz */ 153 154 baseline = bus_space_read_8(crm_iot, crm_ioh, CRIME_TIME) 155 & CRIME_TIME_MASK; 156 startctr = mips3_cp0_count_read(); 157 158 /* read both cp0 and crime counters for 100ms */ 159 do { 160 endline = bus_space_read_8(crm_iot, crm_ioh, CRIME_TIME) 161 & CRIME_TIME_MASK; 162 endctr = mips3_cp0_count_read(); 163 } while (endline - baseline < (CRIME_TIMER_FREQ / 10)); 164 165 cps = (endctr - startctr) * 10; 166 ci->ci_cpu_freq = cps; 167 ci->ci_cctr_freq = cps; 168 if (mips_options.mips_cpu_flags & CPU_MIPS_DOUBLE_COUNT) 169 ci->ci_cpu_freq *= 2; 170 ci->ci_cycles_per_hz = (cps + (hz / 2)) / hz; 171 ci->ci_divisor_delay = (cps + (1000000 / 2)) / 1000000; 172 173 /* Turn on memory error and crime error interrupts. 174 All others turned on as devices are registered. */ 175 bus_space_write_8(crm_iot, crm_ioh, CRIME_INTMASK, 176 CRIME_INT_MEMERR | 177 CRIME_INT_CRMERR | 178 CRIME_INT_VICE | 179 CRIME_INT_VID_OUT | 180 CRIME_INT_VID_IN2 | 181 CRIME_INT_VID_IN1); 182 bus_space_write_8(crm_iot, crm_ioh, CRIME_INTSTAT, 0); 183 bus_space_write_8(crm_iot, crm_ioh, CRIME_SOFTINT, 0); 184 bus_space_write_8(crm_iot, crm_ioh, CRIME_HARDINT, 0); 185 186 platform.bus_reset = crime_bus_reset; 187 platform.watchdog_reset = crime_watchdog_reset; 188 platform.watchdog_disable = crime_watchdog_disable; 189 platform.watchdog_enable = crime_watchdog_reset; 190 platform.intr_establish = crime_intr_establish; 191 platform.intr0 = crime_intr; 192 } 193 194 /* 195 * XXX: sharing interrupts? 196 */ 197 198 void * 199 crime_intr_establish(int irq, int level, int (*func)(void *), void *arg) 200 { 201 202 if (irq < 16) 203 return mace_intr_establish(irq, level, func, arg); 204 205 if (crime[irq].func != NULL) 206 return NULL; /* panic("Cannot share CRIME interrupts!"); */ 207 208 crime[irq].func = func; 209 crime[irq].arg = arg; 210 211 crime_intr_mask(irq); 212 213 return (void *)&crime[irq]; 214 } 215 216 void 217 crime_intr(vaddr_t pc, uint32_t status, uint32_t ipending) 218 { 219 uint64_t crime_intmask; 220 uint64_t crime_intstat; 221 uint64_t crime_ipending; 222 uint64_t address, stat; 223 int i; 224 225 crime_intmask = bus_space_read_8(crm_iot, crm_ioh, CRIME_INTMASK); 226 crime_intstat = bus_space_read_8(crm_iot, crm_ioh, CRIME_INTSTAT); 227 crime_ipending = (crime_intstat & crime_intmask); 228 229 if (crime_ipending & 0xffff) 230 mace_intr(crime_ipending & 0xffff); 231 232 if (crime_ipending & 0xffff0000) { 233 /* 234 * CRIME interrupts for CPU and memory errors 235 */ 236 if (crime_ipending & CRIME_INT_MEMERR) { 237 address = bus_space_read_8(crm_iot, crm_ioh, 238 CRIME_MEM_ERROR_ADDR); 239 stat = bus_space_read_8(crm_iot, crm_ioh, 240 CRIME_MEM_ERROR_STAT); 241 printf("crime: memory error address %" PRIu64 242 " status %" PRIu64 "\n", address << 2, stat); 243 crime_mem_reset(); 244 } 245 246 if (crime_ipending & CRIME_INT_CRMERR) { 247 stat = bus_space_read_8(crm_iot, crm_ioh, 248 CRIME_CPU_ERROR_STAT); 249 address = bus_space_read_8(crm_iot, crm_ioh, 250 CRIME_CPU_ERROR_ADDR) << 2; 251 printf("crime: cpu error %" PRIu64 " at address %" 252 PRIu64 "\n", stat, address); 253 crime_cpu_reset(); 254 } 255 } 256 257 crime_ipending &= ~0xffff; 258 259 if (crime_ipending) { 260 for (i = 16; i < CRIME_NINTR; i++) { 261 if ((crime_ipending & (1 << i)) && 262 crime[i].func != NULL) 263 (*crime[i].func)(crime[i].arg); 264 } 265 } 266 } 267 268 void 269 crime_intr_mask(unsigned int intr) 270 { 271 uint64_t mask; 272 273 mask = bus_space_read_8(crm_iot, crm_ioh, CRIME_INTMASK); 274 mask |= (1 << intr); 275 bus_space_write_8(crm_iot, crm_ioh, CRIME_INTMASK, mask); 276 } 277 278 void 279 crime_intr_unmask(unsigned int intr) 280 { 281 uint64_t mask; 282 283 mask = bus_space_read_8(crm_iot, crm_ioh, CRIME_INTMASK); 284 mask &= ~(1 << intr); 285 bus_space_write_8(crm_iot, crm_ioh, CRIME_INTMASK, mask); 286 } 287 288 void 289 crime_mem_reset(void) 290 { 291 292 bus_space_write_8(crm_iot, crm_ioh, CRIME_MEM_ERROR_STAT, 0); 293 } 294 295 void 296 crime_cpu_reset(void) 297 { 298 299 bus_space_write_8(crm_iot, crm_ioh, CRIME_CPU_ERROR_STAT, 0); 300 } 301 302 void 303 crime_bus_reset(void) 304 { 305 306 crime_mem_reset(); 307 crime_cpu_reset(); 308 } 309 310 void 311 crime_watchdog_reset(void) 312 { 313 314 #ifdef DISABLE_CRIME_WATCHDOG 315 bus_space_write_8(crm_iot, crm_ioh, CRIME_WATCHDOG, 0); 316 #else 317 /* enable watchdog timer, clear it */ 318 bus_space_write_8(crm_iot, crm_ioh, 319 CRIME_CONTROL, CRIME_CONTROL_DOG_ENABLE); 320 bus_space_write_8(crm_iot, crm_ioh, CRIME_WATCHDOG, 0); 321 #endif 322 } 323 324 void 325 crime_watchdog_disable(void) 326 { 327 uint64_t reg; 328 329 bus_space_write_8(crm_iot, crm_ioh, CRIME_WATCHDOG, 0); 330 reg = bus_space_read_8(crm_iot, crm_ioh, CRIME_CONTROL) 331 & ~CRIME_CONTROL_DOG_ENABLE; 332 bus_space_write_8(crm_iot, crm_ioh, CRIME_CONTROL, reg); 333 } 334 335 void 336 crime_reboot(void) 337 { 338 339 bus_space_write_8(crm_iot, crm_ioh, CRIME_CONTROL, 340 CRIME_CONTROL_HARD_RESET); 341 for (;;) 342 ; 343 } 344
Indexes created Mon Sep 29 21:09:56 GMT 2025