crmfb.c revision 1.35
1 /* $NetBSD: crmfb.c,v 1.35 2011/07/01 18:53:46 dyoung Exp $ */ 2 3 /*- 4 * Copyright (c) 2007 Jared D. McNeill <jmcneill (at) invisible.ca> 5 * 2008 Michael Lorenz <macallan (at) netbsd.org> 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 19 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 20 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 21 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 25 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 27 * POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 /* 31 * SGI-CRM (O2) Framebuffer driver 32 */ 33 34 #include <sys/cdefs.h> 35 __KERNEL_RCSID(0, "$NetBSD: crmfb.c,v 1.35 2011/07/01 18:53:46 dyoung Exp $"); 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/device.h> 40 #include <sys/malloc.h> 41 42 #define _SGIMIPS_BUS_DMA_PRIVATE 43 #include <machine/autoconf.h> 44 #include <sys/bus.h> 45 #include <machine/machtype.h> 46 #include <machine/vmparam.h> 47 48 #include <dev/arcbios/arcbios.h> 49 #include <dev/arcbios/arcbiosvar.h> 50 51 #include <dev/wscons/wsdisplayvar.h> 52 #include <dev/wscons/wsconsio.h> 53 #include <dev/wsfont/wsfont.h> 54 #include <dev/rasops/rasops.h> 55 #include <dev/wscons/wsdisplay_vconsvar.h> 56 57 #include <dev/i2c/i2cvar.h> 58 #include <dev/i2c/i2c_bitbang.h> 59 #include <dev/i2c/ddcvar.h> 60 #include <dev/videomode/videomode.h> 61 #include <dev/videomode/edidvar.h> 62 63 #include <arch/sgimips/dev/crmfbreg.h> 64 65 #include "opt_crmfb.h" 66 67 #ifdef CRMFB_DEBUG 68 #define DPRINTF printf 69 #else 70 #define DPRINTF while (0) printf 71 #endif 72 73 struct wsscreen_descr crmfb_defaultscreen = { 74 "default", 75 0, 0, 76 NULL, 77 8, 16, 78 WSSCREEN_WSCOLORS, 79 NULL, 80 }; 81 82 const struct wsscreen_descr *_crmfb_scrlist[] = { 83 &crmfb_defaultscreen, 84 }; 85 86 struct wsscreen_list crmfb_screenlist = { 87 sizeof(_crmfb_scrlist) / sizeof(struct wsscreen_descr *), 88 _crmfb_scrlist 89 }; 90 91 static struct vcons_screen crmfb_console_screen; 92 93 static int crmfb_ioctl(void *, void *, u_long, void *, int, struct lwp *); 94 static paddr_t crmfb_mmap(void *, void *, off_t, int); 95 static void crmfb_init_screen(void *, struct vcons_screen *, int, long *); 96 97 struct wsdisplay_accessops crmfb_accessops = { 98 crmfb_ioctl, 99 crmfb_mmap, 100 NULL, /* alloc_screen */ 101 NULL, /* free_screen */ 102 NULL, /* show_screen */ 103 NULL, /* load_font */ 104 NULL, /* pollc */ 105 NULL, /* scroll */ 106 }; 107 108 /* Memory to allocate to SGI-CRM -- remember, this is stolen from 109 * host memory! 110 */ 111 #define CRMFB_TILESIZE (512*128) 112 113 static int crmfb_match(device_t, struct cfdata *, void *); 114 static void crmfb_attach(device_t, device_t, void *); 115 int crmfb_probe(void); 116 117 #define KERNADDR(p) ((void *)((p).addr)) 118 #define DMAADDR(p) ((p).map->dm_segs[0].ds_addr) 119 120 #define CRMFB_REG_MASK(msb, lsb) \ 121 ( (((uint32_t) 1 << ((msb)-(lsb)+1)) - 1) << (lsb) ) 122 123 124 struct crmfb_dma { 125 bus_dmamap_t map; 126 void *addr; 127 bus_dma_segment_t segs[1]; 128 int nsegs; 129 size_t size; 130 }; 131 132 struct crmfb_softc { 133 device_t sc_dev; 134 struct vcons_data sc_vd; 135 struct i2c_controller sc_i2c; 136 int sc_dir; 137 138 bus_space_tag_t sc_iot; 139 bus_space_handle_t sc_ioh; 140 bus_space_handle_t sc_reh; 141 142 bus_dma_tag_t sc_dmat; 143 144 struct crmfb_dma sc_dma; 145 struct crmfb_dma sc_dmai; 146 147 int sc_width; 148 int sc_height; 149 int sc_depth; 150 int sc_console_depth; 151 int sc_tiles_x, sc_tiles_y; 152 uint32_t sc_fbsize; 153 int sc_mte_direction; 154 int sc_mte_x_shift; 155 uint32_t sc_mte_mode; 156 uint8_t *sc_scratch; 157 paddr_t sc_linear; 158 int sc_wsmode; 159 struct edid_info sc_edid_info; 160 161 /* cursor stuff */ 162 int sc_cur_x; 163 int sc_cur_y; 164 int sc_hot_x; 165 int sc_hot_y; 166 167 u_char sc_cmap_red[256]; 168 u_char sc_cmap_green[256]; 169 u_char sc_cmap_blue[256]; 170 }; 171 172 static int crmfb_putcmap(struct crmfb_softc *, struct wsdisplay_cmap *); 173 static int crmfb_getcmap(struct crmfb_softc *, struct wsdisplay_cmap *); 174 static void crmfb_set_palette(struct crmfb_softc *, 175 int, uint8_t, uint8_t, uint8_t); 176 static int crmfb_set_curpos(struct crmfb_softc *, int, int); 177 static int crmfb_gcursor(struct crmfb_softc *, struct wsdisplay_cursor *); 178 static int crmfb_scursor(struct crmfb_softc *, struct wsdisplay_cursor *); 179 static inline void crmfb_write_reg(struct crmfb_softc *, int, uint32_t); 180 static inline uint32_t crmfb_read_reg(struct crmfb_softc *, int); 181 static int crmfb_wait_dma_idle(struct crmfb_softc *); 182 183 /* setup video hw in given colour depth */ 184 static int crmfb_setup_video(struct crmfb_softc *, int); 185 static void crmfb_setup_palette(struct crmfb_softc *); 186 187 static void crmfb_fill_rect(struct crmfb_softc *, int, int, int, int, uint32_t); 188 static void crmfb_bitblt(struct crmfb_softc *, int, int, int, int, int, int, 189 uint32_t); 190 static void crmfb_scroll(struct crmfb_softc *, int, int, int, int, int, int); 191 192 static void crmfb_copycols(void *, int, int, int, int); 193 static void crmfb_erasecols(void *, int, int, int, long); 194 static void crmfb_copyrows(void *, int, int, int); 195 static void crmfb_eraserows(void *, int, int, long); 196 static void crmfb_cursor(void *, int, int, int); 197 static void crmfb_putchar(void *, int, int, u_int, long); 198 199 /* I2C glue */ 200 static int crmfb_i2c_acquire_bus(void *, int); 201 static void crmfb_i2c_release_bus(void *, int); 202 static int crmfb_i2c_send_start(void *, int); 203 static int crmfb_i2c_send_stop(void *, int); 204 static int crmfb_i2c_initiate_xfer(void *, i2c_addr_t, int); 205 static int crmfb_i2c_read_byte(void *, uint8_t *, int); 206 static int crmfb_i2c_write_byte(void *, uint8_t, int); 207 208 /* I2C bitbang glue */ 209 static void crmfb_i2cbb_set_bits(void *, uint32_t); 210 static void crmfb_i2cbb_set_dir(void *, uint32_t); 211 static uint32_t crmfb_i2cbb_read(void *); 212 213 static const struct i2c_bitbang_ops crmfb_i2cbb_ops = { 214 crmfb_i2cbb_set_bits, 215 crmfb_i2cbb_set_dir, 216 crmfb_i2cbb_read, 217 { 218 CRMFB_I2C_SDA, 219 CRMFB_I2C_SCL, 220 0, 221 1 222 } 223 }; 224 static void crmfb_setup_ddc(struct crmfb_softc *); 225 226 /* mode setting stuff */ 227 static uint32_t calc_pll(int); /* frequency in kHz */ 228 static int crmfb_set_mode(struct crmfb_softc *, const struct videomode *); 229 230 CFATTACH_DECL_NEW(crmfb, sizeof(struct crmfb_softc), 231 crmfb_match, crmfb_attach, NULL, NULL); 232 233 static int 234 crmfb_match(device_t parent, struct cfdata *cf, void *opaque) 235 { 236 return crmfb_probe(); 237 } 238 239 static void 240 crmfb_attach(device_t parent, device_t self, void *opaque) 241 { 242 struct mainbus_attach_args *ma; 243 struct crmfb_softc *sc; 244 struct rasops_info *ri; 245 struct wsemuldisplaydev_attach_args aa; 246 uint32_t d, h; 247 uint16_t *p; 248 unsigned long v; 249 long defattr; 250 const char *consdev; 251 int rv, i; 252 253 sc = device_private(self); 254 sc->sc_dev = self; 255 256 ma = (struct mainbus_attach_args *)opaque; 257 258 sc->sc_iot = SGIMIPS_BUS_SPACE_CRIME; 259 sc->sc_dmat = &sgimips_default_bus_dma_tag; 260 sc->sc_wsmode = WSDISPLAYIO_MODE_EMUL; 261 262 aprint_normal(": SGI CRIME Graphics Display Engine\n"); 263 rv = bus_space_map(sc->sc_iot, ma->ma_addr, 0 /* XXX */, 264 BUS_SPACE_MAP_LINEAR, &sc->sc_ioh); 265 if (rv) 266 panic("crmfb_attach: can't map I/O space"); 267 rv = bus_space_map(sc->sc_iot, 0x15000000, 0x6000, 0, &sc->sc_reh); 268 if (rv) 269 panic("crmfb_attach: can't map rendering engine"); 270 271 /* determine mode configured by firmware */ 272 d = bus_space_read_4(sc->sc_iot, sc->sc_ioh, CRMFB_VT_HCMAP); 273 sc->sc_width = (d >> CRMFB_VT_HCMAP_ON_SHIFT) & 0xfff; 274 d = bus_space_read_4(sc->sc_iot, sc->sc_ioh, CRMFB_VT_VCMAP); 275 sc->sc_height = (d >> CRMFB_VT_VCMAP_ON_SHIFT) & 0xfff; 276 d = bus_space_read_4(sc->sc_iot, sc->sc_ioh, CRMFB_FRM_TILESIZE); 277 h = (d >> CRMFB_FRM_TILESIZE_DEPTH_SHIFT) & 0x3; 278 if (h == 0) 279 sc->sc_depth = 8; 280 else if (h == 1) 281 sc->sc_depth = 16; 282 else 283 sc->sc_depth = 32; 284 285 if (sc->sc_width == 0 || sc->sc_height == 0) { 286 aprint_error_dev(sc->sc_dev, 287 "device unusable if not setup by firmware\n"); 288 bus_space_unmap(sc->sc_iot, sc->sc_ioh, 0 /* XXX */); 289 return; 290 } 291 292 aprint_normal_dev(sc->sc_dev, "initial resolution %dx%d\n", 293 sc->sc_width, sc->sc_height); 294 295 sc->sc_console_depth = 8; 296 297 crmfb_setup_ddc(sc); 298 if ((sc->sc_edid_info.edid_preferred_mode != NULL)) { 299 if (crmfb_set_mode(sc, sc->sc_edid_info.edid_preferred_mode)) 300 aprint_normal_dev(sc->sc_dev, "using %dx%d\n", 301 sc->sc_width, sc->sc_height); 302 } 303 /* 304 * first determine how many tiles we need 305 * in 32bit each tile is 128x128 pixels 306 */ 307 sc->sc_tiles_x = (sc->sc_width + 127) >> 7; 308 sc->sc_tiles_y = (sc->sc_height + 127) >> 7; 309 sc->sc_fbsize = 0x10000 * sc->sc_tiles_x * sc->sc_tiles_y; 310 311 sc->sc_dmai.size = 256 * sizeof(uint16_t); 312 rv = bus_dmamem_alloc(sc->sc_dmat, sc->sc_dmai.size, 65536, 0, 313 sc->sc_dmai.segs, 314 sizeof(sc->sc_dmai.segs) / sizeof(sc->sc_dmai.segs[0]), 315 &sc->sc_dmai.nsegs, BUS_DMA_NOWAIT); 316 if (rv) 317 panic("crmfb_attach: can't allocate DMA memory"); 318 rv = bus_dmamem_map(sc->sc_dmat, sc->sc_dmai.segs, sc->sc_dmai.nsegs, 319 sc->sc_dmai.size, &sc->sc_dmai.addr, 320 BUS_DMA_NOWAIT); 321 if (rv) 322 panic("crmfb_attach: can't map DMA memory"); 323 rv = bus_dmamap_create(sc->sc_dmat, sc->sc_dmai.size, 1, 324 sc->sc_dmai.size, 0, BUS_DMA_NOWAIT, &sc->sc_dmai.map); 325 if (rv) 326 panic("crmfb_attach: can't create DMA map"); 327 rv = bus_dmamap_load(sc->sc_dmat, sc->sc_dmai.map, sc->sc_dmai.addr, 328 sc->sc_dmai.size, NULL, BUS_DMA_NOWAIT); 329 if (rv) 330 panic("crmfb_attach: can't load DMA map"); 331 332 /* allocate an extra 64Kb for a linear buffer */ 333 sc->sc_dma.size = 0x10000 * (16 * sc->sc_tiles_x + 1); 334 rv = bus_dmamem_alloc(sc->sc_dmat, sc->sc_dma.size, 65536, 0, 335 sc->sc_dma.segs, 336 sizeof(sc->sc_dma.segs) / sizeof(sc->sc_dma.segs[0]), 337 &sc->sc_dma.nsegs, BUS_DMA_NOWAIT); 338 if (rv) 339 panic("crmfb_attach: can't allocate DMA memory"); 340 rv = bus_dmamem_map(sc->sc_dmat, sc->sc_dma.segs, sc->sc_dma.nsegs, 341 sc->sc_dma.size, &sc->sc_dma.addr, 342 BUS_DMA_NOWAIT | BUS_DMA_COHERENT); 343 if (rv) 344 panic("crmfb_attach: can't map DMA memory"); 345 rv = bus_dmamap_create(sc->sc_dmat, sc->sc_dma.size, 1, 346 sc->sc_dma.size, 0, BUS_DMA_NOWAIT, &sc->sc_dma.map); 347 if (rv) 348 panic("crmfb_attach: can't create DMA map"); 349 rv = bus_dmamap_load(sc->sc_dmat, sc->sc_dma.map, sc->sc_dma.addr, 350 sc->sc_dma.size, NULL, BUS_DMA_NOWAIT); 351 if (rv) 352 panic("crmfb_attach: can't load DMA map"); 353 354 p = KERNADDR(sc->sc_dmai); 355 v = (unsigned long)DMAADDR(sc->sc_dma); 356 for (i = 0; i < (sc->sc_tiles_x * sc->sc_tiles_y); i++) { 357 p[i] = ((uint32_t)v >> 16) + i; 358 } 359 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmai.map, 0, sc->sc_dmai.size, 360 BUS_DMASYNC_PREWRITE); 361 sc->sc_scratch = (char *)KERNADDR(sc->sc_dma) + (0xf0000 * sc->sc_tiles_x); 362 sc->sc_linear = (paddr_t)DMAADDR(sc->sc_dma) + 0x100000 * sc->sc_tiles_x; 363 364 aprint_normal_dev(sc->sc_dev, "allocated %d byte fb @ %p (%p)\n", 365 sc->sc_fbsize, KERNADDR(sc->sc_dmai), KERNADDR(sc->sc_dma)); 366 367 crmfb_setup_video(sc, sc->sc_console_depth); 368 ri = &crmfb_console_screen.scr_ri; 369 memset(ri, 0, sizeof(struct rasops_info)); 370 371 vcons_init(&sc->sc_vd, sc, &crmfb_defaultscreen, &crmfb_accessops); 372 sc->sc_vd.init_screen = crmfb_init_screen; 373 crmfb_console_screen.scr_flags |= VCONS_SCREEN_IS_STATIC; 374 vcons_init_screen(&sc->sc_vd, &crmfb_console_screen, 1, &defattr); 375 376 crmfb_defaultscreen.ncols = ri->ri_cols; 377 crmfb_defaultscreen.nrows = ri->ri_rows; 378 crmfb_defaultscreen.textops = &ri->ri_ops; 379 crmfb_defaultscreen.capabilities = ri->ri_caps; 380 crmfb_defaultscreen.modecookie = NULL; 381 382 crmfb_setup_palette(sc); 383 crmfb_fill_rect(sc, 0, 0, sc->sc_width, sc->sc_height, 384 ri->ri_devcmap[(defattr >> 16) & 0xff]); 385 386 consdev = arcbios_GetEnvironmentVariable("ConsoleOut"); 387 if (consdev != NULL && strcmp(consdev, "video()") == 0) { 388 wsdisplay_cnattach(&crmfb_defaultscreen, ri, 0, 0, defattr); 389 vcons_replay_msgbuf(&crmfb_console_screen); 390 aa.console = 1; 391 } else 392 aa.console = 0; 393 aa.scrdata = &crmfb_screenlist; 394 aa.accessops = &crmfb_accessops; 395 aa.accesscookie = &sc->sc_vd; 396 397 config_found(self, &aa, wsemuldisplaydevprint); 398 399 sc->sc_cur_x = 0; 400 sc->sc_cur_y = 0; 401 sc->sc_hot_x = 0; 402 sc->sc_hot_y = 0; 403 404 return; 405 } 406 407 int 408 crmfb_probe(void) 409 { 410 411 if (mach_type != MACH_SGI_IP32) 412 return 0; 413 414 return 1; 415 } 416 417 static int 418 crmfb_ioctl(void *v, void *vs, u_long cmd, void *data, int flag, struct lwp *l) 419 { 420 struct vcons_data *vd; 421 struct crmfb_softc *sc; 422 struct vcons_screen *ms; 423 struct wsdisplay_fbinfo *wdf; 424 int nmode; 425 426 vd = (struct vcons_data *)v; 427 sc = (struct crmfb_softc *)vd->cookie; 428 ms = (struct vcons_screen *)vd->active; 429 430 switch (cmd) { 431 case WSDISPLAYIO_GTYPE: 432 /* not really, but who cares? */ 433 /* wsfb does */ 434 *(u_int *)data = WSDISPLAY_TYPE_CRIME; 435 return 0; 436 case WSDISPLAYIO_GINFO: 437 if (vd->active != NULL) { 438 wdf = (void *)data; 439 wdf->height = sc->sc_height; 440 wdf->width = sc->sc_width; 441 wdf->depth = 32; 442 wdf->cmsize = 256; 443 return 0; 444 } else 445 return ENODEV; 446 case WSDISPLAYIO_GETCMAP: 447 if (sc->sc_depth == 8) 448 return crmfb_getcmap(sc, (struct wsdisplay_cmap *)data); 449 else 450 return EINVAL; 451 case WSDISPLAYIO_PUTCMAP: 452 if (sc->sc_depth == 8) 453 return crmfb_putcmap(sc, (struct wsdisplay_cmap *)data); 454 else 455 return EINVAL; 456 case WSDISPLAYIO_LINEBYTES: 457 *(u_int *)data = sc->sc_width * sc->sc_depth / 8; 458 return 0; 459 case WSDISPLAYIO_SMODE: 460 nmode = *(int *)data; 461 if (nmode != sc->sc_wsmode) { 462 sc->sc_wsmode = nmode; 463 if (nmode == WSDISPLAYIO_MODE_EMUL) { 464 crmfb_setup_video(sc, sc->sc_console_depth); 465 crmfb_setup_palette(sc); 466 vcons_redraw_screen(vd->active); 467 } else { 468 crmfb_setup_video(sc, 32); 469 } 470 } 471 return 0; 472 case WSDISPLAYIO_SVIDEO: 473 case WSDISPLAYIO_GVIDEO: 474 return ENODEV; /* not supported yet */ 475 476 case WSDISPLAYIO_GCURPOS: 477 { 478 struct wsdisplay_curpos *pos; 479 480 pos = (struct wsdisplay_curpos *)data; 481 pos->x = sc->sc_cur_x; 482 pos->y = sc->sc_cur_y; 483 } 484 return 0; 485 case WSDISPLAYIO_SCURPOS: 486 { 487 struct wsdisplay_curpos *pos; 488 489 pos = (struct wsdisplay_curpos *)data; 490 crmfb_set_curpos(sc, pos->x, pos->y); 491 } 492 return 0; 493 case WSDISPLAYIO_GCURMAX: 494 { 495 struct wsdisplay_curpos *pos; 496 497 pos = (struct wsdisplay_curpos *)data; 498 pos->x = 32; 499 pos->y = 32; 500 } 501 return 0; 502 case WSDISPLAYIO_GCURSOR: 503 { 504 struct wsdisplay_cursor *cu; 505 506 cu = (struct wsdisplay_cursor *)data; 507 return crmfb_gcursor(sc, cu); 508 } 509 case WSDISPLAYIO_SCURSOR: 510 { 511 struct wsdisplay_cursor *cu; 512 513 cu = (struct wsdisplay_cursor *)data; 514 return crmfb_scursor(sc, cu); 515 } 516 } 517 return EPASSTHROUGH; 518 } 519 520 static paddr_t 521 crmfb_mmap(void *v, void *vs, off_t offset, int prot) 522 { 523 struct vcons_data *vd; 524 struct crmfb_softc *sc; 525 paddr_t pa; 526 527 vd = (struct vcons_data *)v; 528 sc = (struct crmfb_softc *)vd->cookie; 529 530 /* we probably shouldn't let anyone mmap the framebuffer */ 531 #if 1 532 if (offset >= 0 && offset < (0x100000 * sc->sc_tiles_x)) { 533 pa = bus_dmamem_mmap(sc->sc_dmat, sc->sc_dma.segs, 534 sc->sc_dma.nsegs, offset, prot, 535 BUS_DMA_WAITOK | BUS_DMA_COHERENT); 536 return pa; 537 } 538 #endif 539 /* 540 * here would the TLBs be but we don't want to show them to userland 541 * so we return the page containing the status register 542 */ 543 if ((offset >= 0x15000000) && (offset < 0x15002000)) 544 return bus_space_mmap(sc->sc_iot, 0x15004000, 0, prot, 0); 545 /* now the actual engine registers */ 546 if ((offset >= 0x15002000) && (offset < 0x15005000)) 547 return bus_space_mmap(sc->sc_iot, offset, 0, prot, 0); 548 /* and now the scratch area */ 549 if ((offset >= 0x15010000) && (offset < 0x15020000)) 550 return bus_dmamem_mmap(sc->sc_dmat, sc->sc_dma.segs, 551 sc->sc_dma.nsegs, 552 offset + (0x100000 * sc->sc_tiles_x) - 0x15010000, 553 prot, BUS_DMA_WAITOK | BUS_DMA_COHERENT); 554 return -1; 555 } 556 557 static void 558 crmfb_init_screen(void *c, struct vcons_screen *scr, int existing, 559 long *defattr) 560 { 561 struct crmfb_softc *sc; 562 struct rasops_info *ri; 563 564 sc = (struct crmfb_softc *)c; 565 ri = &scr->scr_ri; 566 567 ri->ri_flg = RI_CENTER | RI_FULLCLEAR; 568 ri->ri_depth = sc->sc_console_depth; 569 ri->ri_width = sc->sc_width; 570 ri->ri_height = sc->sc_height; 571 ri->ri_stride = ri->ri_width * (ri->ri_depth / 8); 572 #if 1 573 switch (ri->ri_depth) { 574 case 16: 575 ri->ri_rnum = ri->ri_gnum = ri->ri_bnum = 5; 576 ri->ri_rpos = 11; 577 ri->ri_gpos = 6; 578 ri->ri_bpos = 1; 579 break; 580 case 32: 581 ri->ri_rnum = ri->ri_gnum = ri->ri_bnum = 8; 582 ri->ri_rpos = 8; 583 ri->ri_gpos = 16; 584 ri->ri_bpos = 24; 585 break; 586 } 587 #endif 588 ri->ri_bits = KERNADDR(sc->sc_dma); 589 590 if (existing) 591 ri->ri_flg |= RI_CLEAR; 592 593 rasops_init(ri, ri->ri_height / 16, ri->ri_width / 8); 594 ri->ri_caps = WSSCREEN_WSCOLORS; 595 rasops_reconfig(ri, ri->ri_height / ri->ri_font->fontheight, 596 ri->ri_width / ri->ri_font->fontwidth); 597 ri->ri_hw = scr; 598 599 ri->ri_ops.cursor = crmfb_cursor; 600 ri->ri_ops.copyrows = crmfb_copyrows; 601 ri->ri_ops.eraserows = crmfb_eraserows; 602 ri->ri_ops.copycols = crmfb_copycols; 603 ri->ri_ops.erasecols = crmfb_erasecols; 604 ri->ri_ops.putchar = crmfb_putchar; 605 606 return; 607 } 608 609 static int 610 crmfb_putcmap(struct crmfb_softc *sc, struct wsdisplay_cmap *cm) 611 { 612 u_int idx, cnt; 613 u_char r[256], g[256], b[256]; 614 u_char *rp, *gp, *bp; 615 int rv, i; 616 617 idx = cm->index; 618 cnt = cm->count; 619 620 if (idx >= 255 || cnt > 256 || idx + cnt > 256) 621 return EINVAL; 622 623 rv = copyin(cm->red, &r[idx], cnt); 624 if (rv) 625 return rv; 626 rv = copyin(cm->green, &g[idx], cnt); 627 if (rv) 628 return rv; 629 rv = copyin(cm->blue, &b[idx], cnt); 630 if (rv) 631 return rv; 632 633 memcpy(&sc->sc_cmap_red[idx], &r[idx], cnt); 634 memcpy(&sc->sc_cmap_green[idx], &g[idx], cnt); 635 memcpy(&sc->sc_cmap_blue[idx], &b[idx], cnt); 636 637 rp = &sc->sc_cmap_red[idx]; 638 gp = &sc->sc_cmap_green[idx]; 639 bp = &sc->sc_cmap_blue[idx]; 640 641 for (i = 0; i < cnt; i++) { 642 crmfb_set_palette(sc, idx, *rp, *gp, *bp); 643 idx++; 644 rp++, gp++, bp++; 645 } 646 647 return 0; 648 } 649 650 static int 651 crmfb_getcmap(struct crmfb_softc *sc, struct wsdisplay_cmap *cm) 652 { 653 u_int idx, cnt; 654 int rv; 655 656 idx = cm->index; 657 cnt = cm->count; 658 659 if (idx >= 255 || cnt > 256 || idx + cnt > 256) 660 return EINVAL; 661 662 rv = copyout(&sc->sc_cmap_red[idx], cm->red, cnt); 663 if (rv) 664 return rv; 665 rv = copyout(&sc->sc_cmap_green[idx], cm->green, cnt); 666 if (rv) 667 return rv; 668 rv = copyout(&sc->sc_cmap_blue[idx], cm->blue, cnt); 669 if (rv) 670 return rv; 671 672 return 0; 673 } 674 675 static void 676 crmfb_set_palette(struct crmfb_softc *sc, int reg, uint8_t r, uint8_t g, 677 uint8_t b) 678 { 679 uint32_t val; 680 681 if (reg > 255 || sc->sc_depth != 8) 682 return; 683 684 while (bus_space_read_4(sc->sc_iot, sc->sc_ioh, CRMFB_CMAP_FIFO) >= 63) 685 DELAY(10); 686 687 val = (r << 8) | (g << 16) | (b << 24); 688 crmfb_write_reg(sc, CRMFB_CMAP + (reg * 4), val); 689 690 return; 691 } 692 693 static int 694 crmfb_set_curpos(struct crmfb_softc *sc, int x, int y) 695 { 696 uint32_t val; 697 698 sc->sc_cur_x = x; 699 sc->sc_cur_y = y; 700 701 val = ((x - sc->sc_hot_x) & 0xffff) | ((y - sc->sc_hot_y) << 16); 702 crmfb_write_reg(sc, CRMFB_CURSOR_POS, val); 703 704 return 0; 705 } 706 707 static int 708 crmfb_gcursor(struct crmfb_softc *sc, struct wsdisplay_cursor *cur) 709 { 710 /* do nothing for now */ 711 return 0; 712 } 713 714 static int 715 crmfb_scursor(struct crmfb_softc *sc, struct wsdisplay_cursor *cur) 716 { 717 if (cur->which & WSDISPLAY_CURSOR_DOCUR) { 718 719 crmfb_write_reg(sc, CRMFB_CURSOR_CONTROL, cur->enable ? 1 : 0); 720 } 721 if (cur->which & WSDISPLAY_CURSOR_DOHOT) { 722 723 sc->sc_hot_x = cur->hot.x; 724 sc->sc_hot_y = cur->hot.y; 725 } 726 if (cur->which & WSDISPLAY_CURSOR_DOPOS) { 727 728 crmfb_set_curpos(sc, cur->pos.x, cur->pos.y); 729 } 730 if (cur->which & WSDISPLAY_CURSOR_DOCMAP) { 731 int i; 732 uint32_t val; 733 734 for (i = 0; i < cur->cmap.count; i++) { 735 val = (cur->cmap.red[i] << 24) | 736 (cur->cmap.green[i] << 16) | 737 (cur->cmap.blue[i] << 8); 738 crmfb_write_reg(sc, CRMFB_CURSOR_CMAP0 + 739 ((i + cur->cmap.index) << 2), val); 740 } 741 } 742 if (cur->which & WSDISPLAY_CURSOR_DOSHAPE) { 743 744 int i, j, cnt = 0; 745 uint32_t latch = 0, omask; 746 uint8_t imask; 747 for (i = 0; i < 64; i++) { 748 omask = 0x80000000; 749 imask = 0x01; 750 cur->image[cnt] &= cur->mask[cnt]; 751 for (j = 0; j < 8; j++) { 752 if (cur->image[cnt] & imask) 753 latch |= omask; 754 omask >>= 1; 755 if (cur->mask[cnt] & imask) 756 latch |= omask; 757 omask >>= 1; 758 imask <<= 1; 759 } 760 cnt++; 761 imask = 0x01; 762 cur->image[cnt] &= cur->mask[cnt]; 763 for (j = 0; j < 8; j++) { 764 if (cur->image[cnt] & imask) 765 latch |= omask; 766 omask >>= 1; 767 if (cur->mask[cnt] & imask) 768 latch |= omask; 769 omask >>= 1; 770 imask <<= 1; 771 } 772 cnt++; 773 crmfb_write_reg(sc, CRMFB_CURSOR_BITMAP + (i << 2), 774 latch); 775 latch = 0; 776 } 777 } 778 return 0; 779 } 780 781 static inline void 782 crmfb_write_reg(struct crmfb_softc *sc, int offset, uint32_t val) 783 { 784 785 bus_space_write_4(sc->sc_iot, sc->sc_ioh, offset, val); 786 wbflush(); 787 } 788 789 static inline uint32_t 790 crmfb_read_reg(struct crmfb_softc *sc, int offset) 791 { 792 793 return bus_space_read_4(sc->sc_iot, sc->sc_ioh, offset); 794 } 795 796 static int 797 crmfb_wait_dma_idle(struct crmfb_softc *sc) 798 { 799 int bail = 100000, idle; 800 801 do { 802 idle = ((bus_space_read_4(sc->sc_iot, sc->sc_ioh, 803 CRMFB_OVR_CONTROL) & 1) == 0) && 804 ((bus_space_read_4(sc->sc_iot, sc->sc_ioh, 805 CRMFB_FRM_CONTROL) & 1) == 0) && 806 ((bus_space_read_4(sc->sc_iot, sc->sc_ioh, 807 CRMFB_DID_CONTROL) & 1) == 0); 808 if (!idle) 809 delay(10); 810 bail--; 811 } while ((!idle) && (bail > 0)); 812 return idle; 813 } 814 815 static int 816 crmfb_setup_video(struct crmfb_softc *sc, int depth) 817 { 818 uint64_t reg; 819 uint32_t d, h, mode, page; 820 int i, bail, tile_width, tlbptr, lptr, j, tx, shift, overhang; 821 const char *wantsync; 822 uint16_t v; 823 824 /* disable DMA */ 825 d = bus_space_read_4(sc->sc_iot, sc->sc_ioh, CRMFB_OVR_CONTROL); 826 d &= ~(1 << CRMFB_OVR_CONTROL_DMAEN_SHIFT); 827 crmfb_write_reg(sc, CRMFB_OVR_CONTROL, d); 828 DELAY(50000); 829 d = bus_space_read_4(sc->sc_iot, sc->sc_ioh, CRMFB_FRM_CONTROL); 830 d &= ~(1 << CRMFB_FRM_CONTROL_DMAEN_SHIFT); 831 crmfb_write_reg(sc, CRMFB_FRM_CONTROL, d); 832 DELAY(50000); 833 crmfb_write_reg(sc, CRMFB_DID_CONTROL, d); 834 DELAY(50000); 835 836 if (!crmfb_wait_dma_idle(sc)) 837 aprint_error("crmfb: crmfb_wait_dma_idle timed out\n"); 838 839 /* ensure that CRM starts drawing at the top left of the screen 840 * when we re-enable DMA later 841 */ 842 d = (1 << CRMFB_VT_XY_FREEZE_SHIFT); 843 crmfb_write_reg(sc, CRMFB_VT_XY, d); 844 delay(1000); 845 d = bus_space_read_4(sc->sc_iot, sc->sc_ioh, CRMFB_DOTCLOCK); 846 d &= ~(1 << CRMFB_DOTCLOCK_CLKRUN_SHIFT); 847 crmfb_write_reg(sc, CRMFB_DOTCLOCK, d); 848 849 /* wait for dotclock to turn off */ 850 bail = 10000; 851 while ((bus_space_read_4(sc->sc_iot, sc->sc_ioh, CRMFB_DOTCLOCK) & 852 (1 << CRMFB_DOTCLOCK_CLKRUN_SHIFT)) && (bail > 0)) { 853 delay(10); 854 bail--; 855 } 856 857 /* reset FIFO */ 858 d = bus_space_read_4(sc->sc_iot, sc->sc_ioh, CRMFB_FRM_TILESIZE); 859 d |= (1 << CRMFB_FRM_TILESIZE_FIFOR_SHIFT); 860 crmfb_write_reg(sc, CRMFB_FRM_TILESIZE, d); 861 d &= ~(1 << CRMFB_FRM_TILESIZE_FIFOR_SHIFT); 862 crmfb_write_reg(sc, CRMFB_FRM_TILESIZE, d); 863 864 /* setup colour mode */ 865 switch (depth) { 866 case 8: 867 h = CRMFB_MODE_TYP_I8; 868 tile_width = 512; 869 break; 870 case 16: 871 h = CRMFB_MODE_TYP_ARGB5; 872 tile_width = 256; 873 break; 874 case 32: 875 h = CRMFB_MODE_TYP_RGB8; 876 tile_width = 128; 877 break; 878 default: 879 panic("Unsupported depth"); 880 } 881 d = h << CRMFB_MODE_TYP_SHIFT; 882 d |= CRMFB_MODE_BUF_BOTH << CRMFB_MODE_BUF_SHIFT; 883 for (i = 0; i < (32 * 4); i += 4) 884 bus_space_write_4(sc->sc_iot, sc->sc_ioh, CRMFB_MODE + i, d); 885 wbflush(); 886 887 /* setup tile pointer, but don't turn on DMA yet! */ 888 h = DMAADDR(sc->sc_dmai); 889 d = (h >> 9) << CRMFB_FRM_CONTROL_TILEPTR_SHIFT; 890 crmfb_write_reg(sc, CRMFB_FRM_CONTROL, d); 891 892 /* init framebuffer width and pixel size */ 893 /*d = (1 << CRMFB_FRM_TILESIZE_WIDTH_SHIFT);*/ 894 895 d = ((int)(sc->sc_width / tile_width)) << 896 CRMFB_FRM_TILESIZE_WIDTH_SHIFT; 897 overhang = sc->sc_width % tile_width; 898 if (overhang != 0) { 899 uint32_t val; 900 DPRINTF("tile width: %d\n", tile_width); 901 DPRINTF("overhang: %d\n", overhang); 902 val = (overhang * (depth >> 3)) >> 5; 903 DPRINTF("reg: %08x\n", val); 904 d |= (val & 0x1f); 905 DPRINTF("d: %08x\n", d); 906 } 907 908 switch (depth) { 909 case 8: 910 h = CRMFB_FRM_TILESIZE_DEPTH_8; 911 break; 912 case 16: 913 h = CRMFB_FRM_TILESIZE_DEPTH_16; 914 break; 915 case 32: 916 h = CRMFB_FRM_TILESIZE_DEPTH_32; 917 break; 918 default: 919 panic("Unsupported depth"); 920 } 921 d |= (h << CRMFB_FRM_TILESIZE_DEPTH_SHIFT); 922 crmfb_write_reg(sc, CRMFB_FRM_TILESIZE, d); 923 924 /*h = sc->sc_width * sc->sc_height / (512 / (depth >> 3));*/ 925 h = sc->sc_height; 926 d = h << CRMFB_FRM_PIXSIZE_HEIGHT_SHIFT; 927 crmfb_write_reg(sc, CRMFB_FRM_PIXSIZE, d); 928 929 /* turn off firmware overlay and hardware cursor */ 930 crmfb_write_reg(sc, CRMFB_OVR_WIDTH_TILE, 0); 931 crmfb_write_reg(sc, CRMFB_CURSOR_CONTROL, 0); 932 933 /* turn on DMA for the framebuffer */ 934 d = bus_space_read_4(sc->sc_iot, sc->sc_ioh, CRMFB_FRM_CONTROL); 935 d |= (1 << CRMFB_FRM_CONTROL_DMAEN_SHIFT); 936 crmfb_write_reg(sc, CRMFB_FRM_CONTROL, d); 937 938 /* enable drawing again */ 939 crmfb_write_reg(sc, CRMFB_VT_XY, 0); 940 d = bus_space_read_4(sc->sc_iot, sc->sc_ioh, CRMFB_DOTCLOCK); 941 d |= (1 << CRMFB_DOTCLOCK_CLKRUN_SHIFT); 942 crmfb_write_reg(sc, CRMFB_DOTCLOCK, d); 943 944 /* turn off sync-on-green */ 945 946 wantsync = arcbios_GetEnvironmentVariable("SyncOnGreen"); 947 if ( (wantsync != NULL) && (wantsync[0] == 'n') ) { 948 d = ( 1 << CRMFB_VT_FLAGS_SYNC_LOW_LSB) & 949 CRMFB_REG_MASK(CRMFB_VT_FLAGS_SYNC_LOW_MSB, 950 CRMFB_VT_FLAGS_SYNC_LOW_LSB); 951 crmfb_write_reg(sc, CRMFB_VT_FLAGS, d); 952 } 953 954 sc->sc_depth = depth; 955 956 /* finally set up the drawing engine's TLB A */ 957 v = (DMAADDR(sc->sc_dma) >> 16) & 0xffff; 958 tlbptr = 0; 959 tx = ((sc->sc_width + (tile_width - 1)) & ~(tile_width - 1)) / 960 tile_width; 961 962 DPRINTF("tx: %d\n", tx); 963 964 for (i = 0; i < 16; i++) { 965 reg = 0; 966 shift = 64; 967 lptr = 0; 968 for (j = 0; j < tx; j++) { 969 shift -= 16; 970 reg |= (((uint64_t)(v | 0x8000)) << shift); 971 if (shift == 0) { 972 shift = 64; 973 bus_space_write_8(sc->sc_iot, sc->sc_reh, 974 CRIME_RE_TLB_A + tlbptr + lptr, 975 reg); 976 DPRINTF("%04x: %016"PRIx64"\n", tlbptr + lptr, reg); 977 reg = 0; 978 lptr += 8; 979 } 980 v++; 981 } 982 if (shift != 64) { 983 bus_space_write_8(sc->sc_iot, sc->sc_reh, 984 CRIME_RE_TLB_A + tlbptr + lptr, reg); 985 DPRINTF("%04x: %016"PRIx64"\n", tlbptr + lptr, reg); 986 } 987 tlbptr += 32; 988 } 989 sc->sc_scratch = (char *)KERNADDR(sc->sc_dma) + (0xf0000 * tx); 990 991 /* now put the last 64kB into the 1st linear TLB */ 992 page = (sc->sc_linear >> 12) | 0x80000000; 993 tlbptr = 0; 994 for (i = 0; i < 8; i++) { 995 reg = ((uint64_t)page << 32) | (page + 1); 996 bus_space_write_8(sc->sc_iot, sc->sc_reh, 997 CRIME_RE_LINEAR_A + tlbptr, reg); 998 page += 2; 999 tlbptr += 8; 1000 } 1001 wbflush(); 1002 1003 /* do some very basic engine setup */ 1004 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_DE_CLIPMODE, 0); 1005 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_DE_WINOFFSET_SRC, 0); 1006 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_DE_WINOFFSET_DST, 0); 1007 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_DE_PLANEMASK, 1008 0xffffffff); 1009 1010 bus_space_write_8(sc->sc_iot, sc->sc_reh, 0x20, 0); 1011 bus_space_write_8(sc->sc_iot, sc->sc_reh, 0x28, 0); 1012 bus_space_write_8(sc->sc_iot, sc->sc_reh, 0x30, 0); 1013 bus_space_write_8(sc->sc_iot, sc->sc_reh, 0x38, 0); 1014 bus_space_write_8(sc->sc_iot, sc->sc_reh, 0x40, 0); 1015 1016 switch (depth) { 1017 case 8: 1018 mode = DE_MODE_TLB_A | DE_MODE_BUFDEPTH_8 | 1019 DE_MODE_TYPE_CI | DE_MODE_PIXDEPTH_8; 1020 sc->sc_mte_mode = MTE_MODE_DST_ECC | 1021 (MTE_TLB_A << MTE_DST_TLB_SHIFT) | 1022 (MTE_TLB_A << MTE_SRC_TLB_SHIFT) | 1023 (MTE_DEPTH_8 << MTE_DEPTH_SHIFT); 1024 sc->sc_mte_x_shift = 0; 1025 break; 1026 case 16: 1027 mode = DE_MODE_TLB_A | DE_MODE_BUFDEPTH_16 | 1028 DE_MODE_TYPE_RGBA | DE_MODE_PIXDEPTH_16; 1029 sc->sc_mte_mode = MTE_MODE_DST_ECC | 1030 (MTE_TLB_A << MTE_DST_TLB_SHIFT) | 1031 (MTE_TLB_A << MTE_SRC_TLB_SHIFT) | 1032 (MTE_DEPTH_16 << MTE_DEPTH_SHIFT); 1033 sc->sc_mte_x_shift = 1; 1034 break; 1035 case 32: 1036 mode = DE_MODE_TLB_A | DE_MODE_BUFDEPTH_32 | 1037 DE_MODE_TYPE_RGBA | DE_MODE_PIXDEPTH_32; 1038 break; 1039 sc->sc_mte_mode = MTE_MODE_DST_ECC | 1040 (MTE_TLB_A << MTE_DST_TLB_SHIFT) | 1041 (MTE_TLB_A << MTE_SRC_TLB_SHIFT) | 1042 (MTE_DEPTH_32 << MTE_DEPTH_SHIFT); 1043 sc->sc_mte_x_shift = 2; 1044 default: 1045 panic("%s: unsuported colour depth %d\n", __func__, 1046 depth); 1047 } 1048 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_DE_MODE_DST, mode); 1049 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_DE_MODE_SRC, mode); 1050 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_DE_XFER_STEP_X, 1); 1051 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_DE_XFER_STEP_Y, 1); 1052 1053 /* initialize memory transfer engine */ 1054 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_MTE_MODE, 1055 sc->sc_mte_mode | MTE_MODE_COPY); 1056 sc->sc_mte_direction = 1; 1057 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_MTE_DST_Y_STEP, 1); 1058 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_MTE_SRC_Y_STEP, 1); 1059 1060 return 0; 1061 } 1062 1063 static void 1064 crmfb_set_mte_direction(struct crmfb_softc *sc, int dir) 1065 { 1066 if (dir == sc->sc_mte_direction) 1067 return; 1068 1069 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_MTE_DST_Y_STEP, dir); 1070 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_MTE_SRC_Y_STEP, dir); 1071 sc->sc_mte_direction = dir; 1072 } 1073 1074 static void 1075 crmfb_setup_palette(struct crmfb_softc *sc) 1076 { 1077 int i; 1078 1079 for (i = 0; i < 256; i++) { 1080 crmfb_set_palette(sc, i, rasops_cmap[(i * 3) + 2], 1081 rasops_cmap[(i * 3) + 1], rasops_cmap[(i * 3) + 0]); 1082 sc->sc_cmap_red[i] = rasops_cmap[(i * 3) + 2]; 1083 sc->sc_cmap_green[i] = rasops_cmap[(i * 3) + 1]; 1084 sc->sc_cmap_blue[i] = rasops_cmap[(i * 3) + 0]; 1085 } 1086 } 1087 1088 static inline void 1089 crmfb_wait_idle(struct crmfb_softc *sc) 1090 { 1091 int i = 0; 1092 1093 do { 1094 i++; 1095 } while (((bus_space_read_4(sc->sc_iot, sc->sc_reh, CRIME_DE_STATUS) & 1096 CRIME_DE_IDLE) == 0) && (i < 100000000)); 1097 if (i >= 100000000) 1098 aprint_error("crmfb_wait_idle() timed out\n"); 1099 } 1100 1101 static void 1102 crmfb_fill_rect(struct crmfb_softc *sc, int x, int y, int width, int height, 1103 uint32_t colour) 1104 { 1105 int rxa, rxe; 1106 1107 rxa = x << sc->sc_mte_x_shift; 1108 rxe = ((x + width) << sc->sc_mte_x_shift) - 1; 1109 crmfb_wait_idle(sc); 1110 crmfb_set_mte_direction(sc, 1); 1111 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_MTE_MODE, 1112 sc->sc_mte_mode | 0); 1113 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_MTE_BG, colour); 1114 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_MTE_DST0, 1115 (rxa << 16) | (y & 0xffff)); 1116 bus_space_write_4(sc->sc_iot, sc->sc_reh, 1117 CRIME_MTE_DST1 | CRIME_DE_START, 1118 (rxe << 16) | ((y + height - 1) & 0xffff)); 1119 } 1120 1121 static void 1122 crmfb_bitblt(struct crmfb_softc *sc, int xs, int ys, int xd, int yd, 1123 int wi, int he, uint32_t rop) 1124 { 1125 uint32_t prim = DE_PRIM_RECTANGLE; 1126 int rxa, rya, rxe, rye, rxs, rys; 1127 crmfb_wait_idle(sc); 1128 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_DE_DRAWMODE, 1129 DE_DRAWMODE_PLANEMASK | DE_DRAWMODE_BYTEMASK | DE_DRAWMODE_ROP | 1130 DE_DRAWMODE_XFER_EN); 1131 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_DE_ROP, rop); 1132 if (xs < xd) { 1133 prim |= DE_PRIM_RL; 1134 rxe = xd; 1135 rxa = xd + wi - 1; 1136 rxs = xs + wi - 1; 1137 } else { 1138 prim |= DE_PRIM_LR; 1139 rxe = xd + wi - 1; 1140 rxa = xd; 1141 rxs = xs; 1142 } 1143 if (ys < yd) { 1144 prim |= DE_PRIM_BT; 1145 rye = yd; 1146 rya = yd + he - 1; 1147 rys = ys + he - 1; 1148 } else { 1149 prim |= DE_PRIM_TB; 1150 rye = yd + he - 1; 1151 rya = yd; 1152 rys = ys; 1153 } 1154 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_DE_PRIMITIVE, prim); 1155 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_DE_XFER_ADDR_SRC, 1156 (rxs << 16) | (rys & 0xffff)); 1157 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_DE_X_VERTEX_0, 1158 (rxa << 16) | (rya & 0xffff)); 1159 bus_space_write_4(sc->sc_iot, sc->sc_reh, 1160 CRIME_DE_X_VERTEX_1 | CRIME_DE_START, 1161 (rxe << 16) | (rye & 0xffff)); 1162 } 1163 1164 static void 1165 crmfb_scroll(struct crmfb_softc *sc, int xs, int ys, int xd, int yd, 1166 int wi, int he) 1167 { 1168 int rxa, rya, rxe, rye, rxd, ryd, rxde, ryde; 1169 1170 rxa = xs << sc->sc_mte_x_shift; 1171 rxd = xd << sc->sc_mte_x_shift; 1172 rxe = ((xs + wi) << sc->sc_mte_x_shift) - 1; 1173 rxde = ((xd + wi) << sc->sc_mte_x_shift) - 1; 1174 1175 crmfb_wait_idle(sc); 1176 1177 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_MTE_MODE, 1178 sc->sc_mte_mode | MTE_MODE_COPY); 1179 1180 if (ys < yd) { 1181 /* bottom to top */ 1182 rye = ys; 1183 rya = ys + he - 1; 1184 ryd = yd + he - 1; 1185 ryde = yd; 1186 crmfb_set_mte_direction(sc, -1); 1187 } else { 1188 /* top to bottom */ 1189 rye = ys + he - 1; 1190 rya = ys; 1191 ryd = yd; 1192 ryde = yd + he - 1; 1193 crmfb_set_mte_direction(sc, 1); 1194 } 1195 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_MTE_SRC0, 1196 (rxa << 16) | rya); 1197 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_MTE_SRC1, 1198 (rxe << 16) | rye); 1199 bus_space_write_4(sc->sc_iot, sc->sc_reh, 1200 CRIME_MTE_DST0, 1201 (rxd << 16) | ryd); 1202 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_MTE_DST1 | 1203 CRIME_DE_START, 1204 (rxde << 16) | ryde); 1205 } 1206 1207 static void 1208 crmfb_copycols(void *cookie, int row, int srccol, int dstcol, int ncols) 1209 { 1210 struct rasops_info *ri = cookie; 1211 struct vcons_screen *scr = ri->ri_hw; 1212 int32_t xs, xd, y, width, height; 1213 1214 xs = ri->ri_xorigin + ri->ri_font->fontwidth * srccol; 1215 xd = ri->ri_xorigin + ri->ri_font->fontwidth * dstcol; 1216 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1217 width = ri->ri_font->fontwidth * ncols; 1218 height = ri->ri_font->fontheight; 1219 crmfb_bitblt(scr->scr_cookie, xs, y, xd, y, width, height, 3); 1220 } 1221 1222 static void 1223 crmfb_erasecols(void *cookie, int row, int startcol, int ncols, long fillattr) 1224 { 1225 struct rasops_info *ri = cookie; 1226 struct vcons_screen *scr = ri->ri_hw; 1227 int32_t x, y, width, height, bg; 1228 1229 x = ri->ri_xorigin + ri->ri_font->fontwidth * startcol; 1230 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1231 width = ri->ri_font->fontwidth * ncols; 1232 height = ri->ri_font->fontheight; 1233 bg = (uint32_t)ri->ri_devcmap[(fillattr >> 16) & 0xff]; 1234 crmfb_fill_rect(scr->scr_cookie, x, y, width, height, bg); 1235 } 1236 1237 static void 1238 crmfb_copyrows(void *cookie, int srcrow, int dstrow, int nrows) 1239 { 1240 struct rasops_info *ri = cookie; 1241 struct vcons_screen *scr = ri->ri_hw; 1242 int32_t x, ys, yd, width, height; 1243 1244 x = ri->ri_xorigin; 1245 ys = ri->ri_yorigin + ri->ri_font->fontheight * srcrow; 1246 yd = ri->ri_yorigin + ri->ri_font->fontheight * dstrow; 1247 width = ri->ri_emuwidth; 1248 height = ri->ri_font->fontheight * nrows; 1249 1250 crmfb_scroll(scr->scr_cookie, x, ys, x, yd, width, height); 1251 } 1252 1253 static void 1254 crmfb_eraserows(void *cookie, int row, int nrows, long fillattr) 1255 { 1256 struct rasops_info *ri = cookie; 1257 struct vcons_screen *scr = ri->ri_hw; 1258 int32_t x, y, width, height, bg; 1259 1260 if ((row == 0) && (nrows == ri->ri_rows)) { 1261 x = y = 0; 1262 width = ri->ri_width; 1263 height = ri->ri_height; 1264 } else { 1265 x = ri->ri_xorigin; 1266 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1267 width = ri->ri_emuwidth; 1268 height = ri->ri_font->fontheight * nrows; 1269 } 1270 bg = (uint32_t)ri->ri_devcmap[(fillattr >> 16) & 0xff]; 1271 crmfb_fill_rect(scr->scr_cookie, x, y, width, height, bg); 1272 } 1273 1274 static void 1275 crmfb_cursor(void *cookie, int on, int row, int col) 1276 { 1277 struct rasops_info *ri = cookie; 1278 struct vcons_screen *scr = ri->ri_hw; 1279 struct crmfb_softc *sc = scr->scr_cookie; 1280 int x, y, wi,he; 1281 1282 wi = ri->ri_font->fontwidth; 1283 he = ri->ri_font->fontheight; 1284 1285 if (ri->ri_flg & RI_CURSOR) { 1286 x = ri->ri_ccol * wi + ri->ri_xorigin; 1287 y = ri->ri_crow * he + ri->ri_yorigin; 1288 crmfb_bitblt(sc, x, y, x, y, wi, he, 12); 1289 ri->ri_flg &= ~RI_CURSOR; 1290 } 1291 1292 ri->ri_crow = row; 1293 ri->ri_ccol = col; 1294 1295 if (on) 1296 { 1297 x = ri->ri_ccol * wi + ri->ri_xorigin; 1298 y = ri->ri_crow * he + ri->ri_yorigin; 1299 crmfb_bitblt(sc, x, y, x, y, wi, he, 12); 1300 ri->ri_flg |= RI_CURSOR; 1301 } 1302 } 1303 1304 static void 1305 crmfb_putchar(void *cookie, int row, int col, u_int c, long attr) 1306 { 1307 struct rasops_info *ri = cookie; 1308 struct vcons_screen *scr = ri->ri_hw; 1309 struct crmfb_softc *sc = scr->scr_cookie; 1310 struct wsdisplay_font *font = PICK_FONT(ri, c); 1311 uint32_t bg, fg; 1312 int x, y, wi, he, i, uc; 1313 uint8_t *fd8; 1314 uint16_t *fd16; 1315 void *fd; 1316 1317 wi = font->fontwidth; 1318 he = font->fontheight; 1319 1320 x = ri->ri_xorigin + col * wi; 1321 y = ri->ri_yorigin + row * he; 1322 1323 bg = ri->ri_devcmap[(attr >> 16) & 0xff]; 1324 fg = ri->ri_devcmap[(attr >> 24) & 0xff]; 1325 uc = c - font->firstchar; 1326 fd = (uint8_t *)font->data + uc * ri->ri_fontscale; 1327 if (c == 0x20) { 1328 crmfb_fill_rect(sc, x, y, wi, he, bg); 1329 } else { 1330 crmfb_wait_idle(sc); 1331 /* setup */ 1332 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_DE_DRAWMODE, 1333 DE_DRAWMODE_PLANEMASK | DE_DRAWMODE_BYTEMASK | 1334 DE_DRAWMODE_ROP | 1335 DE_DRAWMODE_OPAQUE_STIP | DE_DRAWMODE_POLY_STIP); 1336 wbflush(); 1337 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_DE_ROP, 3); 1338 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_DE_FG, fg); 1339 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_DE_BG, bg); 1340 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_DE_PRIMITIVE, 1341 DE_PRIM_RECTANGLE | DE_PRIM_LR | DE_PRIM_TB); 1342 bus_space_write_4(sc->sc_iot, sc->sc_reh, CRIME_DE_STIPPLE_MODE, 1343 0x001f0000); 1344 /* now let's feed the engine */ 1345 if (font->stride == 1) { 1346 /* shovel in 8 bit quantities */ 1347 fd8 = fd; 1348 for (i = 0; i < he; i++) { 1349 /* 1350 * the pipeline should be long enough to 1351 * draw any character without having to wait 1352 */ 1353 bus_space_write_4(sc->sc_iot, sc->sc_reh, 1354 CRIME_DE_STIPPLE_PAT, *fd8 << 24); 1355 bus_space_write_4(sc->sc_iot, sc->sc_reh, 1356 CRIME_DE_X_VERTEX_0, (x << 16) | y); 1357 bus_space_write_4(sc->sc_iot, sc->sc_reh, 1358 CRIME_DE_X_VERTEX_1 | CRIME_DE_START, 1359 ((x + wi) << 16) | y); 1360 y++; 1361 fd8++; 1362 } 1363 } else if (font->stride == 2) { 1364 /* shovel in 16 bit quantities */ 1365 fd16 = fd; 1366 for (i = 0; i < he; i++) { 1367 /* 1368 * the pipeline should be long enough to 1369 * draw any character without having to wait 1370 */ 1371 bus_space_write_4(sc->sc_iot, sc->sc_reh, 1372 CRIME_DE_STIPPLE_PAT, *fd16 << 16); 1373 bus_space_write_4(sc->sc_iot, sc->sc_reh, 1374 CRIME_DE_X_VERTEX_0, (x << 16) | y); 1375 bus_space_write_4(sc->sc_iot, sc->sc_reh, 1376 CRIME_DE_X_VERTEX_1 | CRIME_DE_START, 1377 ((x + wi) << 16) | y); 1378 y++; 1379 fd16++; 1380 } 1381 } 1382 } 1383 } 1384 1385 static void 1386 crmfb_setup_ddc(struct crmfb_softc *sc) 1387 { 1388 int i; 1389 char edid_data[128]; 1390 1391 memset(edid_data, 0, 128); 1392 sc->sc_i2c.ic_cookie = sc; 1393 sc->sc_i2c.ic_acquire_bus = crmfb_i2c_acquire_bus; 1394 sc->sc_i2c.ic_release_bus = crmfb_i2c_release_bus; 1395 sc->sc_i2c.ic_send_start = crmfb_i2c_send_start; 1396 sc->sc_i2c.ic_send_stop = crmfb_i2c_send_stop; 1397 sc->sc_i2c.ic_initiate_xfer = crmfb_i2c_initiate_xfer; 1398 sc->sc_i2c.ic_read_byte = crmfb_i2c_read_byte; 1399 sc->sc_i2c.ic_write_byte = crmfb_i2c_write_byte; 1400 sc->sc_i2c.ic_exec = NULL; 1401 i = 0; 1402 while (edid_data[1] == 0 && i++ < 10) 1403 ddc_read_edid(&sc->sc_i2c, edid_data, 128); 1404 if (i > 1) 1405 aprint_debug_dev(sc->sc_dev, 1406 "had to try %d times to get EDID data\n", i); 1407 if (i < 11) { 1408 edid_parse(edid_data, &sc->sc_edid_info); 1409 edid_print(&sc->sc_edid_info); 1410 } 1411 } 1412 1413 /* I2C bitbanging */ 1414 static void 1415 crmfb_i2cbb_set_bits(void *cookie, uint32_t bits) 1416 { 1417 struct crmfb_softc *sc = cookie; 1418 1419 bus_space_write_4(sc->sc_iot, sc->sc_ioh, CRMFB_I2C_VGA, bits ^ 3); 1420 } 1421 1422 static void 1423 crmfb_i2cbb_set_dir(void *cookie, uint32_t dir) 1424 { 1425 1426 /* Nothing to do */ 1427 } 1428 1429 static uint32_t 1430 crmfb_i2cbb_read(void *cookie) 1431 { 1432 struct crmfb_softc *sc = cookie; 1433 1434 return bus_space_read_4(sc->sc_iot, sc->sc_ioh, CRMFB_I2C_VGA) ^ 3; 1435 } 1436 1437 /* higher level I2C stuff */ 1438 static int 1439 crmfb_i2c_acquire_bus(void *cookie, int flags) 1440 { 1441 1442 /* private bus */ 1443 return 0; 1444 } 1445 1446 static void 1447 crmfb_i2c_release_bus(void *cookie, int flags) 1448 { 1449 1450 /* private bus */ 1451 } 1452 1453 static int 1454 crmfb_i2c_send_start(void *cookie, int flags) 1455 { 1456 1457 return i2c_bitbang_send_start(cookie, flags, &crmfb_i2cbb_ops); 1458 } 1459 1460 static int 1461 crmfb_i2c_send_stop(void *cookie, int flags) 1462 { 1463 1464 return i2c_bitbang_send_stop(cookie, flags, &crmfb_i2cbb_ops); 1465 } 1466 1467 static int 1468 crmfb_i2c_initiate_xfer(void *cookie, i2c_addr_t addr, int flags) 1469 { 1470 1471 return i2c_bitbang_initiate_xfer(cookie, addr, flags, 1472 &crmfb_i2cbb_ops); 1473 } 1474 1475 static int 1476 crmfb_i2c_read_byte(void *cookie, uint8_t *valp, int flags) 1477 { 1478 1479 return i2c_bitbang_read_byte(cookie, valp, flags, &crmfb_i2cbb_ops); 1480 } 1481 1482 static int 1483 crmfb_i2c_write_byte(void *cookie, uint8_t val, int flags) 1484 { 1485 1486 return i2c_bitbang_write_byte(cookie, val, flags, &crmfb_i2cbb_ops); 1487 } 1488 1489 /* mode setting stuff */ 1490 static uint32_t 1491 calc_pll(int f_out) 1492 { 1493 uint32_t ret; 1494 int f_in = 20000; /* 20MHz in */ 1495 int M, N, P; 1496 int error, div, best = 9999999; 1497 int ff1, ff2; 1498 int MM = 0, NN = 0, PP = 0, ff = 0; 1499 1500 /* f_out = M * f_in / (N * (1 << P) */ 1501 1502 for (P = 0; P < 4; P++) { 1503 for (N = 64; N > 0; N--) { 1504 div = N * (1 << P); 1505 M = f_out * div / f_in; 1506 if ((M < 257) && (M > 100)) { 1507 ff1 = M * f_in / div; 1508 ff2 = (M + 1) * f_in / div; 1509 error = abs(ff1 - f_out); 1510 if (error < best) { 1511 MM = M; 1512 NN = N; 1513 PP = P; 1514 ff = ff1; 1515 best = error; 1516 } 1517 error = abs(ff2 - f_out); 1518 if ((error < best) && ( M < 256)){ 1519 MM = M + 1; 1520 NN = N; 1521 PP = P; 1522 ff = ff2; 1523 best = error; 1524 } 1525 } 1526 } 1527 } 1528 DPRINTF("%d: M %d N %d P %d -> %d\n", f_out, MM, NN, PP, ff); 1529 /* now shove the parameters into the register's format */ 1530 ret = (MM - 1) | ((NN - 1) << 8) | (P << 14); 1531 return ret; 1532 } 1533 1534 static int 1535 crmfb_set_mode(struct crmfb_softc *sc, const struct videomode *mode) 1536 { 1537 uint32_t d, dc; 1538 int tmp, diff; 1539 1540 switch (mode->hdisplay % 32) { 1541 case 0: 1542 sc->sc_console_depth = 8; 1543 break; 1544 case 16: 1545 sc->sc_console_depth = 16; 1546 break; 1547 case 8: 1548 case 24: 1549 sc->sc_console_depth = 32; 1550 break; 1551 default: 1552 aprint_error_dev(sc->sc_dev, 1553 "hdisplay (%d) is not a multiple of 32\n", 1554 mode->hdisplay); 1555 return FALSE; 1556 } 1557 if (mode->dot_clock > 150000) { 1558 aprint_error_dev(sc->sc_dev, 1559 "requested dot clock is too high ( %d MHz )\n", 1560 mode->dot_clock / 1000); 1561 return FALSE; 1562 } 1563 1564 /* disable DMA */ 1565 d = bus_space_read_4(sc->sc_iot, sc->sc_ioh, CRMFB_OVR_CONTROL); 1566 d &= ~(1 << CRMFB_OVR_CONTROL_DMAEN_SHIFT); 1567 crmfb_write_reg(sc, CRMFB_OVR_CONTROL, d); 1568 DELAY(50000); 1569 d = bus_space_read_4(sc->sc_iot, sc->sc_ioh, CRMFB_FRM_CONTROL); 1570 d &= ~(1 << CRMFB_FRM_CONTROL_DMAEN_SHIFT); 1571 crmfb_write_reg(sc, CRMFB_FRM_CONTROL, d); 1572 DELAY(50000); 1573 crmfb_write_reg(sc, CRMFB_DID_CONTROL, d); 1574 DELAY(50000); 1575 1576 if (!crmfb_wait_dma_idle(sc)) 1577 aprint_error("crmfb: crmfb_wait_dma_idle timed out\n"); 1578 1579 /* ok, now we're good to go */ 1580 dc = calc_pll(mode->dot_clock); 1581 1582 crmfb_write_reg(sc, CRMFB_VT_XY, 1 << CRMFB_VT_XY_FREEZE_SHIFT); 1583 delay(1000); 1584 1585 /* set the dot clock pll but don't start it yet */ 1586 crmfb_write_reg(sc, CRMFB_DOTCLOCK, dc); 1587 delay(10000); 1588 1589 /* pixel counter */ 1590 d = mode->htotal | (mode->vtotal << 12); 1591 crmfb_write_reg(sc, CRMFB_VT_XYMAX, d); 1592 1593 /* video timings */ 1594 d = mode->vsync_end | (mode->vsync_start << 12); 1595 crmfb_write_reg(sc, CRMFB_VT_VSYNC, d); 1596 1597 d = mode->hsync_end | (mode->hsync_start << 12); 1598 crmfb_write_reg(sc, CRMFB_VT_HSYNC, d); 1599 1600 d = mode->vtotal | (mode->vdisplay << 12); 1601 crmfb_write_reg(sc, CRMFB_VT_VBLANK, d); 1602 1603 d = (mode->htotal - 5) | ((mode->hdisplay - 5) << 12); 1604 crmfb_write_reg(sc, CRMFB_VT_HBLANK, d); 1605 1606 d = mode->vtotal | (mode->vdisplay << 12); 1607 crmfb_write_reg(sc, CRMFB_VT_VCMAP, d); 1608 d = mode->htotal | (mode->hdisplay << 12); 1609 crmfb_write_reg(sc, CRMFB_VT_HCMAP, d); 1610 1611 d = 0; 1612 if (mode->flags & VID_NHSYNC) d |= CRMFB_VT_FLAGS_HDRV_INVERT; 1613 if (mode->flags & VID_NVSYNC) d |= CRMFB_VT_FLAGS_VDRV_INVERT; 1614 crmfb_write_reg(sc, CRMFB_VT_FLAGS, d); 1615 1616 diff = -abs(mode->vtotal - mode->vdisplay - 1); 1617 d = ((uint32_t)diff << 12) & 0x00fff000; 1618 d |= (mode->htotal - 20); 1619 crmfb_write_reg(sc, CRMFB_VT_DID_STARTXY, d); 1620 1621 d = ((uint32_t)(diff + 1) << 12) & 0x00fff000; 1622 d |= (mode->htotal - 54); 1623 crmfb_write_reg(sc, CRMFB_VT_CRS_STARTXY, d); 1624 1625 d = ((uint32_t)diff << 12) & 0x00fff000; 1626 d |= (mode->htotal - 4); 1627 crmfb_write_reg(sc, CRMFB_VT_VC_STARTXY, d); 1628 1629 tmp = mode->htotal - 19; 1630 d = tmp << 12; 1631 d |= ((tmp + mode->hdisplay - 2) % mode->htotal); 1632 crmfb_write_reg(sc, CRMFB_VT_HPIX_EN, d); 1633 1634 d = mode->vdisplay | (mode->vtotal << 12); 1635 crmfb_write_reg(sc, CRMFB_VT_VPIX_EN, d); 1636 1637 sc->sc_width = mode->hdisplay; 1638 sc->sc_height = mode->vdisplay; 1639 1640 return TRUE; 1641 } 1642 1643
Indexes created Thu Sep 25 16:09:42 GMT 2025