crmfbreg.h revision 1.14 1 1.14 macallan /* $NetBSD: crmfbreg.h,v 1.14 2011/04/07 01:20:31 macallan Exp $ */
2 1.1 macallan
3 1.1 macallan /*-
4 1.1 macallan * Copyright (c) 2007 Jared D. McNeill <jmcneill (at) invisible.ca>
5 1.5 macallan * 2008 Michael Lorenz <macallan (at) netbsd.org>
6 1.1 macallan * All rights reserved.
7 1.1 macallan *
8 1.1 macallan * Redistribution and use in source and binary forms, with or without
9 1.1 macallan * modification, are permitted provided that the following conditions
10 1.1 macallan * are met:
11 1.1 macallan * 1. Redistributions of source code must retain the above copyright
12 1.1 macallan * notice, this list of conditions and the following disclaimer.
13 1.1 macallan * 2. Redistributions in binary form must reproduce the above copyright
14 1.1 macallan * notice, this list of conditions and the following disclaimer in the
15 1.1 macallan * documentation and/or other materials provided with the distribution.
16 1.1 macallan *
17 1.1 macallan * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
18 1.1 macallan * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
19 1.1 macallan * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
20 1.1 macallan * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
21 1.1 macallan * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22 1.1 macallan * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 1.1 macallan * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24 1.1 macallan * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
25 1.1 macallan * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26 1.1 macallan * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
27 1.1 macallan * POSSIBILITY OF SUCH DAMAGE.
28 1.1 macallan */
29 1.1 macallan
30 1.1 macallan /*
31 1.1 macallan * SGI-CRM (O2) Framebuffer driver, register definitions
32 1.1 macallan */
33 1.1 macallan
34 1.1 macallan #ifndef CRMFBREG_H
35 1.1 macallan #define CRMFBREG_H
36 1.1 macallan
37 1.12 macallan #define CRMFB_CTRLSTAT 0x00000000
38 1.12 macallan #define CRMFB_CTRLSTAT_CHIPID_MASK 0x0000000f
39 1.12 macallan #define CRMFB_CTRLSTAT_SENSE 0x00000010 /* monitor sense pin */
40 1.12 macallan #define CRMFB_CTRLSTAT_GPIO0_SENSE 0x00000040
41 1.12 macallan #define CRMFB_CTRLSTAT_GPIO0_INPUT 0x00000080
42 1.12 macallan #define CRMFB_CTRLSTAT_GPIO1_SENSE 0x00000100
43 1.12 macallan #define CRMFB_CTRLSTAT_GPIO1_INPUT 0x00000200
44 1.12 macallan #define CRMFB_CTRLSTAT_GPIO2_SENSE 0x00000400
45 1.12 macallan #define CRMFB_CTRLSTAT_GPIO2_INPUT 0x00000800
46 1.12 macallan #define CRMFB_CTRLSTAT_GPIO3_SENSE 0x00001000
47 1.12 macallan #define CRMFB_CTRLSTAT_GPIO3_INPUT 0x00002000
48 1.12 macallan #define CRMFB_CTRLSTAT_GPIO4_SENSE 0x00004000
49 1.12 macallan #define CRMFB_CTRLSTAT_GPIO4_INPUT 0x00008000
50 1.12 macallan #define CRMFB_CTRLSTAT_GPIO5_SENSE 0x00010000
51 1.12 macallan #define CRMFB_CTRLSTAT_GPIO5_INPUT 0x00020000
52 1.12 macallan #define CRMFB_CTRLSTAT_GPIO6_SENSE 0x00040000
53 1.12 macallan #define CRMFB_CTRLSTAT_GPIO6_INPUT 0x00080000
54 1.12 macallan #define CRMFB_CTRLSTAT_GPIO7_SENSE 0x00100000
55 1.12 macallan #define CRMFB_CTRLSTAT_GPIO7_INPUT 0x00200000
56 1.12 macallan #define CRMFB_CTRLSTAT_GPIO8_SENSE 0x00400000
57 1.12 macallan #define CRMFB_CTRLSTAT_GPIO8_INPUT 0x00800000
58 1.12 macallan #define CRMFB_CTRLSTAT_GPIO9_SENSE 0x01000000
59 1.12 macallan #define CRMFB_CTRLSTAT_GPIO9_INPUT 0x02000000
60 1.12 macallan #define CRMFB_CTRLSTAT_HALF_PHASE 0x04000000 /* for flat panel */
61 1.12 macallan #define CRMFB_CTRLSTAT_CSYNC_ALOW 0x08000000 /* csync active low */
62 1.12 macallan #define CRMFB_CTRLSTAT_EXTERNAL_PCLK 0x00000000
63 1.12 macallan #define CRMFB_CTRLSTAT_DIFF_PCLK 0x10000000 /* differential pclock */
64 1.12 macallan #define CRMFB_CTRLSTAT_INTERNAL_PCLK 0x30000000
65 1.12 macallan
66 1.1 macallan #define CRMFB_DOTCLOCK 0x00000004
67 1.12 macallan #define CRMFB_DOTCLOCK_M_MASK 0x000000ff
68 1.12 macallan #define CRMFB_DOTCLOCK_N_MASK 0x00003f00
69 1.12 macallan #define CRMFB_DOTCLOCK_P_MASK 0x0000c000
70 1.1 macallan #define CRMFB_DOTCLOCK_CLKRUN_SHIFT 20
71 1.12 macallan #define CRMFB_DOTCLOCK_OUT_OF_RANGE 0x00400000
72 1.12 macallan #define CRMFB_DOTCLOCK_OUT_OF_LOCK 0x00800000
73 1.12 macallan #define CRMFB_DOTCLOCK_TDWNI 0x01000000 /* ? */
74 1.12 macallan #define CRMFB_DOTCLOCK_TUPI 0x02000000 /* ? */
75 1.12 macallan
76 1.12 macallan #define CRMFB_I2C_VGA 0x00000008
77 1.13 macallan #define CRMFB_I2C_SDA 0x00000001 /* these bits are */
78 1.13 macallan #define CRMFB_I2C_SCL 0x00000002 /* low active */
79 1.12 macallan
80 1.12 macallan #define CRMFB_SYSCLK 0x0000000c
81 1.12 macallan
82 1.12 macallan #define CRMFB_I2C_FP 0x00000010 /* same bits as CRMFB_I2C_VGA */
83 1.12 macallan
84 1.12 macallan #define CRMFB_DEVICE_ID 0x00000014
85 1.12 macallan #define CRMFB_DEVICE_ID_DEF 0x00000666 /* this chip is EVIL */
86 1.12 macallan
87 1.12 macallan
88 1.12 macallan #define CRMFB_VT_XY 0x00010000 /* pixel / line counters */
89 1.12 macallan #define CRMFB_VT_XY_X_MASK 0x00000fff
90 1.12 macallan #define CRMFB_VT_XY_Y_MASK 0x00fff000
91 1.1 macallan #define CRMFB_VT_XY_FREEZE_SHIFT 31
92 1.14 macallan #define CRMFB_VT_XYMAX 0x00010004 /* same masks as CRMFB_VT_XY, counters in
93 1.12 macallan * CRMFB_VT_XY reset when reaching max */
94 1.12 macallan #define CRMFB_VT_VSYNC 0x00010008
95 1.12 macallan #define CRMFB_VT_VSYNC_OFF_MASK 0x00000fff
96 1.12 macallan #define CRMFB_VT_VSYNC_ON_MASK 0x00fff000
97 1.12 macallan #define CRMFB_VT_HSYNC 0x0001000c
98 1.12 macallan #define CRMFB_VT_HSYNC_OFF_MASK 0x00000fff
99 1.12 macallan #define CRMFB_VT_HSYNC_ON_MASK 0x00fff000
100 1.12 macallan #define CRMFB_VT_VBLANK 0x00010010
101 1.12 macallan #define CRMFB_VT_VBLANK_OFF_MASK 0x00000fff
102 1.12 macallan #define CRMFB_VT_VBLANK_ON_MASK 0x00fff000
103 1.12 macallan #define CRMFB_VT_HBLANK 0x00010014
104 1.12 macallan #define CRMFB_VT_HBLANK_OFF_MASK 0x00000fff
105 1.12 macallan #define CRMFB_VT_HBLANK_ON_MASK 0x00fff000
106 1.12 macallan
107 1.3 sekiya #define CRMFB_VT_FLAGS 0x00010018
108 1.12 macallan #define CRMFB_VT_FLAGS_VDRV_INVERT 0x00000001
109 1.12 macallan #define CRMFB_VT_FLAGS_VDRV_LOW 0x00000002
110 1.12 macallan #define CRMFB_VT_FLAGS_HDRV_INVERT 0x00000004
111 1.12 macallan #define CRMFB_VT_FLAGS_HDRV_LOW 0x00000008 /* put monitor to sleep */
112 1.12 macallan #define CRMFB_VT_FLAGS_SYNC_HIGH 0x00000010
113 1.12 macallan #define CRMFB_VT_FLAGS_SYNC_LOW 0x00000020
114 1.3 sekiya #define CRMFB_VT_FLAGS_SYNC_LOW_MSB 5
115 1.3 sekiya #define CRMFB_VT_FLAGS_SYNC_LOW_LSB 5
116 1.12 macallan #define CRMFB_VT_FLAGS_F2RF_HIGH 0x00000040 /* sync left/right ? */
117 1.12 macallan
118 1.12 macallan #define CRMFB_VT_FRAMELOCK 0x0001001c
119 1.12 macallan #define CRMFB_VT_FRAMELOCK_F2RF_MASK 0x00000fff /* f2rf toggles when y
120 1.12 macallan * reaches this */
121 1.12 macallan #define CRMFB_VT_FRAMELOCK_LOCK_MASK 0x00fff000
122 1.12 macallan
123 1.12 macallan /* scanline interrupts! */
124 1.1 macallan #define CRMFB_VT_INTR01 0x00010020
125 1.12 macallan #define CRMFB_INTR_1_MASK 0x00000fff /* intr1 when y == this */
126 1.12 macallan #define CRMFB_INTR_0_MASK 0x00fff000 /* intr0 when y == this */
127 1.1 macallan #define CRMFB_VT_INTR23 0x00010024
128 1.12 macallan #define CRMFB_INTR_3_MASK 0x00000fff /* intr3 when y == this */
129 1.12 macallan #define CRMFB_INTR_2_MASK 0x00fff000 /* intr2 when y == this */
130 1.12 macallan
131 1.14 macallan #define CRMFB_VT_HPIX_EN 0x00010034
132 1.12 macallan #define CRMFB_HPIXEN_OFF_MASK 0x00000fff
133 1.12 macallan #define CRMFB_HPIXEN_ON_MASK 0x00fff000
134 1.1 macallan #define CRMFB_VT_VPIX_EN 0x00010038
135 1.1 macallan #define CRMFB_VT_VPIX_EN_OFF_SHIFT 0
136 1.12 macallan #define CRMFB_VPIXEN_OFF_MASK 0x00000fff
137 1.12 macallan #define CRMFB_VPIXEN_ON_MASK 0x00fff000
138 1.2 jmcneill #define CRMFB_VT_HCMAP 0x0001003c
139 1.12 macallan #define CRMFB_HCMAP_OFF_MASK 0x00000fff
140 1.12 macallan #define CRMFB_HCMAP_ON_MASK 0x00fff000
141 1.2 jmcneill #define CRMFB_VT_HCMAP_ON_SHIFT 12
142 1.2 jmcneill #define CRMFB_VT_VCMAP 0x00010040
143 1.12 macallan #define CRMFB_VCMAP_OFF_MASK 0x00000fff
144 1.12 macallan #define CRMFB_VCMAP_ON_MASK 0x00fff000
145 1.1 macallan #define CRMFB_VT_VCMAP_ON_SHIFT 12
146 1.12 macallan
147 1.14 macallan #define CRMFB_VT_DID_STARTXY 0x00010044
148 1.12 macallan #define CRMFB_VT_DID_START_X_MASK 0x00000fff
149 1.12 macallan #define CRMFB_VT_DID_START_Y_MASK 0x00fff000
150 1.14 macallan #define CRMFB_VT_CRS_STARTXY 0x00010048
151 1.12 macallan #define CRMFB_VT_CRS_START_X_MASK 0x00000fff
152 1.12 macallan #define CRMFB_VT_CRS_START_Y_MASK 0x00fff000
153 1.14 macallan #define CRMFB_VT_VC_STARTXY 0x0001004c
154 1.12 macallan #define CRMFB_VT_VC_START_X_MASK 0x00000fff
155 1.12 macallan #define CRMFB_VT_VC_START_Y_MASK 0x00fff000
156 1.12 macallan
157 1.1 macallan #define CRMFB_OVR_WIDTH_TILE 0x00020000
158 1.12 macallan #define CRMFB_OVR_WIDTH_TILE_RHS_MASK 0x0000001f /* width of rightmost tile
159 1.12 macallan * in 32 byte units */
160 1.12 macallan #define CRMFB_OVR_WIDTH_TILES_MASK 0x00001fe0 /* width in whole tiles */
161 1.12 macallan #define CRMFB_OVR_TILE_PTR 0x00020004
162 1.12 macallan #define CRMFB_OVR_TILE_LIST_MASK 0xfffff000
163 1.12 macallan #define CRMFB_OVR_DMA_ENABLE 0x00000001
164 1.12 macallan #define CRMFB_OVR_CONTROL 0x00020008 /* same bits as CRMFB_OVR_TILE_PTR, copied
165 1.12 macallan * from here when blanking */
166 1.1 macallan #define CRMFB_OVR_CONTROL_DMAEN_SHIFT 0
167 1.12 macallan
168 1.1 macallan #define CRMFB_FRM_TILESIZE 0x00030000
169 1.1 macallan #define CRMFB_FRM_TILESIZE_RHS_SHIFT 0
170 1.1 macallan #define CRMFB_FRM_TILESIZE_WIDTH_SHIFT 5
171 1.1 macallan #define CRMFB_FRM_TILESIZE_DEPTH_SHIFT 13
172 1.1 macallan #define CRMFB_FRM_TILESIZE_DEPTH_8 0
173 1.1 macallan #define CRMFB_FRM_TILESIZE_DEPTH_16 1
174 1.1 macallan #define CRMFB_FRM_TILESIZE_DEPTH_32 2
175 1.1 macallan #define CRMFB_FRM_TILESIZE_FIFOR_SHIFT 15
176 1.1 macallan #define CRMFB_FRM_PIXSIZE 0x00030004
177 1.1 macallan #define CRMFB_FRM_PIXSIZE_HEIGHT_SHIFT 16
178 1.12 macallan #define CRMFB_TILE_PTR 0x00020008
179 1.12 macallan #define CRMFB_TILE_LIST_MASK 0xfffff000
180 1.12 macallan #define CRMFB_DMA_ENABLE 0x00000001
181 1.1 macallan #define CRMFB_FRM_CONTROL 0x0003000c
182 1.1 macallan #define CRMFB_FRM_CONTROL_DMAEN_SHIFT 0
183 1.1 macallan #define CRMFB_FRM_CONTROL_LINEAR_SHIFT 1
184 1.1 macallan #define CRMFB_FRM_CONTROL_TILEPTR_SHIFT 9
185 1.12 macallan
186 1.12 macallan #define CRMFB_DID_PTR 0x00040000
187 1.12 macallan #define CRMFB_DID_BASE_MASK 0x0000ffff
188 1.12 macallan #define CRMFB_DID_DMA_ENABLE 0x00010000
189 1.1 macallan #define CRMFB_DID_CONTROL 0x00040004
190 1.1 macallan #define CRMFB_DID_CONTROL_DMAEN_SHIFT 0
191 1.12 macallan
192 1.12 macallan #define CRMFB_WID 0x00048000 /* 32 WIDs */
193 1.1 macallan #define CRMFB_MODE 0x00048000
194 1.1 macallan #define CRMFB_MODE_TYP_SHIFT 2
195 1.1 macallan #define CRMFB_MODE_TYP_I8 0
196 1.1 macallan #define CRMFB_MODE_TYP_ARGB5 4
197 1.1 macallan #define CRMFB_MODE_TYP_RGB8 5
198 1.1 macallan #define CRMFB_MODE_BUF_SHIFT 0
199 1.1 macallan #define CRMFB_MODE_BUF_BOTH 3
200 1.12 macallan #define CRMFB_MODE_CMAP_SELECT_SHIFT 5 /* upper 5 bit */
201 1.12 macallan #define CRMFB_MODE_GAMMA_ENABLE_SHIFT 10
202 1.12 macallan #define CRMFB_MODE_FP_ENABLE_SHIFT 11 /* two bits */
203 1.12 macallan
204 1.12 macallan #define CRMFB_CMAP 0x00050000 /* 32*256 entries */
205 1.12 macallan #define CRMFB_CMAP_OVL 0x00051400
206 1.1 macallan #define CRMFB_CMAP_FIFO 0x00058000
207 1.12 macallan #define CRMFB_GMAP 0x00060000 /* gamma map */
208 1.1 macallan #define CRMFB_CURSOR_POS 0x00070000
209 1.1 macallan /*
210 1.1 macallan * upper 16 bit are Y, lower 16 bit are X - both signed so there's no need for
211 1.1 macallan * a hotspot register
212 1.1 macallan */
213 1.1 macallan #define CRMFB_CURSOR_CONTROL 0x00070004
214 1.1 macallan #define CRMFB_CURSOR_ON 0x00000001
215 1.12 macallan #define CRMFB_CURSOR_CROSSHAIR 0x00000002
216 1.1 macallan #define CRMFB_CURSOR_CMAP0 0x00070008
217 1.1 macallan #define CRMFB_CURSOR_CMAP1 0x0007000c
218 1.1 macallan #define CRMFB_CURSOR_CMAP2 0x00070010
219 1.1 macallan #define CRMFB_CURSOR_BITMAP 0x00078000
220 1.1 macallan /* two bit deep cursor image, zero is transparent */
221 1.1 macallan
222 1.1 macallan /* rendering engine registers */
223 1.6 macallan /* these TLBs define 16x16 tiles, 64kB each, upper 16 bit only */
224 1.1 macallan #define CRIME_RE_TLB_A 0x1000
225 1.1 macallan #define CRIME_RE_TLB_B 0x1200
226 1.1 macallan #define CRIME_RE_TLB_C 0x1400
227 1.1 macallan #define CRIME_RE_TEX 0x1600
228 1.1 macallan #define CRIME_RE_CLIP_IDS 0x16e0
229 1.6 macallan /* 32bit entries, 4kB page address >> 12 | 0x80000000 */
230 1.1 macallan #define CRIME_RE_LINEAR_A 0x1700
231 1.1 macallan #define CRIME_RE_LINEAR_B 0x1780
232 1.1 macallan
233 1.1 macallan /* memory transfer engine from 0x3000*/
234 1.1 macallan #define CRIME_MTE_MODE 0x3000
235 1.1 macallan #define CRIME_MTE_BYTEMASK 0x3008
236 1.1 macallan #define CRIME_MTE_STIPPLEMASK 0x3010
237 1.1 macallan #define CRIME_MTE_BG 0x3018
238 1.4 macallan #define CRIME_MTE_SRC0 0x3020 /* start */
239 1.4 macallan #define CRIME_MTE_SRC1 0x3028 /* end */
240 1.4 macallan #define CRIME_MTE_DST0 0x3030 /* start */
241 1.4 macallan #define CRIME_MTE_DST1 0x3038 /* end */
242 1.7 macallan #define CRIME_MTE_SRC_Y_STEP 0x3040
243 1.7 macallan #define CRIME_MTE_DST_Y_STEP 0x3048
244 1.1 macallan #define CRIME_MTE_NULL 0x3070
245 1.1 macallan #define CRIME_MTE_FLUSH 0x3078
246 1.1 macallan
247 1.4 macallan /* CRIME_MTE_MODE */
248 1.4 macallan #define MTE_MODE_DST_ECC 0x00000001 /* enable ECC in DST */
249 1.6 macallan #define MTE_MODE_SRC_ECC 0x00000002 /* enable ECC in SRC */
250 1.4 macallan #define MTE_MODE_DST_BUF_MASK 0x0000001c
251 1.4 macallan #define MTE_TLB_A 0
252 1.4 macallan #define MTE_TLB_B 1
253 1.4 macallan #define MTE_TLB_C 2
254 1.4 macallan #define MTE_TLB_TEX 3
255 1.4 macallan #define MTE_TLB_LIN_A 4
256 1.4 macallan #define MTE_TLB_LIN_B 5
257 1.4 macallan #define MTE_TLB_CLIP 6
258 1.4 macallan #define MTE_DST_TLB_SHIFT 2
259 1.4 macallan #define MTE_MODE_SRC_BUF_MASK 0x000000e0
260 1.4 macallan #define MTE_SRC_TLB_SHIFT 5
261 1.4 macallan #define MTE_MODE_DEPTH_MASK 0x00000300
262 1.4 macallan #define MTE_DEPTH_8 0
263 1.4 macallan #define MTE_DEPTH_16 1
264 1.4 macallan #define MTE_DEPTH_32 2
265 1.4 macallan #define MTE_DEPTH_SHIFT 8
266 1.4 macallan #define MTE_MODE_STIPPLE 0x00000400
267 1.4 macallan #define MTE_MODE_COPY 0x00000800 /* 1 - copy, 0 - clear dst */
268 1.4 macallan
269 1.4 macallan /* drawing engine from 0x2000 */
270 1.4 macallan #define CRIME_DE_MODE_SRC 0x2000
271 1.4 macallan #define CRIME_DE_MODE_DST 0x2008
272 1.4 macallan #define CRIME_DE_CLIPMODE 0x2010
273 1.4 macallan #define CRIME_DE_DRAWMODE 0x2018
274 1.4 macallan #define CRIME_DE_SCRMASK0 0x2020
275 1.4 macallan #define CRIME_DE_SCRMASK1 0x2028
276 1.4 macallan #define CRIME_DE_SCRMASK2 0x2030
277 1.4 macallan #define CRIME_DE_SCRMASK3 0x2038
278 1.4 macallan #define CRIME_DE_SCRMASK4 0x2040
279 1.4 macallan #define CRIME_DE_SCISSOR 0x2048
280 1.4 macallan #define CRIME_DE_WINOFFSET_SRC 0x2050 /* x in upper, y in lower 16 bit */
281 1.4 macallan #define CRIME_DE_WINOFFSET_DST 0x2058
282 1.4 macallan #define CRIME_DE_PRIMITIVE 0x2060
283 1.4 macallan #define CRIME_DE_X_VERTEX_0 0x2070
284 1.4 macallan #define CRIME_DE_X_VERTEX_1 0x2074
285 1.4 macallan #define CRIME_DE_X_VERTEX_2 0x2078
286 1.4 macallan #define CRIME_DE_GL_VERTEX_0_X 0x2080
287 1.4 macallan #define CRIME_DE_GL_VERTEX_0_Y 0x2084
288 1.4 macallan #define CRIME_DE_GL_VERTEX_1_X 0x2088
289 1.4 macallan #define CRIME_DE_GL_VERTEX_1_Y 0x208c
290 1.4 macallan #define CRIME_DE_GL_VERTEX_2_X 0x2090
291 1.4 macallan #define CRIME_DE_GL_VERTEX_2_Y 0x2094
292 1.4 macallan #define CRIME_DE_XFER_ADDR_SRC 0x20a0
293 1.6 macallan #define CRIME_DE_XFER_STRD_SRC 0x20a4
294 1.4 macallan #define CRIME_DE_XFER_STEP_X 0x20a8
295 1.4 macallan #define CRIME_DE_XFER_STEP_Y 0x20ac
296 1.6 macallan #define CRIME_DE_XFER_ADDR_DST 0x20b0
297 1.6 macallan #define CRIME_DE_XFER_STRD_DST 0x20b4
298 1.4 macallan #define CRIME_DE_STIPPLE_MODE 0x20c0
299 1.4 macallan #define CRIME_DE_STIPPLE_PAT 0x20c4
300 1.4 macallan #define CRIME_DE_FG 0x20d0
301 1.4 macallan #define CRIME_DE_BG 0x20d8
302 1.9 macallan #define CRIME_DE_ALPHA_COLOR 0x21a0 /* constant colour for alpha */
303 1.9 macallan #define CRIME_DE_ALPHA_FUNC 0x21a8 /* blend function */
304 1.4 macallan #define CRIME_DE_ROP 0x21b0
305 1.4 macallan #define CRIME_DE_PLANEMASK 0x21b8
306 1.4 macallan
307 1.4 macallan #define CRIME_DE_NULL 0x21f0
308 1.4 macallan #define CRIME_DE_FLUSH 0x21f8
309 1.4 macallan
310 1.4 macallan #define CRIME_DE_START 0x0800 /* OR this to a register address in
311 1.4 macallan * order to start a command */
312 1.4 macallan
313 1.4 macallan /* CRIME_DE_MODE_* */
314 1.4 macallan #define DE_MODE_TLB_A 0x00000000
315 1.4 macallan #define DE_MODE_TLB_B 0x00000400
316 1.4 macallan #define DE_MODE_TLB_C 0x00000800
317 1.4 macallan #define DE_MODE_LIN_A 0x00001000
318 1.4 macallan #define DE_MODE_LIN_B 0x00001400
319 1.4 macallan #define DE_MODE_BUFDEPTH_8 0x00000000
320 1.4 macallan #define DE_MODE_BUFDEPTH_16 0x00000100
321 1.4 macallan #define DE_MODE_BUFDEPTH_32 0x00000200
322 1.4 macallan #define DE_MODE_TYPE_CI 0x00000000
323 1.4 macallan #define DE_MODE_TYPE_RGB 0x00000010
324 1.4 macallan #define DE_MODE_TYPE_RGBA 0x00000020
325 1.4 macallan #define DE_MODE_TYPE_ABGR 0x00000030
326 1.4 macallan #define DE_MODE_TYPE_YCRCB 0x000000f0
327 1.4 macallan #define DE_MODE_PIXDEPTH_8 0x00000000
328 1.4 macallan #define DE_MODE_PIXDEPTH_16 0x00000004
329 1.4 macallan #define DE_MODE_PIXDEPTH_32 0x00000008
330 1.4 macallan #define DE_MODE_DOUBLE_PIX 0x00000002
331 1.4 macallan #define DE_MODE_DOUBLE_SELECT 0x00000001
332 1.4 macallan
333 1.4 macallan /* clip mode */
334 1.4 macallan #define DE_CLIPMODE_ENABLE 0x00000800
335 1.10 macallan /* enable testing against mask register n */
336 1.10 macallan #define DE_CLIPMODE_MASK0_EN 0x00000200
337 1.10 macallan #define DE_CLIPMODE_MASK1_EN 0x00000100
338 1.10 macallan #define DE_CLIPMODE_MASK2_EN 0x00000080
339 1.10 macallan #define DE_CLIPMODE_MASK3_EN 0x00000040
340 1.10 macallan #define DE_CLIPMODE_MASK4_EN 0x00000020
341 1.10 macallan /* let pixels pass if inside mask n, otherwise outside */
342 1.10 macallan #define DE_CLIPMODE_MASK0_IN 0x00000010
343 1.10 macallan #define DE_CLIPMODE_MASK1_IN 0x00000008
344 1.10 macallan #define DE_CLIPMODE_MASK2_IN 0x00000004
345 1.10 macallan #define DE_CLIPMODE_MASK3_IN 0x00000002
346 1.10 macallan #define DE_CLIPMODE_MASK4_IN 0x00000001
347 1.4 macallan
348 1.4 macallan /* draw mode */
349 1.4 macallan #define DE_DRAWMODE_NO_CONF 0x00800000 /* disable coherency testing */
350 1.4 macallan #define DE_DRAWMODE_X11 0x00000000
351 1.4 macallan #define DE_DRAWMODE_GL 0x00400000
352 1.4 macallan #define DE_DRAWMODE_XFER_EN 0x00200000
353 1.4 macallan #define DE_DRAWMODE_SCISSOR_EN 0x00100000
354 1.4 macallan #define DE_DRAWMODE_LINE_STIP 0x00080000
355 1.4 macallan #define DE_DRAWMODE_POLY_STIP 0x00040000
356 1.4 macallan #define DE_DRAWMODE_OPAQUE_STIP 0x00020000
357 1.4 macallan #define DE_DRAWMODE_SHADE 0x00010000 /* smooth shading enable */
358 1.4 macallan #define DE_DRAWMODE_TEXTURE 0x00008000
359 1.4 macallan #define DE_DRAWMODE_FOG 0x00004000
360 1.4 macallan #define DE_DRAWMODE_COVERAGE 0x00002000
361 1.4 macallan #define DE_DRAWMODE_LINE_AA 0x00001000
362 1.4 macallan #define DE_DRAWMODE_ALPHA_TEST 0x00000800
363 1.4 macallan #define DE_DRAWMODE_ALPHA_BLEND 0x00000400
364 1.4 macallan #define DE_DRAWMODE_ROP 0x00000200
365 1.4 macallan #define DE_DRAWMODE_DITHER 0x00000100
366 1.4 macallan #define DE_DRAWMODE_PLANEMASK 0x00000080
367 1.4 macallan #define DE_DRAWMODE_BYTEMASK 0x00000078
368 1.4 macallan #define DE_DRAWMODE_DEPTH_TEST 0x00000004
369 1.4 macallan #define DE_DRAWMODE_DEPTH_MASK 0x00000002
370 1.4 macallan #define DE_DRAWMODE_STENCIL 0x00000001
371 1.4 macallan
372 1.4 macallan /* primitive */
373 1.4 macallan #define DE_PRIM_POINT 0x00000000
374 1.4 macallan #define DE_PRIM_LINE 0x01000000
375 1.4 macallan #define DE_PRIM_TRIANGLE 0x02000000
376 1.4 macallan #define DE_PRIM_RECTANGLE 0x03000000
377 1.4 macallan #define DE_PRIM_LINE_SKIP_END 0x00040000
378 1.4 macallan #define DE_PRIM_LR 0x00000000 /* left to right */
379 1.4 macallan #define DE_PRIM_RL 0x00010000 /* right to left */
380 1.4 macallan #define DE_PRIM_BT 0x00000000 /* bottom to top */
381 1.4 macallan #define DE_PRIM_TB 0x00020000 /* top to bottom */
382 1.4 macallan #define DE_PRIM_LINE_WIDTH_MASK 0x0000ffff /* in half pixels */
383 1.4 macallan
384 1.11 macallan /* CRIME_DE_STIPPLE_MODE */
385 1.11 macallan #define DE_STIP_MAXREP_SHIFT 0 /* max. repeats 8 bit */
386 1.11 macallan #define DE_STIP_REPCNT_SHIFT 8 /* repeat count, 8 bit */
387 1.11 macallan #define DE_STIP_MAXIDX_SHIFT 16 /* max. index, 5 bit */
388 1.11 macallan #define DE_STIP_STRTIDX_SHIFT 24 /* start index, 5 bit */
389 1.11 macallan
390 1.9 macallan /* alpha function register */
391 1.9 macallan #define DE_ALPHA_ADD 0x00000000
392 1.9 macallan #define DE_ALPHA_MIN 0x00000100
393 1.9 macallan #define DE_ALPHA_MAX 0x00000200
394 1.9 macallan #define DE_ALPHA_SUB 0x00000300
395 1.9 macallan #define DE_ALPHA_REV_SUB 0x00000400
396 1.9 macallan
397 1.9 macallan #define DE_ALPHA_OP_ZERO 0
398 1.9 macallan #define DE_ALPHA_OP_ONE 1
399 1.9 macallan #define DE_ALPHA_OP_DST_COLOR 2
400 1.9 macallan #define DE_ALPHA_OP_1_MINUS_DST_COLOR 3
401 1.9 macallan #define DE_ALPHA_OP_SRC_ALPHA 4
402 1.9 macallan #define DE_ALPHA_OP_1_MINUS_SRC_ALPHA 5
403 1.9 macallan #define DE_ALPHA_OP_DST_ALPHA 6
404 1.9 macallan #define DE_ALPHA_OP_1_MINUS_DST_APLHA 7
405 1.9 macallan #define DE_ALPHA_OP_CONSTANT_COLOR 8
406 1.9 macallan #define DE_ALPHA_OP_1_MINUS_CONST_COLOR 9
407 1.9 macallan #define DE_ALPHA_OP_CONSTANT_ALPHA 10
408 1.9 macallan #define DE_ALPHA_OP_1_MINUS_CONST_ALPHA 11
409 1.9 macallan #define DE_ALPHA_OP_SRC_ALPHA_SATURATE 12
410 1.9 macallan
411 1.9 macallan #define DE_ALPHA_OP_SRC_SHIFT 4
412 1.9 macallan #define DE_ALPHA_OP_DST_SHIFT 0
413 1.9 macallan
414 1.4 macallan /* status register */
415 1.4 macallan #define CRIME_DE_STATUS 0x4000
416 1.4 macallan #define CRIME_DE_IDLE 0x10000000
417 1.10 macallan #define CRIME_DE_SETUP_IDLE 0x08000000
418 1.10 macallan #define CRIME_DE_PIXPIPE_IDLE 0x04000000
419 1.10 macallan #define CRIME_DE_MTE_IDLE 0x02000000
420 1.10 macallan #define CRIME_DE_LEVEL_MASK 0x01fc0000
421 1.10 macallan #define CRIME_DE_RD_PTR_MASK 0x0003f000
422 1.10 macallan #define CRIME_DE_WR_PTR_MASK 0x00000fc0
423 1.10 macallan #define CRIME_DE_BUF_START 0x0000003f
424 1.10 macallan
425 1.10 macallan #define CRIME_DE_LEVEL_SHIFT 18
426 1.10 macallan #define CRIME_DE_LEVEL_MAX 0x7f
427 1.10 macallan #define CRIME_PIPE_LEVEL(x) ((x & CRIME_DE_LEVEL_MASK) >> \
428 1.10 macallan CRIME_DE_LEVEL_SHIFT)
429 1.4 macallan
430 1.1 macallan #endif /* CRMFBREG_H */
431