dpclock.c revision 1.1.2.2
1 1.1.2.2 skrll /* $NetBSD: dpclock.c,v 1.1.2.2 2009/03/03 18:29:13 skrll Exp $ */ 2 1.1.2.2 skrll 3 1.1.2.2 skrll /* 4 1.1.2.2 skrll * Copyright (c) 2001 Erik Reid 5 1.1.2.2 skrll * Copyright (c) 2001 Rafal K. Boni 6 1.1.2.2 skrll * Copyright (c) 2001 Christopher Sekiya 7 1.1.2.2 skrll * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc. 8 1.1.2.2 skrll * All rights reserved. 9 1.1.2.2 skrll * 10 1.1.2.2 skrll * Portions of this code are derived from software contributed to The 11 1.1.2.2 skrll * NetBSD Foundation by Jason R. Thorpe of the Numerical Aerospace 12 1.1.2.2 skrll * Simulation Facility, NASA Ames Research Center. 13 1.1.2.2 skrll * 14 1.1.2.2 skrll * Redistribution and use in source and binary forms, with or without 15 1.1.2.2 skrll * modification, are permitted provided that the following conditions 16 1.1.2.2 skrll * are met: 17 1.1.2.2 skrll * 1. Redistributions of source code must retain the above copyright 18 1.1.2.2 skrll * notice, this list of conditions and the following disclaimer. 19 1.1.2.2 skrll * 2. Redistributions in binary form must reproduce the above copyright 20 1.1.2.2 skrll * notice, this list of conditions and the following disclaimer in the 21 1.1.2.2 skrll * documentation and/or other materials provided with the distribution. 22 1.1.2.2 skrll * 3. The name of the author may not be used to endorse or promote products 23 1.1.2.2 skrll * derived from this software without specific prior written permission. 24 1.1.2.2 skrll * 25 1.1.2.2 skrll * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 26 1.1.2.2 skrll * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 27 1.1.2.2 skrll * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 28 1.1.2.2 skrll * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 29 1.1.2.2 skrll * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 30 1.1.2.2 skrll * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 31 1.1.2.2 skrll * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 32 1.1.2.2 skrll * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 33 1.1.2.2 skrll * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 34 1.1.2.2 skrll * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 1.1.2.2 skrll */ 36 1.1.2.2 skrll 37 1.1.2.2 skrll #include <sys/param.h> 38 1.1.2.2 skrll #include <sys/kernel.h> 39 1.1.2.2 skrll #include <sys/systm.h> 40 1.1.2.2 skrll #include <sys/device.h> 41 1.1.2.2 skrll 42 1.1.2.2 skrll #include <machine/bus.h> 43 1.1.2.2 skrll #include <machine/autoconf.h> 44 1.1.2.2 skrll #include <machine/sysconf.h> 45 1.1.2.2 skrll #include <machine/machtype.h> 46 1.1.2.2 skrll 47 1.1.2.2 skrll #include <dev/clock_subr.h> 48 1.1.2.2 skrll #include <sgimips/dev/dp8573areg.h> 49 1.1.2.2 skrll 50 1.1.2.2 skrll #include <sgimips/sgimips/clockvar.h> 51 1.1.2.2 skrll 52 1.1.2.2 skrll struct dpclock_softc { 53 1.1.2.2 skrll struct device sc_dev; 54 1.1.2.2 skrll 55 1.1.2.2 skrll struct todr_chip_handle sc_todrch; 56 1.1.2.2 skrll 57 1.1.2.2 skrll /* RTC registers */ 58 1.1.2.2 skrll bus_space_tag_t sc_rtct; 59 1.1.2.2 skrll bus_space_handle_t sc_rtch; 60 1.1.2.2 skrll }; 61 1.1.2.2 skrll 62 1.1.2.2 skrll static int dpclock_match(struct device *, struct cfdata *, void *); 63 1.1.2.2 skrll static void dpclock_attach(struct device *, struct device *, void *); 64 1.1.2.2 skrll static int dpclock_gettime(struct todr_chip_handle *, 65 1.1.2.2 skrll volatile struct timeval *); 66 1.1.2.2 skrll static int dpclock_settime(struct todr_chip_handle *, 67 1.1.2.2 skrll volatile struct timeval *); 68 1.1.2.2 skrll 69 1.1.2.2 skrll CFATTACH_DECL(dpclock, sizeof(struct dpclock_softc), 70 1.1.2.2 skrll dpclock_match, dpclock_attach, NULL, NULL); 71 1.1.2.2 skrll 72 1.1.2.2 skrll static int 73 1.1.2.2 skrll dpclock_match(struct device *parent, struct cfdata *cf, void *aux) 74 1.1.2.2 skrll { 75 1.1.2.2 skrll struct mainbus_attach_args *ma = aux; 76 1.1.2.2 skrll 77 1.1.2.2 skrll switch (mach_type) { 78 1.1.2.2 skrll case MACH_SGI_IP6 | MACH_SGI_IP10: 79 1.1.2.2 skrll if (ma->ma_addr == 0x1fbc0000) 80 1.1.2.2 skrll return (1); 81 1.1.2.2 skrll break; 82 1.1.2.2 skrll 83 1.1.2.2 skrll case MACH_SGI_IP12: 84 1.1.2.2 skrll case MACH_SGI_IP20: 85 1.1.2.2 skrll if (ma->ma_addr == 0x1fb80e00) 86 1.1.2.2 skrll return (1); 87 1.1.2.2 skrll break; 88 1.1.2.2 skrll } 89 1.1.2.2 skrll 90 1.1.2.2 skrll return (0); 91 1.1.2.2 skrll } 92 1.1.2.2 skrll 93 1.1.2.2 skrll static void 94 1.1.2.2 skrll dpclock_attach(struct device *parent, struct device *self, void *aux) 95 1.1.2.2 skrll { 96 1.1.2.2 skrll struct dpclock_softc *sc = (void *)self; 97 1.1.2.2 skrll struct mainbus_attach_args *ma = aux; 98 1.1.2.2 skrll int err; 99 1.1.2.2 skrll 100 1.1.2.2 skrll printf("\n"); 101 1.1.2.2 skrll 102 1.1.2.2 skrll /* 103 1.1.2.2 skrll * All machines have one byte register per word. IP6/IP10 use 104 1.1.2.2 skrll * the MSB, others the LSB. 105 1.1.2.2 skrll */ 106 1.1.2.2 skrll if (mach_type == MACH_SGI_IP12 || mach_type == MACH_SGI_IP20) 107 1.1.2.2 skrll sc->sc_rtct = SGIMIPS_BUS_SPACE_HPC; 108 1.1.2.2 skrll else 109 1.1.2.2 skrll sc->sc_rtct = SGIMIPS_BUS_SPACE_IP6_DPCLOCK; 110 1.1.2.2 skrll 111 1.1.2.2 skrll if ((err = bus_space_map(sc->sc_rtct, ma->ma_addr, 0x1ffff, 112 1.1.2.2 skrll BUS_SPACE_MAP_LINEAR, &sc->sc_rtch)) != 0) { 113 1.1.2.2 skrll printf(": unable to map RTC registers, error = %d\n", err); 114 1.1.2.2 skrll return; 115 1.1.2.2 skrll } 116 1.1.2.2 skrll 117 1.1.2.2 skrll sc->sc_todrch.cookie = sc; 118 1.1.2.2 skrll sc->sc_todrch.todr_gettime = dpclock_gettime; 119 1.1.2.2 skrll sc->sc_todrch.todr_settime = dpclock_settime; 120 1.1.2.2 skrll sc->sc_todrch.todr_setwen = NULL; 121 1.1.2.2 skrll 122 1.1.2.2 skrll todr_attach(&sc->sc_todrch); 123 1.1.2.2 skrll } 124 1.1.2.2 skrll 125 1.1.2.2 skrll /* 126 1.1.2.2 skrll * Get the time of day, based on the clock's value and/or the base value. 127 1.1.2.2 skrll */ 128 1.1.2.2 skrll static int 129 1.1.2.2 skrll dpclock_gettime(struct todr_chip_handle *todrch, volatile struct timeval *tv) 130 1.1.2.2 skrll { 131 1.1.2.2 skrll struct dpclock_softc *sc = (struct dpclock_softc *)todrch->cookie; 132 1.1.2.2 skrll struct clock_ymdhms dt; 133 1.1.2.2 skrll int s; 134 1.1.2.2 skrll u_int8_t i, j; 135 1.1.2.2 skrll u_int8_t regs[32]; 136 1.1.2.2 skrll 137 1.1.2.2 skrll s = splhigh(); 138 1.1.2.2 skrll i = bus_space_read_1(sc->sc_rtct, sc->sc_rtch, DP8573A_TIMESAVE_CTL); 139 1.1.2.2 skrll j = i | DP8573A_TIMESAVE_CTL_EN; 140 1.1.2.2 skrll bus_space_write_1(sc->sc_rtct, sc->sc_rtch, DP8573A_TIMESAVE_CTL, j); 141 1.1.2.2 skrll bus_space_write_1(sc->sc_rtct, sc->sc_rtch, DP8573A_TIMESAVE_CTL, i); 142 1.1.2.2 skrll splx(s); 143 1.1.2.2 skrll 144 1.1.2.2 skrll for (i = 0; i < 32; i++) 145 1.1.2.2 skrll regs[i] = bus_space_read_1(sc->sc_rtct, sc->sc_rtch, i); 146 1.1.2.2 skrll 147 1.1.2.2 skrll dt.dt_sec = FROMBCD(regs[DP8573A_SAVE_SEC]); 148 1.1.2.2 skrll dt.dt_min = FROMBCD(regs[DP8573A_SAVE_MIN]); 149 1.1.2.2 skrll 150 1.1.2.2 skrll if (regs[DP8573A_RT_MODE] & DP8573A_RT_MODE_1224) { 151 1.1.2.2 skrll dt.dt_hour = FROMBCD(regs[DP8573A_SAVE_HOUR] & 152 1.1.2.2 skrll DP8573A_HOUR_12HR_MASK) + 153 1.1.2.2 skrll ((regs[DP8573A_SAVE_HOUR] & DP8573A_RT_MODE_1224) ? 0 : 12); 154 1.1.2.2 skrll 155 1.1.2.2 skrll /* 156 1.1.2.2 skrll * In AM/PM mode, hour range is 01-12, so adding in 12 hours 157 1.1.2.2 skrll * for PM gives us 01-24, whereas we want 00-23, so map hour 158 1.1.2.2 skrll * 24 to hour 0. 159 1.1.2.2 skrll */ 160 1.1.2.2 skrll 161 1.1.2.2 skrll if (dt.dt_hour == 24) 162 1.1.2.2 skrll dt.dt_hour = 0; 163 1.1.2.2 skrll } else { 164 1.1.2.2 skrll dt.dt_hour = FROMBCD(regs[DP8573A_SAVE_HOUR] & 165 1.1.2.2 skrll DP8573A_HOUR_24HR_MASK); 166 1.1.2.2 skrll } 167 1.1.2.2 skrll 168 1.1.2.2 skrll dt.dt_wday = FROMBCD(regs[DP8573A_DOW]); /* Not from time saved */ 169 1.1.2.2 skrll dt.dt_day = FROMBCD(regs[DP8573A_SAVE_DOM]); 170 1.1.2.2 skrll dt.dt_mon = FROMBCD(regs[DP8573A_SAVE_MONTH]); 171 1.1.2.2 skrll dt.dt_year = FROM_IRIX_YEAR(FROMBCD(regs[DP8573A_YEAR])); 172 1.1.2.2 skrll 173 1.1.2.2 skrll /* simple sanity checks */ 174 1.1.2.2 skrll if (dt.dt_mon > 12 || dt.dt_day > 31 || 175 1.1.2.2 skrll dt.dt_hour >= 24 || dt.dt_min >= 60 || dt.dt_sec >= 60) 176 1.1.2.2 skrll return (EIO); 177 1.1.2.2 skrll 178 1.1.2.2 skrll tv->tv_sec = (long)clock_ymdhms_to_secs(&dt); 179 1.1.2.2 skrll if (tv->tv_sec == -1) 180 1.1.2.2 skrll return (ERANGE); 181 1.1.2.2 skrll tv->tv_usec = 0; 182 1.1.2.2 skrll 183 1.1.2.2 skrll return (0); 184 1.1.2.2 skrll } 185 1.1.2.2 skrll 186 1.1.2.2 skrll /* 187 1.1.2.2 skrll * Reset the TODR based on the time value. 188 1.1.2.2 skrll */ 189 1.1.2.2 skrll static int 190 1.1.2.2 skrll dpclock_settime(struct todr_chip_handle *todrch, volatile struct timeval *tv) 191 1.1.2.2 skrll { 192 1.1.2.2 skrll struct dpclock_softc *sc = (struct dpclock_softc *)todrch->cookie; 193 1.1.2.2 skrll struct clock_ymdhms dt; 194 1.1.2.2 skrll int s; 195 1.1.2.2 skrll u_int8_t i, j; 196 1.1.2.2 skrll u_int8_t regs[32]; 197 1.1.2.2 skrll 198 1.1.2.2 skrll clock_secs_to_ymdhms((time_t)(tv->tv_sec + (tv->tv_usec > 500000)),&dt); 199 1.1.2.2 skrll 200 1.1.2.2 skrll s = splhigh(); 201 1.1.2.2 skrll i = bus_space_read_1(sc->sc_rtct, sc->sc_rtch, DP8573A_TIMESAVE_CTL); 202 1.1.2.2 skrll j = i | DP8573A_TIMESAVE_CTL_EN; 203 1.1.2.2 skrll bus_space_write_1(sc->sc_rtct, sc->sc_rtch, DP8573A_TIMESAVE_CTL, j); 204 1.1.2.2 skrll bus_space_write_1(sc->sc_rtct, sc->sc_rtch, DP8573A_TIMESAVE_CTL, i); 205 1.1.2.2 skrll splx(s); 206 1.1.2.2 skrll 207 1.1.2.2 skrll for (i = 0; i < 32; i++) 208 1.1.2.2 skrll regs[i] = bus_space_read_1(sc->sc_rtct, sc->sc_rtch, i); 209 1.1.2.2 skrll 210 1.1.2.2 skrll regs[DP8573A_SUBSECOND] = 0; 211 1.1.2.2 skrll regs[DP8573A_SECOND] = TOBCD(dt.dt_sec); 212 1.1.2.2 skrll regs[DP8573A_MINUTE] = TOBCD(dt.dt_min); 213 1.1.2.2 skrll regs[DP8573A_HOUR] = TOBCD(dt.dt_hour) & DP8573A_HOUR_24HR_MASK; 214 1.1.2.2 skrll regs[DP8573A_DOW] = TOBCD(dt.dt_wday); 215 1.1.2.2 skrll regs[DP8573A_DOM] = TOBCD(dt.dt_day); 216 1.1.2.2 skrll regs[DP8573A_MONTH] = TOBCD(dt.dt_mon); 217 1.1.2.2 skrll regs[DP8573A_YEAR] = TOBCD(TO_IRIX_YEAR(dt.dt_year)); 218 1.1.2.2 skrll 219 1.1.2.2 skrll s = splhigh(); 220 1.1.2.2 skrll i = bus_space_read_1(sc->sc_rtct, sc->sc_rtch, DP8573A_RT_MODE); 221 1.1.2.2 skrll j = i & ~DP8573A_RT_MODE_CLKSS; 222 1.1.2.2 skrll bus_space_write_1(sc->sc_rtct, sc->sc_rtch, DP8573A_RT_MODE, j); 223 1.1.2.2 skrll 224 1.1.2.2 skrll for (i = 0; i < 10; i++) 225 1.1.2.2 skrll bus_space_write_1(sc->sc_rtct, sc->sc_rtch, DP8573A_COUNTERS +i, 226 1.1.2.2 skrll regs[DP8573A_COUNTERS + i]); 227 1.1.2.2 skrll 228 1.1.2.2 skrll bus_space_write_1(sc->sc_rtct, sc->sc_rtch, DP8573A_RT_MODE, i); 229 1.1.2.2 skrll splx(s); 230 1.1.2.2 skrll 231 1.1.2.2 skrll return (0); 232 1.1.2.2 skrll } 233
Indexes created Thu Oct 02 14:10:14 GMT 2025