dpclock.c revision 1.1.4.3 1 1.1.4.3 yamt /* $NetBSD: dpclock.c,v 1.1.4.3 2010/03/11 15:02:54 yamt Exp $ */
2 1.1.4.2 yamt
3 1.1.4.2 yamt /*
4 1.1.4.2 yamt * Copyright (c) 2001 Erik Reid
5 1.1.4.2 yamt * Copyright (c) 2001 Rafal K. Boni
6 1.1.4.2 yamt * Copyright (c) 2001 Christopher Sekiya
7 1.1.4.2 yamt * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc.
8 1.1.4.2 yamt * All rights reserved.
9 1.1.4.2 yamt *
10 1.1.4.2 yamt * Portions of this code are derived from software contributed to The
11 1.1.4.2 yamt * NetBSD Foundation by Jason R. Thorpe of the Numerical Aerospace
12 1.1.4.2 yamt * Simulation Facility, NASA Ames Research Center.
13 1.1.4.2 yamt *
14 1.1.4.2 yamt * Redistribution and use in source and binary forms, with or without
15 1.1.4.2 yamt * modification, are permitted provided that the following conditions
16 1.1.4.2 yamt * are met:
17 1.1.4.2 yamt * 1. Redistributions of source code must retain the above copyright
18 1.1.4.2 yamt * notice, this list of conditions and the following disclaimer.
19 1.1.4.2 yamt * 2. Redistributions in binary form must reproduce the above copyright
20 1.1.4.2 yamt * notice, this list of conditions and the following disclaimer in the
21 1.1.4.2 yamt * documentation and/or other materials provided with the distribution.
22 1.1.4.2 yamt * 3. The name of the author may not be used to endorse or promote products
23 1.1.4.2 yamt * derived from this software without specific prior written permission.
24 1.1.4.2 yamt *
25 1.1.4.2 yamt * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
26 1.1.4.2 yamt * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
27 1.1.4.2 yamt * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
28 1.1.4.2 yamt * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
29 1.1.4.2 yamt * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
30 1.1.4.2 yamt * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
31 1.1.4.2 yamt * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
32 1.1.4.2 yamt * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
33 1.1.4.2 yamt * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
34 1.1.4.2 yamt * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 1.1.4.2 yamt */
36 1.1.4.2 yamt
37 1.1.4.2 yamt #include <sys/param.h>
38 1.1.4.2 yamt #include <sys/kernel.h>
39 1.1.4.2 yamt #include <sys/systm.h>
40 1.1.4.2 yamt #include <sys/device.h>
41 1.1.4.2 yamt
42 1.1.4.2 yamt #include <machine/bus.h>
43 1.1.4.2 yamt #include <machine/autoconf.h>
44 1.1.4.2 yamt #include <machine/sysconf.h>
45 1.1.4.2 yamt #include <machine/machtype.h>
46 1.1.4.2 yamt
47 1.1.4.2 yamt #include <dev/clock_subr.h>
48 1.1.4.2 yamt #include <sgimips/dev/dp8573areg.h>
49 1.1.4.2 yamt
50 1.1.4.2 yamt #include <sgimips/sgimips/clockvar.h>
51 1.1.4.2 yamt
52 1.1.4.2 yamt struct dpclock_softc {
53 1.1.4.2 yamt struct device sc_dev;
54 1.1.4.2 yamt
55 1.1.4.2 yamt struct todr_chip_handle sc_todrch;
56 1.1.4.2 yamt
57 1.1.4.2 yamt /* RTC registers */
58 1.1.4.2 yamt bus_space_tag_t sc_rtct;
59 1.1.4.2 yamt bus_space_handle_t sc_rtch;
60 1.1.4.2 yamt };
61 1.1.4.2 yamt
62 1.1.4.2 yamt static int dpclock_match(struct device *, struct cfdata *, void *);
63 1.1.4.2 yamt static void dpclock_attach(struct device *, struct device *, void *);
64 1.1.4.3 yamt static int dpclock_gettime(struct todr_chip_handle *, struct timeval *);
65 1.1.4.3 yamt static int dpclock_settime(struct todr_chip_handle *, struct timeval *);
66 1.1.4.2 yamt
67 1.1.4.2 yamt CFATTACH_DECL(dpclock, sizeof(struct dpclock_softc),
68 1.1.4.2 yamt dpclock_match, dpclock_attach, NULL, NULL);
69 1.1.4.2 yamt
70 1.1.4.2 yamt static int
71 1.1.4.2 yamt dpclock_match(struct device *parent, struct cfdata *cf, void *aux)
72 1.1.4.2 yamt {
73 1.1.4.2 yamt struct mainbus_attach_args *ma = aux;
74 1.1.4.2 yamt
75 1.1.4.2 yamt switch (mach_type) {
76 1.1.4.2 yamt case MACH_SGI_IP6 | MACH_SGI_IP10:
77 1.1.4.2 yamt if (ma->ma_addr == 0x1fbc0000)
78 1.1.4.2 yamt return (1);
79 1.1.4.2 yamt break;
80 1.1.4.2 yamt
81 1.1.4.2 yamt case MACH_SGI_IP12:
82 1.1.4.2 yamt case MACH_SGI_IP20:
83 1.1.4.2 yamt if (ma->ma_addr == 0x1fb80e00)
84 1.1.4.2 yamt return (1);
85 1.1.4.2 yamt break;
86 1.1.4.2 yamt }
87 1.1.4.2 yamt
88 1.1.4.2 yamt return (0);
89 1.1.4.2 yamt }
90 1.1.4.2 yamt
91 1.1.4.2 yamt static void
92 1.1.4.2 yamt dpclock_attach(struct device *parent, struct device *self, void *aux)
93 1.1.4.2 yamt {
94 1.1.4.2 yamt struct dpclock_softc *sc = (void *)self;
95 1.1.4.2 yamt struct mainbus_attach_args *ma = aux;
96 1.1.4.2 yamt int err;
97 1.1.4.2 yamt
98 1.1.4.2 yamt printf("\n");
99 1.1.4.2 yamt
100 1.1.4.2 yamt /*
101 1.1.4.2 yamt * All machines have one byte register per word. IP6/IP10 use
102 1.1.4.2 yamt * the MSB, others the LSB.
103 1.1.4.2 yamt */
104 1.1.4.2 yamt if (mach_type == MACH_SGI_IP12 || mach_type == MACH_SGI_IP20)
105 1.1.4.2 yamt sc->sc_rtct = SGIMIPS_BUS_SPACE_HPC;
106 1.1.4.2 yamt else
107 1.1.4.2 yamt sc->sc_rtct = SGIMIPS_BUS_SPACE_IP6_DPCLOCK;
108 1.1.4.2 yamt
109 1.1.4.2 yamt if ((err = bus_space_map(sc->sc_rtct, ma->ma_addr, 0x1ffff,
110 1.1.4.2 yamt BUS_SPACE_MAP_LINEAR, &sc->sc_rtch)) != 0) {
111 1.1.4.2 yamt printf(": unable to map RTC registers, error = %d\n", err);
112 1.1.4.2 yamt return;
113 1.1.4.2 yamt }
114 1.1.4.2 yamt
115 1.1.4.2 yamt sc->sc_todrch.cookie = sc;
116 1.1.4.2 yamt sc->sc_todrch.todr_gettime = dpclock_gettime;
117 1.1.4.2 yamt sc->sc_todrch.todr_settime = dpclock_settime;
118 1.1.4.2 yamt sc->sc_todrch.todr_setwen = NULL;
119 1.1.4.2 yamt
120 1.1.4.2 yamt todr_attach(&sc->sc_todrch);
121 1.1.4.2 yamt }
122 1.1.4.2 yamt
123 1.1.4.2 yamt /*
124 1.1.4.2 yamt * Get the time of day, based on the clock's value and/or the base value.
125 1.1.4.2 yamt */
126 1.1.4.2 yamt static int
127 1.1.4.3 yamt dpclock_gettime(struct todr_chip_handle *todrch, struct timeval *tv)
128 1.1.4.2 yamt {
129 1.1.4.2 yamt struct dpclock_softc *sc = (struct dpclock_softc *)todrch->cookie;
130 1.1.4.2 yamt struct clock_ymdhms dt;
131 1.1.4.2 yamt int s;
132 1.1.4.2 yamt u_int8_t i, j;
133 1.1.4.2 yamt u_int8_t regs[32];
134 1.1.4.2 yamt
135 1.1.4.2 yamt s = splhigh();
136 1.1.4.2 yamt i = bus_space_read_1(sc->sc_rtct, sc->sc_rtch, DP8573A_TIMESAVE_CTL);
137 1.1.4.2 yamt j = i | DP8573A_TIMESAVE_CTL_EN;
138 1.1.4.2 yamt bus_space_write_1(sc->sc_rtct, sc->sc_rtch, DP8573A_TIMESAVE_CTL, j);
139 1.1.4.2 yamt bus_space_write_1(sc->sc_rtct, sc->sc_rtch, DP8573A_TIMESAVE_CTL, i);
140 1.1.4.2 yamt splx(s);
141 1.1.4.2 yamt
142 1.1.4.2 yamt for (i = 0; i < 32; i++)
143 1.1.4.2 yamt regs[i] = bus_space_read_1(sc->sc_rtct, sc->sc_rtch, i);
144 1.1.4.2 yamt
145 1.1.4.2 yamt dt.dt_sec = FROMBCD(regs[DP8573A_SAVE_SEC]);
146 1.1.4.2 yamt dt.dt_min = FROMBCD(regs[DP8573A_SAVE_MIN]);
147 1.1.4.2 yamt
148 1.1.4.2 yamt if (regs[DP8573A_RT_MODE] & DP8573A_RT_MODE_1224) {
149 1.1.4.2 yamt dt.dt_hour = FROMBCD(regs[DP8573A_SAVE_HOUR] &
150 1.1.4.2 yamt DP8573A_HOUR_12HR_MASK) +
151 1.1.4.2 yamt ((regs[DP8573A_SAVE_HOUR] & DP8573A_RT_MODE_1224) ? 0 : 12);
152 1.1.4.2 yamt
153 1.1.4.2 yamt /*
154 1.1.4.2 yamt * In AM/PM mode, hour range is 01-12, so adding in 12 hours
155 1.1.4.2 yamt * for PM gives us 01-24, whereas we want 00-23, so map hour
156 1.1.4.2 yamt * 24 to hour 0.
157 1.1.4.2 yamt */
158 1.1.4.2 yamt
159 1.1.4.2 yamt if (dt.dt_hour == 24)
160 1.1.4.2 yamt dt.dt_hour = 0;
161 1.1.4.2 yamt } else {
162 1.1.4.2 yamt dt.dt_hour = FROMBCD(regs[DP8573A_SAVE_HOUR] &
163 1.1.4.2 yamt DP8573A_HOUR_24HR_MASK);
164 1.1.4.2 yamt }
165 1.1.4.2 yamt
166 1.1.4.2 yamt dt.dt_wday = FROMBCD(regs[DP8573A_DOW]); /* Not from time saved */
167 1.1.4.2 yamt dt.dt_day = FROMBCD(regs[DP8573A_SAVE_DOM]);
168 1.1.4.2 yamt dt.dt_mon = FROMBCD(regs[DP8573A_SAVE_MONTH]);
169 1.1.4.2 yamt dt.dt_year = FROM_IRIX_YEAR(FROMBCD(regs[DP8573A_YEAR]));
170 1.1.4.2 yamt
171 1.1.4.2 yamt /* simple sanity checks */
172 1.1.4.2 yamt if (dt.dt_mon > 12 || dt.dt_day > 31 ||
173 1.1.4.2 yamt dt.dt_hour >= 24 || dt.dt_min >= 60 || dt.dt_sec >= 60)
174 1.1.4.2 yamt return (EIO);
175 1.1.4.2 yamt
176 1.1.4.2 yamt tv->tv_sec = (long)clock_ymdhms_to_secs(&dt);
177 1.1.4.2 yamt if (tv->tv_sec == -1)
178 1.1.4.2 yamt return (ERANGE);
179 1.1.4.2 yamt tv->tv_usec = 0;
180 1.1.4.2 yamt
181 1.1.4.2 yamt return (0);
182 1.1.4.2 yamt }
183 1.1.4.2 yamt
184 1.1.4.2 yamt /*
185 1.1.4.2 yamt * Reset the TODR based on the time value.
186 1.1.4.2 yamt */
187 1.1.4.2 yamt static int
188 1.1.4.3 yamt dpclock_settime(struct todr_chip_handle *todrch, struct timeval *tv)
189 1.1.4.2 yamt {
190 1.1.4.2 yamt struct dpclock_softc *sc = (struct dpclock_softc *)todrch->cookie;
191 1.1.4.2 yamt struct clock_ymdhms dt;
192 1.1.4.2 yamt int s;
193 1.1.4.2 yamt u_int8_t i, j;
194 1.1.4.2 yamt u_int8_t regs[32];
195 1.1.4.2 yamt
196 1.1.4.2 yamt clock_secs_to_ymdhms((time_t)(tv->tv_sec + (tv->tv_usec > 500000)),&dt);
197 1.1.4.2 yamt
198 1.1.4.2 yamt s = splhigh();
199 1.1.4.2 yamt i = bus_space_read_1(sc->sc_rtct, sc->sc_rtch, DP8573A_TIMESAVE_CTL);
200 1.1.4.2 yamt j = i | DP8573A_TIMESAVE_CTL_EN;
201 1.1.4.2 yamt bus_space_write_1(sc->sc_rtct, sc->sc_rtch, DP8573A_TIMESAVE_CTL, j);
202 1.1.4.2 yamt bus_space_write_1(sc->sc_rtct, sc->sc_rtch, DP8573A_TIMESAVE_CTL, i);
203 1.1.4.2 yamt splx(s);
204 1.1.4.2 yamt
205 1.1.4.2 yamt for (i = 0; i < 32; i++)
206 1.1.4.2 yamt regs[i] = bus_space_read_1(sc->sc_rtct, sc->sc_rtch, i);
207 1.1.4.2 yamt
208 1.1.4.2 yamt regs[DP8573A_SUBSECOND] = 0;
209 1.1.4.2 yamt regs[DP8573A_SECOND] = TOBCD(dt.dt_sec);
210 1.1.4.2 yamt regs[DP8573A_MINUTE] = TOBCD(dt.dt_min);
211 1.1.4.2 yamt regs[DP8573A_HOUR] = TOBCD(dt.dt_hour) & DP8573A_HOUR_24HR_MASK;
212 1.1.4.2 yamt regs[DP8573A_DOW] = TOBCD(dt.dt_wday);
213 1.1.4.2 yamt regs[DP8573A_DOM] = TOBCD(dt.dt_day);
214 1.1.4.2 yamt regs[DP8573A_MONTH] = TOBCD(dt.dt_mon);
215 1.1.4.2 yamt regs[DP8573A_YEAR] = TOBCD(TO_IRIX_YEAR(dt.dt_year));
216 1.1.4.2 yamt
217 1.1.4.2 yamt s = splhigh();
218 1.1.4.2 yamt i = bus_space_read_1(sc->sc_rtct, sc->sc_rtch, DP8573A_RT_MODE);
219 1.1.4.2 yamt j = i & ~DP8573A_RT_MODE_CLKSS;
220 1.1.4.2 yamt bus_space_write_1(sc->sc_rtct, sc->sc_rtch, DP8573A_RT_MODE, j);
221 1.1.4.2 yamt
222 1.1.4.2 yamt for (i = 0; i < 10; i++)
223 1.1.4.2 yamt bus_space_write_1(sc->sc_rtct, sc->sc_rtch, DP8573A_COUNTERS +i,
224 1.1.4.2 yamt regs[DP8573A_COUNTERS + i]);
225 1.1.4.2 yamt
226 1.1.4.2 yamt bus_space_write_1(sc->sc_rtct, sc->sc_rtch, DP8573A_RT_MODE, i);
227 1.1.4.2 yamt splx(s);
228 1.1.4.2 yamt
229 1.1.4.2 yamt return (0);
230 1.1.4.2 yamt }
231