dpclock.c revision 1.1
1 /* $NetBSD: dpclock.c,v 1.1 2009/02/12 06:33:57 rumble Exp $ */ 2 3 /* 4 * Copyright (c) 2001 Erik Reid 5 * Copyright (c) 2001 Rafal K. Boni 6 * Copyright (c) 2001 Christopher Sekiya 7 * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc. 8 * All rights reserved. 9 * 10 * Portions of this code are derived from software contributed to The 11 * NetBSD Foundation by Jason R. Thorpe of the Numerical Aerospace 12 * Simulation Facility, NASA Ames Research Center. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions 16 * are met: 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in the 21 * documentation and/or other materials provided with the distribution. 22 * 3. The name of the author may not be used to endorse or promote products 23 * derived from this software without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 26 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 27 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 28 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 29 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 30 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 31 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 32 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 33 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 34 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 */ 36 37 #include <sys/param.h> 38 #include <sys/kernel.h> 39 #include <sys/systm.h> 40 #include <sys/device.h> 41 42 #include <machine/bus.h> 43 #include <machine/autoconf.h> 44 #include <machine/sysconf.h> 45 #include <machine/machtype.h> 46 47 #include <dev/clock_subr.h> 48 #include <sgimips/dev/dp8573areg.h> 49 50 #include <sgimips/sgimips/clockvar.h> 51 52 struct dpclock_softc { 53 struct device sc_dev; 54 55 struct todr_chip_handle sc_todrch; 56 57 /* RTC registers */ 58 bus_space_tag_t sc_rtct; 59 bus_space_handle_t sc_rtch; 60 }; 61 62 static int dpclock_match(struct device *, struct cfdata *, void *); 63 static void dpclock_attach(struct device *, struct device *, void *); 64 static int dpclock_gettime(struct todr_chip_handle *, 65 volatile struct timeval *); 66 static int dpclock_settime(struct todr_chip_handle *, 67 volatile struct timeval *); 68 69 CFATTACH_DECL(dpclock, sizeof(struct dpclock_softc), 70 dpclock_match, dpclock_attach, NULL, NULL); 71 72 static int 73 dpclock_match(struct device *parent, struct cfdata *cf, void *aux) 74 { 75 struct mainbus_attach_args *ma = aux; 76 77 switch (mach_type) { 78 case MACH_SGI_IP6 | MACH_SGI_IP10: 79 if (ma->ma_addr == 0x1fbc0000) 80 return (1); 81 break; 82 83 case MACH_SGI_IP12: 84 case MACH_SGI_IP20: 85 if (ma->ma_addr == 0x1fb80e00) 86 return (1); 87 break; 88 } 89 90 return (0); 91 } 92 93 static void 94 dpclock_attach(struct device *parent, struct device *self, void *aux) 95 { 96 struct dpclock_softc *sc = (void *)self; 97 struct mainbus_attach_args *ma = aux; 98 int err; 99 100 printf("\n"); 101 102 /* 103 * All machines have one byte register per word. IP6/IP10 use 104 * the MSB, others the LSB. 105 */ 106 if (mach_type == MACH_SGI_IP12 || mach_type == MACH_SGI_IP20) 107 sc->sc_rtct = SGIMIPS_BUS_SPACE_HPC; 108 else 109 sc->sc_rtct = SGIMIPS_BUS_SPACE_IP6_DPCLOCK; 110 111 if ((err = bus_space_map(sc->sc_rtct, ma->ma_addr, 0x1ffff, 112 BUS_SPACE_MAP_LINEAR, &sc->sc_rtch)) != 0) { 113 printf(": unable to map RTC registers, error = %d\n", err); 114 return; 115 } 116 117 sc->sc_todrch.cookie = sc; 118 sc->sc_todrch.todr_gettime = dpclock_gettime; 119 sc->sc_todrch.todr_settime = dpclock_settime; 120 sc->sc_todrch.todr_setwen = NULL; 121 122 todr_attach(&sc->sc_todrch); 123 } 124 125 /* 126 * Get the time of day, based on the clock's value and/or the base value. 127 */ 128 static int 129 dpclock_gettime(struct todr_chip_handle *todrch, volatile struct timeval *tv) 130 { 131 struct dpclock_softc *sc = (struct dpclock_softc *)todrch->cookie; 132 struct clock_ymdhms dt; 133 int s; 134 u_int8_t i, j; 135 u_int8_t regs[32]; 136 137 s = splhigh(); 138 i = bus_space_read_1(sc->sc_rtct, sc->sc_rtch, DP8573A_TIMESAVE_CTL); 139 j = i | DP8573A_TIMESAVE_CTL_EN; 140 bus_space_write_1(sc->sc_rtct, sc->sc_rtch, DP8573A_TIMESAVE_CTL, j); 141 bus_space_write_1(sc->sc_rtct, sc->sc_rtch, DP8573A_TIMESAVE_CTL, i); 142 splx(s); 143 144 for (i = 0; i < 32; i++) 145 regs[i] = bus_space_read_1(sc->sc_rtct, sc->sc_rtch, i); 146 147 dt.dt_sec = FROMBCD(regs[DP8573A_SAVE_SEC]); 148 dt.dt_min = FROMBCD(regs[DP8573A_SAVE_MIN]); 149 150 if (regs[DP8573A_RT_MODE] & DP8573A_RT_MODE_1224) { 151 dt.dt_hour = FROMBCD(regs[DP8573A_SAVE_HOUR] & 152 DP8573A_HOUR_12HR_MASK) + 153 ((regs[DP8573A_SAVE_HOUR] & DP8573A_RT_MODE_1224) ? 0 : 12); 154 155 /* 156 * In AM/PM mode, hour range is 01-12, so adding in 12 hours 157 * for PM gives us 01-24, whereas we want 00-23, so map hour 158 * 24 to hour 0. 159 */ 160 161 if (dt.dt_hour == 24) 162 dt.dt_hour = 0; 163 } else { 164 dt.dt_hour = FROMBCD(regs[DP8573A_SAVE_HOUR] & 165 DP8573A_HOUR_24HR_MASK); 166 } 167 168 dt.dt_wday = FROMBCD(regs[DP8573A_DOW]); /* Not from time saved */ 169 dt.dt_day = FROMBCD(regs[DP8573A_SAVE_DOM]); 170 dt.dt_mon = FROMBCD(regs[DP8573A_SAVE_MONTH]); 171 dt.dt_year = FROM_IRIX_YEAR(FROMBCD(regs[DP8573A_YEAR])); 172 173 /* simple sanity checks */ 174 if (dt.dt_mon > 12 || dt.dt_day > 31 || 175 dt.dt_hour >= 24 || dt.dt_min >= 60 || dt.dt_sec >= 60) 176 return (EIO); 177 178 tv->tv_sec = (long)clock_ymdhms_to_secs(&dt); 179 if (tv->tv_sec == -1) 180 return (ERANGE); 181 tv->tv_usec = 0; 182 183 return (0); 184 } 185 186 /* 187 * Reset the TODR based on the time value. 188 */ 189 static int 190 dpclock_settime(struct todr_chip_handle *todrch, volatile struct timeval *tv) 191 { 192 struct dpclock_softc *sc = (struct dpclock_softc *)todrch->cookie; 193 struct clock_ymdhms dt; 194 int s; 195 u_int8_t i, j; 196 u_int8_t regs[32]; 197 198 clock_secs_to_ymdhms((time_t)(tv->tv_sec + (tv->tv_usec > 500000)),&dt); 199 200 s = splhigh(); 201 i = bus_space_read_1(sc->sc_rtct, sc->sc_rtch, DP8573A_TIMESAVE_CTL); 202 j = i | DP8573A_TIMESAVE_CTL_EN; 203 bus_space_write_1(sc->sc_rtct, sc->sc_rtch, DP8573A_TIMESAVE_CTL, j); 204 bus_space_write_1(sc->sc_rtct, sc->sc_rtch, DP8573A_TIMESAVE_CTL, i); 205 splx(s); 206 207 for (i = 0; i < 32; i++) 208 regs[i] = bus_space_read_1(sc->sc_rtct, sc->sc_rtch, i); 209 210 regs[DP8573A_SUBSECOND] = 0; 211 regs[DP8573A_SECOND] = TOBCD(dt.dt_sec); 212 regs[DP8573A_MINUTE] = TOBCD(dt.dt_min); 213 regs[DP8573A_HOUR] = TOBCD(dt.dt_hour) & DP8573A_HOUR_24HR_MASK; 214 regs[DP8573A_DOW] = TOBCD(dt.dt_wday); 215 regs[DP8573A_DOM] = TOBCD(dt.dt_day); 216 regs[DP8573A_MONTH] = TOBCD(dt.dt_mon); 217 regs[DP8573A_YEAR] = TOBCD(TO_IRIX_YEAR(dt.dt_year)); 218 219 s = splhigh(); 220 i = bus_space_read_1(sc->sc_rtct, sc->sc_rtch, DP8573A_RT_MODE); 221 j = i & ~DP8573A_RT_MODE_CLKSS; 222 bus_space_write_1(sc->sc_rtct, sc->sc_rtch, DP8573A_RT_MODE, j); 223 224 for (i = 0; i < 10; i++) 225 bus_space_write_1(sc->sc_rtct, sc->sc_rtch, DP8573A_COUNTERS +i, 226 regs[DP8573A_COUNTERS + i]); 227 228 bus_space_write_1(sc->sc_rtct, sc->sc_rtch, DP8573A_RT_MODE, i); 229 splx(s); 230 231 return (0); 232 } 233
Indexes created Wed Sep 24 05:09:52 GMT 2025