dpclock.c revision 1.3.12.1
1 /* $NetBSD: dpclock.c,v 1.3.12.1 2012/11/20 03:01:40 tls Exp $ */ 2 3 /* 4 * Copyright (c) 2001 Erik Reid 5 * Copyright (c) 2001 Rafal K. Boni 6 * Copyright (c) 2001 Christopher Sekiya 7 * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc. 8 * All rights reserved. 9 * 10 * Portions of this code are derived from software contributed to The 11 * NetBSD Foundation by Jason R. Thorpe of the Numerical Aerospace 12 * Simulation Facility, NASA Ames Research Center. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions 16 * are met: 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in the 21 * documentation and/or other materials provided with the distribution. 22 * 3. The name of the author may not be used to endorse or promote products 23 * derived from this software without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 26 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 27 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 28 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 29 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 30 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 31 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 32 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 33 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 34 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 */ 36 37 #include <sys/param.h> 38 #include <sys/kernel.h> 39 #include <sys/systm.h> 40 #include <sys/device.h> 41 42 #include <sys/bus.h> 43 #include <machine/autoconf.h> 44 #include <machine/sysconf.h> 45 #include <machine/machtype.h> 46 47 #include <dev/clock_subr.h> 48 #include <sgimips/dev/dp8573areg.h> 49 50 #include <sgimips/sgimips/clockvar.h> 51 52 struct dpclock_softc { 53 struct todr_chip_handle sc_todrch; 54 55 /* RTC registers */ 56 bus_space_tag_t sc_rtct; 57 bus_space_handle_t sc_rtch; 58 }; 59 60 static int dpclock_match(device_t, cfdata_t, void *); 61 static void dpclock_attach(device_t, device_t, void *); 62 static int dpclock_gettime(struct todr_chip_handle *, struct timeval *); 63 static int dpclock_settime(struct todr_chip_handle *, struct timeval *); 64 65 CFATTACH_DECL_NEW(dpclock, sizeof(struct dpclock_softc), 66 dpclock_match, dpclock_attach, NULL, NULL); 67 68 static int 69 dpclock_match(device_t parent, cfdata_t cf, void *aux) 70 { 71 struct mainbus_attach_args *ma = aux; 72 73 switch (mach_type) { 74 case MACH_SGI_IP6 | MACH_SGI_IP10: 75 if (ma->ma_addr == 0x1fbc0000) 76 return (1); 77 break; 78 79 case MACH_SGI_IP12: 80 case MACH_SGI_IP20: 81 if (ma->ma_addr == 0x1fb80e00) 82 return (1); 83 break; 84 } 85 86 return (0); 87 } 88 89 static void 90 dpclock_attach(device_t parent, device_t self, void *aux) 91 { 92 struct dpclock_softc *sc = device_private(self); 93 struct mainbus_attach_args *ma = aux; 94 int err; 95 96 printf("\n"); 97 98 /* 99 * All machines have one byte register per word. IP6/IP10 use 100 * the MSB, others the LSB. 101 */ 102 if (mach_type == MACH_SGI_IP12 || mach_type == MACH_SGI_IP20) 103 sc->sc_rtct = SGIMIPS_BUS_SPACE_HPC; 104 else 105 sc->sc_rtct = SGIMIPS_BUS_SPACE_IP6_DPCLOCK; 106 107 if ((err = bus_space_map(sc->sc_rtct, ma->ma_addr, 0x1ffff, 108 BUS_SPACE_MAP_LINEAR, &sc->sc_rtch)) != 0) { 109 printf(": unable to map RTC registers, error = %d\n", err); 110 return; 111 } 112 113 sc->sc_todrch.cookie = sc; 114 sc->sc_todrch.todr_gettime = dpclock_gettime; 115 sc->sc_todrch.todr_settime = dpclock_settime; 116 sc->sc_todrch.todr_setwen = NULL; 117 118 todr_attach(&sc->sc_todrch); 119 } 120 121 /* 122 * Get the time of day, based on the clock's value and/or the base value. 123 */ 124 static int 125 dpclock_gettime(struct todr_chip_handle *todrch, struct timeval *tv) 126 { 127 struct dpclock_softc *sc = (struct dpclock_softc *)todrch->cookie; 128 struct clock_ymdhms dt; 129 int s; 130 u_int8_t i, j; 131 u_int8_t regs[32]; 132 133 s = splhigh(); 134 i = bus_space_read_1(sc->sc_rtct, sc->sc_rtch, DP8573A_TIMESAVE_CTL); 135 j = i | DP8573A_TIMESAVE_CTL_EN; 136 bus_space_write_1(sc->sc_rtct, sc->sc_rtch, DP8573A_TIMESAVE_CTL, j); 137 bus_space_write_1(sc->sc_rtct, sc->sc_rtch, DP8573A_TIMESAVE_CTL, i); 138 splx(s); 139 140 for (i = 0; i < 32; i++) 141 regs[i] = bus_space_read_1(sc->sc_rtct, sc->sc_rtch, i); 142 143 dt.dt_sec = FROMBCD(regs[DP8573A_SAVE_SEC]); 144 dt.dt_min = FROMBCD(regs[DP8573A_SAVE_MIN]); 145 146 if (regs[DP8573A_RT_MODE] & DP8573A_RT_MODE_1224) { 147 dt.dt_hour = FROMBCD(regs[DP8573A_SAVE_HOUR] & 148 DP8573A_HOUR_12HR_MASK) + 149 ((regs[DP8573A_SAVE_HOUR] & DP8573A_RT_MODE_1224) ? 0 : 12); 150 151 /* 152 * In AM/PM mode, hour range is 01-12, so adding in 12 hours 153 * for PM gives us 01-24, whereas we want 00-23, so map hour 154 * 24 to hour 0. 155 */ 156 157 if (dt.dt_hour == 24) 158 dt.dt_hour = 0; 159 } else { 160 dt.dt_hour = FROMBCD(regs[DP8573A_SAVE_HOUR] & 161 DP8573A_HOUR_24HR_MASK); 162 } 163 164 dt.dt_wday = FROMBCD(regs[DP8573A_DOW]); /* Not from time saved */ 165 dt.dt_day = FROMBCD(regs[DP8573A_SAVE_DOM]); 166 dt.dt_mon = FROMBCD(regs[DP8573A_SAVE_MONTH]); 167 dt.dt_year = FROM_IRIX_YEAR(FROMBCD(regs[DP8573A_YEAR])); 168 169 /* simple sanity checks */ 170 if (dt.dt_mon > 12 || dt.dt_day > 31 || 171 dt.dt_hour >= 24 || dt.dt_min >= 60 || dt.dt_sec >= 60) 172 return (EIO); 173 174 tv->tv_sec = (long)clock_ymdhms_to_secs(&dt); 175 if (tv->tv_sec == -1) 176 return (ERANGE); 177 tv->tv_usec = 0; 178 179 return (0); 180 } 181 182 /* 183 * Reset the TODR based on the time value. 184 */ 185 static int 186 dpclock_settime(struct todr_chip_handle *todrch, struct timeval *tv) 187 { 188 struct dpclock_softc *sc = (struct dpclock_softc *)todrch->cookie; 189 struct clock_ymdhms dt; 190 int s; 191 u_int8_t i, j; 192 u_int8_t regs[32]; 193 194 clock_secs_to_ymdhms((time_t)(tv->tv_sec + (tv->tv_usec > 500000)),&dt); 195 196 s = splhigh(); 197 i = bus_space_read_1(sc->sc_rtct, sc->sc_rtch, DP8573A_TIMESAVE_CTL); 198 j = i | DP8573A_TIMESAVE_CTL_EN; 199 bus_space_write_1(sc->sc_rtct, sc->sc_rtch, DP8573A_TIMESAVE_CTL, j); 200 bus_space_write_1(sc->sc_rtct, sc->sc_rtch, DP8573A_TIMESAVE_CTL, i); 201 splx(s); 202 203 for (i = 0; i < 32; i++) 204 regs[i] = bus_space_read_1(sc->sc_rtct, sc->sc_rtch, i); 205 206 regs[DP8573A_SUBSECOND] = 0; 207 regs[DP8573A_SECOND] = TOBCD(dt.dt_sec); 208 regs[DP8573A_MINUTE] = TOBCD(dt.dt_min); 209 regs[DP8573A_HOUR] = TOBCD(dt.dt_hour) & DP8573A_HOUR_24HR_MASK; 210 regs[DP8573A_DOW] = TOBCD(dt.dt_wday); 211 regs[DP8573A_DOM] = TOBCD(dt.dt_day); 212 regs[DP8573A_MONTH] = TOBCD(dt.dt_mon); 213 regs[DP8573A_YEAR] = TOBCD(TO_IRIX_YEAR(dt.dt_year)); 214 215 s = splhigh(); 216 i = bus_space_read_1(sc->sc_rtct, sc->sc_rtch, DP8573A_RT_MODE); 217 j = i & ~DP8573A_RT_MODE_CLKSS; 218 bus_space_write_1(sc->sc_rtct, sc->sc_rtch, DP8573A_RT_MODE, j); 219 220 for (i = 0; i < 10; i++) 221 bus_space_write_1(sc->sc_rtct, sc->sc_rtch, DP8573A_COUNTERS +i, 222 regs[DP8573A_COUNTERS + i]); 223 224 bus_space_write_1(sc->sc_rtct, sc->sc_rtch, DP8573A_RT_MODE, i); 225 splx(s); 226 227 return (0); 228 } 229
Indexes created Thu Oct 02 07:10:07 GMT 2025