1 1.5 rumble /* $NetBSD: int2reg.h,v 1.5 2009/02/12 06:33:57 rumble Exp $ */ 2 1.1 sekiya 3 1.1 sekiya /* 4 1.1 sekiya * Copyright (c) 2004 Christopher SEKIYA 5 1.1 sekiya * All rights reserved. 6 1.1 sekiya * 7 1.1 sekiya * Redistribution and use in source and binary forms, with or without 8 1.1 sekiya * modification, are permitted provided that the following conditions 9 1.1 sekiya * are met: 10 1.1 sekiya * 1. Redistributions of source code must retain the above copyright 11 1.1 sekiya * notice, this list of conditions and the following disclaimer. 12 1.1 sekiya * 2. Redistributions in binary form must reproduce the above copyright 13 1.1 sekiya * notice, this list of conditions and the following disclaimer in the 14 1.1 sekiya * documentation and/or other materials provided with the distribution. 15 1.1 sekiya * 3. The name of the author may not be used to endorse or promote products 16 1.1 sekiya * derived from this software without specific prior written permission. 17 1.1 sekiya * 18 1.1 sekiya * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 1.1 sekiya * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 1.1 sekiya * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 1.1 sekiya * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 1.1 sekiya * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 23 1.1 sekiya * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 1.1 sekiya * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 1.1 sekiya * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 1.1 sekiya * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 27 1.1 sekiya * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 1.1 sekiya */ 29 1.1 sekiya 30 1.1 sekiya #if !defined(_ARCH_SGIMIPS_DEV_INT2_H_) 31 1.1 sekiya #define _ARCH_SGIMIPS_DEV_INT2_H_ 32 1.1 sekiya 33 1.2 sekiya /* The INT has known locations on all SGI machines */ 34 1.5 rumble #define INT2_IP12 0x1fb801c0 35 1.5 rumble #define INT2_IP20 0x1fb801c0 36 1.5 rumble #define INT2_IP22 0x1fbd9000 37 1.5 rumble #define INT2_IP24 0x1fbd9880 38 1.2 sekiya 39 1.5 rumble /* The following registers are all 8 bit. */ 40 1.5 rumble #define INT2_LOCAL0_STATUS 0x03 41 1.3 sekiya #define INT2_LOCAL0_STATUS_FIFO 0x01 42 1.5 rumble #define INT2_LOCAL0_MASK 0x07 43 1.5 rumble #define INT2_LOCAL1_STATUS 0x0b 44 1.5 rumble #define INT2_LOCAL1_MASK 0x0f 45 1.5 rumble #define INT2_MAP_STATUS 0x13 46 1.5 rumble #define INT2_MAP_MASK0 0x17 47 1.5 rumble #define INT2_MAP_MASK1 0x1b 48 1.5 rumble #define INT2_MAP_POL 0x1f 49 1.5 rumble #define INT2_TIMER_CLEAR 0x23 50 1.5 rumble #define INT2_ERROR_STATUS 0x27 51 1.5 rumble #define INT2_TIMER_0 0x33 52 1.5 rumble #define INT2_TIMER_1 0x37 53 1.5 rumble #define INT2_TIMER_2 0x3b 54 1.5 rumble #define INT2_TIMER_CONTROL 0x3f 55 1.1 sekiya 56 1.1 sekiya #endif /* _ARCH_SGIMIPS_DEV_INT2_H_ */ 57 1.1 sekiya 58
Indexes created Sun Sep 21 20:09:37 GMT 2025