pic.c revision 1.1
1 /* $NetBSD: pic.c,v 1.1 2004/01/12 12:07:06 sekiya Exp $ */ 2 3 /* 4 * Copyright (c) 2002 Steve Rumble 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the author may not be used to endorse or promote products 16 * derived from this software without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 #include <sys/param.h> 31 #include <sys/device.h> 32 #include <sys/systm.h> 33 34 #include <machine/cpu.h> 35 #include <machine/locore.h> 36 #include <machine/autoconf.h> 37 #include <machine/bus.h> 38 #include <machine/machtype.h> 39 40 #include <sgimips/dev/picreg.h> 41 42 #include "locators.h" 43 44 struct pic_softc { 45 struct device sc_dev; 46 47 bus_space_tag_t iot; 48 bus_space_handle_t ioh; 49 50 }; 51 52 static int pic_match(struct device *, struct cfdata *, void *); 53 static void pic_attach(struct device *, struct device *, void *); 54 static int pic_print(void *, const char *); 55 void pic_bus_reset(void); 56 void pic_watchdog_tickle(void); 57 58 CFATTACH_DECL(pic, sizeof(struct pic_softc), 59 pic_match, pic_attach, NULL, NULL); 60 61 struct pic_attach_args { 62 const char *iaa_name; 63 64 bus_space_tag_t iaa_st; 65 bus_space_handle_t iaa_sh; 66 }; 67 68 static struct pic_softc psc; 69 70 static int 71 pic_match(struct device * parent, struct cfdata * match, void *aux) 72 { 73 /* 74 * PIC exists on IP12 systems. It appears to be the immediate 75 * ancestor of the mc, for mips1 processors. 76 */ 77 if (mach_type != MACH_SGI_IP12) 78 return (0); 79 80 return (1); 81 } 82 83 static void 84 pic_attach(struct device * parent, struct device * self, void *aux) 85 { 86 u_int32_t reg; 87 char picstr[80] = ""; 88 struct pic_attach_args iaa; 89 struct mainbus_attach_args *ma = aux; 90 91 psc.iot = SGIMIPS_BUS_SPACE_HPC; 92 if (bus_space_map(psc.iot, ma->ma_addr, 0, 93 BUS_SPACE_MAP_LINEAR, &psc.ioh)) 94 panic("pic_attach: could not allocate memory\n"); 95 96 reg = bus_space_read_4(psc.iot, psc.ioh, PIC_SYSID); 97 reg = (reg >> PIC_SYSID_REVSHIFT) & PIC_SYSID_REVMASK; 98 printf("\npic0: Revision %c", reg + 65); 99 100 /* enable refresh, set big-endian, memory parity, allow slave access */ 101 reg = bus_space_read_4(psc.iot, psc.ioh, PIC_CPUCTRL); 102 reg |= (PIC_CPUCTRL_REFRESH | PIC_CPUCTRL_BIGENDIAN | PIC_CPUCTRL_MPR | 103 PIC_CPUCTRL_SLAVE); 104 bus_space_write_4(psc.iot, psc.ioh, PIC_CPUCTRL, reg); 105 106 /* query the mode register to see what's going on */ 107 reg = bus_space_read_4(psc.iot, psc.ioh, PIC_MODE); 108 printf(": dblk (0x%x), iblk (0x%x)\n", reg & PIC_MODE_DBSIZ, 109 reg & PIC_MODE_IBSIZ); 110 111 if (reg & PIC_MODE_NOCACHE) 112 strcat(picstr, "cache disabled"); 113 else 114 strcat(picstr, "cache enabled"); 115 116 if (reg & PIC_MODE_ISTREAM) 117 strcat(picstr, ", instr streaming"); 118 119 if (reg & PIC_MODE_STOREPARTIAL) 120 strcat(picstr, ", store partial"); 121 122 if (reg & PIC_MODE_BUSDRIVE) 123 strcat(picstr, ", bus drive"); 124 125 printf("pic0: %s", picstr); 126 127 /* gio32 allow master, real time devices */ 128 reg = bus_space_read_4(psc.iot, psc.ioh, PIC_GIO32ARB_SLOT0); 129 reg &= ~(PIC_GIO32ARB_SLOT_SLAVE | PIC_GIO32ARB_SLOT_LONG); 130 bus_space_write_4(psc.iot, psc.ioh, PIC_GIO32ARB_SLOT0, reg); 131 132 reg = bus_space_read_4(psc.iot, psc.ioh, PIC_GIO32ARB_SLOT1); 133 reg &= ~(PIC_GIO32ARB_SLOT_SLAVE | PIC_GIO32ARB_SLOT_LONG); 134 bus_space_write_4(psc.iot, psc.ioh, PIC_GIO32ARB_SLOT1, reg); 135 136 /* default gio32 burst time */ 137 bus_space_write_4(psc.iot, psc.ioh, PIC_GIO32ARB_BURST, 138 PIC_GIO32ARB_DEFBURST); 139 140 /* default gio32 delay time */ 141 bus_space_write_4(psc.iot, psc.ioh, PIC_GIO32ARB_DELAY, 142 PIC_GIO32ARB_DEFDELAY); 143 144 printf("\n"); 145 146 /* XXX gio only on IP12 Indigo (?). does pic exist anywhere else? */ 147 iaa.iaa_name = "gio"; 148 (void) config_found(self, (void *) &iaa, pic_print); 149 150 /* Enable watchdog, reset it */ 151 reg = bus_space_read_4(psc.iot, psc.ioh, PIC_CPUCTRL) 152 | (PIC_CPUCTRL_WDOG); 153 bus_space_write_4(psc.iot, psc.ioh, PIC_CPUCTRL, reg); 154 } 155 156 157 static int 158 pic_print(void *aux, const char *name) 159 { 160 struct pic_attach_args *iaa = aux; 161 162 if (name) 163 aprint_normal("%s at %s", iaa->iaa_name, name); 164 165 return UNCONF; 166 } 167 168 void 169 pic_bus_reset(void) 170 { 171 bus_space_write_4(psc.iot, psc.ioh, PIC_PARITY_ERROR, 0); 172 } 173 174 void 175 pic_watchdog_tickle(void) 176 { 177 u_int32_t reg; 178 179 reg = bus_space_read_4(psc.iot, psc.ioh, PIC_CPUCTRL) 180 & ~(PIC_CPUCTRL_WDOG); 181 bus_space_write_4(psc.iot, psc.ioh, PIC_CPUCTRL, reg); 182 reg = bus_space_read_4(psc.iot, psc.ioh, PIC_CPUCTRL) 183 | (PIC_CPUCTRL_WDOG); 184 bus_space_write_4(psc.iot, psc.ioh, PIC_CPUCTRL, reg); 185 } 186
Indexes created Tue Sep 30 06:09:59 GMT 2025