pic.c revision 1.2
1 /* $NetBSD: pic.c,v 1.2 2004/01/13 13:05:17 sekiya Exp $ */ 2 3 /* 4 * Copyright (c) 2002 Steve Rumble 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the author may not be used to endorse or promote products 16 * derived from this software without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 #include <sys/param.h> 31 #include <sys/device.h> 32 #include <sys/systm.h> 33 34 #include <machine/cpu.h> 35 #include <machine/locore.h> 36 #include <machine/autoconf.h> 37 #include <machine/bus.h> 38 #include <machine/machtype.h> 39 #include <machine/sysconf.h> 40 41 #include <sgimips/dev/picreg.h> 42 43 #include "locators.h" 44 45 struct pic_softc { 46 struct device sc_dev; 47 48 bus_space_tag_t iot; 49 bus_space_handle_t ioh; 50 51 }; 52 53 static int pic_match(struct device *, struct cfdata *, void *); 54 static void pic_attach(struct device *, struct device *, void *); 55 static int pic_print(void *, const char *); 56 void pic_bus_reset(void); 57 void pic_watchdog_tickle(void); 58 59 CFATTACH_DECL(pic, sizeof(struct pic_softc), 60 pic_match, pic_attach, NULL, NULL); 61 62 struct pic_attach_args { 63 const char *iaa_name; 64 65 bus_space_tag_t iaa_st; 66 bus_space_handle_t iaa_sh; 67 }; 68 69 static struct pic_softc psc; 70 71 static int 72 pic_match(struct device * parent, struct cfdata * match, void *aux) 73 { 74 /* 75 * PIC exists on IP12 systems. It appears to be the immediate 76 * ancestor of the mc, for mips1 processors. 77 */ 78 if (mach_type != MACH_SGI_IP12) 79 return (0); 80 81 return (1); 82 } 83 84 static void 85 pic_attach(struct device * parent, struct device * self, void *aux) 86 { 87 u_int32_t reg; 88 char picstr[80] = ""; 89 struct pic_attach_args iaa; 90 struct mainbus_attach_args *ma = aux; 91 92 psc.iot = SGIMIPS_BUS_SPACE_HPC; 93 if (bus_space_map(psc.iot, ma->ma_addr, 0, 94 BUS_SPACE_MAP_LINEAR, &psc.ioh)) 95 panic("pic_attach: could not allocate memory\n"); 96 97 platform.bus_reset = pic_bus_reset; 98 99 reg = bus_space_read_4(psc.iot, psc.ioh, PIC_SYSID); 100 reg = (reg >> PIC_SYSID_REVSHIFT) & PIC_SYSID_REVMASK; 101 printf("\npic0: Revision %c", reg + 65); 102 103 /* enable refresh, set big-endian, memory parity, allow slave access */ 104 reg = bus_space_read_4(psc.iot, psc.ioh, PIC_CPUCTRL); 105 reg |= (PIC_CPUCTRL_REFRESH | PIC_CPUCTRL_BIGENDIAN | PIC_CPUCTRL_MPR | 106 PIC_CPUCTRL_SLAVE); 107 bus_space_write_4(psc.iot, psc.ioh, PIC_CPUCTRL, reg); 108 109 /* query the mode register to see what's going on */ 110 reg = bus_space_read_4(psc.iot, psc.ioh, PIC_MODE); 111 printf(": dblk (0x%x), iblk (0x%x)\n", reg & PIC_MODE_DBSIZ, 112 reg & PIC_MODE_IBSIZ); 113 114 if (reg & PIC_MODE_NOCACHE) 115 strcat(picstr, "cache disabled"); 116 else 117 strcat(picstr, "cache enabled"); 118 119 if (reg & PIC_MODE_ISTREAM) 120 strcat(picstr, ", instr streaming"); 121 122 if (reg & PIC_MODE_STOREPARTIAL) 123 strcat(picstr, ", store partial"); 124 125 if (reg & PIC_MODE_BUSDRIVE) 126 strcat(picstr, ", bus drive"); 127 128 printf("pic0: %s", picstr); 129 130 /* gio32 allow master, real time devices */ 131 reg = bus_space_read_4(psc.iot, psc.ioh, PIC_GIO32ARB_SLOT0); 132 reg &= ~(PIC_GIO32ARB_SLOT_SLAVE | PIC_GIO32ARB_SLOT_LONG); 133 bus_space_write_4(psc.iot, psc.ioh, PIC_GIO32ARB_SLOT0, reg); 134 135 reg = bus_space_read_4(psc.iot, psc.ioh, PIC_GIO32ARB_SLOT1); 136 reg &= ~(PIC_GIO32ARB_SLOT_SLAVE | PIC_GIO32ARB_SLOT_LONG); 137 bus_space_write_4(psc.iot, psc.ioh, PIC_GIO32ARB_SLOT1, reg); 138 139 /* default gio32 burst time */ 140 bus_space_write_4(psc.iot, psc.ioh, PIC_GIO32ARB_BURST, 141 PIC_GIO32ARB_DEFBURST); 142 143 /* default gio32 delay time */ 144 bus_space_write_4(psc.iot, psc.ioh, PIC_GIO32ARB_DELAY, 145 PIC_GIO32ARB_DEFDELAY); 146 147 printf("\n"); 148 149 /* XXX gio only on IP12 Indigo (?). does pic exist anywhere else? */ 150 iaa.iaa_name = "gio"; 151 (void) config_found(self, (void *) &iaa, pic_print); 152 153 /* Enable watchdog, reset it */ 154 reg = bus_space_read_4(psc.iot, psc.ioh, PIC_CPUCTRL) 155 | (PIC_CPUCTRL_WDOG); 156 bus_space_write_4(psc.iot, psc.ioh, PIC_CPUCTRL, reg); 157 } 158 159 160 static int 161 pic_print(void *aux, const char *name) 162 { 163 struct pic_attach_args *iaa = aux; 164 165 if (name) 166 aprint_normal("%s at %s", iaa->iaa_name, name); 167 168 return UNCONF; 169 } 170 171 void 172 pic_bus_reset(void) 173 { 174 bus_space_write_4(psc.iot, psc.ioh, PIC_PARITY_ERROR, 0); 175 } 176 177 void 178 pic_watchdog_tickle(void) 179 { 180 u_int32_t reg; 181 182 reg = bus_space_read_4(psc.iot, psc.ioh, PIC_CPUCTRL) 183 & ~(PIC_CPUCTRL_WDOG); 184 bus_space_write_4(psc.iot, psc.ioh, PIC_CPUCTRL, reg); 185 reg = bus_space_read_4(psc.iot, psc.ioh, PIC_CPUCTRL) 186 | (PIC_CPUCTRL_WDOG); 187 bus_space_write_4(psc.iot, psc.ioh, PIC_CPUCTRL, reg); 188 } 189
Indexes created Tue Sep 30 11:09:46 GMT 2025