pic.c revision 1.5
1 /* $NetBSD: pic.c,v 1.5 2004/04/10 19:07:06 pooka Exp $ */ 2 3 /* 4 * Copyright (c) 2002 Steve Rumble 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the author may not be used to endorse or promote products 16 * derived from this software without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 #include <sys/param.h> 31 #include <sys/device.h> 32 #include <sys/systm.h> 33 34 #include <machine/cpu.h> 35 #include <machine/locore.h> 36 #include <machine/autoconf.h> 37 #include <machine/bus.h> 38 #include <machine/machtype.h> 39 #include <machine/sysconf.h> 40 41 #include <sgimips/dev/picreg.h> 42 43 #include "locators.h" 44 45 struct pic_softc { 46 struct device sc_dev; 47 48 bus_space_tag_t iot; 49 bus_space_handle_t ioh; 50 51 }; 52 53 static int pic_match(struct device *, struct cfdata *, void *); 54 static void pic_attach(struct device *, struct device *, void *); 55 static int pic_print(void *, const char *); 56 void pic_bus_reset(void); 57 void pic_watchdog_enable(void); 58 void pic_watchdog_disable(void); 59 void pic_watchdog_tickle(void); 60 61 CFATTACH_DECL(pic, sizeof(struct pic_softc), 62 pic_match, pic_attach, NULL, NULL); 63 64 struct pic_attach_args { 65 const char *iaa_name; 66 67 bus_space_tag_t iaa_st; 68 bus_space_handle_t iaa_sh; 69 }; 70 71 static struct pic_softc psc; 72 73 static int 74 pic_match(struct device * parent, struct cfdata * match, void *aux) 75 { 76 /* 77 * PIC exists on IP12 systems. It appears to be the immediate 78 * ancestor of the mc, for mips1 processors. 79 */ 80 if (mach_type == MACH_SGI_IP12) 81 return (1); 82 else 83 return (0); 84 } 85 86 static void 87 pic_attach(struct device * parent, struct device * self, void *aux) 88 { 89 u_int32_t reg; 90 char picstr[80] = ""; 91 struct pic_attach_args iaa; 92 struct mainbus_attach_args *ma = aux; 93 94 psc.iot = SGIMIPS_BUS_SPACE_HPC; 95 if (bus_space_map(psc.iot, ma->ma_addr, 0, 96 BUS_SPACE_MAP_LINEAR, &psc.ioh)) 97 panic("pic_attach: could not allocate memory\n"); 98 99 platform.bus_reset = pic_bus_reset; 100 platform.watchdog_enable = pic_watchdog_enable; 101 platform.watchdog_disable = pic_watchdog_disable; 102 platform.watchdog_reset = pic_watchdog_tickle; 103 104 reg = bus_space_read_4(psc.iot, psc.ioh, PIC_SYSID); 105 reg = (reg >> PIC_SYSID_REVSHIFT) & PIC_SYSID_REVMASK; 106 printf("\npic0: Revision %c", reg + 64); 107 108 /* enable refresh, set big-endian, memory parity, allow slave access */ 109 reg = bus_space_read_4(psc.iot, psc.ioh, PIC_CPUCTRL); 110 reg |= (PIC_CPUCTRL_REFRESH | PIC_CPUCTRL_BIGENDIAN | PIC_CPUCTRL_MPR | 111 PIC_CPUCTRL_SLAVE); 112 bus_space_write_4(psc.iot, psc.ioh, PIC_CPUCTRL, reg); 113 114 /* query the mode register to see what's going on */ 115 reg = bus_space_read_4(psc.iot, psc.ioh, PIC_MODE); 116 printf(": dblk (0x%x), iblk (0x%x)\n", reg & PIC_MODE_DBSIZ, 117 reg & PIC_MODE_IBSIZ); 118 119 if (reg & PIC_MODE_NOCACHE) 120 strcat(picstr, "cache disabled"); 121 else 122 strcat(picstr, "cache enabled"); 123 124 if (reg & PIC_MODE_ISTREAM) 125 strcat(picstr, ", instr streaming"); 126 127 if (reg & PIC_MODE_STOREPARTIAL) 128 strcat(picstr, ", store partial"); 129 130 if (reg & PIC_MODE_BUSDRIVE) 131 strcat(picstr, ", bus drive"); 132 133 printf("pic0: %s", picstr); 134 135 /* gio32 allow master, real time devices */ 136 reg = bus_space_read_4(psc.iot, psc.ioh, PIC_GIO32ARB_SLOT0); 137 reg &= ~(PIC_GIO32ARB_SLOT_SLAVE | PIC_GIO32ARB_SLOT_LONG); 138 bus_space_write_4(psc.iot, psc.ioh, PIC_GIO32ARB_SLOT0, reg); 139 140 reg = bus_space_read_4(psc.iot, psc.ioh, PIC_GIO32ARB_SLOT1); 141 reg &= ~(PIC_GIO32ARB_SLOT_SLAVE | PIC_GIO32ARB_SLOT_LONG); 142 bus_space_write_4(psc.iot, psc.ioh, PIC_GIO32ARB_SLOT1, reg); 143 144 /* default gio32 burst time */ 145 bus_space_write_4(psc.iot, psc.ioh, PIC_GIO32ARB_BURST, 146 PIC_GIO32ARB_DEFBURST); 147 148 /* default gio32 delay time */ 149 bus_space_write_4(psc.iot, psc.ioh, PIC_GIO32ARB_DELAY, 150 PIC_GIO32ARB_DEFDELAY); 151 152 printf("\n"); 153 154 /* XXX gio only on IP12 Indigo (?). does pic exist anywhere else? */ 155 iaa.iaa_name = "gio"; 156 (void) config_found(self, (void *) &iaa, pic_print); 157 158 /* Enable watchdog, reset it */ 159 reg = bus_space_read_4(psc.iot, psc.ioh, PIC_CPUCTRL) 160 | (PIC_CPUCTRL_WDOG); 161 bus_space_write_4(psc.iot, psc.ioh, PIC_CPUCTRL, reg); 162 } 163 164 165 static int 166 pic_print(void *aux, const char *name) 167 { 168 struct pic_attach_args *iaa = aux; 169 170 if (name) 171 aprint_normal("%s at %s", iaa->iaa_name, name); 172 173 return UNCONF; 174 } 175 176 void 177 pic_bus_reset(void) 178 { 179 bus_space_write_4(psc.iot, psc.ioh, PIC_PARITY_ERROR, 0); 180 } 181 182 void 183 pic_watchdog_enable() 184 { 185 uint32_t reg; 186 187 reg = bus_space_read_4(psc.iot, psc.ioh, PIC_CPUCTRL); 188 reg |= PIC_CPUCTRL_WDOG; 189 bus_space_write_4(psc.iot, psc.ioh, PIC_CPUCTRL, reg); 190 } 191 192 void 193 pic_watchdog_disable() 194 { 195 uint32_t reg; 196 197 reg = bus_space_read_4(psc.iot, psc.ioh, PIC_CPUCTRL) 198 reg &= ~(PIC_CPUCTRL_WDOG); 199 bus_space_write_4(psc.iot, psc.ioh, PIC_CPUCTRL, reg); 200 } 201 202 void 203 pic_watchdog_tickle() 204 { 205 uint32_t reg; 206 207 reg = bus_space_read_4(psc.iot, psc.ioh, PIC_CPUCTRL) 208 reg &= ~(PIC_CPUCTRL_WDOG); 209 bus_space_write_4(psc.iot, psc.ioh, PIC_CPUCTRL, reg); 210 reg = bus_space_read_4(psc.iot, psc.ioh, PIC_CPUCTRL) 211 reg =| (PIC_CPUCTRL_WDOG); 212 bus_space_write_4(psc.iot, psc.ioh, PIC_CPUCTRL, reg); 213 } 214
Indexes created Tue Sep 30 06:09:59 GMT 2025