pic.c revision 1.7
1 /* $NetBSD: pic.c,v 1.7 2004/04/11 00:44:47 pooka Exp $ */ 2 3 /* 4 * Copyright (c) 2002 Steve Rumble 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the author may not be used to endorse or promote products 16 * derived from this software without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 #include <sys/cdefs.h> 31 __KERNEL_RCSID(0, "$NetBSD: pic.c,v 1.7 2004/04/11 00:44:47 pooka Exp $"); 32 33 #include <sys/param.h> 34 #include <sys/device.h> 35 #include <sys/systm.h> 36 37 #include <machine/cpu.h> 38 #include <machine/locore.h> 39 #include <machine/autoconf.h> 40 #include <machine/bus.h> 41 #include <machine/machtype.h> 42 #include <machine/sysconf.h> 43 44 #include <sgimips/dev/picreg.h> 45 46 #include "locators.h" 47 48 struct pic_softc { 49 struct device sc_dev; 50 51 bus_space_tag_t iot; 52 bus_space_handle_t ioh; 53 54 }; 55 56 static int pic_match(struct device *, struct cfdata *, void *); 57 static void pic_attach(struct device *, struct device *, void *); 58 static int pic_print(void *, const char *); 59 void pic_bus_reset(void); 60 void pic_watchdog_enable(void); 61 void pic_watchdog_disable(void); 62 void pic_watchdog_tickle(void); 63 64 CFATTACH_DECL(pic, sizeof(struct pic_softc), 65 pic_match, pic_attach, NULL, NULL); 66 67 struct pic_attach_args { 68 const char *iaa_name; 69 70 bus_space_tag_t iaa_st; 71 bus_space_handle_t iaa_sh; 72 }; 73 74 static struct pic_softc psc; 75 76 static int 77 pic_match(struct device * parent, struct cfdata * match, void *aux) 78 { 79 /* 80 * PIC exists on IP12 systems. It appears to be the immediate 81 * ancestor of the mc, for mips1 processors. 82 */ 83 if (mach_type == MACH_SGI_IP12) 84 return (1); 85 else 86 return (0); 87 } 88 89 static void 90 pic_attach(struct device * parent, struct device * self, void *aux) 91 { 92 u_int32_t reg; 93 char picstr[80] = ""; 94 struct pic_attach_args iaa; 95 struct mainbus_attach_args *ma = aux; 96 97 psc.iot = SGIMIPS_BUS_SPACE_HPC; 98 if (bus_space_map(psc.iot, ma->ma_addr, 0, 99 BUS_SPACE_MAP_LINEAR, &psc.ioh)) 100 panic("pic_attach: could not allocate memory\n"); 101 102 platform.bus_reset = pic_bus_reset; 103 platform.watchdog_enable = pic_watchdog_enable; 104 platform.watchdog_disable = pic_watchdog_disable; 105 platform.watchdog_reset = pic_watchdog_tickle; 106 107 reg = bus_space_read_4(psc.iot, psc.ioh, PIC_SYSID); 108 reg = (reg >> PIC_SYSID_REVSHIFT) & PIC_SYSID_REVMASK; 109 printf("\npic0: Revision %c", reg + 64); 110 111 /* enable refresh, set big-endian, memory parity, allow slave access */ 112 reg = bus_space_read_4(psc.iot, psc.ioh, PIC_CPUCTRL); 113 reg |= (PIC_CPUCTRL_REFRESH | PIC_CPUCTRL_BIGENDIAN | PIC_CPUCTRL_MPR | 114 PIC_CPUCTRL_SLAVE); 115 bus_space_write_4(psc.iot, psc.ioh, PIC_CPUCTRL, reg); 116 117 /* query the mode register to see what's going on */ 118 reg = bus_space_read_4(psc.iot, psc.ioh, PIC_MODE); 119 printf(": dblk (0x%x), iblk (0x%x)\n", reg & PIC_MODE_DBSIZ, 120 reg & PIC_MODE_IBSIZ); 121 122 if (reg & PIC_MODE_NOCACHE) 123 strcat(picstr, "cache disabled"); 124 else 125 strcat(picstr, "cache enabled"); 126 127 if (reg & PIC_MODE_ISTREAM) 128 strcat(picstr, ", instr streaming"); 129 130 if (reg & PIC_MODE_STOREPARTIAL) 131 strcat(picstr, ", store partial"); 132 133 if (reg & PIC_MODE_BUSDRIVE) 134 strcat(picstr, ", bus drive"); 135 136 printf("pic0: %s", picstr); 137 138 /* gio32 allow master, real time devices */ 139 reg = bus_space_read_4(psc.iot, psc.ioh, PIC_GIO32ARB_SLOT0); 140 reg &= ~(PIC_GIO32ARB_SLOT_SLAVE | PIC_GIO32ARB_SLOT_LONG); 141 bus_space_write_4(psc.iot, psc.ioh, PIC_GIO32ARB_SLOT0, reg); 142 143 reg = bus_space_read_4(psc.iot, psc.ioh, PIC_GIO32ARB_SLOT1); 144 reg &= ~(PIC_GIO32ARB_SLOT_SLAVE | PIC_GIO32ARB_SLOT_LONG); 145 bus_space_write_4(psc.iot, psc.ioh, PIC_GIO32ARB_SLOT1, reg); 146 147 /* default gio32 burst time */ 148 bus_space_write_4(psc.iot, psc.ioh, PIC_GIO32ARB_BURST, 149 PIC_GIO32ARB_DEFBURST); 150 151 /* default gio32 delay time */ 152 bus_space_write_4(psc.iot, psc.ioh, PIC_GIO32ARB_DELAY, 153 PIC_GIO32ARB_DEFDELAY); 154 155 printf("\n"); 156 157 /* XXX gio only on IP12 Indigo (?). does pic exist anywhere else? */ 158 iaa.iaa_name = "gio"; 159 (void) config_found(self, (void *) &iaa, pic_print); 160 161 /* Enable watchdog, reset it */ 162 reg = bus_space_read_4(psc.iot, psc.ioh, PIC_CPUCTRL) 163 | (PIC_CPUCTRL_WDOG); 164 bus_space_write_4(psc.iot, psc.ioh, PIC_CPUCTRL, reg); 165 } 166 167 168 static int 169 pic_print(void *aux, const char *name) 170 { 171 struct pic_attach_args *iaa = aux; 172 173 if (name) 174 aprint_normal("%s at %s", iaa->iaa_name, name); 175 176 return UNCONF; 177 } 178 179 void 180 pic_bus_reset(void) 181 { 182 bus_space_write_4(psc.iot, psc.ioh, PIC_PARITY_ERROR, 0); 183 } 184 185 void 186 pic_watchdog_enable() 187 { 188 uint32_t reg; 189 190 reg = bus_space_read_4(psc.iot, psc.ioh, PIC_CPUCTRL); 191 reg |= PIC_CPUCTRL_WDOG; 192 bus_space_write_4(psc.iot, psc.ioh, PIC_CPUCTRL, reg); 193 } 194 195 void 196 pic_watchdog_disable() 197 { 198 uint32_t reg; 199 200 reg = bus_space_read_4(psc.iot, psc.ioh, PIC_CPUCTRL); 201 reg &= ~(PIC_CPUCTRL_WDOG); 202 bus_space_write_4(psc.iot, psc.ioh, PIC_CPUCTRL, reg); 203 } 204 205 void 206 pic_watchdog_tickle() 207 { 208 uint32_t reg; 209 210 reg = bus_space_read_4(psc.iot, psc.ioh, PIC_CPUCTRL); 211 reg &= ~(PIC_CPUCTRL_WDOG); 212 bus_space_write_4(psc.iot, psc.ioh, PIC_CPUCTRL, reg); 213 reg = bus_space_read_4(psc.iot, psc.ioh, PIC_CPUCTRL); 214 reg |= (PIC_CPUCTRL_WDOG); 215 bus_space_write_4(psc.iot, psc.ioh, PIC_CPUCTRL, reg); 216 } 217
Indexes created Tue Sep 30 06:09:59 GMT 2025