haltwo.c revision 1.3.4.5 1 1.3.4.5 skrll /* $NetBSD: haltwo.c,v 1.3.4.5 2004/11/02 07:50:47 skrll Exp $ */
2 1.3.4.2 skrll
3 1.3.4.2 skrll /*
4 1.3.4.2 skrll * Copyright (c) 2003 Ilpo Ruotsalainen
5 1.3.4.2 skrll * All rights reserved.
6 1.3.4.2 skrll *
7 1.3.4.2 skrll * Redistribution and use in source and binary forms, with or without
8 1.3.4.2 skrll * modification, are permitted provided that the following conditions
9 1.3.4.2 skrll * are met:
10 1.3.4.2 skrll * 1. Redistributions of source code must retain the above copyright
11 1.3.4.2 skrll * notice, this list of conditions and the following disclaimer.
12 1.3.4.2 skrll * 2. Redistributions in binary form must reproduce the above copyright
13 1.3.4.2 skrll * notice, this list of conditions and the following disclaimer in the
14 1.3.4.2 skrll * documentation and/or other materials provided with the distribution.
15 1.3.4.2 skrll * 3. The name of the author may not be used to endorse or promote products
16 1.3.4.2 skrll * derived from this software without specific prior written permission.
17 1.3.4.2 skrll *
18 1.3.4.2 skrll * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 1.3.4.2 skrll * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 1.3.4.2 skrll * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 1.3.4.2 skrll * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 1.3.4.2 skrll * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 1.3.4.2 skrll * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 1.3.4.2 skrll * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 1.3.4.2 skrll * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 1.3.4.2 skrll * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 1.3.4.2 skrll * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 1.3.4.2 skrll *
29 1.3.4.2 skrll * <<Id: LICENSE_GC,v 1.1 2001/10/01 23:24:05 cgd Exp>>
30 1.3.4.2 skrll */
31 1.3.4.2 skrll
32 1.3.4.2 skrll #include <sys/cdefs.h>
33 1.3.4.5 skrll __KERNEL_RCSID(0, "$NetBSD: haltwo.c,v 1.3.4.5 2004/11/02 07:50:47 skrll Exp $");
34 1.3.4.2 skrll
35 1.3.4.2 skrll #include <sys/param.h>
36 1.3.4.2 skrll #include <sys/systm.h>
37 1.3.4.2 skrll #include <sys/device.h>
38 1.3.4.2 skrll #include <sys/audioio.h>
39 1.3.4.2 skrll #include <sys/malloc.h>
40 1.3.4.2 skrll #include <dev/audio_if.h>
41 1.3.4.2 skrll #include <dev/auconv.h>
42 1.3.4.2 skrll #include <dev/mulaw.h>
43 1.3.4.2 skrll
44 1.3.4.2 skrll #include <uvm/uvm_extern.h>
45 1.3.4.2 skrll
46 1.3.4.2 skrll #include <machine/bus.h>
47 1.3.4.2 skrll
48 1.3.4.2 skrll #include <sgimips/hpc/hpcvar.h>
49 1.3.4.2 skrll #include <sgimips/hpc/hpcreg.h>
50 1.3.4.2 skrll
51 1.3.4.2 skrll #include <sgimips/hpc/haltworeg.h>
52 1.3.4.2 skrll #include <sgimips/hpc/haltwovar.h>
53 1.3.4.2 skrll
54 1.3.4.2 skrll #ifdef AUDIO_DEBUG
55 1.3.4.2 skrll #define DPRINTF(x) printf x
56 1.3.4.2 skrll #else
57 1.3.4.2 skrll #define DPRINTF(x)
58 1.3.4.2 skrll #endif
59 1.3.4.2 skrll
60 1.3.4.2 skrll static int haltwo_open(void *, int);
61 1.3.4.2 skrll static void haltwo_close(void *);
62 1.3.4.2 skrll static int haltwo_query_encoding(void *, struct audio_encoding *);
63 1.3.4.2 skrll static int haltwo_set_params(void *, int, int, struct audio_params *,
64 1.3.4.2 skrll struct audio_params *);
65 1.3.4.2 skrll static int haltwo_round_blocksize(void *, int);
66 1.3.4.2 skrll static int haltwo_halt_output(void *);
67 1.3.4.2 skrll static int haltwo_halt_input(void *);
68 1.3.4.2 skrll static int haltwo_getdev(void *, struct audio_device *);
69 1.3.4.2 skrll static int haltwo_set_port(void *, mixer_ctrl_t *);
70 1.3.4.2 skrll static int haltwo_get_port(void *, mixer_ctrl_t *);
71 1.3.4.2 skrll static int haltwo_query_devinfo(void *, mixer_devinfo_t *);
72 1.3.4.2 skrll static void *haltwo_malloc(void *, int, size_t, struct malloc_type *, int);
73 1.3.4.2 skrll static void haltwo_free(void *, void *, struct malloc_type *);
74 1.3.4.2 skrll static int haltwo_get_props(void *);
75 1.3.4.2 skrll static int haltwo_trigger_output(void *, void *, void *, int, void (*)(void *),
76 1.3.4.2 skrll void *, struct audio_params *);
77 1.3.4.2 skrll static int haltwo_trigger_input(void *, void *, void *, int, void (*)(void *),
78 1.3.4.2 skrll void *, struct audio_params *);
79 1.3.4.2 skrll
80 1.3.4.5 skrll static const struct audio_hw_if haltwo_hw_if = {
81 1.3.4.2 skrll haltwo_open,
82 1.3.4.2 skrll haltwo_close,
83 1.3.4.2 skrll NULL, /* drain */
84 1.3.4.2 skrll haltwo_query_encoding,
85 1.3.4.2 skrll haltwo_set_params,
86 1.3.4.2 skrll haltwo_round_blocksize,
87 1.3.4.2 skrll NULL, /* commit_settings */
88 1.3.4.2 skrll NULL, /* init_output */
89 1.3.4.2 skrll NULL, /* init_input */
90 1.3.4.2 skrll NULL, /* start_output */
91 1.3.4.2 skrll NULL, /* start_input */
92 1.3.4.2 skrll haltwo_halt_output,
93 1.3.4.2 skrll haltwo_halt_input,
94 1.3.4.2 skrll NULL, /* speaker_ctl */
95 1.3.4.2 skrll haltwo_getdev,
96 1.3.4.2 skrll NULL, /* setfd */
97 1.3.4.2 skrll haltwo_set_port,
98 1.3.4.2 skrll haltwo_get_port,
99 1.3.4.2 skrll haltwo_query_devinfo,
100 1.3.4.2 skrll haltwo_malloc,
101 1.3.4.2 skrll haltwo_free,
102 1.3.4.2 skrll NULL, /* round_buffersize */
103 1.3.4.2 skrll NULL, /* mappage */
104 1.3.4.2 skrll haltwo_get_props,
105 1.3.4.2 skrll haltwo_trigger_output,
106 1.3.4.2 skrll haltwo_trigger_input,
107 1.3.4.2 skrll NULL /* dev_ioctl */
108 1.3.4.2 skrll };
109 1.3.4.2 skrll
110 1.3.4.2 skrll static const struct audio_device haltwo_device = {
111 1.3.4.2 skrll "HAL2",
112 1.3.4.2 skrll "",
113 1.3.4.2 skrll "haltwo"
114 1.3.4.2 skrll };
115 1.3.4.2 skrll
116 1.3.4.2 skrll static int haltwo_match(struct device *, struct cfdata *, void *);
117 1.3.4.2 skrll static void haltwo_attach(struct device *, struct device *, void *);
118 1.3.4.2 skrll static int haltwo_intr(void *);
119 1.3.4.2 skrll
120 1.3.4.2 skrll CFATTACH_DECL(haltwo, sizeof(struct haltwo_softc),
121 1.3.4.2 skrll haltwo_match, haltwo_attach, NULL, NULL);
122 1.3.4.2 skrll
123 1.3.4.2 skrll #define haltwo_write(sc,type,off,val) \
124 1.3.4.2 skrll bus_space_write_4(sc->sc_st, sc->sc_##type##_sh, off, val)
125 1.3.4.2 skrll
126 1.3.4.2 skrll #define haltwo_read(sc,type,off) \
127 1.3.4.2 skrll bus_space_read_4(sc->sc_st, sc->sc_##type##_sh, off)
128 1.3.4.2 skrll
129 1.3.4.2 skrll static void
130 1.3.4.2 skrll haltwo_write_indirect(struct haltwo_softc *sc, uint32_t ireg, uint16_t low,
131 1.3.4.2 skrll uint16_t high)
132 1.3.4.2 skrll {
133 1.3.4.2 skrll
134 1.3.4.2 skrll haltwo_write(sc, ctl, HAL2_REG_CTL_IDR0, low);
135 1.3.4.2 skrll haltwo_write(sc, ctl, HAL2_REG_CTL_IDR1, high);
136 1.3.4.2 skrll haltwo_write(sc, ctl, HAL2_REG_CTL_IDR2, 0);
137 1.3.4.2 skrll haltwo_write(sc, ctl, HAL2_REG_CTL_IDR3, 0);
138 1.3.4.2 skrll haltwo_write(sc, ctl, HAL2_REG_CTL_IAR, ireg);
139 1.3.4.2 skrll
140 1.3.4.2 skrll while (haltwo_read(sc, ctl, HAL2_REG_CTL_ISR) & HAL2_ISR_TSTATUS)
141 1.3.4.2 skrll ;
142 1.3.4.2 skrll }
143 1.3.4.2 skrll
144 1.3.4.2 skrll static void
145 1.3.4.2 skrll haltwo_read_indirect(struct haltwo_softc *sc, uint32_t ireg, uint16_t *low,
146 1.3.4.2 skrll uint16_t *high)
147 1.3.4.2 skrll {
148 1.3.4.2 skrll
149 1.3.4.2 skrll haltwo_write(sc, ctl, HAL2_REG_CTL_IAR,
150 1.3.4.2 skrll ireg | HAL2_IAR_READ);
151 1.3.4.2 skrll
152 1.3.4.2 skrll while (haltwo_read(sc, ctl, HAL2_REG_CTL_ISR) & HAL2_ISR_TSTATUS)
153 1.3.4.2 skrll ;
154 1.3.4.2 skrll
155 1.3.4.2 skrll if (low)
156 1.3.4.2 skrll *low = haltwo_read(sc, ctl, HAL2_REG_CTL_IDR0);
157 1.3.4.2 skrll
158 1.3.4.2 skrll if (high)
159 1.3.4.2 skrll *high = haltwo_read(sc, ctl, HAL2_REG_CTL_IDR1);
160 1.3.4.2 skrll }
161 1.3.4.2 skrll
162 1.3.4.2 skrll static int
163 1.3.4.2 skrll haltwo_init_codec(struct haltwo_softc *sc, struct haltwo_codec *codec)
164 1.3.4.2 skrll {
165 1.3.4.2 skrll int err;
166 1.3.4.2 skrll int rseg;
167 1.3.4.2 skrll size_t allocsz = sizeof(struct hpc_dma_desc) * HALTWO_MAX_DMASEGS;
168 1.3.4.2 skrll
169 1.3.4.2 skrll KASSERT(allocsz <= PAGE_SIZE);
170 1.3.4.2 skrll
171 1.3.4.2 skrll err = bus_dmamem_alloc(sc->sc_dma_tag, allocsz, 0, 0, &codec->dma_seg,
172 1.3.4.2 skrll 1, &rseg, BUS_DMA_NOWAIT);
173 1.3.4.2 skrll if (err)
174 1.3.4.2 skrll goto out;
175 1.3.4.2 skrll
176 1.3.4.2 skrll err = bus_dmamem_map(sc->sc_dma_tag, &codec->dma_seg, rseg, allocsz,
177 1.3.4.2 skrll (caddr_t *)&codec->dma_descs, BUS_DMA_NOWAIT);
178 1.3.4.2 skrll if (err)
179 1.3.4.2 skrll goto out_free;
180 1.3.4.2 skrll
181 1.3.4.2 skrll err = bus_dmamap_create(sc->sc_dma_tag, allocsz, 1, PAGE_SIZE, 0,
182 1.3.4.2 skrll BUS_DMA_NOWAIT, &codec->dma_map);
183 1.3.4.2 skrll if (err)
184 1.3.4.2 skrll goto out_free;
185 1.3.4.2 skrll
186 1.3.4.2 skrll err = bus_dmamap_load(sc->sc_dma_tag, codec->dma_map, codec->dma_descs,
187 1.3.4.2 skrll allocsz, NULL, BUS_DMA_NOWAIT);
188 1.3.4.2 skrll if (err)
189 1.3.4.2 skrll goto out_destroy;
190 1.3.4.2 skrll
191 1.3.4.2 skrll DPRINTF(("haltwo_init_codec: allocated %d descriptors (%d bytes)"
192 1.3.4.2 skrll " at %p\n", HALTWO_MAX_DMASEGS, allocsz, codec->dma_descs));
193 1.3.4.2 skrll
194 1.3.4.2 skrll memset(codec->dma_descs, 0, allocsz);
195 1.3.4.2 skrll
196 1.3.4.2 skrll return (0);
197 1.3.4.2 skrll
198 1.3.4.2 skrll out_destroy:
199 1.3.4.2 skrll bus_dmamap_destroy(sc->sc_dma_tag, codec->dma_map);
200 1.3.4.2 skrll out_free:
201 1.3.4.2 skrll bus_dmamem_free(sc->sc_dma_tag, &codec->dma_seg, rseg);
202 1.3.4.2 skrll out:
203 1.3.4.2 skrll DPRINTF(("haltwo_init_codec failed: %d\n",err));
204 1.3.4.2 skrll
205 1.3.4.2 skrll return (err);
206 1.3.4.2 skrll }
207 1.3.4.2 skrll
208 1.3.4.2 skrll static void
209 1.3.4.2 skrll haltwo_setup_dma(struct haltwo_softc *sc, struct haltwo_codec *codec,
210 1.3.4.2 skrll struct haltwo_dmabuf *dmabuf, size_t len, int blksize,
211 1.3.4.2 skrll void (*intr)(void *), void *intrarg)
212 1.3.4.2 skrll {
213 1.3.4.2 skrll int i;
214 1.3.4.2 skrll bus_dma_segment_t *segp;
215 1.3.4.2 skrll struct hpc_dma_desc *descp;
216 1.3.4.2 skrll int next_intr = blksize;
217 1.3.4.2 skrll
218 1.3.4.2 skrll KASSERT(len % blksize == 0);
219 1.3.4.2 skrll
220 1.3.4.2 skrll codec->intr = intr;
221 1.3.4.2 skrll codec->intr_arg = intrarg;
222 1.3.4.2 skrll
223 1.3.4.2 skrll segp = dmabuf->dma_map->dm_segs;
224 1.3.4.2 skrll descp = codec->dma_descs;
225 1.3.4.2 skrll
226 1.3.4.2 skrll /* Build descriptor chain for looping DMA, triggering interrupt every
227 1.3.4.2 skrll * blksize bytes */
228 1.3.4.2 skrll for (i = 0; i < dmabuf->dma_map->dm_nsegs; i++) {
229 1.3.4.2 skrll descp->hpc3_hdd_bufptr = segp->ds_addr;
230 1.3.4.2 skrll descp->hpc3_hdd_ctl = segp->ds_len;
231 1.3.4.2 skrll
232 1.3.4.2 skrll KASSERT(next_intr >= segp->ds_len);
233 1.3.4.2 skrll
234 1.3.4.2 skrll if (next_intr == segp->ds_len) {
235 1.3.4.2 skrll /* Generate intr after this DMA buffer */
236 1.3.4.2 skrll descp->hpc3_hdd_ctl |= HDD_CTL_INTR;
237 1.3.4.2 skrll next_intr = blksize;
238 1.3.4.2 skrll } else
239 1.3.4.2 skrll next_intr -= segp->ds_len;
240 1.3.4.2 skrll
241 1.3.4.2 skrll if (i < dmabuf->dma_map->dm_nsegs - 1)
242 1.3.4.2 skrll descp->hdd_descptr = codec->dma_seg.ds_addr +
243 1.3.4.2 skrll sizeof(struct hpc_dma_desc) * (i + 1);
244 1.3.4.2 skrll else
245 1.3.4.2 skrll descp->hdd_descptr = codec->dma_seg.ds_addr;
246 1.3.4.2 skrll
247 1.3.4.2 skrll DPRINTF(("haltwo_setup_dma: hdd_bufptr = %x hdd_ctl = %x"
248 1.3.4.2 skrll " hdd_descptr = %x\n", descp->hpc3_hdd_bufptr,
249 1.3.4.2 skrll descp->hpc3_hdd_ctl, descp->hdd_descptr));
250 1.3.4.2 skrll
251 1.3.4.2 skrll segp++;
252 1.3.4.2 skrll descp++;
253 1.3.4.2 skrll }
254 1.3.4.2 skrll
255 1.3.4.2 skrll bus_dmamap_sync(sc->sc_dma_tag, codec->dma_map, 0,
256 1.3.4.2 skrll codec->dma_map->dm_mapsize, BUS_DMASYNC_PREWRITE);
257 1.3.4.2 skrll }
258 1.3.4.2 skrll
259 1.3.4.2 skrll static int
260 1.3.4.2 skrll haltwo_match(struct device *parent, struct cfdata *cf, void *aux)
261 1.3.4.2 skrll {
262 1.3.4.2 skrll struct hpc_attach_args *haa = aux;
263 1.3.4.2 skrll
264 1.3.4.2 skrll if (strcmp(haa->ha_name, cf->cf_name) == 0)
265 1.3.4.2 skrll return (1);
266 1.3.4.2 skrll
267 1.3.4.2 skrll return (0);
268 1.3.4.2 skrll }
269 1.3.4.2 skrll
270 1.3.4.2 skrll static void
271 1.3.4.2 skrll haltwo_attach(struct device *parent, struct device *self, void *aux)
272 1.3.4.2 skrll {
273 1.3.4.2 skrll struct haltwo_softc *sc = (void *)self;
274 1.3.4.2 skrll struct hpc_attach_args *haa = aux;
275 1.3.4.2 skrll uint32_t rev;
276 1.3.4.2 skrll
277 1.3.4.2 skrll sc->sc_st = haa->ha_st;
278 1.3.4.2 skrll sc->sc_dma_tag = haa->ha_dmat;
279 1.3.4.2 skrll
280 1.3.4.2 skrll if (bus_space_subregion(haa->ha_st, haa->ha_sh, haa->ha_devoff,
281 1.3.4.2 skrll HPC_PBUS_CH0_DEVREGS_SIZE, &sc->sc_ctl_sh)) {
282 1.3.4.2 skrll aprint_error(": unable to map control registers\n");
283 1.3.4.2 skrll return;
284 1.3.4.2 skrll }
285 1.3.4.2 skrll
286 1.3.4.2 skrll if (bus_space_subregion(haa->ha_st, haa->ha_sh, HPC_PBUS_CH2_DEVREGS,
287 1.3.4.2 skrll HPC_PBUS_CH2_DEVREGS_SIZE, &sc->sc_vol_sh)) {
288 1.3.4.2 skrll aprint_error(": unable to map volume registers\n");
289 1.3.4.2 skrll return;
290 1.3.4.2 skrll }
291 1.3.4.2 skrll
292 1.3.4.2 skrll if (bus_space_subregion(haa->ha_st, haa->ha_sh, haa->ha_dmaoff,
293 1.3.4.2 skrll HPC_PBUS_DMAREGS_SIZE, &sc->sc_dma_sh)) {
294 1.3.4.2 skrll aprint_error(": unable to map DMA registers\n");
295 1.3.4.2 skrll return;
296 1.3.4.2 skrll }
297 1.3.4.2 skrll
298 1.3.4.2 skrll haltwo_write(sc, ctl, HAL2_REG_CTL_ISR, 0);
299 1.3.4.2 skrll haltwo_write(sc, ctl, HAL2_REG_CTL_ISR,
300 1.3.4.2 skrll HAL2_ISR_GLOBAL_RESET_N | HAL2_ISR_CODEC_RESET_N);
301 1.3.4.2 skrll haltwo_write_indirect(sc, HAL2_IREG_RELAY_C, HAL2_RELAY_C_STATE, 0);
302 1.3.4.2 skrll
303 1.3.4.2 skrll rev = haltwo_read(sc, ctl, HAL2_REG_CTL_REV);
304 1.3.4.2 skrll
305 1.3.4.2 skrll /* This bit is inverted, the test is correct */
306 1.3.4.2 skrll if (rev & HAL2_REV_AUDIO_PRESENT_N) {
307 1.3.4.2 skrll aprint_error(": Audio hardware not present (revision %x)\n",
308 1.3.4.2 skrll rev);
309 1.3.4.2 skrll return;
310 1.3.4.2 skrll }
311 1.3.4.2 skrll
312 1.3.4.2 skrll if (cpu_intr_establish(haa->ha_irq, IPL_AUDIO, haltwo_intr, sc)
313 1.3.4.2 skrll == NULL) {
314 1.3.4.2 skrll aprint_error(": unable to establish interrupt\n");
315 1.3.4.2 skrll return;
316 1.3.4.2 skrll }
317 1.3.4.2 skrll
318 1.3.4.2 skrll aprint_naive(": Audio controller\n");
319 1.3.4.2 skrll
320 1.3.4.2 skrll aprint_normal(": HAL2 revision %d.%d.%d\n", (rev & 0x7000) >> 12,
321 1.3.4.2 skrll (rev & 0x00F0) >> 4, rev & 0x000F);
322 1.3.4.2 skrll
323 1.3.4.2 skrll if (haltwo_init_codec(sc, &sc->sc_dac)) {
324 1.3.4.2 skrll aprint_error(
325 1.3.4.2 skrll "haltwo_attach: unable to create DMA descriptor list\n");
326 1.3.4.2 skrll return;
327 1.3.4.2 skrll }
328 1.3.4.2 skrll
329 1.3.4.2 skrll /* XXX Magic PBUS CFGDMA values from Linux HAL2 driver XXX */
330 1.3.4.2 skrll bus_space_write_4(haa->ha_st, haa->ha_sh, HPC_PBUS_CH0_CFGDMA,
331 1.3.4.2 skrll 0x8208844);
332 1.3.4.2 skrll bus_space_write_4(haa->ha_st, haa->ha_sh, HPC_PBUS_CH1_CFGDMA,
333 1.3.4.2 skrll 0x8208844);
334 1.3.4.2 skrll
335 1.3.4.2 skrll /* Unmute output */
336 1.3.4.2 skrll /* XXX Add mute/unmute support to mixer ops? XXX */
337 1.3.4.2 skrll haltwo_write_indirect(sc, HAL2_IREG_DAC_C2, 0, 0);
338 1.3.4.2 skrll
339 1.3.4.2 skrll /* Set master volume to zero */
340 1.3.4.2 skrll sc->sc_vol_left = sc->sc_vol_right = 0;
341 1.3.4.2 skrll haltwo_write(sc, vol, HAL2_REG_VOL_LEFT, sc->sc_vol_left);
342 1.3.4.2 skrll haltwo_write(sc, vol, HAL2_REG_VOL_RIGHT, sc->sc_vol_right);
343 1.3.4.2 skrll
344 1.3.4.2 skrll audio_attach_mi(&haltwo_hw_if, sc, &sc->sc_dev);
345 1.3.4.2 skrll }
346 1.3.4.2 skrll
347 1.3.4.2 skrll static int
348 1.3.4.2 skrll haltwo_intr(void *v)
349 1.3.4.2 skrll {
350 1.3.4.2 skrll struct haltwo_softc *sc = v;
351 1.3.4.2 skrll int ret = 0;
352 1.3.4.2 skrll
353 1.3.4.2 skrll if (bus_space_read_4(sc->sc_st, sc->sc_dma_sh, HPC_PBUS_CH0_CTL)
354 1.3.4.2 skrll & HPC_PBUS_DMACTL_IRQ) {
355 1.3.4.2 skrll sc->sc_dac.intr(sc->sc_dac.intr_arg);
356 1.3.4.2 skrll
357 1.3.4.2 skrll ret = 1;
358 1.3.4.2 skrll } else
359 1.3.4.2 skrll DPRINTF(("haltwo_intr: Huh?\n"));
360 1.3.4.2 skrll
361 1.3.4.2 skrll return (ret);
362 1.3.4.2 skrll }
363 1.3.4.2 skrll
364 1.3.4.2 skrll static int
365 1.3.4.2 skrll haltwo_open(void *v, int flags)
366 1.3.4.2 skrll {
367 1.3.4.2 skrll
368 1.3.4.2 skrll DPRINTF(("haltwo_open flags = %x\n", flags));
369 1.3.4.2 skrll
370 1.3.4.2 skrll return (0);
371 1.3.4.2 skrll }
372 1.3.4.2 skrll
373 1.3.4.2 skrll static void
374 1.3.4.2 skrll haltwo_close(void *v)
375 1.3.4.2 skrll {
376 1.3.4.2 skrll }
377 1.3.4.2 skrll
378 1.3.4.2 skrll static int
379 1.3.4.2 skrll haltwo_query_encoding(void *v, struct audio_encoding *e)
380 1.3.4.2 skrll {
381 1.3.4.2 skrll
382 1.3.4.2 skrll switch (e->index) {
383 1.3.4.2 skrll case 0:
384 1.3.4.2 skrll strcpy(e->name, AudioEslinear_le);
385 1.3.4.2 skrll e->encoding = AUDIO_ENCODING_SLINEAR_LE;
386 1.3.4.2 skrll e->precision = 16;
387 1.3.4.2 skrll e->flags = 0;
388 1.3.4.2 skrll break;
389 1.3.4.2 skrll
390 1.3.4.2 skrll case 1:
391 1.3.4.2 skrll strcpy(e->name, AudioEslinear_be);
392 1.3.4.2 skrll e->encoding = AUDIO_ENCODING_SLINEAR_BE;
393 1.3.4.2 skrll e->precision = 16;
394 1.3.4.2 skrll e->flags = 0;
395 1.3.4.2 skrll break;
396 1.3.4.2 skrll
397 1.3.4.2 skrll case 2:
398 1.3.4.2 skrll strcpy(e->name, AudioEmulaw);
399 1.3.4.2 skrll e->encoding = AUDIO_ENCODING_ULAW;
400 1.3.4.2 skrll e->precision = 8;
401 1.3.4.2 skrll e->flags = AUDIO_ENCODINGFLAG_EMULATED;
402 1.3.4.2 skrll break;
403 1.3.4.2 skrll
404 1.3.4.2 skrll default:
405 1.3.4.2 skrll return (EINVAL);
406 1.3.4.2 skrll }
407 1.3.4.2 skrll
408 1.3.4.2 skrll return (0);
409 1.3.4.2 skrll }
410 1.3.4.2 skrll
411 1.3.4.2 skrll static int
412 1.3.4.2 skrll haltwo_set_params(void *v, int setmode, int usemode, struct audio_params *play,
413 1.3.4.2 skrll struct audio_params *rec)
414 1.3.4.2 skrll {
415 1.3.4.2 skrll struct haltwo_softc *sc = v;
416 1.3.4.2 skrll int master, inc, mod;
417 1.3.4.2 skrll uint16_t tmp;
418 1.3.4.2 skrll
419 1.3.4.2 skrll if (play->hw_sample_rate < 4000)
420 1.3.4.2 skrll play->hw_sample_rate = 4000;
421 1.3.4.2 skrll if (play->hw_sample_rate > 48000)
422 1.3.4.2 skrll play->hw_sample_rate = 48000;
423 1.3.4.2 skrll
424 1.3.4.2 skrll play->sw_code = NULL;
425 1.3.4.2 skrll play->factor = 1;
426 1.3.4.2 skrll play->factor_denom = 1;
427 1.3.4.2 skrll
428 1.3.4.2 skrll switch (play->encoding) {
429 1.3.4.2 skrll case AUDIO_ENCODING_ULAW:
430 1.3.4.2 skrll if (play->precision != 8)
431 1.3.4.2 skrll return (EINVAL);
432 1.3.4.2 skrll
433 1.3.4.2 skrll play->sw_code = mulaw_to_slinear16_le;
434 1.3.4.2 skrll play->factor = 2;
435 1.3.4.2 skrll play->hw_encoding = AUDIO_ENCODING_SLINEAR_LE;
436 1.3.4.2 skrll break;
437 1.3.4.2 skrll case AUDIO_ENCODING_SLINEAR_BE:
438 1.3.4.2 skrll case AUDIO_ENCODING_SLINEAR_LE:
439 1.3.4.2 skrll break;
440 1.3.4.2 skrll
441 1.3.4.2 skrll default:
442 1.3.4.2 skrll return (EINVAL);
443 1.3.4.2 skrll }
444 1.3.4.2 skrll
445 1.3.4.2 skrll if (44100 % play->hw_sample_rate < 48000 % play->hw_sample_rate)
446 1.3.4.2 skrll master = 44100;
447 1.3.4.2 skrll else
448 1.3.4.2 skrll master = 48000;
449 1.3.4.2 skrll
450 1.3.4.2 skrll /* HAL2 specification 3.1.2.21: Codecs should be driven with INC/MOD
451 1.3.4.2 skrll * fractions equivalent to 4/N, where N is a positive integer. */
452 1.3.4.2 skrll inc = 4;
453 1.3.4.2 skrll mod = master * inc / play->hw_sample_rate;
454 1.3.4.2 skrll
455 1.3.4.2 skrll /* Fixup upper layers idea of HW sample rate to the actual final rate */
456 1.3.4.2 skrll play->hw_sample_rate = master * inc / mod;
457 1.3.4.2 skrll
458 1.3.4.2 skrll DPRINTF(("haltwo_set_params: master = %d inc = %d mod = %d"
459 1.3.4.2 skrll " hw_sample_rate = %ld\n", master, inc, mod,
460 1.3.4.2 skrll play->hw_sample_rate));
461 1.3.4.2 skrll
462 1.3.4.2 skrll /* Setup samplerate to HW */
463 1.3.4.2 skrll haltwo_write_indirect(sc, HAL2_IREG_BRES1_C1,
464 1.3.4.2 skrll master == 44100 ? 1 : 0, 0);
465 1.3.4.2 skrll /* XXX Documentation disagrees but this seems to work XXX */
466 1.3.4.2 skrll haltwo_write_indirect(sc, HAL2_IREG_BRES1_C2,
467 1.3.4.2 skrll inc, 0xFFFF & (inc - mod - 1));
468 1.3.4.2 skrll
469 1.3.4.2 skrll /* Setup endianness to HW */
470 1.3.4.2 skrll haltwo_read_indirect(sc, HAL2_IREG_DMA_END, &tmp, NULL);
471 1.3.4.2 skrll if (play->hw_encoding == AUDIO_ENCODING_SLINEAR_LE)
472 1.3.4.2 skrll tmp |= HAL2_DMA_END_CODECTX;
473 1.3.4.2 skrll else
474 1.3.4.2 skrll tmp &= ~HAL2_DMA_END_CODECTX;
475 1.3.4.2 skrll haltwo_write_indirect(sc, HAL2_IREG_DMA_END, tmp, 0);
476 1.3.4.2 skrll
477 1.3.4.2 skrll /* Set PBUS channel, Bresenham clock source, number of channels to HW */
478 1.3.4.2 skrll haltwo_write_indirect(sc, HAL2_IREG_DAC_C1,
479 1.3.4.2 skrll (0 << HAL2_C1_DMA_SHIFT) |
480 1.3.4.2 skrll (1 << HAL2_C1_CLKID_SHIFT) |
481 1.3.4.2 skrll (play->hw_channels << HAL2_C1_DATAT_SHIFT), 0);
482 1.3.4.2 skrll
483 1.3.4.2 skrll DPRINTF(("haltwo_set_params: hw_encoding = %d hw_channels = %d\n",
484 1.3.4.2 skrll play->hw_encoding, play->hw_channels));
485 1.3.4.2 skrll
486 1.3.4.2 skrll return (0);
487 1.3.4.2 skrll }
488 1.3.4.2 skrll
489 1.3.4.2 skrll static int
490 1.3.4.2 skrll haltwo_round_blocksize(void *v,int blocksize)
491 1.3.4.2 skrll {
492 1.3.4.2 skrll
493 1.3.4.2 skrll /* XXX Make this smarter and support DMA descriptor chaining XXX */
494 1.3.4.2 skrll /* XXX Rounding to nearest PAGE_SIZE might work? XXX */
495 1.3.4.2 skrll return PAGE_SIZE;
496 1.3.4.2 skrll }
497 1.3.4.2 skrll
498 1.3.4.2 skrll static int
499 1.3.4.2 skrll haltwo_halt_output(void *v)
500 1.3.4.2 skrll {
501 1.3.4.2 skrll struct haltwo_softc *sc = v;
502 1.3.4.2 skrll
503 1.3.4.2 skrll /* Disable PBUS DMA */
504 1.3.4.2 skrll bus_space_write_4(sc->sc_st, sc->sc_dma_sh, HPC_PBUS_CH0_CTL,
505 1.3.4.2 skrll HPC_PBUS_DMACTL_ACT_LD);
506 1.3.4.2 skrll
507 1.3.4.2 skrll return (0);
508 1.3.4.2 skrll }
509 1.3.4.2 skrll
510 1.3.4.2 skrll static int
511 1.3.4.2 skrll haltwo_halt_input(void *v)
512 1.3.4.2 skrll {
513 1.3.4.2 skrll
514 1.3.4.2 skrll return (ENXIO);
515 1.3.4.2 skrll }
516 1.3.4.2 skrll
517 1.3.4.2 skrll static int
518 1.3.4.2 skrll haltwo_getdev(void *v, struct audio_device *dev)
519 1.3.4.2 skrll {
520 1.3.4.2 skrll
521 1.3.4.2 skrll *dev = haltwo_device;
522 1.3.4.2 skrll
523 1.3.4.2 skrll return (0);
524 1.3.4.2 skrll }
525 1.3.4.2 skrll
526 1.3.4.2 skrll static int
527 1.3.4.2 skrll haltwo_set_port(void *v, mixer_ctrl_t *mc)
528 1.3.4.2 skrll {
529 1.3.4.2 skrll struct haltwo_softc *sc = v;
530 1.3.4.2 skrll int lval, rval;
531 1.3.4.2 skrll
532 1.3.4.2 skrll if (mc->type != AUDIO_MIXER_VALUE)
533 1.3.4.2 skrll return (EINVAL);
534 1.3.4.2 skrll
535 1.3.4.2 skrll if (mc->un.value.num_channels == 1)
536 1.3.4.2 skrll lval = rval = mc->un.value.level[AUDIO_MIXER_LEVEL_MONO];
537 1.3.4.2 skrll else if (mc->un.value.num_channels == 2) {
538 1.3.4.2 skrll lval = mc->un.value.level[AUDIO_MIXER_LEVEL_LEFT];
539 1.3.4.2 skrll rval = mc->un.value.level[AUDIO_MIXER_LEVEL_RIGHT];
540 1.3.4.2 skrll } else
541 1.3.4.2 skrll return (EINVAL);
542 1.3.4.2 skrll
543 1.3.4.2 skrll switch (mc->dev) {
544 1.3.4.2 skrll case HALTWO_MASTER_VOL:
545 1.3.4.2 skrll sc->sc_vol_left = lval;
546 1.3.4.2 skrll sc->sc_vol_right = rval;
547 1.3.4.2 skrll
548 1.3.4.2 skrll haltwo_write(sc, vol, HAL2_REG_VOL_LEFT,
549 1.3.4.2 skrll sc->sc_vol_left);
550 1.3.4.2 skrll haltwo_write(sc, vol, HAL2_REG_VOL_RIGHT,
551 1.3.4.2 skrll sc->sc_vol_right);
552 1.3.4.2 skrll break;
553 1.3.4.2 skrll
554 1.3.4.2 skrll default:
555 1.3.4.2 skrll return (EINVAL);
556 1.3.4.2 skrll }
557 1.3.4.2 skrll
558 1.3.4.2 skrll return (0);
559 1.3.4.2 skrll }
560 1.3.4.2 skrll
561 1.3.4.2 skrll static int
562 1.3.4.2 skrll haltwo_get_port(void *v, mixer_ctrl_t *mc)
563 1.3.4.2 skrll {
564 1.3.4.2 skrll struct haltwo_softc *sc = v;
565 1.3.4.2 skrll int l, r;
566 1.3.4.2 skrll
567 1.3.4.2 skrll switch (mc->dev) {
568 1.3.4.2 skrll case HALTWO_MASTER_VOL:
569 1.3.4.2 skrll l = sc->sc_vol_left;
570 1.3.4.2 skrll r = sc->sc_vol_right;
571 1.3.4.2 skrll break;
572 1.3.4.2 skrll
573 1.3.4.2 skrll default:
574 1.3.4.2 skrll return (EINVAL);
575 1.3.4.2 skrll }
576 1.3.4.2 skrll
577 1.3.4.2 skrll if (mc->un.value.num_channels == 1)
578 1.3.4.2 skrll mc->un.value.level[AUDIO_MIXER_LEVEL_MONO] = (l+r) / 2;
579 1.3.4.2 skrll else if (mc->un.value.num_channels == 2) {
580 1.3.4.2 skrll mc->un.value.level[AUDIO_MIXER_LEVEL_LEFT] = l;
581 1.3.4.2 skrll mc->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] = r;
582 1.3.4.2 skrll } else
583 1.3.4.2 skrll return (EINVAL);
584 1.3.4.2 skrll
585 1.3.4.2 skrll return (0);
586 1.3.4.2 skrll }
587 1.3.4.2 skrll
588 1.3.4.2 skrll static int
589 1.3.4.2 skrll haltwo_query_devinfo(void *v, mixer_devinfo_t *dev)
590 1.3.4.2 skrll {
591 1.3.4.2 skrll
592 1.3.4.2 skrll switch (dev->index) {
593 1.3.4.2 skrll /* Mixer values */
594 1.3.4.2 skrll case HALTWO_MASTER_VOL:
595 1.3.4.2 skrll dev->type = AUDIO_MIXER_VALUE;
596 1.3.4.2 skrll dev->mixer_class = HALTWO_OUTPUT_CLASS;
597 1.3.4.2 skrll dev->prev = dev->next = AUDIO_MIXER_LAST;
598 1.3.4.2 skrll strcpy(dev->label.name, AudioNmaster);
599 1.3.4.2 skrll dev->un.v.num_channels = 2;
600 1.3.4.2 skrll strcpy(dev->un.v.units.name, AudioNvolume);
601 1.3.4.2 skrll break;
602 1.3.4.2 skrll
603 1.3.4.2 skrll /* Mixer classes */
604 1.3.4.2 skrll case HALTWO_OUTPUT_CLASS:
605 1.3.4.2 skrll dev->type = AUDIO_MIXER_CLASS;
606 1.3.4.2 skrll dev->mixer_class = HALTWO_OUTPUT_CLASS;
607 1.3.4.2 skrll dev->next = dev->prev = AUDIO_MIXER_LAST;
608 1.3.4.2 skrll strcpy(dev->label.name, AudioCoutputs);
609 1.3.4.2 skrll break;
610 1.3.4.2 skrll
611 1.3.4.2 skrll default:
612 1.3.4.2 skrll return (EINVAL);
613 1.3.4.2 skrll }
614 1.3.4.2 skrll
615 1.3.4.2 skrll return (0);
616 1.3.4.2 skrll }
617 1.3.4.2 skrll
618 1.3.4.2 skrll static int
619 1.3.4.2 skrll haltwo_alloc_dmamem(struct haltwo_softc *sc, size_t size,
620 1.3.4.2 skrll struct haltwo_dmabuf *p)
621 1.3.4.2 skrll {
622 1.3.4.2 skrll int err;
623 1.3.4.2 skrll
624 1.3.4.2 skrll p->size = size;
625 1.3.4.2 skrll
626 1.3.4.2 skrll /* XXX Check align/boundary XXX */
627 1.3.4.2 skrll /* XXX Pass flags and use them instead BUS_DMA_NOWAIT? XXX */
628 1.3.4.2 skrll err = bus_dmamem_alloc(sc->sc_dma_tag, p->size, 0, 0, p->dma_segs,
629 1.3.4.2 skrll HALTWO_MAX_DMASEGS, &p->dma_segcount, BUS_DMA_NOWAIT);
630 1.3.4.2 skrll if (err)
631 1.3.4.2 skrll goto out;
632 1.3.4.2 skrll
633 1.3.4.2 skrll /* XXX BUS_DMA_COHERENT? XXX */
634 1.3.4.2 skrll err = bus_dmamem_map(sc->sc_dma_tag, p->dma_segs, p->dma_segcount,
635 1.3.4.2 skrll p->size, &p->kern_addr, BUS_DMA_NOWAIT | BUS_DMA_COHERENT);
636 1.3.4.2 skrll if (err)
637 1.3.4.2 skrll goto out_free;
638 1.3.4.2 skrll
639 1.3.4.2 skrll /* XXX Just guessing ... XXX */
640 1.3.4.2 skrll err = bus_dmamap_create(sc->sc_dma_tag, p->size, HALTWO_MAX_DMASEGS,
641 1.3.4.2 skrll PAGE_SIZE, 0, BUS_DMA_NOWAIT, &p->dma_map);
642 1.3.4.2 skrll if (err)
643 1.3.4.2 skrll goto out_free;
644 1.3.4.2 skrll
645 1.3.4.2 skrll err = bus_dmamap_load(sc->sc_dma_tag, p->dma_map, p->kern_addr,
646 1.3.4.2 skrll p->size, NULL, BUS_DMA_NOWAIT);
647 1.3.4.2 skrll if (err)
648 1.3.4.2 skrll goto out_destroy;
649 1.3.4.2 skrll
650 1.3.4.2 skrll return 0;
651 1.3.4.2 skrll
652 1.3.4.2 skrll out_destroy:
653 1.3.4.2 skrll bus_dmamap_destroy(sc->sc_dma_tag, p->dma_map);
654 1.3.4.2 skrll out_free:
655 1.3.4.2 skrll bus_dmamem_free(sc->sc_dma_tag, p->dma_segs, p->dma_segcount);
656 1.3.4.2 skrll out:
657 1.3.4.2 skrll DPRINTF(("haltwo_alloc_dmamem failed: %d\n",err));
658 1.3.4.2 skrll
659 1.3.4.2 skrll return err;
660 1.3.4.2 skrll }
661 1.3.4.2 skrll
662 1.3.4.2 skrll static void *
663 1.3.4.2 skrll haltwo_malloc(void *v, int direction, size_t size, struct malloc_type *type,
664 1.3.4.2 skrll int flags)
665 1.3.4.2 skrll {
666 1.3.4.2 skrll struct haltwo_softc *sc = v;
667 1.3.4.2 skrll struct haltwo_dmabuf *p;
668 1.3.4.2 skrll
669 1.3.4.2 skrll DPRINTF(("haltwo_malloc size = %d\n", size));
670 1.3.4.2 skrll
671 1.3.4.2 skrll p = malloc(sizeof(struct haltwo_dmabuf), type, flags);
672 1.3.4.2 skrll if (!p)
673 1.3.4.2 skrll return 0;
674 1.3.4.2 skrll
675 1.3.4.2 skrll if (haltwo_alloc_dmamem(sc, size, p)) {
676 1.3.4.2 skrll free(p, type);
677 1.3.4.2 skrll return 0;
678 1.3.4.2 skrll }
679 1.3.4.2 skrll
680 1.3.4.2 skrll p->next = sc->sc_dma_bufs;
681 1.3.4.2 skrll sc->sc_dma_bufs = p;
682 1.3.4.2 skrll
683 1.3.4.2 skrll return p->kern_addr;
684 1.3.4.2 skrll }
685 1.3.4.2 skrll
686 1.3.4.2 skrll static void
687 1.3.4.2 skrll haltwo_free(void *v, void *addr, struct malloc_type *type)
688 1.3.4.2 skrll {
689 1.3.4.2 skrll struct haltwo_softc *sc = v;
690 1.3.4.2 skrll struct haltwo_dmabuf *p,**pp;
691 1.3.4.2 skrll
692 1.3.4.2 skrll for (pp = &sc->sc_dma_bufs; (p = *pp) != NULL; pp = &p->next) {
693 1.3.4.2 skrll if (p->kern_addr == addr) {
694 1.3.4.2 skrll *pp = p->next;
695 1.3.4.2 skrll free(p, type);
696 1.3.4.2 skrll return;
697 1.3.4.2 skrll }
698 1.3.4.2 skrll }
699 1.3.4.2 skrll
700 1.3.4.2 skrll panic("haltwo_free: buffer not in list");
701 1.3.4.2 skrll }
702 1.3.4.2 skrll
703 1.3.4.2 skrll static int
704 1.3.4.2 skrll haltwo_get_props(void *v)
705 1.3.4.2 skrll {
706 1.3.4.2 skrll
707 1.3.4.2 skrll return (0);
708 1.3.4.2 skrll }
709 1.3.4.2 skrll
710 1.3.4.2 skrll static int
711 1.3.4.2 skrll haltwo_trigger_output(void *v, void *start, void *end, int blksize,
712 1.3.4.2 skrll void (*intr)(void *), void *intrarg, struct audio_params *param)
713 1.3.4.2 skrll {
714 1.3.4.2 skrll struct haltwo_softc *sc = v;
715 1.3.4.2 skrll struct haltwo_dmabuf *p;
716 1.3.4.2 skrll uint16_t tmp;
717 1.3.4.2 skrll uint32_t ctrl;
718 1.3.4.2 skrll unsigned int fifobeg, fifoend, highwater;
719 1.3.4.2 skrll
720 1.3.4.2 skrll DPRINTF(("haltwo_trigger_output start = %p end = %p blksize = %d"
721 1.3.4.2 skrll " param = %p\n", start, end, blksize, param));
722 1.3.4.2 skrll
723 1.3.4.2 skrll for (p = sc->sc_dma_bufs; p != NULL; p = p->next)
724 1.3.4.2 skrll if (p->kern_addr == start)
725 1.3.4.2 skrll break;
726 1.3.4.2 skrll
727 1.3.4.2 skrll if (p == NULL) {
728 1.3.4.2 skrll printf("haltwo_trigger_output: buffer not in list\n");
729 1.3.4.2 skrll
730 1.3.4.2 skrll return (EINVAL);
731 1.3.4.2 skrll }
732 1.3.4.2 skrll
733 1.3.4.2 skrll /* Disable PBUS DMA */
734 1.3.4.2 skrll bus_space_write_4(sc->sc_st, sc->sc_dma_sh, HPC_PBUS_CH0_CTL,
735 1.3.4.2 skrll HPC_PBUS_DMACTL_ACT_LD);
736 1.3.4.2 skrll
737 1.3.4.2 skrll /* Disable HAL2 codec DMA */
738 1.3.4.2 skrll haltwo_read_indirect(sc, HAL2_IREG_DMA_PORT_EN, &tmp, NULL);
739 1.3.4.2 skrll haltwo_write_indirect(sc, HAL2_IREG_DMA_PORT_EN,
740 1.3.4.2 skrll tmp & ~HAL2_DMA_PORT_EN_CODECTX, 0);
741 1.3.4.2 skrll
742 1.3.4.2 skrll haltwo_setup_dma(sc, &sc->sc_dac, p, (char *)end - (char *)start,
743 1.3.4.2 skrll blksize, intr, intrarg);
744 1.3.4.2 skrll
745 1.3.4.2 skrll highwater = (param->hw_channels * 4) >> 1;
746 1.3.4.2 skrll fifobeg = 0;
747 1.3.4.2 skrll fifoend = (param->hw_channels * 8) >> 3;
748 1.3.4.2 skrll
749 1.3.4.2 skrll DPRINTF(("haltwo_trigger_output: hw_channels = %d highwater = %d"
750 1.3.4.2 skrll " fifobeg = %d fifoend = %d\n", param->hw_channels, highwater,
751 1.3.4.2 skrll fifobeg, fifoend));
752 1.3.4.2 skrll
753 1.3.4.2 skrll ctrl = HPC_PBUS_DMACTL_RT
754 1.3.4.2 skrll | HPC_PBUS_DMACTL_ACT_LD
755 1.3.4.2 skrll | (highwater << HPC_PBUS_DMACTL_HIGHWATER_SHIFT)
756 1.3.4.2 skrll | (fifobeg << HPC_PBUS_DMACTL_FIFOBEG_SHIFT)
757 1.3.4.2 skrll | (fifoend << HPC_PBUS_DMACTL_FIFOEND_SHIFT);
758 1.3.4.2 skrll
759 1.3.4.2 skrll /* Using PBUS CH0 for DAC DMA */
760 1.3.4.2 skrll haltwo_write_indirect(sc, HAL2_IREG_DMA_DRV, 1, 0);
761 1.3.4.2 skrll
762 1.3.4.2 skrll /* HAL2 is ready for action, now setup PBUS for DMA transfer */
763 1.3.4.2 skrll bus_space_write_4(sc->sc_st, sc->sc_dma_sh, HPC_PBUS_CH0_DP,
764 1.3.4.2 skrll sc->sc_dac.dma_seg.ds_addr);
765 1.3.4.2 skrll bus_space_write_4(sc->sc_st, sc->sc_dma_sh, HPC_PBUS_CH0_CTL,
766 1.3.4.2 skrll ctrl | HPC_PBUS_DMACTL_ACT);
767 1.3.4.2 skrll
768 1.3.4.2 skrll /* Both HAL2 and PBUS have been setup, now start it up */
769 1.3.4.2 skrll haltwo_read_indirect(sc, HAL2_IREG_DMA_PORT_EN, &tmp, NULL);
770 1.3.4.2 skrll haltwo_write_indirect(sc, HAL2_IREG_DMA_PORT_EN,
771 1.3.4.2 skrll tmp | HAL2_DMA_PORT_EN_CODECTX, 0);
772 1.3.4.2 skrll
773 1.3.4.2 skrll return (0);
774 1.3.4.2 skrll }
775 1.3.4.2 skrll
776 1.3.4.2 skrll static int
777 1.3.4.2 skrll haltwo_trigger_input(void *v, void *start, void *end, int blksize,
778 1.3.4.2 skrll void (*intr)(void *), void *intrarg, struct audio_params *param)
779 1.3.4.2 skrll {
780 1.3.4.2 skrll struct haltwo_softc *sc = v;
781 1.3.4.2 skrll struct haltwo_dmabuf *p;
782 1.3.4.2 skrll
783 1.3.4.2 skrll DPRINTF(("haltwo_trigger_input start = %p end = %p blksize = %d\n",
784 1.3.4.2 skrll start, end, blksize));
785 1.3.4.2 skrll
786 1.3.4.2 skrll for (p = sc->sc_dma_bufs; p != NULL; p = p->next)
787 1.3.4.2 skrll if (p->kern_addr == start)
788 1.3.4.2 skrll break;
789 1.3.4.2 skrll
790 1.3.4.2 skrll if (p == NULL) {
791 1.3.4.2 skrll printf("haltwo_trigger_input: buffer not in list\n");
792 1.3.4.2 skrll
793 1.3.4.2 skrll return (EINVAL);
794 1.3.4.2 skrll }
795 1.3.4.2 skrll
796 1.3.4.2 skrll #if 0
797 1.3.4.2 skrll haltwo_setup_dma(sc, &sc->sc_adc, p, (char *)end - (char *)start,
798 1.3.4.2 skrll blksize, intr, intrarg);
799 1.3.4.2 skrll #endif
800 1.3.4.2 skrll
801 1.3.4.2 skrll return (ENXIO);
802 1.3.4.2 skrll }
803