haltwo.c revision 1.1
1 /* $NetBSD: haltwo.c,v 1.1 2003/09/25 16:35:50 lonewolf Exp $ */ 2 3 /* 4 * Copyright (c) 2003 Ilpo Ruotsalainen 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the author may not be used to endorse or promote products 16 * derived from this software without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 * 29 * <<Id: LICENSE_GC,v 1.1 2001/10/01 23:24:05 cgd Exp>> 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: haltwo.c,v 1.1 2003/09/25 16:35:50 lonewolf Exp $"); 34 35 #include <sys/param.h> 36 #include <sys/systm.h> 37 #include <sys/device.h> 38 #include <sys/audioio.h> 39 #include <sys/malloc.h> 40 #include <dev/audio_if.h> 41 #include <dev/auconv.h> 42 #include <dev/mulaw.h> 43 44 #include <uvm/uvm_extern.h> 45 46 #include <machine/bus.h> 47 48 #include <sgimips/hpc/hpcvar.h> 49 #include <sgimips/hpc/hpcreg.h> 50 51 #include <sgimips/hpc/haltworeg.h> 52 #include <sgimips/hpc/haltwovar.h> 53 54 #ifdef AUDIO_DEBUG 55 #define DPRINTF(x) printf x 56 #else 57 #define DPRINTF(x) 58 #endif 59 60 static int haltwo_open(void *, int); 61 static void haltwo_close(void *); 62 static int haltwo_query_encoding(void *, struct audio_encoding *); 63 static int haltwo_set_params(void *, int, int, struct audio_params *, 64 struct audio_params *); 65 static int haltwo_round_blocksize(void *, int); 66 static int haltwo_halt_output(void *); 67 static int haltwo_halt_input(void *); 68 static int haltwo_getdev(void *, struct audio_device *); 69 static int haltwo_set_port(void *, mixer_ctrl_t *); 70 static int haltwo_get_port(void *, mixer_ctrl_t *); 71 static int haltwo_query_devinfo(void *, mixer_devinfo_t *); 72 static void *haltwo_malloc(void *, int, size_t, struct malloc_type *, int); 73 static void haltwo_free(void *, void *, struct malloc_type *); 74 static int haltwo_get_props(void *); 75 static int haltwo_trigger_output(void *, void *, void *, int, void (*)(void *), 76 void *, struct audio_params *); 77 static int haltwo_trigger_input(void *, void *, void *, int, void (*)(void *), 78 void *, struct audio_params *); 79 80 static struct audio_hw_if haltwo_hw_if = { 81 haltwo_open, 82 haltwo_close, 83 NULL, /* drain */ 84 haltwo_query_encoding, 85 haltwo_set_params, 86 haltwo_round_blocksize, 87 NULL, /* commit_settings */ 88 NULL, /* init_output */ 89 NULL, /* init_input */ 90 NULL, /* start_output */ 91 NULL, /* start_input */ 92 haltwo_halt_output, 93 haltwo_halt_input, 94 NULL, /* speaker_ctl */ 95 haltwo_getdev, 96 NULL, /* setfd */ 97 haltwo_set_port, 98 haltwo_get_port, 99 haltwo_query_devinfo, 100 haltwo_malloc, 101 haltwo_free, 102 NULL, /* round_buffersize */ 103 NULL, /* mappage */ 104 haltwo_get_props, 105 haltwo_trigger_output, 106 haltwo_trigger_input, 107 NULL /* dev_ioctl */ 108 }; 109 110 static const struct audio_device haltwo_device = { 111 "HAL2", 112 "", 113 "haltwo" 114 }; 115 116 static int haltwo_match(struct device *, struct cfdata *, void *); 117 static void haltwo_attach(struct device *, struct device *, void *); 118 static int haltwo_intr(void *); 119 120 CFATTACH_DECL(haltwo, sizeof(struct haltwo_softc), 121 haltwo_match, haltwo_attach, NULL, NULL); 122 123 #define haltwo_write(sc,type,off,val) \ 124 bus_space_write_4(sc->sc_st, sc->sc_##type##_sh, off, val) 125 126 #define haltwo_read(sc,type,off) \ 127 bus_space_read_4(sc->sc_st, sc->sc_##type##_sh, off) 128 129 static void 130 haltwo_write_indirect(struct haltwo_softc *sc, uint32_t ireg, uint16_t low, 131 uint16_t high) 132 { 133 haltwo_write(sc, ctl, HAL2_REG_CTL_IDR0, low); 134 haltwo_write(sc, ctl, HAL2_REG_CTL_IDR1, high); 135 haltwo_write(sc, ctl, HAL2_REG_CTL_IDR2, 0); 136 haltwo_write(sc, ctl, HAL2_REG_CTL_IDR3, 0); 137 haltwo_write(sc, ctl, HAL2_REG_CTL_IAR, ireg); 138 139 while (haltwo_read(sc, ctl, HAL2_REG_CTL_ISR) & HAL2_ISR_TSTATUS) 140 ; 141 } 142 143 static void 144 haltwo_read_indirect(struct haltwo_softc *sc, uint32_t ireg, uint16_t *low, 145 uint16_t *high) 146 { 147 haltwo_write(sc, ctl, HAL2_REG_CTL_IAR, 148 ireg | HAL2_IAR_READ); 149 150 while (haltwo_read(sc, ctl, HAL2_REG_CTL_ISR) & HAL2_ISR_TSTATUS) 151 ; 152 153 if (low) 154 *low = haltwo_read(sc, ctl, HAL2_REG_CTL_IDR0); 155 156 if (high) 157 *high = haltwo_read(sc, ctl, HAL2_REG_CTL_IDR1); 158 } 159 160 static int 161 haltwo_init_codec(struct haltwo_softc *sc, struct haltwo_codec *codec) 162 { 163 int err; 164 int rseg; 165 size_t allocsz = sizeof(struct hpc_dma_desc) * HALTWO_MAX_DMASEGS; 166 167 KASSERT(allocsz <= PAGE_SIZE); 168 169 err = bus_dmamem_alloc(sc->sc_dma_tag, allocsz, 0, 0, &codec->dma_seg, 170 1, &rseg, BUS_DMA_NOWAIT); 171 if (err) 172 goto out; 173 174 err = bus_dmamem_map(sc->sc_dma_tag, &codec->dma_seg, rseg, allocsz, 175 (caddr_t *)&codec->dma_descs, BUS_DMA_NOWAIT); 176 if (err) 177 goto out_free; 178 179 err = bus_dmamap_create(sc->sc_dma_tag, allocsz, 1, PAGE_SIZE, 0, 180 BUS_DMA_NOWAIT, &codec->dma_map); 181 if (err) 182 goto out_free; 183 184 err = bus_dmamap_load(sc->sc_dma_tag, codec->dma_map, codec->dma_descs, 185 allocsz, NULL, BUS_DMA_NOWAIT); 186 if (err) 187 goto out_destroy; 188 189 DPRINTF(("haltwo_init_codec: allocated %d descriptors (%d bytes)" 190 " at %p\n", HALTWO_MAX_DMASEGS, allocsz, codec->dma_descs)); 191 192 memset(codec->dma_descs, 0, allocsz); 193 194 return (0); 195 196 out_destroy: 197 bus_dmamap_destroy(sc->sc_dma_tag, codec->dma_map); 198 out_free: 199 bus_dmamem_free(sc->sc_dma_tag, &codec->dma_seg, rseg); 200 out: 201 DPRINTF(("haltwo_init_codec failed: %d\n",err)); 202 203 return (err); 204 } 205 206 static void 207 haltwo_setup_dma(struct haltwo_softc *sc, struct haltwo_codec *codec, 208 struct haltwo_dmabuf *dmabuf, size_t len, int blksize, 209 void (*intr)(void *), void *intrarg) 210 { 211 int i; 212 bus_dma_segment_t *segp; 213 struct hpc_dma_desc *descp; 214 int next_intr = blksize; 215 216 KASSERT(len % blksize == 0); 217 218 codec->intr = intr; 219 codec->intr_arg = intrarg; 220 221 segp = dmabuf->dma_map->dm_segs; 222 descp = codec->dma_descs; 223 224 /* Build descriptor chain for looping DMA, triggering interrupt every 225 * blksize bytes */ 226 for (i = 0; i < dmabuf->dma_map->dm_nsegs; i++) { 227 descp->hdd_bufptr = segp->ds_addr; 228 descp->hdd_ctl = segp->ds_len; 229 230 KASSERT(next_intr >= segp->ds_len); 231 232 if (next_intr == segp->ds_len) { 233 /* Generate intr after this DMA buffer */ 234 descp->hdd_ctl |= HDD_CTL_INTR; 235 next_intr = blksize; 236 } 237 else 238 next_intr -= segp->ds_len; 239 240 if (i < dmabuf->dma_map->dm_nsegs - 1) 241 descp->hdd_descptr = codec->dma_seg.ds_addr + 242 sizeof(struct hpc_dma_desc) * (i + 1); 243 else 244 descp->hdd_descptr = codec->dma_seg.ds_addr; 245 246 DPRINTF(("haltwo_setup_dma: hdd_bufptr = %x hdd_ctl = %x" 247 " hdd_descptr = %x\n", descp->hdd_bufptr, descp->hdd_ctl, 248 descp->hdd_descptr)); 249 250 segp++; 251 descp++; 252 } 253 254 bus_dmamap_sync(sc->sc_dma_tag, codec->dma_map, 0, 255 codec->dma_map->dm_mapsize, BUS_DMASYNC_PREWRITE); 256 } 257 258 static int 259 haltwo_match(struct device *parent, struct cfdata *cf, void *aux) 260 { 261 struct hpc_attach_args *haa = aux; 262 263 if (strcmp(haa->ha_name, cf->cf_name) == 0) 264 return (1); 265 266 return (0); 267 } 268 269 static void 270 haltwo_attach(struct device *parent, struct device *self, void *aux) 271 { 272 struct haltwo_softc *sc = (void *)self; 273 struct hpc_attach_args *haa = aux; 274 uint32_t rev; 275 276 sc->sc_st = haa->ha_st; 277 sc->sc_dma_tag = haa->ha_dmat; 278 279 if (bus_space_subregion(haa->ha_st, haa->ha_sh, haa->ha_devoff, 280 HPC_PBUS_CH0_DEVREGS_SIZE, &sc->sc_ctl_sh)) { 281 aprint_error(": unable to map control registers\n"); 282 return; 283 } 284 285 if (bus_space_subregion(haa->ha_st, haa->ha_sh, HPC_PBUS_CH2_DEVREGS, 286 HPC_PBUS_CH2_DEVREGS_SIZE, &sc->sc_vol_sh)) { 287 aprint_error(": unable to map volume registers\n"); 288 return; 289 } 290 291 if (bus_space_subregion(haa->ha_st, haa->ha_sh, haa->ha_dmaoff, 292 HPC_PBUS_DMAREGS_SIZE, &sc->sc_dma_sh)) { 293 aprint_error(": unable to map DMA registers\n"); 294 return; 295 } 296 297 haltwo_write(sc, ctl, HAL2_REG_CTL_ISR, 0); 298 haltwo_write(sc, ctl, HAL2_REG_CTL_ISR, 299 HAL2_ISR_GLOBAL_RESET_N | HAL2_ISR_CODEC_RESET_N); 300 haltwo_write_indirect(sc, HAL2_IREG_RELAY_C, HAL2_RELAY_C_STATE, 0); 301 302 rev = haltwo_read(sc, ctl, HAL2_REG_CTL_REV); 303 304 /* This bit is inverted, the test is correct */ 305 if (rev & HAL2_REV_AUDIO_PRESENT_N) { 306 aprint_error(": Audio hardware not present (revision %x)\n", 307 rev); 308 return; 309 } 310 311 if (cpu_intr_establish(haa->ha_irq, IPL_AUDIO, haltwo_intr, sc) 312 == NULL) { 313 aprint_error(": unable to establish interrupt\n"); 314 return; 315 } 316 317 aprint_naive(": Audio controller\n"); 318 319 aprint_normal(": HAL2 revision %d.%d.%d\n", (rev & 0x7000) >> 12, 320 (rev & 0x00F0) >> 4, rev & 0x000F); 321 322 if (haltwo_init_codec(sc, &sc->sc_dac)) { 323 aprint_error( 324 "haltwo_attach: unable to create DMA descriptor list\n"); 325 return; 326 } 327 328 /* XXX Magic PBUS CFGDMA values from Linux HAL2 driver XXX */ 329 bus_space_write_4(haa->ha_st, haa->ha_sh, HPC_PBUS_CH0_CFGDMA, 330 0x8208844); 331 bus_space_write_4(haa->ha_st, haa->ha_sh, HPC_PBUS_CH1_CFGDMA, 332 0x8208844); 333 334 /* Unmute output */ 335 /* XXX Add mute/unmute support to mixer ops? XXX */ 336 haltwo_write_indirect(sc, HAL2_IREG_DAC_C2, 0, 0); 337 338 /* Set master volume to zero */ 339 sc->sc_vol_left = sc->sc_vol_right = 0; 340 haltwo_write(sc, vol, HAL2_REG_VOL_LEFT, sc->sc_vol_left); 341 haltwo_write(sc, vol, HAL2_REG_VOL_RIGHT, sc->sc_vol_right); 342 343 audio_attach_mi(&haltwo_hw_if, sc, &sc->sc_dev); 344 } 345 346 static int 347 haltwo_intr(void *v) 348 { 349 struct haltwo_softc *sc = v; 350 int ret = 0; 351 352 if (bus_space_read_4(sc->sc_st, sc->sc_dma_sh, HPC_PBUS_CH0_CTL) 353 & HPC_PBUS_DMACTL_IRQ) { 354 sc->sc_dac.intr(sc->sc_dac.intr_arg); 355 356 ret = 1; 357 } 358 else 359 DPRINTF(("haltwo_intr: Huh?\n")); 360 361 return (ret); 362 } 363 364 static int 365 haltwo_open(void *v, int flags) 366 { 367 DPRINTF(("haltwo_open flags = %x\n", flags)); 368 369 return (0); 370 } 371 372 static void 373 haltwo_close(void *v) 374 { 375 } 376 377 static int 378 haltwo_query_encoding(void *v, struct audio_encoding *e) 379 { 380 switch (e->index) { 381 case 0: 382 strcpy(e->name, AudioEslinear_le); 383 e->encoding = AUDIO_ENCODING_SLINEAR_LE; 384 e->precision = 16; 385 e->flags = 0; 386 break; 387 388 case 1: 389 strcpy(e->name, AudioEslinear_be); 390 e->encoding = AUDIO_ENCODING_SLINEAR_BE; 391 e->precision = 16; 392 e->flags = 0; 393 break; 394 395 case 2: 396 strcpy(e->name, AudioEmulaw); 397 e->encoding = AUDIO_ENCODING_ULAW; 398 e->precision = 8; 399 e->flags = AUDIO_ENCODINGFLAG_EMULATED; 400 break; 401 402 default: 403 return (EINVAL); 404 } 405 406 return (0); 407 } 408 409 static int 410 haltwo_set_params(void *v, int setmode, int usemode, struct audio_params *play, 411 struct audio_params *rec) 412 { 413 struct haltwo_softc *sc = v; 414 int master, inc, mod; 415 uint16_t tmp; 416 417 if (play->hw_sample_rate < 4000) 418 play->hw_sample_rate = 4000; 419 if (play->hw_sample_rate > 48000) 420 play->hw_sample_rate = 48000; 421 422 play->sw_code = NULL; 423 play->factor = 1; 424 play->factor_denom = 1; 425 426 switch (play->encoding) { 427 case AUDIO_ENCODING_ULAW: 428 if (play->precision != 8) 429 return (EINVAL); 430 431 play->sw_code = mulaw_to_slinear16_le; 432 play->factor = 2; 433 play->hw_encoding = AUDIO_ENCODING_SLINEAR_LE; 434 break; 435 case AUDIO_ENCODING_SLINEAR_BE: 436 case AUDIO_ENCODING_SLINEAR_LE: 437 break; 438 439 default: 440 return (EINVAL); 441 } 442 443 if (44100 % play->hw_sample_rate < 48000 % play->hw_sample_rate) 444 master = 44100; 445 else 446 master = 48000; 447 448 /* HAL2 specification 3.1.2.21: Codecs should be driven with INC/MOD 449 * fractions equivalent to 4/N, where N is a positive integer. */ 450 inc = 4; 451 mod = master * inc / play->hw_sample_rate; 452 453 /* Fixup upper layers idea of HW sample rate to the actual final rate */ 454 play->hw_sample_rate = master * inc / mod; 455 456 DPRINTF(("haltwo_set_params: master = %d inc = %d mod = %d" 457 " hw_sample_rate = %ld\n", master, inc, mod, 458 play->hw_sample_rate)); 459 460 /* Setup samplerate to HW */ 461 haltwo_write_indirect(sc, HAL2_IREG_BRES1_C1, 462 master == 44100 ? 1 : 0, 0); 463 /* XXX Documentation disagrees but this seems to work XXX */ 464 haltwo_write_indirect(sc, HAL2_IREG_BRES1_C2, 465 inc, 0xFFFF & (inc - mod - 1)); 466 467 /* Setup endianness to HW */ 468 haltwo_read_indirect(sc, HAL2_IREG_DMA_END, &tmp, NULL); 469 if (play->hw_encoding == AUDIO_ENCODING_SLINEAR_LE) 470 tmp |= HAL2_DMA_END_CODECTX; 471 else 472 tmp &= ~HAL2_DMA_END_CODECTX; 473 haltwo_write_indirect(sc, HAL2_IREG_DMA_END, tmp, 0); 474 475 /* Set PBUS channel, Bresenham clock source, number of channels to HW */ 476 haltwo_write_indirect(sc, HAL2_IREG_DAC_C1, 477 (0 << HAL2_C1_DMA_SHIFT) | 478 (1 << HAL2_C1_CLKID_SHIFT) | 479 (play->hw_channels << HAL2_C1_DATAT_SHIFT), 0); 480 481 DPRINTF(("haltwo_set_params: hw_encoding = %d hw_channels = %d\n", 482 play->hw_encoding, play->hw_channels)); 483 484 return (0); 485 } 486 487 static int 488 haltwo_round_blocksize(void *v,int blocksize) 489 { 490 /* XXX Make this smarter and support DMA descriptor chaining XXX */ 491 /* XXX Rounding to nearest PAGE_SIZE might work? XXX */ 492 return PAGE_SIZE; 493 } 494 495 static int 496 haltwo_halt_output(void *v) 497 { 498 struct haltwo_softc *sc = v; 499 500 /* Disable PBUS DMA */ 501 bus_space_write_4(sc->sc_st, sc->sc_dma_sh, HPC_PBUS_CH0_CTL, 502 HPC_PBUS_DMACTL_ACT_LD); 503 504 return (0); 505 } 506 507 static int 508 haltwo_halt_input(void *v) 509 { 510 return (ENXIO); 511 } 512 513 static int 514 haltwo_getdev(void *v, struct audio_device *dev) 515 { 516 *dev = haltwo_device; 517 518 return (0); 519 } 520 521 static int 522 haltwo_set_port(void *v, mixer_ctrl_t *mc) 523 { 524 struct haltwo_softc *sc = v; 525 int lval, rval; 526 527 if (mc->type != AUDIO_MIXER_VALUE) 528 return (EINVAL); 529 530 if (mc->un.value.num_channels == 1) 531 lval = rval = mc->un.value.level[AUDIO_MIXER_LEVEL_MONO]; 532 else if (mc->un.value.num_channels == 2) { 533 lval = mc->un.value.level[AUDIO_MIXER_LEVEL_LEFT]; 534 rval = mc->un.value.level[AUDIO_MIXER_LEVEL_RIGHT]; 535 } else 536 return (EINVAL); 537 538 switch (mc->dev) { 539 case HALTWO_MASTER_VOL: 540 sc->sc_vol_left = lval; 541 sc->sc_vol_right = rval; 542 543 haltwo_write(sc, vol, HAL2_REG_VOL_LEFT, 544 sc->sc_vol_left); 545 haltwo_write(sc, vol, HAL2_REG_VOL_RIGHT, 546 sc->sc_vol_right); 547 break; 548 549 default: 550 return (EINVAL); 551 } 552 553 return (0); 554 } 555 556 static int 557 haltwo_get_port(void *v, mixer_ctrl_t *mc) 558 { 559 struct haltwo_softc *sc = v; 560 int l, r; 561 562 switch (mc->dev) { 563 case HALTWO_MASTER_VOL: 564 l = sc->sc_vol_left; 565 r = sc->sc_vol_right; 566 break; 567 568 default: 569 return (EINVAL); 570 } 571 572 if (mc->un.value.num_channels == 1) 573 mc->un.value.level[AUDIO_MIXER_LEVEL_MONO] = (l+r) / 2; 574 else if (mc->un.value.num_channels == 2) { 575 mc->un.value.level[AUDIO_MIXER_LEVEL_LEFT] = l; 576 mc->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] = r; 577 } else 578 return (EINVAL); 579 580 return (0); 581 } 582 583 static int 584 haltwo_query_devinfo(void *v, mixer_devinfo_t *dev) 585 { 586 switch (dev->index) { 587 /* Mixer values */ 588 case HALTWO_MASTER_VOL: 589 dev->type = AUDIO_MIXER_VALUE; 590 dev->mixer_class = HALTWO_OUTPUT_CLASS; 591 dev->prev = dev->next = AUDIO_MIXER_LAST; 592 strcpy(dev->label.name, AudioNmaster); 593 dev->un.v.num_channels = 2; 594 strcpy(dev->un.v.units.name, AudioNvolume); 595 break; 596 597 /* Mixer classes */ 598 case HALTWO_OUTPUT_CLASS: 599 dev->type = AUDIO_MIXER_CLASS; 600 dev->mixer_class = HALTWO_OUTPUT_CLASS; 601 dev->next = dev->prev = AUDIO_MIXER_LAST; 602 strcpy(dev->label.name, AudioCoutputs); 603 break; 604 605 default: 606 return (EINVAL); 607 } 608 609 return (0); 610 } 611 612 static int 613 haltwo_alloc_dmamem(struct haltwo_softc *sc, size_t size, 614 struct haltwo_dmabuf *p) 615 { 616 int err; 617 618 p->size = size; 619 620 /* XXX Check align/boundary XXX */ 621 /* XXX Pass flags and use them instead BUS_DMA_NOWAIT? XXX */ 622 err = bus_dmamem_alloc(sc->sc_dma_tag, p->size, 0, 0, p->dma_segs, 623 HALTWO_MAX_DMASEGS, &p->dma_segcount, BUS_DMA_NOWAIT); 624 if (err) 625 goto out; 626 627 /* XXX BUS_DMA_COHERENT? XXX */ 628 err = bus_dmamem_map(sc->sc_dma_tag, p->dma_segs, p->dma_segcount, 629 p->size, &p->kern_addr, BUS_DMA_NOWAIT | BUS_DMA_COHERENT); 630 if (err) 631 goto out_free; 632 633 /* XXX Just guessing ... XXX */ 634 err = bus_dmamap_create(sc->sc_dma_tag, p->size, HALTWO_MAX_DMASEGS, 635 PAGE_SIZE, 0, BUS_DMA_NOWAIT, &p->dma_map); 636 if (err) 637 goto out_free; 638 639 err = bus_dmamap_load(sc->sc_dma_tag, p->dma_map, p->kern_addr, 640 p->size, NULL, BUS_DMA_NOWAIT); 641 if (err) 642 goto out_destroy; 643 644 return 0; 645 646 out_destroy: 647 bus_dmamap_destroy(sc->sc_dma_tag, p->dma_map); 648 out_free: 649 bus_dmamem_free(sc->sc_dma_tag, p->dma_segs, p->dma_segcount); 650 out: 651 DPRINTF(("haltwo_alloc_dmamem failed: %d\n",err)); 652 653 return err; 654 } 655 656 static void * 657 haltwo_malloc(void *v, int direction, size_t size, struct malloc_type *type, 658 int flags) 659 { 660 struct haltwo_softc *sc = v; 661 struct haltwo_dmabuf *p; 662 663 DPRINTF(("haltwo_malloc size = %d\n", size)); 664 665 p = malloc(sizeof(struct haltwo_dmabuf), type, flags); 666 if (!p) 667 return 0; 668 669 if (haltwo_alloc_dmamem(sc, size, p)) { 670 free(p, type); 671 return 0; 672 } 673 674 p->next = sc->sc_dma_bufs; 675 sc->sc_dma_bufs = p; 676 677 return p->kern_addr; 678 } 679 680 static void 681 haltwo_free(void *v, void *addr, struct malloc_type *type) 682 { 683 struct haltwo_softc *sc = v; 684 struct haltwo_dmabuf *p,**pp; 685 686 for (pp = &sc->sc_dma_bufs; (p = *pp) != NULL; pp = &p->next) { 687 if (p->kern_addr == addr) { 688 *pp = p->next; 689 free(p, type); 690 return; 691 } 692 } 693 694 panic("haltwo_free: buffer not in list"); 695 } 696 697 static int 698 haltwo_get_props(void *v) 699 { 700 return (0); 701 } 702 703 static int 704 haltwo_trigger_output(void *v, void *start, void *end, int blksize, 705 void (*intr)(void *), void *intrarg, struct audio_params *param) 706 { 707 struct haltwo_softc *sc = v; 708 struct haltwo_dmabuf *p; 709 uint16_t tmp; 710 uint32_t ctrl; 711 unsigned int fifobeg, fifoend, highwater; 712 713 DPRINTF(("haltwo_trigger_output start = %p end = %p blksize = %d" 714 " param = %p\n", start, end, blksize, param)); 715 716 for (p = sc->sc_dma_bufs; p != NULL; p = p->next) 717 if (p->kern_addr == start) 718 break; 719 720 if (p == NULL) { 721 printf("haltwo_trigger_output: buffer not in list\n"); 722 723 return (EINVAL); 724 } 725 726 /* Disable PBUS DMA */ 727 bus_space_write_4(sc->sc_st, sc->sc_dma_sh, HPC_PBUS_CH0_CTL, 728 HPC_PBUS_DMACTL_ACT_LD); 729 730 /* Disable HAL2 codec DMA */ 731 haltwo_read_indirect(sc, HAL2_IREG_DMA_PORT_EN, &tmp, NULL); 732 haltwo_write_indirect(sc, HAL2_IREG_DMA_PORT_EN, 733 tmp & ~HAL2_DMA_PORT_EN_CODECTX, 0); 734 735 haltwo_setup_dma(sc, &sc->sc_dac, p, (char *)end - (char *)start, 736 blksize, intr, intrarg); 737 738 highwater = (param->hw_channels * 4) >> 1; 739 fifobeg = 0; 740 fifoend = (param->hw_channels * 8) >> 3; 741 742 DPRINTF(("haltwo_trigger_output: hw_channels = %d highwater = %d" 743 " fifobeg = %d fifoend = %d\n", param->hw_channels, highwater, 744 fifobeg, fifoend)); 745 746 ctrl = HPC_PBUS_DMACTL_RT 747 | HPC_PBUS_DMACTL_ACT_LD 748 | (highwater << HPC_PBUS_DMACTL_HIGHWATER_SHIFT) 749 | (fifobeg << HPC_PBUS_DMACTL_FIFOBEG_SHIFT) 750 | (fifoend << HPC_PBUS_DMACTL_FIFOEND_SHIFT); 751 752 /* Using PBUS CH0 for DAC DMA */ 753 haltwo_write_indirect(sc, HAL2_IREG_DMA_DRV, 1, 0); 754 755 /* HAL2 is ready for action, now setup PBUS for DMA transfer */ 756 bus_space_write_4(sc->sc_st, sc->sc_dma_sh, HPC_PBUS_CH0_DP, 757 sc->sc_dac.dma_seg.ds_addr); 758 bus_space_write_4(sc->sc_st, sc->sc_dma_sh, HPC_PBUS_CH0_CTL, 759 ctrl | HPC_PBUS_DMACTL_ACT); 760 761 /* Both HAL2 and PBUS have been setup, now start it up */ 762 haltwo_read_indirect(sc, HAL2_IREG_DMA_PORT_EN, &tmp, NULL); 763 haltwo_write_indirect(sc, HAL2_IREG_DMA_PORT_EN, 764 tmp | HAL2_DMA_PORT_EN_CODECTX, 0); 765 766 return (0); 767 } 768 769 static int 770 haltwo_trigger_input(void *v, void *start, void *end, int blksize, 771 void (*intr)(void *), void *intrarg, struct audio_params *param) 772 { 773 struct haltwo_softc *sc = v; 774 struct haltwo_dmabuf *p; 775 776 DPRINTF(("haltwo_trigger_input start = %p end = %p blksize = %d\n", 777 start, end, blksize)); 778 779 for (p = sc->sc_dma_bufs; p != NULL; p = p->next) 780 if (p->kern_addr == start) 781 break; 782 783 if (p == NULL) { 784 printf("haltwo_trigger_input: buffer not in list\n"); 785 786 return (EINVAL); 787 } 788 789 #if 0 790 haltwo_setup_dma(sc, &sc->sc_adc, p, (char *)end - (char *)start, 791 blksize, intr, intrarg); 792 #endif 793 794 return (ENXIO); 795 } 796
Indexes created Sun Sep 28 16:09:52 GMT 2025