haltwo.c revision 1.6
1 /* $NetBSD: haltwo.c,v 1.6 2005/01/10 22:01:36 kent Exp $ */ 2 3 /* 4 * Copyright (c) 2003 Ilpo Ruotsalainen 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the author may not be used to endorse or promote products 16 * derived from this software without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 * 29 * <<Id: LICENSE_GC,v 1.1 2001/10/01 23:24:05 cgd Exp>> 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: haltwo.c,v 1.6 2005/01/10 22:01:36 kent Exp $"); 34 35 #include <sys/param.h> 36 #include <sys/systm.h> 37 #include <sys/device.h> 38 #include <sys/audioio.h> 39 #include <sys/malloc.h> 40 #include <dev/audio_if.h> 41 #include <dev/auconv.h> 42 #include <dev/mulaw.h> 43 44 #include <uvm/uvm_extern.h> 45 46 #include <machine/bus.h> 47 48 #include <sgimips/hpc/hpcvar.h> 49 #include <sgimips/hpc/hpcreg.h> 50 51 #include <sgimips/hpc/haltworeg.h> 52 #include <sgimips/hpc/haltwovar.h> 53 54 #ifdef AUDIO_DEBUG 55 #define DPRINTF(x) printf x 56 #else 57 #define DPRINTF(x) 58 #endif 59 60 static int haltwo_query_encoding(void *, struct audio_encoding *); 61 static int haltwo_set_params(void *, int, int, audio_params_t *, 62 audio_params_t *, stream_filter_list_t *, stream_filter_list_t *); 63 static int haltwo_round_blocksize(void *, int, int, const audio_params_t *); 64 static int haltwo_halt_output(void *); 65 static int haltwo_halt_input(void *); 66 static int haltwo_getdev(void *, struct audio_device *); 67 static int haltwo_set_port(void *, mixer_ctrl_t *); 68 static int haltwo_get_port(void *, mixer_ctrl_t *); 69 static int haltwo_query_devinfo(void *, mixer_devinfo_t *); 70 static void *haltwo_malloc(void *, int, size_t, struct malloc_type *, int); 71 static void haltwo_free(void *, void *, struct malloc_type *); 72 static int haltwo_get_props(void *); 73 static int haltwo_trigger_output(void *, void *, void *, int, void (*)(void *), 74 void *, const audio_params_t *); 75 static int haltwo_trigger_input(void *, void *, void *, int, void (*)(void *), 76 void *, const audio_params_t *); 77 78 static const struct audio_hw_if haltwo_hw_if = { 79 NULL, /* open */ 80 NULL, /* close */ 81 NULL, /* drain */ 82 haltwo_query_encoding, 83 haltwo_set_params, 84 haltwo_round_blocksize, 85 NULL, /* commit_settings */ 86 NULL, /* init_output */ 87 NULL, /* init_input */ 88 NULL, /* start_output */ 89 NULL, /* start_input */ 90 haltwo_halt_output, 91 haltwo_halt_input, 92 NULL, /* speaker_ctl */ 93 haltwo_getdev, 94 NULL, /* setfd */ 95 haltwo_set_port, 96 haltwo_get_port, 97 haltwo_query_devinfo, 98 haltwo_malloc, 99 haltwo_free, 100 NULL, /* round_buffersize */ 101 NULL, /* mappage */ 102 haltwo_get_props, 103 haltwo_trigger_output, 104 haltwo_trigger_input, 105 NULL /* dev_ioctl */ 106 }; 107 108 static const struct audio_device haltwo_device = { 109 "HAL2", 110 "", 111 "haltwo" 112 }; 113 114 static int haltwo_match(struct device *, struct cfdata *, void *); 115 static void haltwo_attach(struct device *, struct device *, void *); 116 static int haltwo_intr(void *); 117 118 CFATTACH_DECL(haltwo, sizeof(struct haltwo_softc), 119 haltwo_match, haltwo_attach, NULL, NULL); 120 121 #define haltwo_write(sc,type,off,val) \ 122 bus_space_write_4(sc->sc_st, sc->sc_##type##_sh, off, val) 123 124 #define haltwo_read(sc,type,off) \ 125 bus_space_read_4(sc->sc_st, sc->sc_##type##_sh, off) 126 127 static void 128 haltwo_write_indirect(struct haltwo_softc *sc, uint32_t ireg, uint16_t low, 129 uint16_t high) 130 { 131 132 haltwo_write(sc, ctl, HAL2_REG_CTL_IDR0, low); 133 haltwo_write(sc, ctl, HAL2_REG_CTL_IDR1, high); 134 haltwo_write(sc, ctl, HAL2_REG_CTL_IDR2, 0); 135 haltwo_write(sc, ctl, HAL2_REG_CTL_IDR3, 0); 136 haltwo_write(sc, ctl, HAL2_REG_CTL_IAR, ireg); 137 138 while (haltwo_read(sc, ctl, HAL2_REG_CTL_ISR) & HAL2_ISR_TSTATUS) 139 ; 140 } 141 142 static void 143 haltwo_read_indirect(struct haltwo_softc *sc, uint32_t ireg, uint16_t *low, 144 uint16_t *high) 145 { 146 147 haltwo_write(sc, ctl, HAL2_REG_CTL_IAR, 148 ireg | HAL2_IAR_READ); 149 150 while (haltwo_read(sc, ctl, HAL2_REG_CTL_ISR) & HAL2_ISR_TSTATUS) 151 ; 152 153 if (low) 154 *low = haltwo_read(sc, ctl, HAL2_REG_CTL_IDR0); 155 156 if (high) 157 *high = haltwo_read(sc, ctl, HAL2_REG_CTL_IDR1); 158 } 159 160 static int 161 haltwo_init_codec(struct haltwo_softc *sc, struct haltwo_codec *codec) 162 { 163 int err; 164 int rseg; 165 size_t allocsz = sizeof(struct hpc_dma_desc) * HALTWO_MAX_DMASEGS; 166 167 KASSERT(allocsz <= PAGE_SIZE); 168 169 err = bus_dmamem_alloc(sc->sc_dma_tag, allocsz, 0, 0, &codec->dma_seg, 170 1, &rseg, BUS_DMA_NOWAIT); 171 if (err) 172 goto out; 173 174 err = bus_dmamem_map(sc->sc_dma_tag, &codec->dma_seg, rseg, allocsz, 175 (caddr_t *)&codec->dma_descs, BUS_DMA_NOWAIT); 176 if (err) 177 goto out_free; 178 179 err = bus_dmamap_create(sc->sc_dma_tag, allocsz, 1, PAGE_SIZE, 0, 180 BUS_DMA_NOWAIT, &codec->dma_map); 181 if (err) 182 goto out_free; 183 184 err = bus_dmamap_load(sc->sc_dma_tag, codec->dma_map, codec->dma_descs, 185 allocsz, NULL, BUS_DMA_NOWAIT); 186 if (err) 187 goto out_destroy; 188 189 DPRINTF(("haltwo_init_codec: allocated %d descriptors (%d bytes)" 190 " at %p\n", HALTWO_MAX_DMASEGS, allocsz, codec->dma_descs)); 191 192 memset(codec->dma_descs, 0, allocsz); 193 194 return (0); 195 196 out_destroy: 197 bus_dmamap_destroy(sc->sc_dma_tag, codec->dma_map); 198 out_free: 199 bus_dmamem_free(sc->sc_dma_tag, &codec->dma_seg, rseg); 200 out: 201 DPRINTF(("haltwo_init_codec failed: %d\n",err)); 202 203 return (err); 204 } 205 206 static void 207 haltwo_setup_dma(struct haltwo_softc *sc, struct haltwo_codec *codec, 208 struct haltwo_dmabuf *dmabuf, size_t len, int blksize, 209 void (*intr)(void *), void *intrarg) 210 { 211 int i; 212 bus_dma_segment_t *segp; 213 struct hpc_dma_desc *descp; 214 int next_intr = blksize; 215 216 KASSERT(len % blksize == 0); 217 218 codec->intr = intr; 219 codec->intr_arg = intrarg; 220 221 segp = dmabuf->dma_map->dm_segs; 222 descp = codec->dma_descs; 223 224 /* Build descriptor chain for looping DMA, triggering interrupt every 225 * blksize bytes */ 226 for (i = 0; i < dmabuf->dma_map->dm_nsegs; i++) { 227 descp->hpc3_hdd_bufptr = segp->ds_addr; 228 descp->hpc3_hdd_ctl = segp->ds_len; 229 230 KASSERT(next_intr >= segp->ds_len); 231 232 if (next_intr == segp->ds_len) { 233 /* Generate intr after this DMA buffer */ 234 descp->hpc3_hdd_ctl |= HPC3_HDD_CTL_INTR; 235 next_intr = blksize; 236 } else 237 next_intr -= segp->ds_len; 238 239 if (i < dmabuf->dma_map->dm_nsegs - 1) 240 descp->hdd_descptr = codec->dma_seg.ds_addr + 241 sizeof(struct hpc_dma_desc) * (i + 1); 242 else 243 descp->hdd_descptr = codec->dma_seg.ds_addr; 244 245 DPRINTF(("haltwo_setup_dma: hdd_bufptr = %x hdd_ctl = %x" 246 " hdd_descptr = %x\n", descp->hpc3_hdd_bufptr, 247 descp->hpc3_hdd_ctl, descp->hdd_descptr)); 248 249 segp++; 250 descp++; 251 } 252 253 bus_dmamap_sync(sc->sc_dma_tag, codec->dma_map, 0, 254 codec->dma_map->dm_mapsize, BUS_DMASYNC_PREWRITE); 255 } 256 257 static int 258 haltwo_match(struct device *parent, struct cfdata *cf, void *aux) 259 { 260 struct hpc_attach_args *haa = aux; 261 262 if (strcmp(haa->ha_name, cf->cf_name) == 0) 263 return (1); 264 265 return (0); 266 } 267 268 static void 269 haltwo_attach(struct device *parent, struct device *self, void *aux) 270 { 271 struct haltwo_softc *sc = (void *)self; 272 struct hpc_attach_args *haa = aux; 273 uint32_t rev; 274 275 sc->sc_st = haa->ha_st; 276 sc->sc_dma_tag = haa->ha_dmat; 277 278 if (bus_space_subregion(haa->ha_st, haa->ha_sh, haa->ha_devoff, 279 HPC3_PBUS_CH0_DEVREGS_SIZE, &sc->sc_ctl_sh)) { 280 aprint_error(": unable to map control registers\n"); 281 return; 282 } 283 284 if (bus_space_subregion(haa->ha_st, haa->ha_sh, HPC3_PBUS_CH2_DEVREGS, 285 HPC3_PBUS_CH2_DEVREGS_SIZE, &sc->sc_vol_sh)) { 286 aprint_error(": unable to map volume registers\n"); 287 return; 288 } 289 290 if (bus_space_subregion(haa->ha_st, haa->ha_sh, haa->ha_dmaoff, 291 HPC3_PBUS_DMAREGS_SIZE, &sc->sc_dma_sh)) { 292 aprint_error(": unable to map DMA registers\n"); 293 return; 294 } 295 296 haltwo_write(sc, ctl, HAL2_REG_CTL_ISR, 0); 297 haltwo_write(sc, ctl, HAL2_REG_CTL_ISR, 298 HAL2_ISR_GLOBAL_RESET_N | HAL2_ISR_CODEC_RESET_N); 299 haltwo_write_indirect(sc, HAL2_IREG_RELAY_C, HAL2_RELAY_C_STATE, 0); 300 301 rev = haltwo_read(sc, ctl, HAL2_REG_CTL_REV); 302 303 /* This bit is inverted, the test is correct */ 304 if (rev & HAL2_REV_AUDIO_PRESENT_N) { 305 aprint_error(": Audio hardware not present (revision %x)\n", 306 rev); 307 return; 308 } 309 310 if (cpu_intr_establish(haa->ha_irq, IPL_AUDIO, haltwo_intr, sc) 311 == NULL) { 312 aprint_error(": unable to establish interrupt\n"); 313 return; 314 } 315 316 aprint_naive(": Audio controller\n"); 317 318 aprint_normal(": HAL2 revision %d.%d.%d\n", (rev & 0x7000) >> 12, 319 (rev & 0x00F0) >> 4, rev & 0x000F); 320 321 if (haltwo_init_codec(sc, &sc->sc_dac)) { 322 aprint_error( 323 "haltwo_attach: unable to create DMA descriptor list\n"); 324 return; 325 } 326 327 /* XXX Magic PBUS CFGDMA values from Linux HAL2 driver XXX */ 328 bus_space_write_4(haa->ha_st, haa->ha_sh, HPC3_PBUS_CH0_CFGDMA, 329 0x8208844); 330 bus_space_write_4(haa->ha_st, haa->ha_sh, HPC3_PBUS_CH1_CFGDMA, 331 0x8208844); 332 333 /* Unmute output */ 334 /* XXX Add mute/unmute support to mixer ops? XXX */ 335 haltwo_write_indirect(sc, HAL2_IREG_DAC_C2, 0, 0); 336 337 /* Set master volume to zero */ 338 sc->sc_vol_left = sc->sc_vol_right = 0; 339 haltwo_write(sc, vol, HAL2_REG_VOL_LEFT, sc->sc_vol_left); 340 haltwo_write(sc, vol, HAL2_REG_VOL_RIGHT, sc->sc_vol_right); 341 342 audio_attach_mi(&haltwo_hw_if, sc, &sc->sc_dev); 343 } 344 345 static int 346 haltwo_intr(void *v) 347 { 348 struct haltwo_softc *sc = v; 349 int ret = 0; 350 351 if (bus_space_read_4(sc->sc_st, sc->sc_dma_sh, HPC3_PBUS_CH0_CTL) 352 & HPC3_PBUS_DMACTL_IRQ) { 353 sc->sc_dac.intr(sc->sc_dac.intr_arg); 354 355 ret = 1; 356 } else 357 DPRINTF(("haltwo_intr: Huh?\n")); 358 359 return (ret); 360 } 361 362 static int 363 haltwo_query_encoding(void *v, struct audio_encoding *e) 364 { 365 366 switch (e->index) { 367 case 0: 368 strcpy(e->name, AudioEslinear_le); 369 e->encoding = AUDIO_ENCODING_SLINEAR_LE; 370 e->precision = 16; 371 e->flags = 0; 372 break; 373 374 case 1: 375 strcpy(e->name, AudioEslinear_be); 376 e->encoding = AUDIO_ENCODING_SLINEAR_BE; 377 e->precision = 16; 378 e->flags = 0; 379 break; 380 381 case 2: 382 strcpy(e->name, AudioEmulaw); 383 e->encoding = AUDIO_ENCODING_ULAW; 384 e->precision = 8; 385 e->flags = AUDIO_ENCODINGFLAG_EMULATED; 386 break; 387 388 default: 389 return (EINVAL); 390 } 391 392 return (0); 393 } 394 395 static int 396 haltwo_set_params(void *v, int setmode, int usemode, 397 audio_params_t *play, audio_params_t *rec, 398 stream_filter_list_t *pfil, stream_filter_list_t *rfil) 399 { 400 audio_params_t hw; 401 struct haltwo_softc *sc = v; 402 int master, inc, mod; 403 uint16_t tmp; 404 405 if (play->sample_rate < 4000) 406 play->sample_rate = 4000; 407 if (play->sample_rate > 48000) 408 play->sample_rate = 48000; 409 410 if (44100 % play->sample_rate < 48000 % play->sample_rate) 411 master = 44100; 412 else 413 master = 48000; 414 415 /* HAL2 specification 3.1.2.21: Codecs should be driven with INC/MOD 416 * fractions equivalent to 4/N, where N is a positive integer. */ 417 inc = 4; 418 mod = master * inc / play->sample_rate; 419 420 /* Fixup upper layers idea of HW sample rate to the actual final rate */ 421 play->sample_rate = master * inc / mod; 422 423 DPRINTF(("haltwo_set_params: master = %d inc = %d mod = %d" 424 " sample_rate = %ld\n", master, inc, mod, 425 play->sample_rate)); 426 427 hw = *play; 428 switch (play->encoding) { 429 case AUDIO_ENCODING_ULAW: 430 if (play->precision != 8) 431 return (EINVAL); 432 433 hw.encoding = AUDIO_ENCODING_SLINEAR_LE; 434 pfil->append(pfil, mulaw_to_linear16, &hw); 435 play = &hw; 436 break; 437 case AUDIO_ENCODING_SLINEAR_BE: 438 case AUDIO_ENCODING_SLINEAR_LE: 439 break; 440 441 default: 442 return (EINVAL); 443 } 444 /* play points HW encoding */ 445 446 /* Setup samplerate to HW */ 447 haltwo_write_indirect(sc, HAL2_IREG_BRES1_C1, 448 master == 44100 ? 1 : 0, 0); 449 /* XXX Documentation disagrees but this seems to work XXX */ 450 haltwo_write_indirect(sc, HAL2_IREG_BRES1_C2, 451 inc, 0xFFFF & (inc - mod - 1)); 452 453 /* Setup endianness to HW */ 454 haltwo_read_indirect(sc, HAL2_IREG_DMA_END, &tmp, NULL); 455 if (play->encoding == AUDIO_ENCODING_SLINEAR_LE) 456 tmp |= HAL2_DMA_END_CODECTX; 457 else 458 tmp &= ~HAL2_DMA_END_CODECTX; 459 haltwo_write_indirect(sc, HAL2_IREG_DMA_END, tmp, 0); 460 461 /* Set PBUS channel, Bresenham clock source, number of channels to HW */ 462 haltwo_write_indirect(sc, HAL2_IREG_DAC_C1, 463 (0 << HAL2_C1_DMA_SHIFT) | 464 (1 << HAL2_C1_CLKID_SHIFT) | 465 (play->channels << HAL2_C1_DATAT_SHIFT), 0); 466 467 DPRINTF(("haltwo_set_params: hw_encoding = %d hw_channels = %d\n", 468 play->encoding, play->channels)); 469 470 return (0); 471 } 472 473 static int 474 haltwo_round_blocksize(void *v, int blocksize, 475 int mode, const audio_params_t *param) 476 { 477 478 /* XXX Make this smarter and support DMA descriptor chaining XXX */ 479 /* XXX Rounding to nearest PAGE_SIZE might work? XXX */ 480 return PAGE_SIZE; 481 } 482 483 static int 484 haltwo_halt_output(void *v) 485 { 486 struct haltwo_softc *sc = v; 487 488 /* Disable PBUS DMA */ 489 bus_space_write_4(sc->sc_st, sc->sc_dma_sh, HPC3_PBUS_CH0_CTL, 490 HPC3_PBUS_DMACTL_ACT_LD); 491 492 return (0); 493 } 494 495 static int 496 haltwo_halt_input(void *v) 497 { 498 499 return (ENXIO); 500 } 501 502 static int 503 haltwo_getdev(void *v, struct audio_device *dev) 504 { 505 506 *dev = haltwo_device; 507 508 return (0); 509 } 510 511 static int 512 haltwo_set_port(void *v, mixer_ctrl_t *mc) 513 { 514 struct haltwo_softc *sc = v; 515 int lval, rval; 516 517 if (mc->type != AUDIO_MIXER_VALUE) 518 return (EINVAL); 519 520 if (mc->un.value.num_channels == 1) 521 lval = rval = mc->un.value.level[AUDIO_MIXER_LEVEL_MONO]; 522 else if (mc->un.value.num_channels == 2) { 523 lval = mc->un.value.level[AUDIO_MIXER_LEVEL_LEFT]; 524 rval = mc->un.value.level[AUDIO_MIXER_LEVEL_RIGHT]; 525 } else 526 return (EINVAL); 527 528 switch (mc->dev) { 529 case HALTWO_MASTER_VOL: 530 sc->sc_vol_left = lval; 531 sc->sc_vol_right = rval; 532 533 haltwo_write(sc, vol, HAL2_REG_VOL_LEFT, 534 sc->sc_vol_left); 535 haltwo_write(sc, vol, HAL2_REG_VOL_RIGHT, 536 sc->sc_vol_right); 537 break; 538 539 default: 540 return (EINVAL); 541 } 542 543 return (0); 544 } 545 546 static int 547 haltwo_get_port(void *v, mixer_ctrl_t *mc) 548 { 549 struct haltwo_softc *sc = v; 550 int l, r; 551 552 switch (mc->dev) { 553 case HALTWO_MASTER_VOL: 554 l = sc->sc_vol_left; 555 r = sc->sc_vol_right; 556 break; 557 558 default: 559 return (EINVAL); 560 } 561 562 if (mc->un.value.num_channels == 1) 563 mc->un.value.level[AUDIO_MIXER_LEVEL_MONO] = (l+r) / 2; 564 else if (mc->un.value.num_channels == 2) { 565 mc->un.value.level[AUDIO_MIXER_LEVEL_LEFT] = l; 566 mc->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] = r; 567 } else 568 return (EINVAL); 569 570 return (0); 571 } 572 573 static int 574 haltwo_query_devinfo(void *v, mixer_devinfo_t *dev) 575 { 576 577 switch (dev->index) { 578 /* Mixer values */ 579 case HALTWO_MASTER_VOL: 580 dev->type = AUDIO_MIXER_VALUE; 581 dev->mixer_class = HALTWO_OUTPUT_CLASS; 582 dev->prev = dev->next = AUDIO_MIXER_LAST; 583 strcpy(dev->label.name, AudioNmaster); 584 dev->un.v.num_channels = 2; 585 strcpy(dev->un.v.units.name, AudioNvolume); 586 break; 587 588 /* Mixer classes */ 589 case HALTWO_OUTPUT_CLASS: 590 dev->type = AUDIO_MIXER_CLASS; 591 dev->mixer_class = HALTWO_OUTPUT_CLASS; 592 dev->next = dev->prev = AUDIO_MIXER_LAST; 593 strcpy(dev->label.name, AudioCoutputs); 594 break; 595 596 default: 597 return (EINVAL); 598 } 599 600 return (0); 601 } 602 603 static int 604 haltwo_alloc_dmamem(struct haltwo_softc *sc, size_t size, 605 struct haltwo_dmabuf *p) 606 { 607 int err; 608 609 p->size = size; 610 611 /* XXX Check align/boundary XXX */ 612 /* XXX Pass flags and use them instead BUS_DMA_NOWAIT? XXX */ 613 err = bus_dmamem_alloc(sc->sc_dma_tag, p->size, 0, 0, p->dma_segs, 614 HALTWO_MAX_DMASEGS, &p->dma_segcount, BUS_DMA_NOWAIT); 615 if (err) 616 goto out; 617 618 /* XXX BUS_DMA_COHERENT? XXX */ 619 err = bus_dmamem_map(sc->sc_dma_tag, p->dma_segs, p->dma_segcount, 620 p->size, &p->kern_addr, BUS_DMA_NOWAIT | BUS_DMA_COHERENT); 621 if (err) 622 goto out_free; 623 624 /* XXX Just guessing ... XXX */ 625 err = bus_dmamap_create(sc->sc_dma_tag, p->size, HALTWO_MAX_DMASEGS, 626 PAGE_SIZE, 0, BUS_DMA_NOWAIT, &p->dma_map); 627 if (err) 628 goto out_free; 629 630 err = bus_dmamap_load(sc->sc_dma_tag, p->dma_map, p->kern_addr, 631 p->size, NULL, BUS_DMA_NOWAIT); 632 if (err) 633 goto out_destroy; 634 635 return 0; 636 637 out_destroy: 638 bus_dmamap_destroy(sc->sc_dma_tag, p->dma_map); 639 out_free: 640 bus_dmamem_free(sc->sc_dma_tag, p->dma_segs, p->dma_segcount); 641 out: 642 DPRINTF(("haltwo_alloc_dmamem failed: %d\n",err)); 643 644 return err; 645 } 646 647 static void * 648 haltwo_malloc(void *v, int direction, size_t size, struct malloc_type *type, 649 int flags) 650 { 651 struct haltwo_softc *sc = v; 652 struct haltwo_dmabuf *p; 653 654 DPRINTF(("haltwo_malloc size = %d\n", size)); 655 656 p = malloc(sizeof(struct haltwo_dmabuf), type, flags); 657 if (!p) 658 return 0; 659 660 if (haltwo_alloc_dmamem(sc, size, p)) { 661 free(p, type); 662 return 0; 663 } 664 665 p->next = sc->sc_dma_bufs; 666 sc->sc_dma_bufs = p; 667 668 return p->kern_addr; 669 } 670 671 static void 672 haltwo_free(void *v, void *addr, struct malloc_type *type) 673 { 674 struct haltwo_softc *sc = v; 675 struct haltwo_dmabuf *p,**pp; 676 677 for (pp = &sc->sc_dma_bufs; (p = *pp) != NULL; pp = &p->next) { 678 if (p->kern_addr == addr) { 679 *pp = p->next; 680 free(p, type); 681 return; 682 } 683 } 684 685 panic("haltwo_free: buffer not in list"); 686 } 687 688 static int 689 haltwo_get_props(void *v) 690 { 691 692 return (0); 693 } 694 695 static int 696 haltwo_trigger_output(void *v, void *start, void *end, int blksize, 697 void (*intr)(void *), void *intrarg, const audio_params_t *param) 698 { 699 struct haltwo_softc *sc = v; 700 struct haltwo_dmabuf *p; 701 uint16_t tmp; 702 uint32_t ctrl; 703 unsigned int fifobeg, fifoend, highwater; 704 705 DPRINTF(("haltwo_trigger_output start = %p end = %p blksize = %d" 706 " param = %p\n", start, end, blksize, param)); 707 708 for (p = sc->sc_dma_bufs; p != NULL; p = p->next) 709 if (p->kern_addr == start) 710 break; 711 712 if (p == NULL) { 713 printf("haltwo_trigger_output: buffer not in list\n"); 714 715 return (EINVAL); 716 } 717 718 /* Disable PBUS DMA */ 719 bus_space_write_4(sc->sc_st, sc->sc_dma_sh, HPC3_PBUS_CH0_CTL, 720 HPC3_PBUS_DMACTL_ACT_LD); 721 722 /* Disable HAL2 codec DMA */ 723 haltwo_read_indirect(sc, HAL2_IREG_DMA_PORT_EN, &tmp, NULL); 724 haltwo_write_indirect(sc, HAL2_IREG_DMA_PORT_EN, 725 tmp & ~HAL2_DMA_PORT_EN_CODECTX, 0); 726 727 haltwo_setup_dma(sc, &sc->sc_dac, p, (char *)end - (char *)start, 728 blksize, intr, intrarg); 729 730 highwater = (param->channels * 4) >> 1; 731 fifobeg = 0; 732 fifoend = (param->channels * 8) >> 3; 733 734 DPRINTF(("haltwo_trigger_output: hw_channels = %d highwater = %d" 735 " fifobeg = %d fifoend = %d\n", param->hw_channels, highwater, 736 fifobeg, fifoend)); 737 738 ctrl = HPC3_PBUS_DMACTL_RT 739 | HPC3_PBUS_DMACTL_ACT_LD 740 | (highwater << HPC3_PBUS_DMACTL_HIGHWATER_SHIFT) 741 | (fifobeg << HPC3_PBUS_DMACTL_FIFOBEG_SHIFT) 742 | (fifoend << HPC3_PBUS_DMACTL_FIFOEND_SHIFT); 743 744 /* Using PBUS CH0 for DAC DMA */ 745 haltwo_write_indirect(sc, HAL2_IREG_DMA_DRV, 1, 0); 746 747 /* HAL2 is ready for action, now setup PBUS for DMA transfer */ 748 bus_space_write_4(sc->sc_st, sc->sc_dma_sh, HPC3_PBUS_CH0_DP, 749 sc->sc_dac.dma_seg.ds_addr); 750 bus_space_write_4(sc->sc_st, sc->sc_dma_sh, HPC3_PBUS_CH0_CTL, 751 ctrl | HPC3_PBUS_DMACTL_ACT); 752 753 /* Both HAL2 and PBUS have been setup, now start it up */ 754 haltwo_read_indirect(sc, HAL2_IREG_DMA_PORT_EN, &tmp, NULL); 755 haltwo_write_indirect(sc, HAL2_IREG_DMA_PORT_EN, 756 tmp | HAL2_DMA_PORT_EN_CODECTX, 0); 757 758 return (0); 759 } 760 761 static int 762 haltwo_trigger_input(void *v, void *start, void *end, int blksize, 763 void (*intr)(void *), void *intrarg, const audio_params_t *param) 764 { 765 struct haltwo_softc *sc = v; 766 struct haltwo_dmabuf *p; 767 768 DPRINTF(("haltwo_trigger_input start = %p end = %p blksize = %d\n", 769 start, end, blksize)); 770 771 for (p = sc->sc_dma_bufs; p != NULL; p = p->next) 772 if (p->kern_addr == start) 773 break; 774 775 if (p == NULL) { 776 printf("haltwo_trigger_input: buffer not in list\n"); 777 778 return (EINVAL); 779 } 780 781 #if 0 782 haltwo_setup_dma(sc, &sc->sc_adc, p, (char *)end - (char *)start, 783 blksize, intr, intrarg); 784 #endif 785 786 return (ENXIO); 787 } 788
Indexes created Mon Sep 29 21:09:56 GMT 2025