haltwo.c revision 1.7
1 /* $NetBSD: haltwo.c,v 1.7 2005/01/15 15:19:51 kent Exp $ */ 2 3 /* 4 * Copyright (c) 2003 Ilpo Ruotsalainen 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the author may not be used to endorse or promote products 16 * derived from this software without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 * 29 * <<Id: LICENSE_GC,v 1.1 2001/10/01 23:24:05 cgd Exp>> 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: haltwo.c,v 1.7 2005/01/15 15:19:51 kent Exp $"); 34 35 #include <sys/param.h> 36 #include <sys/systm.h> 37 #include <sys/device.h> 38 #include <sys/audioio.h> 39 #include <sys/malloc.h> 40 #include <dev/audio_if.h> 41 #include <dev/auconv.h> 42 #include <dev/mulaw.h> 43 44 #include <uvm/uvm_extern.h> 45 46 #include <machine/bus.h> 47 48 #include <sgimips/hpc/hpcvar.h> 49 #include <sgimips/hpc/hpcreg.h> 50 51 #include <sgimips/hpc/haltworeg.h> 52 #include <sgimips/hpc/haltwovar.h> 53 54 #ifdef AUDIO_DEBUG 55 #define DPRINTF(x) printf x 56 #else 57 #define DPRINTF(x) 58 #endif 59 60 static int haltwo_query_encoding(void *, struct audio_encoding *); 61 static int haltwo_set_params(void *, int, int, audio_params_t *, 62 audio_params_t *, stream_filter_list_t *, stream_filter_list_t *); 63 static int haltwo_round_blocksize(void *, int, int, const audio_params_t *); 64 static int haltwo_halt_output(void *); 65 static int haltwo_halt_input(void *); 66 static int haltwo_getdev(void *, struct audio_device *); 67 static int haltwo_set_port(void *, mixer_ctrl_t *); 68 static int haltwo_get_port(void *, mixer_ctrl_t *); 69 static int haltwo_query_devinfo(void *, mixer_devinfo_t *); 70 static void *haltwo_malloc(void *, int, size_t, struct malloc_type *, int); 71 static void haltwo_free(void *, void *, struct malloc_type *); 72 static int haltwo_get_props(void *); 73 static int haltwo_trigger_output(void *, void *, void *, int, void (*)(void *), 74 void *, const audio_params_t *); 75 static int haltwo_trigger_input(void *, void *, void *, int, void (*)(void *), 76 void *, const audio_params_t *); 77 78 static const struct audio_hw_if haltwo_hw_if = { 79 NULL, /* open */ 80 NULL, /* close */ 81 NULL, /* drain */ 82 haltwo_query_encoding, 83 haltwo_set_params, 84 haltwo_round_blocksize, 85 NULL, /* commit_settings */ 86 NULL, /* init_output */ 87 NULL, /* init_input */ 88 NULL, /* start_output */ 89 NULL, /* start_input */ 90 haltwo_halt_output, 91 haltwo_halt_input, 92 NULL, /* speaker_ctl */ 93 haltwo_getdev, 94 NULL, /* setfd */ 95 haltwo_set_port, 96 haltwo_get_port, 97 haltwo_query_devinfo, 98 haltwo_malloc, 99 haltwo_free, 100 NULL, /* round_buffersize */ 101 NULL, /* mappage */ 102 haltwo_get_props, 103 haltwo_trigger_output, 104 haltwo_trigger_input, 105 NULL /* dev_ioctl */ 106 }; 107 108 static const struct audio_device haltwo_device = { 109 "HAL2", 110 "", 111 "haltwo" 112 }; 113 114 static int haltwo_match(struct device *, struct cfdata *, void *); 115 static void haltwo_attach(struct device *, struct device *, void *); 116 static int haltwo_intr(void *); 117 118 CFATTACH_DECL(haltwo, sizeof(struct haltwo_softc), 119 haltwo_match, haltwo_attach, NULL, NULL); 120 121 #define haltwo_write(sc,type,off,val) \ 122 bus_space_write_4(sc->sc_st, sc->sc_##type##_sh, off, val) 123 124 #define haltwo_read(sc,type,off) \ 125 bus_space_read_4(sc->sc_st, sc->sc_##type##_sh, off) 126 127 static void 128 haltwo_write_indirect(struct haltwo_softc *sc, uint32_t ireg, uint16_t low, 129 uint16_t high) 130 { 131 132 haltwo_write(sc, ctl, HAL2_REG_CTL_IDR0, low); 133 haltwo_write(sc, ctl, HAL2_REG_CTL_IDR1, high); 134 haltwo_write(sc, ctl, HAL2_REG_CTL_IDR2, 0); 135 haltwo_write(sc, ctl, HAL2_REG_CTL_IDR3, 0); 136 haltwo_write(sc, ctl, HAL2_REG_CTL_IAR, ireg); 137 138 while (haltwo_read(sc, ctl, HAL2_REG_CTL_ISR) & HAL2_ISR_TSTATUS) 139 continue; 140 } 141 142 static void 143 haltwo_read_indirect(struct haltwo_softc *sc, uint32_t ireg, uint16_t *low, 144 uint16_t *high) 145 { 146 147 haltwo_write(sc, ctl, HAL2_REG_CTL_IAR, 148 ireg | HAL2_IAR_READ); 149 150 while (haltwo_read(sc, ctl, HAL2_REG_CTL_ISR) & HAL2_ISR_TSTATUS) 151 continue; 152 153 if (low) 154 *low = haltwo_read(sc, ctl, HAL2_REG_CTL_IDR0); 155 156 if (high) 157 *high = haltwo_read(sc, ctl, HAL2_REG_CTL_IDR1); 158 } 159 160 static int 161 haltwo_init_codec(struct haltwo_softc *sc, struct haltwo_codec *codec) 162 { 163 int err; 164 int rseg; 165 size_t allocsz; 166 167 allocsz = sizeof(struct hpc_dma_desc) * HALTWO_MAX_DMASEGS; 168 KASSERT(allocsz <= PAGE_SIZE); 169 170 err = bus_dmamem_alloc(sc->sc_dma_tag, allocsz, 0, 0, &codec->dma_seg, 171 1, &rseg, BUS_DMA_NOWAIT); 172 if (err) 173 goto out; 174 175 err = bus_dmamem_map(sc->sc_dma_tag, &codec->dma_seg, rseg, allocsz, 176 (caddr_t *)&codec->dma_descs, BUS_DMA_NOWAIT); 177 if (err) 178 goto out_free; 179 180 err = bus_dmamap_create(sc->sc_dma_tag, allocsz, 1, PAGE_SIZE, 0, 181 BUS_DMA_NOWAIT, &codec->dma_map); 182 if (err) 183 goto out_free; 184 185 err = bus_dmamap_load(sc->sc_dma_tag, codec->dma_map, codec->dma_descs, 186 allocsz, NULL, BUS_DMA_NOWAIT); 187 if (err) 188 goto out_destroy; 189 190 DPRINTF(("haltwo_init_codec: allocated %d descriptors (%d bytes)" 191 " at %p\n", HALTWO_MAX_DMASEGS, allocsz, codec->dma_descs)); 192 193 memset(codec->dma_descs, 0, allocsz); 194 195 return 0; 196 197 out_destroy: 198 bus_dmamap_destroy(sc->sc_dma_tag, codec->dma_map); 199 out_free: 200 bus_dmamem_free(sc->sc_dma_tag, &codec->dma_seg, rseg); 201 out: 202 DPRINTF(("haltwo_init_codec failed: %d\n",err)); 203 204 return err; 205 } 206 207 static void 208 haltwo_setup_dma(struct haltwo_softc *sc, struct haltwo_codec *codec, 209 struct haltwo_dmabuf *dmabuf, size_t len, int blksize, 210 void (*intr)(void *), void *intrarg) 211 { 212 int i; 213 bus_dma_segment_t *segp; 214 struct hpc_dma_desc *descp; 215 int next_intr; 216 217 KASSERT(len % blksize == 0); 218 219 next_intr = blksize; 220 codec->intr = intr; 221 codec->intr_arg = intrarg; 222 223 segp = dmabuf->dma_map->dm_segs; 224 descp = codec->dma_descs; 225 226 /* Build descriptor chain for looping DMA, triggering interrupt every 227 * blksize bytes */ 228 for (i = 0; i < dmabuf->dma_map->dm_nsegs; i++) { 229 descp->hpc3_hdd_bufptr = segp->ds_addr; 230 descp->hpc3_hdd_ctl = segp->ds_len; 231 232 KASSERT(next_intr >= segp->ds_len); 233 234 if (next_intr == segp->ds_len) { 235 /* Generate intr after this DMA buffer */ 236 descp->hpc3_hdd_ctl |= HPC3_HDD_CTL_INTR; 237 next_intr = blksize; 238 } else 239 next_intr -= segp->ds_len; 240 241 if (i < dmabuf->dma_map->dm_nsegs - 1) 242 descp->hdd_descptr = codec->dma_seg.ds_addr + 243 sizeof(struct hpc_dma_desc) * (i + 1); 244 else 245 descp->hdd_descptr = codec->dma_seg.ds_addr; 246 247 DPRINTF(("haltwo_setup_dma: hdd_bufptr = %x hdd_ctl = %x" 248 " hdd_descptr = %x\n", descp->hpc3_hdd_bufptr, 249 descp->hpc3_hdd_ctl, descp->hdd_descptr)); 250 251 segp++; 252 descp++; 253 } 254 255 bus_dmamap_sync(sc->sc_dma_tag, codec->dma_map, 0, 256 codec->dma_map->dm_mapsize, BUS_DMASYNC_PREWRITE); 257 } 258 259 static int 260 haltwo_match(struct device *parent, struct cfdata *cf, void *aux) 261 { 262 struct hpc_attach_args *haa; 263 264 haa = aux; 265 if (strcmp(haa->ha_name, cf->cf_name) == 0) 266 return 1; 267 268 return 0; 269 } 270 271 static void 272 haltwo_attach(struct device *parent, struct device *self, void *aux) 273 { 274 struct haltwo_softc *sc; 275 struct hpc_attach_args *haa; 276 uint32_t rev; 277 278 sc = (void *)self; 279 haa = aux; 280 sc->sc_st = haa->ha_st; 281 sc->sc_dma_tag = haa->ha_dmat; 282 283 if (bus_space_subregion(haa->ha_st, haa->ha_sh, haa->ha_devoff, 284 HPC3_PBUS_CH0_DEVREGS_SIZE, &sc->sc_ctl_sh)) { 285 aprint_error(": unable to map control registers\n"); 286 return; 287 } 288 289 if (bus_space_subregion(haa->ha_st, haa->ha_sh, HPC3_PBUS_CH2_DEVREGS, 290 HPC3_PBUS_CH2_DEVREGS_SIZE, &sc->sc_vol_sh)) { 291 aprint_error(": unable to map volume registers\n"); 292 return; 293 } 294 295 if (bus_space_subregion(haa->ha_st, haa->ha_sh, haa->ha_dmaoff, 296 HPC3_PBUS_DMAREGS_SIZE, &sc->sc_dma_sh)) { 297 aprint_error(": unable to map DMA registers\n"); 298 return; 299 } 300 301 haltwo_write(sc, ctl, HAL2_REG_CTL_ISR, 0); 302 haltwo_write(sc, ctl, HAL2_REG_CTL_ISR, 303 HAL2_ISR_GLOBAL_RESET_N | HAL2_ISR_CODEC_RESET_N); 304 haltwo_write_indirect(sc, HAL2_IREG_RELAY_C, HAL2_RELAY_C_STATE, 0); 305 306 rev = haltwo_read(sc, ctl, HAL2_REG_CTL_REV); 307 308 /* This bit is inverted, the test is correct */ 309 if (rev & HAL2_REV_AUDIO_PRESENT_N) { 310 aprint_error(": Audio hardware not present (revision %x)\n", 311 rev); 312 return; 313 } 314 315 if (cpu_intr_establish(haa->ha_irq, IPL_AUDIO, haltwo_intr, sc) 316 == NULL) { 317 aprint_error(": unable to establish interrupt\n"); 318 return; 319 } 320 321 aprint_naive(": Audio controller\n"); 322 323 aprint_normal(": HAL2 revision %d.%d.%d\n", (rev & 0x7000) >> 12, 324 (rev & 0x00F0) >> 4, rev & 0x000F); 325 326 if (haltwo_init_codec(sc, &sc->sc_dac)) { 327 aprint_error( 328 "haltwo_attach: unable to create DMA descriptor list\n"); 329 return; 330 } 331 332 /* XXX Magic PBUS CFGDMA values from Linux HAL2 driver XXX */ 333 bus_space_write_4(haa->ha_st, haa->ha_sh, HPC3_PBUS_CH0_CFGDMA, 334 0x8208844); 335 bus_space_write_4(haa->ha_st, haa->ha_sh, HPC3_PBUS_CH1_CFGDMA, 336 0x8208844); 337 338 /* Unmute output */ 339 /* XXX Add mute/unmute support to mixer ops? XXX */ 340 haltwo_write_indirect(sc, HAL2_IREG_DAC_C2, 0, 0); 341 342 /* Set master volume to zero */ 343 sc->sc_vol_left = sc->sc_vol_right = 0; 344 haltwo_write(sc, vol, HAL2_REG_VOL_LEFT, sc->sc_vol_left); 345 haltwo_write(sc, vol, HAL2_REG_VOL_RIGHT, sc->sc_vol_right); 346 347 audio_attach_mi(&haltwo_hw_if, sc, &sc->sc_dev); 348 } 349 350 static int 351 haltwo_intr(void *v) 352 { 353 struct haltwo_softc *sc; 354 int ret; 355 356 sc = v; 357 ret = 0; 358 if (bus_space_read_4(sc->sc_st, sc->sc_dma_sh, HPC3_PBUS_CH0_CTL) 359 & HPC3_PBUS_DMACTL_IRQ) { 360 sc->sc_dac.intr(sc->sc_dac.intr_arg); 361 362 ret = 1; 363 } else 364 DPRINTF(("haltwo_intr: Huh?\n")); 365 366 return ret; 367 } 368 369 static int 370 haltwo_query_encoding(void *v, struct audio_encoding *e) 371 { 372 373 switch (e->index) { 374 case 0: 375 strcpy(e->name, AudioEslinear_le); 376 e->encoding = AUDIO_ENCODING_SLINEAR_LE; 377 e->precision = 16; 378 e->flags = 0; 379 break; 380 381 case 1: 382 strcpy(e->name, AudioEslinear_be); 383 e->encoding = AUDIO_ENCODING_SLINEAR_BE; 384 e->precision = 16; 385 e->flags = 0; 386 break; 387 388 case 2: 389 strcpy(e->name, AudioEmulaw); 390 e->encoding = AUDIO_ENCODING_ULAW; 391 e->precision = 8; 392 e->flags = AUDIO_ENCODINGFLAG_EMULATED; 393 break; 394 395 default: 396 return EINVAL; 397 } 398 399 return 0; 400 } 401 402 static int 403 haltwo_set_params(void *v, int setmode, int usemode, 404 audio_params_t *play, audio_params_t *rec, 405 stream_filter_list_t *pfil, stream_filter_list_t *rfil) 406 { 407 audio_params_t hw; 408 struct haltwo_softc *sc; 409 int master, inc, mod; 410 uint16_t tmp; 411 412 sc = v; 413 if (play->sample_rate < 4000) 414 play->sample_rate = 4000; 415 if (play->sample_rate > 48000) 416 play->sample_rate = 48000; 417 418 if (44100 % play->sample_rate < 48000 % play->sample_rate) 419 master = 44100; 420 else 421 master = 48000; 422 423 /* HAL2 specification 3.1.2.21: Codecs should be driven with INC/MOD 424 * fractions equivalent to 4/N, where N is a positive integer. */ 425 inc = 4; 426 mod = master * inc / play->sample_rate; 427 428 /* Fixup upper layers idea of HW sample rate to the actual final rate */ 429 play->sample_rate = master * inc / mod; 430 431 DPRINTF(("haltwo_set_params: master = %d inc = %d mod = %d" 432 " sample_rate = %ld\n", master, inc, mod, 433 play->sample_rate)); 434 435 hw = *play; 436 switch (play->encoding) { 437 case AUDIO_ENCODING_ULAW: 438 if (play->precision != 8) 439 return EINVAL; 440 441 hw.encoding = AUDIO_ENCODING_SLINEAR_LE; 442 pfil->append(pfil, mulaw_to_linear16, &hw); 443 play = &hw; 444 break; 445 case AUDIO_ENCODING_SLINEAR_BE: 446 case AUDIO_ENCODING_SLINEAR_LE: 447 break; 448 449 default: 450 return EINVAL; 451 } 452 /* play points HW encoding */ 453 454 /* Setup samplerate to HW */ 455 haltwo_write_indirect(sc, HAL2_IREG_BRES1_C1, 456 master == 44100 ? 1 : 0, 0); 457 /* XXX Documentation disagrees but this seems to work XXX */ 458 haltwo_write_indirect(sc, HAL2_IREG_BRES1_C2, 459 inc, 0xFFFF & (inc - mod - 1)); 460 461 /* Setup endianness to HW */ 462 haltwo_read_indirect(sc, HAL2_IREG_DMA_END, &tmp, NULL); 463 if (play->encoding == AUDIO_ENCODING_SLINEAR_LE) 464 tmp |= HAL2_DMA_END_CODECTX; 465 else 466 tmp &= ~HAL2_DMA_END_CODECTX; 467 haltwo_write_indirect(sc, HAL2_IREG_DMA_END, tmp, 0); 468 469 /* Set PBUS channel, Bresenham clock source, number of channels to HW */ 470 haltwo_write_indirect(sc, HAL2_IREG_DAC_C1, 471 (0 << HAL2_C1_DMA_SHIFT) | 472 (1 << HAL2_C1_CLKID_SHIFT) | 473 (play->channels << HAL2_C1_DATAT_SHIFT), 0); 474 475 DPRINTF(("haltwo_set_params: hw_encoding = %d hw_channels = %d\n", 476 play->encoding, play->channels)); 477 478 return 0; 479 } 480 481 static int 482 haltwo_round_blocksize(void *v, int blocksize, 483 int mode, const audio_params_t *param) 484 { 485 486 /* XXX Make this smarter and support DMA descriptor chaining XXX */ 487 /* XXX Rounding to nearest PAGE_SIZE might work? XXX */ 488 return PAGE_SIZE; 489 } 490 491 static int 492 haltwo_halt_output(void *v) 493 { 494 struct haltwo_softc *sc; 495 496 sc = v; 497 /* Disable PBUS DMA */ 498 bus_space_write_4(sc->sc_st, sc->sc_dma_sh, HPC3_PBUS_CH0_CTL, 499 HPC3_PBUS_DMACTL_ACT_LD); 500 501 return 0; 502 } 503 504 static int 505 haltwo_halt_input(void *v) 506 { 507 508 return ENXIO; 509 } 510 511 static int 512 haltwo_getdev(void *v, struct audio_device *dev) 513 { 514 515 *dev = haltwo_device; 516 return 0; 517 } 518 519 static int 520 haltwo_set_port(void *v, mixer_ctrl_t *mc) 521 { 522 struct haltwo_softc *sc; 523 int lval, rval; 524 525 if (mc->type != AUDIO_MIXER_VALUE) 526 return EINVAL; 527 528 if (mc->un.value.num_channels == 1) 529 lval = rval = mc->un.value.level[AUDIO_MIXER_LEVEL_MONO]; 530 else if (mc->un.value.num_channels == 2) { 531 lval = mc->un.value.level[AUDIO_MIXER_LEVEL_LEFT]; 532 rval = mc->un.value.level[AUDIO_MIXER_LEVEL_RIGHT]; 533 } else 534 return EINVAL; 535 536 sc = v; 537 switch (mc->dev) { 538 case HALTWO_MASTER_VOL: 539 sc->sc_vol_left = lval; 540 sc->sc_vol_right = rval; 541 542 haltwo_write(sc, vol, HAL2_REG_VOL_LEFT, 543 sc->sc_vol_left); 544 haltwo_write(sc, vol, HAL2_REG_VOL_RIGHT, 545 sc->sc_vol_right); 546 break; 547 548 default: 549 return EINVAL; 550 } 551 552 return 0; 553 } 554 555 static int 556 haltwo_get_port(void *v, mixer_ctrl_t *mc) 557 { 558 struct haltwo_softc *sc; 559 int l, r; 560 561 switch (mc->dev) { 562 case HALTWO_MASTER_VOL: 563 sc = v; 564 l = sc->sc_vol_left; 565 r = sc->sc_vol_right; 566 break; 567 568 default: 569 return EINVAL; 570 } 571 572 if (mc->un.value.num_channels == 1) 573 mc->un.value.level[AUDIO_MIXER_LEVEL_MONO] = (l+r) / 2; 574 else if (mc->un.value.num_channels == 2) { 575 mc->un.value.level[AUDIO_MIXER_LEVEL_LEFT] = l; 576 mc->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] = r; 577 } else 578 return EINVAL; 579 580 return 0; 581 } 582 583 static int 584 haltwo_query_devinfo(void *v, mixer_devinfo_t *dev) 585 { 586 587 switch (dev->index) { 588 /* Mixer values */ 589 case HALTWO_MASTER_VOL: 590 dev->type = AUDIO_MIXER_VALUE; 591 dev->mixer_class = HALTWO_OUTPUT_CLASS; 592 dev->prev = dev->next = AUDIO_MIXER_LAST; 593 strcpy(dev->label.name, AudioNmaster); 594 dev->un.v.num_channels = 2; 595 strcpy(dev->un.v.units.name, AudioNvolume); 596 break; 597 598 /* Mixer classes */ 599 case HALTWO_OUTPUT_CLASS: 600 dev->type = AUDIO_MIXER_CLASS; 601 dev->mixer_class = HALTWO_OUTPUT_CLASS; 602 dev->next = dev->prev = AUDIO_MIXER_LAST; 603 strcpy(dev->label.name, AudioCoutputs); 604 break; 605 606 default: 607 return EINVAL; 608 } 609 610 return 0; 611 } 612 613 static int 614 haltwo_alloc_dmamem(struct haltwo_softc *sc, size_t size, 615 struct haltwo_dmabuf *p) 616 { 617 int err; 618 619 p->size = size; 620 621 /* XXX Check align/boundary XXX */ 622 /* XXX Pass flags and use them instead BUS_DMA_NOWAIT? XXX */ 623 err = bus_dmamem_alloc(sc->sc_dma_tag, p->size, 0, 0, p->dma_segs, 624 HALTWO_MAX_DMASEGS, &p->dma_segcount, BUS_DMA_NOWAIT); 625 if (err) 626 goto out; 627 628 /* XXX BUS_DMA_COHERENT? XXX */ 629 err = bus_dmamem_map(sc->sc_dma_tag, p->dma_segs, p->dma_segcount, 630 p->size, &p->kern_addr, BUS_DMA_NOWAIT | BUS_DMA_COHERENT); 631 if (err) 632 goto out_free; 633 634 /* XXX Just guessing ... XXX */ 635 err = bus_dmamap_create(sc->sc_dma_tag, p->size, HALTWO_MAX_DMASEGS, 636 PAGE_SIZE, 0, BUS_DMA_NOWAIT, &p->dma_map); 637 if (err) 638 goto out_free; 639 640 err = bus_dmamap_load(sc->sc_dma_tag, p->dma_map, p->kern_addr, 641 p->size, NULL, BUS_DMA_NOWAIT); 642 if (err) 643 goto out_destroy; 644 645 return 0; 646 647 out_destroy: 648 bus_dmamap_destroy(sc->sc_dma_tag, p->dma_map); 649 out_free: 650 bus_dmamem_free(sc->sc_dma_tag, p->dma_segs, p->dma_segcount); 651 out: 652 DPRINTF(("haltwo_alloc_dmamem failed: %d\n",err)); 653 654 return err; 655 } 656 657 static void * 658 haltwo_malloc(void *v, int direction, size_t size, struct malloc_type *type, 659 int flags) 660 { 661 struct haltwo_softc *sc; 662 struct haltwo_dmabuf *p; 663 664 DPRINTF(("haltwo_malloc size = %d\n", size)); 665 sc = v; 666 p = malloc(sizeof(struct haltwo_dmabuf), type, flags); 667 if (!p) 668 return 0; 669 670 if (haltwo_alloc_dmamem(sc, size, p)) { 671 free(p, type); 672 return 0; 673 } 674 675 p->next = sc->sc_dma_bufs; 676 sc->sc_dma_bufs = p; 677 678 return p->kern_addr; 679 } 680 681 static void 682 haltwo_free(void *v, void *addr, struct malloc_type *type) 683 { 684 struct haltwo_softc *sc; 685 struct haltwo_dmabuf *p, **pp; 686 687 sc = v; 688 for (pp = &sc->sc_dma_bufs; (p = *pp) != NULL; pp = &p->next) { 689 if (p->kern_addr == addr) { 690 *pp = p->next; 691 free(p, type); 692 return; 693 } 694 } 695 696 panic("haltwo_free: buffer not in list"); 697 } 698 699 static int 700 haltwo_get_props(void *v) 701 { 702 703 return 0; 704 } 705 706 static int 707 haltwo_trigger_output(void *v, void *start, void *end, int blksize, 708 void (*intr)(void *), void *intrarg, const audio_params_t *param) 709 { 710 struct haltwo_softc *sc; 711 struct haltwo_dmabuf *p; 712 uint16_t tmp; 713 uint32_t ctrl; 714 unsigned int fifobeg, fifoend, highwater; 715 716 DPRINTF(("haltwo_trigger_output start = %p end = %p blksize = %d" 717 " param = %p\n", start, end, blksize, param)); 718 sc = v; 719 for (p = sc->sc_dma_bufs; p != NULL; p = p->next) 720 if (p->kern_addr == start) 721 break; 722 723 if (p == NULL) { 724 printf("haltwo_trigger_output: buffer not in list\n"); 725 726 return EINVAL; 727 } 728 729 /* Disable PBUS DMA */ 730 bus_space_write_4(sc->sc_st, sc->sc_dma_sh, HPC3_PBUS_CH0_CTL, 731 HPC3_PBUS_DMACTL_ACT_LD); 732 733 /* Disable HAL2 codec DMA */ 734 haltwo_read_indirect(sc, HAL2_IREG_DMA_PORT_EN, &tmp, NULL); 735 haltwo_write_indirect(sc, HAL2_IREG_DMA_PORT_EN, 736 tmp & ~HAL2_DMA_PORT_EN_CODECTX, 0); 737 738 haltwo_setup_dma(sc, &sc->sc_dac, p, (char *)end - (char *)start, 739 blksize, intr, intrarg); 740 741 highwater = (param->channels * 4) >> 1; 742 fifobeg = 0; 743 fifoend = (param->channels * 8) >> 3; 744 745 DPRINTF(("haltwo_trigger_output: hw_channels = %d highwater = %d" 746 " fifobeg = %d fifoend = %d\n", param->hw_channels, highwater, 747 fifobeg, fifoend)); 748 749 ctrl = HPC3_PBUS_DMACTL_RT 750 | HPC3_PBUS_DMACTL_ACT_LD 751 | (highwater << HPC3_PBUS_DMACTL_HIGHWATER_SHIFT) 752 | (fifobeg << HPC3_PBUS_DMACTL_FIFOBEG_SHIFT) 753 | (fifoend << HPC3_PBUS_DMACTL_FIFOEND_SHIFT); 754 755 /* Using PBUS CH0 for DAC DMA */ 756 haltwo_write_indirect(sc, HAL2_IREG_DMA_DRV, 1, 0); 757 758 /* HAL2 is ready for action, now setup PBUS for DMA transfer */ 759 bus_space_write_4(sc->sc_st, sc->sc_dma_sh, HPC3_PBUS_CH0_DP, 760 sc->sc_dac.dma_seg.ds_addr); 761 bus_space_write_4(sc->sc_st, sc->sc_dma_sh, HPC3_PBUS_CH0_CTL, 762 ctrl | HPC3_PBUS_DMACTL_ACT); 763 764 /* Both HAL2 and PBUS have been setup, now start it up */ 765 haltwo_read_indirect(sc, HAL2_IREG_DMA_PORT_EN, &tmp, NULL); 766 haltwo_write_indirect(sc, HAL2_IREG_DMA_PORT_EN, 767 tmp | HAL2_DMA_PORT_EN_CODECTX, 0); 768 769 return 0; 770 } 771 772 static int 773 haltwo_trigger_input(void *v, void *start, void *end, int blksize, 774 void (*intr)(void *), void *intrarg, const audio_params_t *param) 775 { 776 struct haltwo_softc *sc; 777 struct haltwo_dmabuf *p; 778 779 DPRINTF(("haltwo_trigger_input start = %p end = %p blksize = %d\n", 780 start, end, blksize)); 781 sc = v; 782 for (p = sc->sc_dma_bufs; p != NULL; p = p->next) 783 if (p->kern_addr == start) 784 break; 785 786 if (p == NULL) { 787 printf("haltwo_trigger_input: buffer not in list\n"); 788 789 return EINVAL; 790 } 791 792 #if 0 793 haltwo_setup_dma(sc, &sc->sc_adc, p, (char *)end - (char *)start, 794 blksize, intr, intrarg); 795 #endif 796 797 return ENXIO; 798 } 799
Indexes created Mon Sep 29 03:10:08 GMT 2025