haltwo.c revision 1.8
1 /* $NetBSD: haltwo.c,v 1.8 2005/02/28 07:42:53 sekiya Exp $ */ 2 3 /* 4 * Copyright (c) 2003 Ilpo Ruotsalainen 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the author may not be used to endorse or promote products 16 * derived from this software without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 * 29 * <<Id: LICENSE_GC,v 1.1 2001/10/01 23:24:05 cgd Exp>> 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: haltwo.c,v 1.8 2005/02/28 07:42:53 sekiya Exp $"); 34 35 #include <sys/param.h> 36 #include <sys/systm.h> 37 #include <sys/device.h> 38 #include <sys/audioio.h> 39 #include <sys/malloc.h> 40 #include <dev/audio_if.h> 41 #include <dev/auconv.h> 42 #include <dev/mulaw.h> 43 44 #include <uvm/uvm_extern.h> 45 46 #include <machine/bus.h> 47 48 #include <sgimips/hpc/hpcvar.h> 49 #include <sgimips/hpc/hpcreg.h> 50 51 #include <sgimips/hpc/haltworeg.h> 52 #include <sgimips/hpc/haltwovar.h> 53 54 #ifdef AUDIO_DEBUG 55 #define DPRINTF(x) printf x 56 #else 57 #define DPRINTF(x) 58 #endif 59 60 static int haltwo_query_encoding(void *, struct audio_encoding *); 61 static int haltwo_set_params(void *, int, int, audio_params_t *, 62 audio_params_t *, stream_filter_list_t *, stream_filter_list_t *); 63 static int haltwo_round_blocksize(void *, int, int, const audio_params_t *); 64 static int haltwo_halt_output(void *); 65 static int haltwo_halt_input(void *); 66 static int haltwo_getdev(void *, struct audio_device *); 67 static int haltwo_set_port(void *, mixer_ctrl_t *); 68 static int haltwo_get_port(void *, mixer_ctrl_t *); 69 static int haltwo_query_devinfo(void *, mixer_devinfo_t *); 70 static void *haltwo_malloc(void *, int, size_t, struct malloc_type *, int); 71 static void haltwo_free(void *, void *, struct malloc_type *); 72 static int haltwo_get_props(void *); 73 static int haltwo_trigger_output(void *, void *, void *, int, void (*)(void *), 74 void *, const audio_params_t *); 75 static int haltwo_trigger_input(void *, void *, void *, int, void (*)(void *), 76 void *, const audio_params_t *); 77 78 static const struct audio_hw_if haltwo_hw_if = { 79 NULL, /* open */ 80 NULL, /* close */ 81 NULL, /* drain */ 82 haltwo_query_encoding, 83 haltwo_set_params, 84 haltwo_round_blocksize, 85 NULL, /* commit_settings */ 86 NULL, /* init_output */ 87 NULL, /* init_input */ 88 NULL, /* start_output */ 89 NULL, /* start_input */ 90 haltwo_halt_output, 91 haltwo_halt_input, 92 NULL, /* speaker_ctl */ 93 haltwo_getdev, 94 NULL, /* setfd */ 95 haltwo_set_port, 96 haltwo_get_port, 97 haltwo_query_devinfo, 98 haltwo_malloc, 99 haltwo_free, 100 NULL, /* round_buffersize */ 101 NULL, /* mappage */ 102 haltwo_get_props, 103 haltwo_trigger_output, 104 haltwo_trigger_input, 105 NULL /* dev_ioctl */ 106 }; 107 108 static const struct audio_device haltwo_device = { 109 "HAL2", 110 "", 111 "haltwo" 112 }; 113 114 static int haltwo_match(struct device *, struct cfdata *, void *); 115 static void haltwo_attach(struct device *, struct device *, void *); 116 static int haltwo_intr(void *); 117 118 CFATTACH_DECL(haltwo, sizeof(struct haltwo_softc), 119 haltwo_match, haltwo_attach, NULL, NULL); 120 121 #define haltwo_write(sc,type,off,val) \ 122 bus_space_write_4(sc->sc_st, sc->sc_##type##_sh, off, val) 123 124 #define haltwo_read(sc,type,off) \ 125 bus_space_read_4(sc->sc_st, sc->sc_##type##_sh, off) 126 127 static void 128 haltwo_write_indirect(struct haltwo_softc *sc, uint32_t ireg, uint16_t low, 129 uint16_t high) 130 { 131 132 haltwo_write(sc, ctl, HAL2_REG_CTL_IDR0, low); 133 haltwo_write(sc, ctl, HAL2_REG_CTL_IDR1, high); 134 haltwo_write(sc, ctl, HAL2_REG_CTL_IDR2, 0); 135 haltwo_write(sc, ctl, HAL2_REG_CTL_IDR3, 0); 136 haltwo_write(sc, ctl, HAL2_REG_CTL_IAR, ireg); 137 138 while (haltwo_read(sc, ctl, HAL2_REG_CTL_ISR) & HAL2_ISR_TSTATUS) 139 continue; 140 } 141 142 static void 143 haltwo_read_indirect(struct haltwo_softc *sc, uint32_t ireg, uint16_t *low, 144 uint16_t *high) 145 { 146 147 haltwo_write(sc, ctl, HAL2_REG_CTL_IAR, 148 ireg | HAL2_IAR_READ); 149 150 while (haltwo_read(sc, ctl, HAL2_REG_CTL_ISR) & HAL2_ISR_TSTATUS) 151 continue; 152 153 if (low) 154 *low = haltwo_read(sc, ctl, HAL2_REG_CTL_IDR0); 155 156 if (high) 157 *high = haltwo_read(sc, ctl, HAL2_REG_CTL_IDR1); 158 } 159 160 static int 161 haltwo_init_codec(struct haltwo_softc *sc, struct haltwo_codec *codec) 162 { 163 int err; 164 int rseg; 165 size_t allocsz; 166 167 allocsz = sizeof(struct hpc_dma_desc) * HALTWO_MAX_DMASEGS; 168 KASSERT(allocsz <= PAGE_SIZE); 169 170 err = bus_dmamem_alloc(sc->sc_dma_tag, allocsz, 0, 0, &codec->dma_seg, 171 1, &rseg, BUS_DMA_NOWAIT); 172 if (err) 173 goto out; 174 175 err = bus_dmamem_map(sc->sc_dma_tag, &codec->dma_seg, rseg, allocsz, 176 (caddr_t *)&codec->dma_descs, BUS_DMA_NOWAIT); 177 if (err) 178 goto out_free; 179 180 err = bus_dmamap_create(sc->sc_dma_tag, allocsz, 1, PAGE_SIZE, 0, 181 BUS_DMA_NOWAIT, &codec->dma_map); 182 if (err) 183 goto out_free; 184 185 err = bus_dmamap_load(sc->sc_dma_tag, codec->dma_map, codec->dma_descs, 186 allocsz, NULL, BUS_DMA_NOWAIT); 187 if (err) 188 goto out_destroy; 189 190 DPRINTF(("haltwo_init_codec: allocated %d descriptors (%d bytes)" 191 " at %p\n", HALTWO_MAX_DMASEGS, allocsz, codec->dma_descs)); 192 193 memset(codec->dma_descs, 0, allocsz); 194 195 return 0; 196 197 out_destroy: 198 bus_dmamap_destroy(sc->sc_dma_tag, codec->dma_map); 199 out_free: 200 bus_dmamem_free(sc->sc_dma_tag, &codec->dma_seg, rseg); 201 out: 202 DPRINTF(("haltwo_init_codec failed: %d\n",err)); 203 204 return err; 205 } 206 207 static void 208 haltwo_setup_dma(struct haltwo_softc *sc, struct haltwo_codec *codec, 209 struct haltwo_dmabuf *dmabuf, size_t len, int blksize, 210 void (*intr)(void *), void *intrarg) 211 { 212 int i; 213 bus_dma_segment_t *segp; 214 struct hpc_dma_desc *descp; 215 int next_intr; 216 217 KASSERT(len % blksize == 0); 218 219 next_intr = blksize; 220 codec->intr = intr; 221 codec->intr_arg = intrarg; 222 223 segp = dmabuf->dma_map->dm_segs; 224 descp = codec->dma_descs; 225 226 /* Build descriptor chain for looping DMA, triggering interrupt every 227 * blksize bytes */ 228 for (i = 0; i < dmabuf->dma_map->dm_nsegs; i++) { 229 descp->hpc3_hdd_bufptr = segp->ds_addr; 230 descp->hpc3_hdd_ctl = segp->ds_len; 231 232 KASSERT(next_intr >= segp->ds_len); 233 234 if (next_intr == segp->ds_len) { 235 /* Generate intr after this DMA buffer */ 236 descp->hpc3_hdd_ctl |= HPC3_HDD_CTL_INTR; 237 next_intr = blksize; 238 } else 239 next_intr -= segp->ds_len; 240 241 if (i < dmabuf->dma_map->dm_nsegs - 1) 242 descp->hdd_descptr = codec->dma_seg.ds_addr + 243 sizeof(struct hpc_dma_desc) * (i + 1); 244 else 245 descp->hdd_descptr = codec->dma_seg.ds_addr; 246 247 DPRINTF(("haltwo_setup_dma: hdd_bufptr = %x hdd_ctl = %x" 248 " hdd_descptr = %x\n", descp->hpc3_hdd_bufptr, 249 descp->hpc3_hdd_ctl, descp->hdd_descptr)); 250 251 segp++; 252 descp++; 253 } 254 255 bus_dmamap_sync(sc->sc_dma_tag, codec->dma_map, 0, 256 codec->dma_map->dm_mapsize, BUS_DMASYNC_PREWRITE); 257 } 258 259 static int 260 haltwo_match(struct device *parent, struct cfdata *cf, void *aux) 261 { 262 struct hpc_attach_args *haa; 263 264 haa = aux; 265 if (strcmp(haa->ha_name, cf->cf_name)) 266 return 0; 267 if ( badaddr((void *)(haa->ha_sh + haa->ha_devoff), sizeof(u_int32_t)) ) 268 return 0; 269 270 return 1; 271 } 272 273 static void 274 haltwo_attach(struct device *parent, struct device *self, void *aux) 275 { 276 struct haltwo_softc *sc; 277 struct hpc_attach_args *haa; 278 uint32_t rev; 279 280 sc = (void *)self; 281 haa = aux; 282 sc->sc_st = haa->ha_st; 283 sc->sc_dma_tag = haa->ha_dmat; 284 285 if (bus_space_subregion(haa->ha_st, haa->ha_sh, haa->ha_devoff, 286 HPC3_PBUS_CH0_DEVREGS_SIZE, &sc->sc_ctl_sh)) { 287 aprint_error(": unable to map control registers\n"); 288 return; 289 } 290 291 if (bus_space_subregion(haa->ha_st, haa->ha_sh, HPC3_PBUS_CH2_DEVREGS, 292 HPC3_PBUS_CH2_DEVREGS_SIZE, &sc->sc_vol_sh)) { 293 aprint_error(": unable to map volume registers\n"); 294 return; 295 } 296 297 if (bus_space_subregion(haa->ha_st, haa->ha_sh, haa->ha_dmaoff, 298 HPC3_PBUS_DMAREGS_SIZE, &sc->sc_dma_sh)) { 299 aprint_error(": unable to map DMA registers\n"); 300 return; 301 } 302 303 haltwo_write(sc, ctl, HAL2_REG_CTL_ISR, 0); 304 haltwo_write(sc, ctl, HAL2_REG_CTL_ISR, 305 HAL2_ISR_GLOBAL_RESET_N | HAL2_ISR_CODEC_RESET_N); 306 haltwo_write_indirect(sc, HAL2_IREG_RELAY_C, HAL2_RELAY_C_STATE, 0); 307 308 rev = haltwo_read(sc, ctl, HAL2_REG_CTL_REV); 309 310 /* This bit is inverted, the test is correct */ 311 if (rev & HAL2_REV_AUDIO_PRESENT_N) { 312 aprint_error(": Audio hardware not present (revision %x)\n", 313 rev); 314 return; 315 } 316 317 if (cpu_intr_establish(haa->ha_irq, IPL_AUDIO, haltwo_intr, sc) 318 == NULL) { 319 aprint_error(": unable to establish interrupt\n"); 320 return; 321 } 322 323 aprint_naive(": Audio controller\n"); 324 325 aprint_normal(": HAL2 revision %d.%d.%d\n", (rev & 0x7000) >> 12, 326 (rev & 0x00F0) >> 4, rev & 0x000F); 327 328 if (haltwo_init_codec(sc, &sc->sc_dac)) { 329 aprint_error( 330 "haltwo_attach: unable to create DMA descriptor list\n"); 331 return; 332 } 333 334 /* XXX Magic PBUS CFGDMA values from Linux HAL2 driver XXX */ 335 bus_space_write_4(haa->ha_st, haa->ha_sh, HPC3_PBUS_CH0_CFGDMA, 336 0x8208844); 337 bus_space_write_4(haa->ha_st, haa->ha_sh, HPC3_PBUS_CH1_CFGDMA, 338 0x8208844); 339 340 /* Unmute output */ 341 /* XXX Add mute/unmute support to mixer ops? XXX */ 342 haltwo_write_indirect(sc, HAL2_IREG_DAC_C2, 0, 0); 343 344 /* Set master volume to zero */ 345 sc->sc_vol_left = sc->sc_vol_right = 0; 346 haltwo_write(sc, vol, HAL2_REG_VOL_LEFT, sc->sc_vol_left); 347 haltwo_write(sc, vol, HAL2_REG_VOL_RIGHT, sc->sc_vol_right); 348 349 audio_attach_mi(&haltwo_hw_if, sc, &sc->sc_dev); 350 } 351 352 static int 353 haltwo_intr(void *v) 354 { 355 struct haltwo_softc *sc; 356 int ret; 357 358 sc = v; 359 ret = 0; 360 if (bus_space_read_4(sc->sc_st, sc->sc_dma_sh, HPC3_PBUS_CH0_CTL) 361 & HPC3_PBUS_DMACTL_IRQ) { 362 sc->sc_dac.intr(sc->sc_dac.intr_arg); 363 364 ret = 1; 365 } else 366 DPRINTF(("haltwo_intr: Huh?\n")); 367 368 return ret; 369 } 370 371 static int 372 haltwo_query_encoding(void *v, struct audio_encoding *e) 373 { 374 375 switch (e->index) { 376 case 0: 377 strcpy(e->name, AudioEslinear_le); 378 e->encoding = AUDIO_ENCODING_SLINEAR_LE; 379 e->precision = 16; 380 e->flags = 0; 381 break; 382 383 case 1: 384 strcpy(e->name, AudioEslinear_be); 385 e->encoding = AUDIO_ENCODING_SLINEAR_BE; 386 e->precision = 16; 387 e->flags = 0; 388 break; 389 390 case 2: 391 strcpy(e->name, AudioEmulaw); 392 e->encoding = AUDIO_ENCODING_ULAW; 393 e->precision = 8; 394 e->flags = AUDIO_ENCODINGFLAG_EMULATED; 395 break; 396 397 default: 398 return EINVAL; 399 } 400 401 return 0; 402 } 403 404 static int 405 haltwo_set_params(void *v, int setmode, int usemode, 406 audio_params_t *play, audio_params_t *rec, 407 stream_filter_list_t *pfil, stream_filter_list_t *rfil) 408 { 409 audio_params_t hw; 410 struct haltwo_softc *sc; 411 int master, inc, mod; 412 uint16_t tmp; 413 414 sc = v; 415 if (play->sample_rate < 4000) 416 play->sample_rate = 4000; 417 if (play->sample_rate > 48000) 418 play->sample_rate = 48000; 419 420 if (44100 % play->sample_rate < 48000 % play->sample_rate) 421 master = 44100; 422 else 423 master = 48000; 424 425 /* HAL2 specification 3.1.2.21: Codecs should be driven with INC/MOD 426 * fractions equivalent to 4/N, where N is a positive integer. */ 427 inc = 4; 428 mod = master * inc / play->sample_rate; 429 430 /* Fixup upper layers idea of HW sample rate to the actual final rate */ 431 play->sample_rate = master * inc / mod; 432 433 DPRINTF(("haltwo_set_params: master = %d inc = %d mod = %d" 434 " sample_rate = %ld\n", master, inc, mod, 435 play->sample_rate)); 436 437 hw = *play; 438 switch (play->encoding) { 439 case AUDIO_ENCODING_ULAW: 440 if (play->precision != 8) 441 return EINVAL; 442 443 hw.encoding = AUDIO_ENCODING_SLINEAR_LE; 444 pfil->append(pfil, mulaw_to_linear16, &hw); 445 play = &hw; 446 break; 447 case AUDIO_ENCODING_SLINEAR_BE: 448 case AUDIO_ENCODING_SLINEAR_LE: 449 break; 450 451 default: 452 return EINVAL; 453 } 454 /* play points HW encoding */ 455 456 /* Setup samplerate to HW */ 457 haltwo_write_indirect(sc, HAL2_IREG_BRES1_C1, 458 master == 44100 ? 1 : 0, 0); 459 /* XXX Documentation disagrees but this seems to work XXX */ 460 haltwo_write_indirect(sc, HAL2_IREG_BRES1_C2, 461 inc, 0xFFFF & (inc - mod - 1)); 462 463 /* Setup endianness to HW */ 464 haltwo_read_indirect(sc, HAL2_IREG_DMA_END, &tmp, NULL); 465 if (play->encoding == AUDIO_ENCODING_SLINEAR_LE) 466 tmp |= HAL2_DMA_END_CODECTX; 467 else 468 tmp &= ~HAL2_DMA_END_CODECTX; 469 haltwo_write_indirect(sc, HAL2_IREG_DMA_END, tmp, 0); 470 471 /* Set PBUS channel, Bresenham clock source, number of channels to HW */ 472 haltwo_write_indirect(sc, HAL2_IREG_DAC_C1, 473 (0 << HAL2_C1_DMA_SHIFT) | 474 (1 << HAL2_C1_CLKID_SHIFT) | 475 (play->channels << HAL2_C1_DATAT_SHIFT), 0); 476 477 DPRINTF(("haltwo_set_params: hw_encoding = %d hw_channels = %d\n", 478 play->encoding, play->channels)); 479 480 return 0; 481 } 482 483 static int 484 haltwo_round_blocksize(void *v, int blocksize, 485 int mode, const audio_params_t *param) 486 { 487 488 /* XXX Make this smarter and support DMA descriptor chaining XXX */ 489 /* XXX Rounding to nearest PAGE_SIZE might work? XXX */ 490 return PAGE_SIZE; 491 } 492 493 static int 494 haltwo_halt_output(void *v) 495 { 496 struct haltwo_softc *sc; 497 498 sc = v; 499 /* Disable PBUS DMA */ 500 bus_space_write_4(sc->sc_st, sc->sc_dma_sh, HPC3_PBUS_CH0_CTL, 501 HPC3_PBUS_DMACTL_ACT_LD); 502 503 return 0; 504 } 505 506 static int 507 haltwo_halt_input(void *v) 508 { 509 510 return ENXIO; 511 } 512 513 static int 514 haltwo_getdev(void *v, struct audio_device *dev) 515 { 516 517 *dev = haltwo_device; 518 return 0; 519 } 520 521 static int 522 haltwo_set_port(void *v, mixer_ctrl_t *mc) 523 { 524 struct haltwo_softc *sc; 525 int lval, rval; 526 527 if (mc->type != AUDIO_MIXER_VALUE) 528 return EINVAL; 529 530 if (mc->un.value.num_channels == 1) 531 lval = rval = mc->un.value.level[AUDIO_MIXER_LEVEL_MONO]; 532 else if (mc->un.value.num_channels == 2) { 533 lval = mc->un.value.level[AUDIO_MIXER_LEVEL_LEFT]; 534 rval = mc->un.value.level[AUDIO_MIXER_LEVEL_RIGHT]; 535 } else 536 return EINVAL; 537 538 sc = v; 539 switch (mc->dev) { 540 case HALTWO_MASTER_VOL: 541 sc->sc_vol_left = lval; 542 sc->sc_vol_right = rval; 543 544 haltwo_write(sc, vol, HAL2_REG_VOL_LEFT, 545 sc->sc_vol_left); 546 haltwo_write(sc, vol, HAL2_REG_VOL_RIGHT, 547 sc->sc_vol_right); 548 break; 549 550 default: 551 return EINVAL; 552 } 553 554 return 0; 555 } 556 557 static int 558 haltwo_get_port(void *v, mixer_ctrl_t *mc) 559 { 560 struct haltwo_softc *sc; 561 int l, r; 562 563 switch (mc->dev) { 564 case HALTWO_MASTER_VOL: 565 sc = v; 566 l = sc->sc_vol_left; 567 r = sc->sc_vol_right; 568 break; 569 570 default: 571 return EINVAL; 572 } 573 574 if (mc->un.value.num_channels == 1) 575 mc->un.value.level[AUDIO_MIXER_LEVEL_MONO] = (l+r) / 2; 576 else if (mc->un.value.num_channels == 2) { 577 mc->un.value.level[AUDIO_MIXER_LEVEL_LEFT] = l; 578 mc->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] = r; 579 } else 580 return EINVAL; 581 582 return 0; 583 } 584 585 static int 586 haltwo_query_devinfo(void *v, mixer_devinfo_t *dev) 587 { 588 589 switch (dev->index) { 590 /* Mixer values */ 591 case HALTWO_MASTER_VOL: 592 dev->type = AUDIO_MIXER_VALUE; 593 dev->mixer_class = HALTWO_OUTPUT_CLASS; 594 dev->prev = dev->next = AUDIO_MIXER_LAST; 595 strcpy(dev->label.name, AudioNmaster); 596 dev->un.v.num_channels = 2; 597 strcpy(dev->un.v.units.name, AudioNvolume); 598 break; 599 600 /* Mixer classes */ 601 case HALTWO_OUTPUT_CLASS: 602 dev->type = AUDIO_MIXER_CLASS; 603 dev->mixer_class = HALTWO_OUTPUT_CLASS; 604 dev->next = dev->prev = AUDIO_MIXER_LAST; 605 strcpy(dev->label.name, AudioCoutputs); 606 break; 607 608 default: 609 return EINVAL; 610 } 611 612 return 0; 613 } 614 615 static int 616 haltwo_alloc_dmamem(struct haltwo_softc *sc, size_t size, 617 struct haltwo_dmabuf *p) 618 { 619 int err; 620 621 p->size = size; 622 623 /* XXX Check align/boundary XXX */ 624 /* XXX Pass flags and use them instead BUS_DMA_NOWAIT? XXX */ 625 err = bus_dmamem_alloc(sc->sc_dma_tag, p->size, 0, 0, p->dma_segs, 626 HALTWO_MAX_DMASEGS, &p->dma_segcount, BUS_DMA_NOWAIT); 627 if (err) 628 goto out; 629 630 /* XXX BUS_DMA_COHERENT? XXX */ 631 err = bus_dmamem_map(sc->sc_dma_tag, p->dma_segs, p->dma_segcount, 632 p->size, &p->kern_addr, BUS_DMA_NOWAIT | BUS_DMA_COHERENT); 633 if (err) 634 goto out_free; 635 636 /* XXX Just guessing ... XXX */ 637 err = bus_dmamap_create(sc->sc_dma_tag, p->size, HALTWO_MAX_DMASEGS, 638 PAGE_SIZE, 0, BUS_DMA_NOWAIT, &p->dma_map); 639 if (err) 640 goto out_free; 641 642 err = bus_dmamap_load(sc->sc_dma_tag, p->dma_map, p->kern_addr, 643 p->size, NULL, BUS_DMA_NOWAIT); 644 if (err) 645 goto out_destroy; 646 647 return 0; 648 649 out_destroy: 650 bus_dmamap_destroy(sc->sc_dma_tag, p->dma_map); 651 out_free: 652 bus_dmamem_free(sc->sc_dma_tag, p->dma_segs, p->dma_segcount); 653 out: 654 DPRINTF(("haltwo_alloc_dmamem failed: %d\n",err)); 655 656 return err; 657 } 658 659 static void * 660 haltwo_malloc(void *v, int direction, size_t size, struct malloc_type *type, 661 int flags) 662 { 663 struct haltwo_softc *sc; 664 struct haltwo_dmabuf *p; 665 666 DPRINTF(("haltwo_malloc size = %d\n", size)); 667 sc = v; 668 p = malloc(sizeof(struct haltwo_dmabuf), type, flags); 669 if (!p) 670 return 0; 671 672 if (haltwo_alloc_dmamem(sc, size, p)) { 673 free(p, type); 674 return 0; 675 } 676 677 p->next = sc->sc_dma_bufs; 678 sc->sc_dma_bufs = p; 679 680 return p->kern_addr; 681 } 682 683 static void 684 haltwo_free(void *v, void *addr, struct malloc_type *type) 685 { 686 struct haltwo_softc *sc; 687 struct haltwo_dmabuf *p, **pp; 688 689 sc = v; 690 for (pp = &sc->sc_dma_bufs; (p = *pp) != NULL; pp = &p->next) { 691 if (p->kern_addr == addr) { 692 *pp = p->next; 693 free(p, type); 694 return; 695 } 696 } 697 698 panic("haltwo_free: buffer not in list"); 699 } 700 701 static int 702 haltwo_get_props(void *v) 703 { 704 705 return 0; 706 } 707 708 static int 709 haltwo_trigger_output(void *v, void *start, void *end, int blksize, 710 void (*intr)(void *), void *intrarg, const audio_params_t *param) 711 { 712 struct haltwo_softc *sc; 713 struct haltwo_dmabuf *p; 714 uint16_t tmp; 715 uint32_t ctrl; 716 unsigned int fifobeg, fifoend, highwater; 717 718 DPRINTF(("haltwo_trigger_output start = %p end = %p blksize = %d" 719 " param = %p\n", start, end, blksize, param)); 720 sc = v; 721 for (p = sc->sc_dma_bufs; p != NULL; p = p->next) 722 if (p->kern_addr == start) 723 break; 724 725 if (p == NULL) { 726 printf("haltwo_trigger_output: buffer not in list\n"); 727 728 return EINVAL; 729 } 730 731 /* Disable PBUS DMA */ 732 bus_space_write_4(sc->sc_st, sc->sc_dma_sh, HPC3_PBUS_CH0_CTL, 733 HPC3_PBUS_DMACTL_ACT_LD); 734 735 /* Disable HAL2 codec DMA */ 736 haltwo_read_indirect(sc, HAL2_IREG_DMA_PORT_EN, &tmp, NULL); 737 haltwo_write_indirect(sc, HAL2_IREG_DMA_PORT_EN, 738 tmp & ~HAL2_DMA_PORT_EN_CODECTX, 0); 739 740 haltwo_setup_dma(sc, &sc->sc_dac, p, (char *)end - (char *)start, 741 blksize, intr, intrarg); 742 743 highwater = (param->channels * 4) >> 1; 744 fifobeg = 0; 745 fifoend = (param->channels * 8) >> 3; 746 747 DPRINTF(("haltwo_trigger_output: hw_channels = %d highwater = %d" 748 " fifobeg = %d fifoend = %d\n", param->hw_channels, highwater, 749 fifobeg, fifoend)); 750 751 ctrl = HPC3_PBUS_DMACTL_RT 752 | HPC3_PBUS_DMACTL_ACT_LD 753 | (highwater << HPC3_PBUS_DMACTL_HIGHWATER_SHIFT) 754 | (fifobeg << HPC3_PBUS_DMACTL_FIFOBEG_SHIFT) 755 | (fifoend << HPC3_PBUS_DMACTL_FIFOEND_SHIFT); 756 757 /* Using PBUS CH0 for DAC DMA */ 758 haltwo_write_indirect(sc, HAL2_IREG_DMA_DRV, 1, 0); 759 760 /* HAL2 is ready for action, now setup PBUS for DMA transfer */ 761 bus_space_write_4(sc->sc_st, sc->sc_dma_sh, HPC3_PBUS_CH0_DP, 762 sc->sc_dac.dma_seg.ds_addr); 763 bus_space_write_4(sc->sc_st, sc->sc_dma_sh, HPC3_PBUS_CH0_CTL, 764 ctrl | HPC3_PBUS_DMACTL_ACT); 765 766 /* Both HAL2 and PBUS have been setup, now start it up */ 767 haltwo_read_indirect(sc, HAL2_IREG_DMA_PORT_EN, &tmp, NULL); 768 haltwo_write_indirect(sc, HAL2_IREG_DMA_PORT_EN, 769 tmp | HAL2_DMA_PORT_EN_CODECTX, 0); 770 771 return 0; 772 } 773 774 static int 775 haltwo_trigger_input(void *v, void *start, void *end, int blksize, 776 void (*intr)(void *), void *intrarg, const audio_params_t *param) 777 { 778 struct haltwo_softc *sc; 779 struct haltwo_dmabuf *p; 780 781 DPRINTF(("haltwo_trigger_input start = %p end = %p blksize = %d\n", 782 start, end, blksize)); 783 sc = v; 784 for (p = sc->sc_dma_bufs; p != NULL; p = p->next) 785 if (p->kern_addr == start) 786 break; 787 788 if (p == NULL) { 789 printf("haltwo_trigger_input: buffer not in list\n"); 790 791 return EINVAL; 792 } 793 794 #if 0 795 haltwo_setup_dma(sc, &sc->sc_adc, p, (char *)end - (char *)start, 796 blksize, intr, intrarg); 797 #endif 798 799 return ENXIO; 800 } 801
Indexes created Sun Sep 28 16:09:52 GMT 2025