intr.h revision 1.18.2.2 1 /* $NetBSD: intr.h,v 1.18.2.2 2007/02/26 09:08:03 yamt Exp $ */
2
3 /*
4 * Copyright (c) 2000 Soren S. Jorvang
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. All advertising materials mentioning features or use of this software
16 * must display the following acknowledgement:
17 * This product includes software developed for the
18 * NetBSD Project. See http://www.NetBSD.org/ for
19 * information about NetBSD.
20 * 4. The name of the author may not be used to endorse or promote products
21 * derived from this software without specific prior written permission.
22 *
23 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
24 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
25 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
27 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
28 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
29 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
30 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
32 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35 #ifndef _SGIMIPS_INTR_H_
36 #define _SGIMIPS_INTR_H_
37
38 #define IPL_NONE 0 /* Disable only this interrupt. */
39 #define IPL_SOFT 1 /* generic software interrupts */
40 #define IPL_SOFTSERIAL 2 /* serial software interrupts */
41 #define IPL_SOFTNET 3 /* network software interrupts */
42 #define IPL_SOFTCLOCK 4 /* clock software interrupts */
43 #define IPL_BIO 5 /* Disable block I/O interrupts. */
44 #define IPL_NET 6 /* Disable network interrupts. */
45 #define IPL_TTY 7 /* Disable terminal interrupts. */
46 #define IPL_SERIAL IPL_TTY
47 #define IPL_LPT IPL_TTY
48 #define IPL_VM IPL_TTY
49 #define IPL_CLOCK 8 /* Disable clock interrupts. */
50 #define IPL_STATCLOCK IPL_CLOCK /* Disable profiling interrupts. */
51 #define IPL_HIGH 9 /* Disable all interrupts. */
52 #define IPL_SCHED IPL_HIGH
53 #define IPL_LOCK IPL_HIGH
54 #define NIPL 10
55
56 /* Interrupt sharing types. */
57 #define IST_NONE 0 /* none */
58 #define IST_PULSE 1 /* pulsed */
59 #define IST_EDGE 2 /* edge-triggered */
60 #define IST_LEVEL 3 /* level-triggered */
61
62 /* Soft interrupt numbers */
63 #define SI_SOFT 0
64 #define SI_SOFTCLOCK 1
65 #define SI_SOFTNET 2
66 #define SI_SOFTSERIAL 3
67
68 #define SI_NQUEUES 4
69
70 #define SI_QUEUENAMES { \
71 "misc", \
72 "serial", \
73 "net", \
74 "clock", \
75 }
76
77 #ifdef _KERNEL
78 #ifndef _LOCORE
79
80 #include <sys/queue.h>
81 #include <sys/types.h>
82 #include <sys/device.h>
83 #include <mips/cpuregs.h>
84
85 #define NINTR 32
86
87 struct sgimips_intrhand {
88 LIST_ENTRY(sgimips_intrhand)
89 ih_q;
90 int (*ih_fun) (void *);
91 void *ih_arg;
92 struct sgimips_intr *ih_intrhead;
93 struct sgimips_intrhand *ih_next;
94 int ih_pending;
95 };
96
97 struct sgimips_intr {
98 LIST_HEAD(,sgimips_intrhand)
99 intr_q;
100 struct evcnt ih_evcnt;
101 unsigned long intr_ipl;
102 };
103
104 extern struct sgimips_intrhand intrtab[];
105
106 extern int _splraise(int);
107 extern int _spllower(int);
108 extern int _splset(int);
109 extern int _splget(void);
110 extern void _splnone(void);
111 extern void _setsoftintr(int);
112 extern void _clrsoftintr(int);
113
114 extern const int *ipl2spl_table;
115
116 #define splhigh() _splraise(MIPS_INT_MASK)
117 #define spl0() (void)_spllower(0)
118 #define splx(s) (void)_splset(s)
119 #define splbio() _splraise(ipl2spl_table[IPL_BIO])
120 #define splnet() _splraise(ipl2spl_table[IPL_NET])
121 #define spltty() _splraise(ipl2spl_table[IPL_TTY])
122 #define splvm() spltty()
123 #define splclock() _splraise(ipl2spl_table[IPL_CLOCK])
124 #define splstatclock() splclock()
125
126 #define splsched() splhigh()
127 #define spllock() splhigh()
128 #define splserial() spltty()
129 #define spllpt() spltty()
130
131 #define splsoft() _splraise(MIPS_SOFT_INT_MASK_1)
132 #define splsoftclock() splsoft()
133 #define splsoftnet() splsoft()
134 #define splsoftserial() splsoft()
135
136 extern void * cpu_intr_establish(int, int, int (*)(void *), void *);
137
138 typedef int ipl_t;
139 typedef struct {
140 int _spl;
141 } ipl_cookie_t;
142
143 ipl_cookie_t makeiplcookie(ipl_t);
144
145 static inline int
146 splraiseipl(ipl_cookie_t icookie)
147 {
148
149 return _splraise(icookie._spl);
150 }
151
152 #include <mips/softintr.h>
153
154 #endif /* _LOCORE */
155 #endif /* !_KERNEL */
156
157 #endif /* !_SGIMIPS_INTR_H_ */
158