1 1.65 andvar /* $NetBSD: sci.c,v 1.65 2023/09/17 14:22:28 andvar Exp $ */ 2 1.1 itojun 3 1.1 itojun /*- 4 1.1 itojun * Copyright (C) 1999 T.Horiuchi and SAITOH Masanobu. All rights reserved. 5 1.1 itojun * 6 1.1 itojun * Redistribution and use in source and binary forms, with or without 7 1.1 itojun * modification, are permitted provided that the following conditions 8 1.1 itojun * are met: 9 1.1 itojun * 1. Redistributions of source code must retain the above copyright 10 1.1 itojun * notice, this list of conditions and the following disclaimer. 11 1.1 itojun * 2. Redistributions in binary form must reproduce the above copyright 12 1.1 itojun * notice, this list of conditions and the following disclaimer in the 13 1.1 itojun * documentation and/or other materials provided with the distribution. 14 1.1 itojun * 3. The name of the author may not be used to endorse or promote products 15 1.1 itojun * derived from this software without specific prior written permission. 16 1.1 itojun * 17 1.1 itojun * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 1.1 itojun * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 1.1 itojun * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 1.1 itojun * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 1.1 itojun * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 1.1 itojun * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 1.1 itojun * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 1.1 itojun * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 1.1 itojun * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 1.1 itojun * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 1.1 itojun */ 28 1.1 itojun 29 1.2 msaitoh /*- 30 1.2 msaitoh * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. 31 1.2 msaitoh * All rights reserved. 32 1.2 msaitoh * 33 1.2 msaitoh * This code is derived from software contributed to The NetBSD Foundation 34 1.2 msaitoh * by Charles M. Hannum. 35 1.2 msaitoh * 36 1.2 msaitoh * Redistribution and use in source and binary forms, with or without 37 1.2 msaitoh * modification, are permitted provided that the following conditions 38 1.2 msaitoh * are met: 39 1.2 msaitoh * 1. Redistributions of source code must retain the above copyright 40 1.2 msaitoh * notice, this list of conditions and the following disclaimer. 41 1.2 msaitoh * 2. Redistributions in binary form must reproduce the above copyright 42 1.2 msaitoh * notice, this list of conditions and the following disclaimer in the 43 1.2 msaitoh * documentation and/or other materials provided with the distribution. 44 1.2 msaitoh * 45 1.2 msaitoh * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 46 1.2 msaitoh * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 47 1.2 msaitoh * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 48 1.2 msaitoh * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 49 1.2 msaitoh * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 50 1.2 msaitoh * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 51 1.2 msaitoh * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 52 1.2 msaitoh * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 53 1.2 msaitoh * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 54 1.2 msaitoh * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 55 1.2 msaitoh * POSSIBILITY OF SUCH DAMAGE. 56 1.2 msaitoh */ 57 1.2 msaitoh 58 1.2 msaitoh /* 59 1.2 msaitoh * Copyright (c) 1991 The Regents of the University of California. 60 1.2 msaitoh * All rights reserved. 61 1.2 msaitoh * 62 1.2 msaitoh * Redistribution and use in source and binary forms, with or without 63 1.2 msaitoh * modification, are permitted provided that the following conditions 64 1.2 msaitoh * are met: 65 1.2 msaitoh * 1. Redistributions of source code must retain the above copyright 66 1.2 msaitoh * notice, this list of conditions and the following disclaimer. 67 1.2 msaitoh * 2. Redistributions in binary form must reproduce the above copyright 68 1.2 msaitoh * notice, this list of conditions and the following disclaimer in the 69 1.2 msaitoh * documentation and/or other materials provided with the distribution. 70 1.35 agc * 3. Neither the name of the University nor the names of its contributors 71 1.2 msaitoh * may be used to endorse or promote products derived from this software 72 1.2 msaitoh * without specific prior written permission. 73 1.2 msaitoh * 74 1.2 msaitoh * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 75 1.2 msaitoh * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 76 1.2 msaitoh * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 77 1.2 msaitoh * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 78 1.2 msaitoh * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 79 1.2 msaitoh * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 80 1.2 msaitoh * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 81 1.2 msaitoh * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 82 1.2 msaitoh * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 83 1.2 msaitoh * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 84 1.2 msaitoh * SUCH DAMAGE. 85 1.2 msaitoh * 86 1.2 msaitoh * @(#)com.c 7.5 (Berkeley) 5/16/91 87 1.2 msaitoh */ 88 1.2 msaitoh 89 1.2 msaitoh /* 90 1.2 msaitoh * SH internal serial driver 91 1.2 msaitoh * 92 1.2 msaitoh * This code is derived from both z8530tty.c and com.c 93 1.2 msaitoh */ 94 1.34 lukem 95 1.34 lukem #include <sys/cdefs.h> 96 1.65 andvar __KERNEL_RCSID(0, "$NetBSD: sci.c,v 1.65 2023/09/17 14:22:28 andvar Exp $"); 97 1.2 msaitoh 98 1.14 lukem #include "opt_kgdb.h" 99 1.1 itojun #include "opt_sci.h" 100 1.1 itojun 101 1.1 itojun #include <sys/param.h> 102 1.1 itojun #include <sys/systm.h> 103 1.1 itojun #include <sys/tty.h> 104 1.1 itojun #include <sys/proc.h> 105 1.1 itojun #include <sys/conf.h> 106 1.1 itojun #include <sys/file.h> 107 1.1 itojun #include <sys/syslog.h> 108 1.1 itojun #include <sys/kernel.h> 109 1.1 itojun #include <sys/device.h> 110 1.63 thorpej #include <sys/kmem.h> 111 1.42 elad #include <sys/kauth.h> 112 1.49 ad #include <sys/intr.h> 113 1.1 itojun 114 1.1 itojun #include <dev/cons.h> 115 1.1 itojun 116 1.19 uch #include <sh3/clock.h> 117 1.1 itojun #include <sh3/scireg.h> 118 1.22 uch #include <sh3/pfcreg.h> 119 1.1 itojun #include <sh3/tmureg.h> 120 1.22 uch #include <sh3/exception.h> 121 1.1 itojun 122 1.64 andvar #ifdef SCI_DEBUG 123 1.64 andvar int sci_debug = 1; 124 1.64 andvar #define DPRINTF(x) if (sci_debug) printf x 125 1.64 andvar #else 126 1.64 andvar #define DPRINTF(x) 127 1.64 andvar #endif 128 1.64 andvar 129 1.18 uch static void scistart(struct tty *); 130 1.18 uch static int sciparam(struct tty *, struct termios *); 131 1.1 itojun 132 1.18 uch void scicnprobe(struct consdev *); 133 1.18 uch void scicninit(struct consdev *); 134 1.18 uch void scicnputc(dev_t, int); 135 1.18 uch int scicngetc(dev_t); 136 1.18 uch void scicnpoolc(dev_t, int); 137 1.18 uch int sciintr(void *); 138 1.1 itojun 139 1.1 itojun struct sci_softc { 140 1.55 chs device_t sc_dev; /* boilerplate */ 141 1.1 itojun struct tty *sc_tty; 142 1.22 uch void *sc_si; 143 1.47 ad callout_t sc_diag_ch; 144 1.7 thorpej 145 1.1 itojun #if 0 146 1.1 itojun bus_space_tag_t sc_iot; /* ISA i/o space identifier */ 147 1.1 itojun bus_space_handle_t sc_ioh; /* ISA io handle */ 148 1.1 itojun 149 1.1 itojun int sc_drq; 150 1.1 itojun 151 1.1 itojun int sc_frequency; 152 1.1 itojun #endif 153 1.1 itojun 154 1.1 itojun u_int sc_overflows, 155 1.1 itojun sc_floods, 156 1.1 itojun sc_errors; /* number of retries so far */ 157 1.1 itojun u_char sc_status[7]; /* copy of registers */ 158 1.1 itojun 159 1.1 itojun int sc_hwflags; 160 1.1 itojun int sc_swflags; 161 1.1 itojun u_int sc_fifolen; /* XXX always 0? */ 162 1.1 itojun 163 1.1 itojun u_int sc_r_hiwat, 164 1.1 itojun sc_r_lowat; 165 1.1 itojun u_char *volatile sc_rbget, 166 1.1 itojun *volatile sc_rbput; 167 1.1 itojun volatile u_int sc_rbavail; 168 1.1 itojun u_char *sc_rbuf, 169 1.1 itojun *sc_ebuf; 170 1.1 itojun 171 1.1 itojun u_char *sc_tba; /* transmit buffer address */ 172 1.1 itojun u_int sc_tbc, /* transmit byte count */ 173 1.1 itojun sc_heldtbc; 174 1.1 itojun 175 1.2 msaitoh volatile u_char sc_rx_flags, /* receiver blocked */ 176 1.1 itojun #define RX_TTY_BLOCKED 0x01 177 1.1 itojun #define RX_TTY_OVERFLOWED 0x02 178 1.1 itojun #define RX_IBUF_BLOCKED 0x04 179 1.1 itojun #define RX_IBUF_OVERFLOWED 0x08 180 1.1 itojun #define RX_ANY_BLOCK 0x0f 181 1.3 msaitoh sc_tx_busy, /* working on an output chunk */ 182 1.3 msaitoh sc_tx_done, /* done with one output chunk */ 183 1.2 msaitoh sc_tx_stopped, /* H/W level stop (lost CTS) */ 184 1.2 msaitoh sc_st_check, /* got a status interrupt */ 185 1.1 itojun sc_rx_ready; 186 1.1 itojun 187 1.1 itojun volatile u_char sc_heldchange; 188 1.1 itojun }; 189 1.1 itojun 190 1.1 itojun /* controller driver configuration */ 191 1.55 chs static int sci_match(device_t, cfdata_t, void *); 192 1.55 chs static void sci_attach(device_t, device_t, void *); 193 1.1 itojun 194 1.18 uch void sci_break(struct sci_softc *, int); 195 1.18 uch void sci_iflush(struct sci_softc *); 196 1.1 itojun 197 1.1 itojun #define integrate static inline 198 1.18 uch void scisoft(void *); 199 1.47 ad 200 1.18 uch integrate void sci_rxsoft(struct sci_softc *, struct tty *); 201 1.18 uch integrate void sci_txsoft(struct sci_softc *, struct tty *); 202 1.18 uch integrate void sci_stsoft(struct sci_softc *, struct tty *); 203 1.18 uch integrate void sci_schedrx(struct sci_softc *); 204 1.18 uch void scidiag(void *); 205 1.1 itojun 206 1.61 christos #define SCIUNIT(x) TTUNIT(x) 207 1.61 christos #define SCIDIALOUT(x) TTDIALOUT(x) 208 1.1 itojun 209 1.1 itojun /* Hardware flag masks */ 210 1.1 itojun #define SCI_HW_NOIEN 0x01 211 1.1 itojun #define SCI_HW_FIFO 0x02 212 1.1 itojun #define SCI_HW_FLOW 0x08 213 1.1 itojun #define SCI_HW_DEV_OK 0x20 214 1.1 itojun #define SCI_HW_CONSOLE 0x40 215 1.1 itojun #define SCI_HW_KGDB 0x80 216 1.1 itojun 217 1.1 itojun /* Buffer size for character buffer */ 218 1.1 itojun #define SCI_RING_SIZE 2048 219 1.1 itojun 220 1.1 itojun /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 221 1.1 itojun u_int sci_rbuf_hiwat = (SCI_RING_SIZE * 1) / 4; 222 1.1 itojun u_int sci_rbuf_lowat = (SCI_RING_SIZE * 3) / 4; 223 1.1 itojun 224 1.25 uch #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 225 1.1 itojun int sciconscflag = CONMODE; 226 1.8 msaitoh int sciisconsole = 0; 227 1.1 itojun 228 1.6 msaitoh #ifdef SCICN_SPEED 229 1.6 msaitoh int scicn_speed = SCICN_SPEED; 230 1.6 msaitoh #else 231 1.6 msaitoh int scicn_speed = 9600; 232 1.6 msaitoh #endif 233 1.6 msaitoh 234 1.1 itojun #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 235 1.1 itojun 236 1.1 itojun u_int sci_rbuf_size = SCI_RING_SIZE; 237 1.1 itojun 238 1.55 chs CFATTACH_DECL_NEW(sci, sizeof(struct sci_softc), 239 1.32 thorpej sci_match, sci_attach, NULL, NULL); 240 1.1 itojun 241 1.1 itojun extern struct cfdriver sci_cd; 242 1.1 itojun 243 1.36 chs static int sci_attached; 244 1.36 chs 245 1.28 gehenna dev_type_open(sciopen); 246 1.28 gehenna dev_type_close(sciclose); 247 1.28 gehenna dev_type_read(sciread); 248 1.28 gehenna dev_type_write(sciwrite); 249 1.28 gehenna dev_type_ioctl(sciioctl); 250 1.28 gehenna dev_type_stop(scistop); 251 1.28 gehenna dev_type_tty(scitty); 252 1.28 gehenna dev_type_poll(scipoll); 253 1.28 gehenna 254 1.28 gehenna const struct cdevsw sci_cdevsw = { 255 1.58 dholland .d_open = sciopen, 256 1.58 dholland .d_close = sciclose, 257 1.58 dholland .d_read = sciread, 258 1.58 dholland .d_write = sciwrite, 259 1.58 dholland .d_ioctl = sciioctl, 260 1.58 dholland .d_stop = scistop, 261 1.58 dholland .d_tty = scitty, 262 1.58 dholland .d_poll = scipoll, 263 1.58 dholland .d_mmap = nommap, 264 1.58 dholland .d_kqfilter = ttykqfilter, 265 1.60 dholland .d_discard = nodiscard, 266 1.58 dholland .d_flag = D_TTY 267 1.28 gehenna }; 268 1.1 itojun 269 1.18 uch void InitializeSci (unsigned int); 270 1.1 itojun 271 1.1 itojun /* 272 1.1 itojun * following functions are debugging prupose only 273 1.1 itojun */ 274 1.25 uch #define CR 0x0D 275 1.25 uch #define I2C_ADRS (*(volatile unsigned int *)0xa8000000) 276 1.25 uch #define USART_ON (unsigned int)~0x08 277 1.1 itojun 278 1.18 uch void sci_putc(unsigned char); 279 1.18 uch unsigned char sci_getc(void); 280 1.18 uch int SciErrCheck(void); 281 1.1 itojun 282 1.1 itojun /* 283 1.1 itojun * InitializeSci 284 1.1 itojun * : unsigned int bps; 285 1.1 itojun * : SCI(Serial Communication Interface) 286 1.1 itojun */ 287 1.1 itojun 288 1.1 itojun void 289 1.18 uch InitializeSci(unsigned int bps) 290 1.1 itojun { 291 1.1 itojun 292 1.1 itojun /* Initialize SCR */ 293 1.3 msaitoh SHREG_SCSCR = 0x00; 294 1.1 itojun 295 1.3 msaitoh /* Serial Mode Register */ 296 1.3 msaitoh SHREG_SCSMR = 0x00; /* Async,8bit,NonParity,Even,1Stop,NoMulti */ 297 1.1 itojun 298 1.3 msaitoh /* Bit Rate Register */ 299 1.20 uch SHREG_SCBRR = divrnd(sh_clock_get_pclock(), 32 * bps) - 1; 300 1.1 itojun 301 1.3 msaitoh /* 302 1.3 msaitoh * wait 1mSec, because Send/Recv must begin 1 bit period after 303 1.3 msaitoh * BRR is set. 304 1.3 msaitoh */ 305 1.19 uch delay(1000); 306 1.1 itojun 307 1.15 wiz /* Send permission, Receive permission ON */ 308 1.3 msaitoh SHREG_SCSCR = SCSCR_TE | SCSCR_RE; 309 1.1 itojun 310 1.6 msaitoh /* Serial Status Register */ 311 1.1 itojun SHREG_SCSSR &= SCSSR_TDRE; /* Clear Status */ 312 1.1 itojun 313 1.1 itojun #if 0 314 1.1 itojun I2C_ADRS &= ~0x08; /* enable RS-232C */ 315 1.1 itojun #endif 316 1.1 itojun } 317 1.1 itojun 318 1.1 itojun 319 1.1 itojun /* 320 1.11 msaitoh * sci_putc 321 1.1 itojun * : unsigned char c; 322 1.1 itojun */ 323 1.1 itojun void 324 1.18 uch sci_putc(unsigned char c) 325 1.1 itojun { 326 1.11 msaitoh 327 1.1 itojun /* wait for ready */ 328 1.37 matt while ((SHREG_SCSSR & SCSSR_TDRE) == 0) 329 1.1 itojun ; 330 1.1 itojun 331 1.1 itojun /* write send data to send register */ 332 1.1 itojun SHREG_SCTDR = c; 333 1.1 itojun 334 1.1 itojun /* clear ready flag */ 335 1.1 itojun SHREG_SCSSR &= ~SCSSR_TDRE; 336 1.1 itojun } 337 1.1 itojun 338 1.1 itojun /* 339 1.1 itojun * : SciErrCheck 340 1.1 itojun * 0x20 = over run 341 1.1 itojun * 0x10 = frame error 342 1.1 itojun * 0x80 = parity error 343 1.1 itojun */ 344 1.1 itojun int 345 1.1 itojun SciErrCheck(void) 346 1.1 itojun { 347 1.1 itojun 348 1.1 itojun return(SHREG_SCSSR & (SCSSR_ORER | SCSSR_FER | SCSSR_PER)); 349 1.1 itojun } 350 1.1 itojun 351 1.1 itojun /* 352 1.11 msaitoh * sci_getc 353 1.1 itojun */ 354 1.1 itojun unsigned char 355 1.11 msaitoh sci_getc(void) 356 1.1 itojun { 357 1.1 itojun unsigned char c, err_c; 358 1.1 itojun 359 1.1 itojun while (((err_c = SHREG_SCSSR) 360 1.1 itojun & (SCSSR_RDRF | SCSSR_ORER | SCSSR_FER | SCSSR_PER)) == 0) 361 1.1 itojun ; 362 1.9 msaitoh if ((err_c & (SCSSR_ORER | SCSSR_FER | SCSSR_PER)) != 0) { 363 1.9 msaitoh SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_FER | SCSSR_PER); 364 1.1 itojun return(err_c |= 0x80); 365 1.9 msaitoh } 366 1.1 itojun 367 1.1 itojun c = SHREG_SCRDR; 368 1.1 itojun 369 1.1 itojun SHREG_SCSSR &= ~SCSSR_RDRF; 370 1.1 itojun 371 1.1 itojun return(c); 372 1.1 itojun } 373 1.1 itojun 374 1.1 itojun static int 375 1.56 chs sci_match(device_t parent, cfdata_t cf, void *aux) 376 1.1 itojun { 377 1.1 itojun 378 1.55 chs if (strcmp(cf->cf_name, "sci") || sci_attached) 379 1.1 itojun return 0; 380 1.1 itojun 381 1.1 itojun return 1; 382 1.1 itojun } 383 1.1 itojun 384 1.1 itojun static void 385 1.55 chs sci_attach(device_t parent, device_t self, void *aux) 386 1.1 itojun { 387 1.55 chs struct sci_softc *sc = device_private(self); 388 1.1 itojun struct tty *tp; 389 1.1 itojun 390 1.36 chs sci_attached = 1; 391 1.36 chs 392 1.57 tsutsui sc->sc_dev = self; 393 1.1 itojun sc->sc_hwflags = 0; /* XXX */ 394 1.1 itojun sc->sc_swflags = 0; /* XXX */ 395 1.1 itojun sc->sc_fifolen = 0; /* XXX */ 396 1.1 itojun 397 1.8 msaitoh if (sciisconsole) { 398 1.8 msaitoh SET(sc->sc_hwflags, SCI_HW_CONSOLE); 399 1.8 msaitoh SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 400 1.55 chs printf("\n%s: console\n", device_xname(self)); 401 1.8 msaitoh } else { 402 1.8 msaitoh InitializeSci(9600); 403 1.8 msaitoh printf("\n"); 404 1.8 msaitoh } 405 1.1 itojun 406 1.47 ad callout_init(&sc->sc_diag_ch, 0); 407 1.7 thorpej 408 1.22 uch intc_intr_establish(SH_INTEVT_SCI_ERI, IST_LEVEL, IPL_SERIAL, sciintr, 409 1.22 uch sc); 410 1.22 uch intc_intr_establish(SH_INTEVT_SCI_RXI, IST_LEVEL, IPL_SERIAL, sciintr, 411 1.22 uch sc); 412 1.22 uch intc_intr_establish(SH_INTEVT_SCI_TXI, IST_LEVEL, IPL_SERIAL, sciintr, 413 1.22 uch sc); 414 1.22 uch intc_intr_establish(SH_INTEVT_SCI_TEI, IST_LEVEL, IPL_SERIAL, sciintr, 415 1.22 uch sc); 416 1.1 itojun 417 1.49 ad sc->sc_si = softint_establish(SOFTINT_SERIAL, scisoft, sc); 418 1.8 msaitoh SET(sc->sc_hwflags, SCI_HW_DEV_OK); 419 1.1 itojun 420 1.53 rmind tp = tty_alloc(); 421 1.1 itojun tp->t_oproc = scistart; 422 1.1 itojun tp->t_param = sciparam; 423 1.1 itojun tp->t_hwiflow = NULL; 424 1.1 itojun 425 1.1 itojun sc->sc_tty = tp; 426 1.63 thorpej sc->sc_rbuf = kmem_alloc(sci_rbuf_size << 1, KM_SLEEP); 427 1.1 itojun sc->sc_ebuf = sc->sc_rbuf + (sci_rbuf_size << 1); 428 1.1 itojun 429 1.1 itojun tty_attach(tp); 430 1.1 itojun } 431 1.1 itojun 432 1.1 itojun /* 433 1.1 itojun * Start or restart transmission. 434 1.1 itojun */ 435 1.1 itojun static void 436 1.18 uch scistart(struct tty *tp) 437 1.1 itojun { 438 1.51 cegger struct sci_softc *sc = device_lookup_private(&sci_cd,SCIUNIT(tp->t_dev)); 439 1.1 itojun int s; 440 1.1 itojun 441 1.1 itojun s = spltty(); 442 1.1 itojun if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 443 1.1 itojun goto out; 444 1.1 itojun if (sc->sc_tx_stopped) 445 1.1 itojun goto out; 446 1.49 ad if (!ttypull(tp)) 447 1.49 ad goto out; 448 1.1 itojun 449 1.1 itojun /* Grab the first contiguous region of buffer space. */ 450 1.1 itojun { 451 1.1 itojun u_char *tba; 452 1.1 itojun int tbc; 453 1.1 itojun 454 1.1 itojun tba = tp->t_outq.c_cf; 455 1.1 itojun tbc = ndqb(&tp->t_outq, 0); 456 1.1 itojun 457 1.1 itojun (void)splserial(); 458 1.1 itojun 459 1.1 itojun sc->sc_tba = tba; 460 1.1 itojun sc->sc_tbc = tbc; 461 1.1 itojun } 462 1.1 itojun 463 1.1 itojun SET(tp->t_state, TS_BUSY); 464 1.1 itojun sc->sc_tx_busy = 1; 465 1.1 itojun 466 1.1 itojun /* Enable transmit completion interrupts if necessary. */ 467 1.1 itojun SHREG_SCSCR |= SCSCR_TIE | SCSCR_RIE; 468 1.1 itojun 469 1.1 itojun /* Output the first byte of the contiguous buffer. */ 470 1.1 itojun { 471 1.1 itojun if (sc->sc_tbc > 0) { 472 1.11 msaitoh sci_putc(*(sc->sc_tba)); 473 1.1 itojun sc->sc_tba++; 474 1.1 itojun sc->sc_tbc--; 475 1.1 itojun } 476 1.1 itojun } 477 1.1 itojun out: 478 1.1 itojun splx(s); 479 1.1 itojun return; 480 1.1 itojun } 481 1.1 itojun 482 1.1 itojun /* 483 1.1 itojun * Set SCI tty parameters from termios. 484 1.1 itojun * XXX - Should just copy the whole termios after 485 1.1 itojun * making sure all the changes could be done. 486 1.1 itojun */ 487 1.1 itojun static int 488 1.18 uch sciparam(struct tty *tp, struct termios *t) 489 1.1 itojun { 490 1.51 cegger struct sci_softc *sc = device_lookup_private(&sci_cd, SCIUNIT(tp->t_dev)); 491 1.1 itojun int ospeed = t->c_ospeed; 492 1.1 itojun int s; 493 1.1 itojun 494 1.55 chs if (!device_is_active(sc->sc_dev)) 495 1.1 itojun return (EIO); 496 1.1 itojun 497 1.1 itojun /* Check requested parameters. */ 498 1.1 itojun if (ospeed < 0) 499 1.1 itojun return (EINVAL); 500 1.1 itojun if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 501 1.1 itojun return (EINVAL); 502 1.1 itojun 503 1.1 itojun /* 504 1.1 itojun * For the console, always force CLOCAL and !HUPCL, so that the port 505 1.1 itojun * is always active. 506 1.1 itojun */ 507 1.1 itojun if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 508 1.1 itojun ISSET(sc->sc_hwflags, SCI_HW_CONSOLE)) { 509 1.1 itojun SET(t->c_cflag, CLOCAL); 510 1.1 itojun CLR(t->c_cflag, HUPCL); 511 1.1 itojun } 512 1.1 itojun 513 1.1 itojun /* 514 1.1 itojun * If there were no changes, don't do anything. This avoids dropping 515 1.1 itojun * input and improves performance when all we did was frob things like 516 1.1 itojun * VMIN and VTIME. 517 1.1 itojun */ 518 1.1 itojun if (tp->t_ospeed == t->c_ospeed && 519 1.1 itojun tp->t_cflag == t->c_cflag) 520 1.1 itojun return (0); 521 1.1 itojun 522 1.1 itojun #if 0 523 1.1 itojun /* XXX (msaitoh) */ 524 1.1 itojun lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 525 1.1 itojun #endif 526 1.1 itojun 527 1.1 itojun s = splserial(); 528 1.1 itojun 529 1.1 itojun /* 530 1.1 itojun * Set the FIFO threshold based on the receive speed. 531 1.1 itojun * 532 1.1 itojun * * If it's a low speed, it's probably a mouse or some other 533 1.1 itojun * interactive device, so set the threshold low. 534 1.1 itojun * * If it's a high speed, trim the trigger level down to prevent 535 1.1 itojun * overflows. 536 1.1 itojun * * Otherwise set it a bit higher. 537 1.1 itojun */ 538 1.1 itojun #if 0 539 1.1 itojun /* XXX (msaitoh) */ 540 1.1 itojun if (ISSET(sc->sc_hwflags, SCI_HW_HAYESP)) 541 1.1 itojun sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 542 1.1 itojun else if (ISSET(sc->sc_hwflags, SCI_HW_FIFO)) 543 1.1 itojun sc->sc_fifo = FIFO_ENABLE | 544 1.1 itojun (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : 545 1.1 itojun t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4); 546 1.1 itojun else 547 1.1 itojun sc->sc_fifo = 0; 548 1.1 itojun #endif 549 1.1 itojun 550 1.1 itojun /* And copy to tty. */ 551 1.1 itojun tp->t_ispeed = 0; 552 1.1 itojun tp->t_ospeed = t->c_ospeed; 553 1.1 itojun tp->t_cflag = t->c_cflag; 554 1.1 itojun 555 1.1 itojun if (!sc->sc_heldchange) { 556 1.1 itojun if (sc->sc_tx_busy) { 557 1.1 itojun sc->sc_heldtbc = sc->sc_tbc; 558 1.1 itojun sc->sc_tbc = 0; 559 1.1 itojun sc->sc_heldchange = 1; 560 1.1 itojun } 561 1.1 itojun #if 0 562 1.1 itojun /* XXX (msaitoh) */ 563 1.1 itojun else 564 1.1 itojun sci_loadchannelregs(sc); 565 1.1 itojun #endif 566 1.1 itojun } 567 1.1 itojun 568 1.1 itojun if (!ISSET(t->c_cflag, CHWFLOW)) { 569 1.1 itojun /* Disable the high water mark. */ 570 1.1 itojun sc->sc_r_hiwat = 0; 571 1.1 itojun sc->sc_r_lowat = 0; 572 1.1 itojun if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 573 1.1 itojun CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 574 1.1 itojun sci_schedrx(sc); 575 1.1 itojun } 576 1.1 itojun } else { 577 1.1 itojun sc->sc_r_hiwat = sci_rbuf_hiwat; 578 1.1 itojun sc->sc_r_lowat = sci_rbuf_lowat; 579 1.1 itojun } 580 1.1 itojun 581 1.1 itojun splx(s); 582 1.1 itojun 583 1.64 andvar DPRINTF(("%s: sciparam\n", device_xname(sc->sc_dev))); 584 1.1 itojun 585 1.1 itojun if (!ISSET(t->c_cflag, CHWFLOW)) { 586 1.1 itojun if (sc->sc_tx_stopped) { 587 1.1 itojun sc->sc_tx_stopped = 0; 588 1.1 itojun scistart(tp); 589 1.1 itojun } 590 1.1 itojun } 591 1.1 itojun 592 1.1 itojun return (0); 593 1.1 itojun } 594 1.1 itojun 595 1.1 itojun void 596 1.18 uch sci_iflush(struct sci_softc *sc) 597 1.1 itojun { 598 1.1 itojun unsigned char err_c; 599 1.1 itojun 600 1.1 itojun if (((err_c = SHREG_SCSSR) 601 1.9 msaitoh & (SCSSR_RDRF | SCSSR_ORER | SCSSR_FER | SCSSR_PER)) != 0) { 602 1.1 itojun 603 1.9 msaitoh if ((err_c & (SCSSR_ORER | SCSSR_FER | SCSSR_PER)) != 0) { 604 1.9 msaitoh SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_FER | SCSSR_PER); 605 1.1 itojun return; 606 1.9 msaitoh } 607 1.1 itojun 608 1.59 msaitoh (void)SHREG_SCRDR; 609 1.1 itojun 610 1.1 itojun SHREG_SCSSR &= ~SCSSR_RDRF; 611 1.1 itojun } 612 1.1 itojun } 613 1.1 itojun 614 1.1 itojun int 615 1.39 christos sciopen(dev_t dev, int flag, int mode, struct lwp *l) 616 1.1 itojun { 617 1.1 itojun struct sci_softc *sc; 618 1.1 itojun struct tty *tp; 619 1.1 itojun int s, s2; 620 1.1 itojun int error; 621 1.1 itojun 622 1.51 cegger sc = device_lookup_private(&sci_cd, SCIUNIT(dev)); 623 1.1 itojun if (sc == 0 || !ISSET(sc->sc_hwflags, SCI_HW_DEV_OK) || 624 1.1 itojun sc->sc_rbuf == NULL) 625 1.1 itojun return (ENXIO); 626 1.1 itojun 627 1.55 chs if (!device_is_active(sc->sc_dev)) 628 1.1 itojun return (ENXIO); 629 1.1 itojun 630 1.1 itojun #ifdef KGDB 631 1.1 itojun /* 632 1.1 itojun * If this is the kgdb port, no other use is permitted. 633 1.1 itojun */ 634 1.1 itojun if (ISSET(sc->sc_hwflags, SCI_HW_KGDB)) 635 1.1 itojun return (EBUSY); 636 1.1 itojun #endif 637 1.1 itojun 638 1.1 itojun tp = sc->sc_tty; 639 1.1 itojun 640 1.44 elad if (kauth_authorize_device_tty(l->l_cred, KAUTH_DEVICE_TTY_OPEN, tp)) 641 1.1 itojun return (EBUSY); 642 1.1 itojun 643 1.1 itojun s = spltty(); 644 1.1 itojun 645 1.1 itojun /* 646 1.1 itojun * Do the following iff this is a first open. 647 1.1 itojun */ 648 1.1 itojun if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 649 1.1 itojun struct termios t; 650 1.1 itojun 651 1.1 itojun tp->t_dev = dev; 652 1.1 itojun 653 1.1 itojun s2 = splserial(); 654 1.1 itojun 655 1.1 itojun /* Turn on interrupts. */ 656 1.1 itojun SHREG_SCSCR |= SCSCR_TIE | SCSCR_RIE; 657 1.1 itojun 658 1.1 itojun splx(s2); 659 1.1 itojun 660 1.1 itojun /* 661 1.1 itojun * Initialize the termios status to the defaults. Add in the 662 1.1 itojun * sticky bits from TIOCSFLAGS. 663 1.1 itojun */ 664 1.1 itojun t.c_ispeed = 0; 665 1.1 itojun if (ISSET(sc->sc_hwflags, SCI_HW_CONSOLE)) { 666 1.6 msaitoh t.c_ospeed = scicn_speed; 667 1.1 itojun t.c_cflag = sciconscflag; 668 1.1 itojun } else { 669 1.1 itojun t.c_ospeed = TTYDEF_SPEED; 670 1.1 itojun t.c_cflag = TTYDEF_CFLAG; 671 1.1 itojun } 672 1.1 itojun if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 673 1.1 itojun SET(t.c_cflag, CLOCAL); 674 1.1 itojun if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 675 1.1 itojun SET(t.c_cflag, CRTSCTS); 676 1.1 itojun if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 677 1.1 itojun SET(t.c_cflag, MDMBUF); 678 1.1 itojun /* Make sure sciparam() will do something. */ 679 1.1 itojun tp->t_ospeed = 0; 680 1.1 itojun (void) sciparam(tp, &t); 681 1.1 itojun tp->t_iflag = TTYDEF_IFLAG; 682 1.1 itojun tp->t_oflag = TTYDEF_OFLAG; 683 1.1 itojun tp->t_lflag = TTYDEF_LFLAG; 684 1.1 itojun ttychars(tp); 685 1.1 itojun ttsetwater(tp); 686 1.1 itojun 687 1.1 itojun s2 = splserial(); 688 1.1 itojun 689 1.1 itojun /* Clear the input ring, and unblock. */ 690 1.1 itojun sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 691 1.1 itojun sc->sc_rbavail = sci_rbuf_size; 692 1.1 itojun sci_iflush(sc); 693 1.1 itojun CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 694 1.1 itojun #if 0 695 1.1 itojun /* XXX (msaitoh) */ 696 1.1 itojun sci_hwiflow(sc); 697 1.1 itojun #endif 698 1.1 itojun 699 1.64 andvar DPRINTF(("%s: sciopen\n", device_xname(sc->sc_dev))); 700 1.1 itojun 701 1.1 itojun splx(s2); 702 1.1 itojun } 703 1.1 itojun 704 1.1 itojun splx(s); 705 1.1 itojun 706 1.1 itojun error = ttyopen(tp, SCIDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 707 1.1 itojun if (error) 708 1.1 itojun goto bad; 709 1.1 itojun 710 1.10 eeh error = (*tp->t_linesw->l_open)(dev, tp); 711 1.1 itojun if (error) 712 1.1 itojun goto bad; 713 1.1 itojun 714 1.1 itojun return (0); 715 1.1 itojun 716 1.1 itojun bad: 717 1.1 itojun 718 1.1 itojun return (error); 719 1.1 itojun } 720 1.1 itojun 721 1.1 itojun int 722 1.39 christos sciclose(dev_t dev, int flag, int mode, struct lwp *l) 723 1.1 itojun { 724 1.51 cegger struct sci_softc *sc = device_lookup_private(&sci_cd, SCIUNIT(dev)); 725 1.1 itojun struct tty *tp = sc->sc_tty; 726 1.1 itojun 727 1.1 itojun /* XXX This is for cons.c. */ 728 1.1 itojun if (!ISSET(tp->t_state, TS_ISOPEN)) 729 1.1 itojun return (0); 730 1.1 itojun 731 1.10 eeh (*tp->t_linesw->l_close)(tp, flag); 732 1.1 itojun ttyclose(tp); 733 1.1 itojun 734 1.55 chs if (!device_is_active(sc->sc_dev)) 735 1.1 itojun return (0); 736 1.1 itojun 737 1.1 itojun return (0); 738 1.1 itojun } 739 1.1 itojun 740 1.1 itojun int 741 1.18 uch sciread(dev_t dev, struct uio *uio, int flag) 742 1.1 itojun { 743 1.51 cegger struct sci_softc *sc = device_lookup_private(&sci_cd, SCIUNIT(dev)); 744 1.1 itojun struct tty *tp = sc->sc_tty; 745 1.1 itojun 746 1.10 eeh return ((*tp->t_linesw->l_read)(tp, uio, flag)); 747 1.1 itojun } 748 1.1 itojun 749 1.1 itojun int 750 1.18 uch sciwrite(dev_t dev, struct uio *uio, int flag) 751 1.1 itojun { 752 1.51 cegger struct sci_softc *sc = device_lookup_private(&sci_cd, SCIUNIT(dev)); 753 1.1 itojun struct tty *tp = sc->sc_tty; 754 1.1 itojun 755 1.10 eeh return ((*tp->t_linesw->l_write)(tp, uio, flag)); 756 1.13 scw } 757 1.13 scw 758 1.13 scw int 759 1.39 christos scipoll(dev_t dev, int events, struct lwp *l) 760 1.13 scw { 761 1.51 cegger struct sci_softc *sc = device_lookup_private(&sci_cd, SCIUNIT(dev)); 762 1.13 scw struct tty *tp = sc->sc_tty; 763 1.25 uch 764 1.39 christos return ((*tp->t_linesw->l_poll)(tp, events, l)); 765 1.1 itojun } 766 1.1 itojun 767 1.1 itojun struct tty * 768 1.18 uch scitty(dev_t dev) 769 1.1 itojun { 770 1.51 cegger struct sci_softc *sc = device_lookup_private(&sci_cd, SCIUNIT(dev)); 771 1.1 itojun struct tty *tp = sc->sc_tty; 772 1.1 itojun 773 1.1 itojun return (tp); 774 1.1 itojun } 775 1.1 itojun 776 1.1 itojun int 777 1.46 christos sciioctl(dev_t dev, u_long cmd, void *data, int flag, struct lwp *l) 778 1.1 itojun { 779 1.51 cegger struct sci_softc *sc = device_lookup_private(&sci_cd, SCIUNIT(dev)); 780 1.1 itojun struct tty *tp = sc->sc_tty; 781 1.1 itojun int error; 782 1.1 itojun int s; 783 1.1 itojun 784 1.55 chs if (!device_is_active(sc->sc_dev)) 785 1.1 itojun return (EIO); 786 1.1 itojun 787 1.39 christos error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l); 788 1.21 atatat if (error != EPASSTHROUGH) 789 1.1 itojun return (error); 790 1.1 itojun 791 1.39 christos error = ttioctl(tp, cmd, data, flag, l); 792 1.21 atatat if (error != EPASSTHROUGH) 793 1.1 itojun return (error); 794 1.1 itojun 795 1.1 itojun error = 0; 796 1.1 itojun 797 1.1 itojun s = splserial(); 798 1.1 itojun 799 1.1 itojun switch (cmd) { 800 1.1 itojun case TIOCSBRK: 801 1.5 msaitoh sci_break(sc, 1); 802 1.1 itojun break; 803 1.1 itojun 804 1.1 itojun case TIOCCBRK: 805 1.5 msaitoh sci_break(sc, 0); 806 1.1 itojun break; 807 1.5 msaitoh 808 1.1 itojun case TIOCGFLAGS: 809 1.1 itojun *(int *)data = sc->sc_swflags; 810 1.1 itojun break; 811 1.1 itojun 812 1.1 itojun case TIOCSFLAGS: 813 1.45 elad error = kauth_authorize_device_tty(l->l_cred, 814 1.45 elad KAUTH_DEVICE_TTY_PRIVSET, tp); 815 1.1 itojun if (error) 816 1.1 itojun break; 817 1.1 itojun sc->sc_swflags = *(int *)data; 818 1.1 itojun break; 819 1.1 itojun 820 1.1 itojun default: 821 1.21 atatat error = EPASSTHROUGH; 822 1.1 itojun break; 823 1.1 itojun } 824 1.1 itojun 825 1.1 itojun splx(s); 826 1.1 itojun 827 1.1 itojun return (error); 828 1.1 itojun } 829 1.1 itojun 830 1.1 itojun integrate void 831 1.18 uch sci_schedrx(struct sci_softc *sc) 832 1.1 itojun { 833 1.1 itojun 834 1.1 itojun sc->sc_rx_ready = 1; 835 1.1 itojun 836 1.1 itojun /* Wake up the poller. */ 837 1.49 ad softint_schedule(sc->sc_si); 838 1.5 msaitoh } 839 1.5 msaitoh 840 1.5 msaitoh void 841 1.18 uch sci_break(struct sci_softc *sc, int onoff) 842 1.5 msaitoh { 843 1.5 msaitoh 844 1.5 msaitoh if (onoff) 845 1.6 msaitoh SHREG_SCSSR &= ~SCSSR_TDRE; 846 1.5 msaitoh else 847 1.6 msaitoh SHREG_SCSSR |= SCSSR_TDRE; 848 1.5 msaitoh 849 1.5 msaitoh #if 0 /* XXX */ 850 1.5 msaitoh if (!sc->sc_heldchange) { 851 1.5 msaitoh if (sc->sc_tx_busy) { 852 1.5 msaitoh sc->sc_heldtbc = sc->sc_tbc; 853 1.5 msaitoh sc->sc_tbc = 0; 854 1.5 msaitoh sc->sc_heldchange = 1; 855 1.5 msaitoh } else 856 1.5 msaitoh sci_loadchannelregs(sc); 857 1.5 msaitoh } 858 1.1 itojun #endif 859 1.1 itojun } 860 1.1 itojun 861 1.1 itojun /* 862 1.1 itojun * Stop output, e.g., for ^S or output flush. 863 1.1 itojun */ 864 1.1 itojun void 865 1.18 uch scistop(struct tty *tp, int flag) 866 1.1 itojun { 867 1.51 cegger struct sci_softc *sc = device_lookup_private(&sci_cd, SCIUNIT(tp->t_dev)); 868 1.1 itojun int s; 869 1.1 itojun 870 1.1 itojun s = splserial(); 871 1.1 itojun if (ISSET(tp->t_state, TS_BUSY)) { 872 1.1 itojun /* Stop transmitting at the next chunk. */ 873 1.1 itojun sc->sc_tbc = 0; 874 1.1 itojun sc->sc_heldtbc = 0; 875 1.1 itojun if (!ISSET(tp->t_state, TS_TTSTOP)) 876 1.1 itojun SET(tp->t_state, TS_FLUSH); 877 1.1 itojun } 878 1.1 itojun splx(s); 879 1.1 itojun } 880 1.1 itojun 881 1.1 itojun void 882 1.18 uch scidiag(void *arg) 883 1.1 itojun { 884 1.1 itojun struct sci_softc *sc = arg; 885 1.1 itojun int overflows, floods; 886 1.1 itojun int s; 887 1.1 itojun 888 1.1 itojun s = splserial(); 889 1.1 itojun overflows = sc->sc_overflows; 890 1.1 itojun sc->sc_overflows = 0; 891 1.1 itojun floods = sc->sc_floods; 892 1.1 itojun sc->sc_floods = 0; 893 1.1 itojun sc->sc_errors = 0; 894 1.1 itojun splx(s); 895 1.1 itojun 896 1.1 itojun log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 897 1.55 chs device_xname(sc->sc_dev), 898 1.1 itojun overflows, overflows == 1 ? "" : "s", 899 1.1 itojun floods, floods == 1 ? "" : "s"); 900 1.1 itojun } 901 1.1 itojun 902 1.1 itojun integrate void 903 1.18 uch sci_rxsoft(struct sci_softc *sc, struct tty *tp) 904 1.1 itojun { 905 1.41 uebayasi int (*rint)(int, struct tty *) = tp->t_linesw->l_rint; 906 1.1 itojun u_char *get, *end; 907 1.1 itojun u_int cc, scc; 908 1.1 itojun u_char ssr; 909 1.1 itojun int code; 910 1.1 itojun int s; 911 1.1 itojun 912 1.1 itojun end = sc->sc_ebuf; 913 1.1 itojun get = sc->sc_rbget; 914 1.1 itojun scc = cc = sci_rbuf_size - sc->sc_rbavail; 915 1.1 itojun 916 1.1 itojun if (cc == sci_rbuf_size) { 917 1.1 itojun sc->sc_floods++; 918 1.1 itojun if (sc->sc_errors++ == 0) 919 1.7 thorpej callout_reset(&sc->sc_diag_ch, 60 * hz, scidiag, sc); 920 1.1 itojun } 921 1.1 itojun 922 1.1 itojun while (cc) { 923 1.1 itojun code = get[0]; 924 1.1 itojun ssr = get[1]; 925 1.1 itojun if (ISSET(ssr, SCSSR_FER | SCSSR_PER)) { 926 1.1 itojun if (ISSET(ssr, SCSSR_FER)) 927 1.1 itojun SET(code, TTY_FE); 928 1.1 itojun if (ISSET(ssr, SCSSR_PER)) 929 1.1 itojun SET(code, TTY_PE); 930 1.1 itojun } 931 1.1 itojun if ((*rint)(code, tp) == -1) { 932 1.1 itojun /* 933 1.1 itojun * The line discipline's buffer is out of space. 934 1.1 itojun */ 935 1.1 itojun if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 936 1.1 itojun /* 937 1.1 itojun * We're either not using flow control, or the 938 1.1 itojun * line discipline didn't tell us to block for 939 1.1 itojun * some reason. Either way, we have no way to 940 1.1 itojun * know when there's more space available, so 941 1.1 itojun * just drop the rest of the data. 942 1.1 itojun */ 943 1.1 itojun get += cc << 1; 944 1.1 itojun if (get >= end) 945 1.1 itojun get -= sci_rbuf_size << 1; 946 1.1 itojun cc = 0; 947 1.1 itojun } else { 948 1.1 itojun /* 949 1.1 itojun * Don't schedule any more receive processing 950 1.1 itojun * until the line discipline tells us there's 951 1.1 itojun * space available (through scihwiflow()). 952 1.1 itojun * Leave the rest of the data in the input 953 1.1 itojun * buffer. 954 1.1 itojun */ 955 1.1 itojun SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 956 1.1 itojun } 957 1.1 itojun break; 958 1.1 itojun } 959 1.1 itojun get += 2; 960 1.1 itojun if (get >= end) 961 1.1 itojun get = sc->sc_rbuf; 962 1.1 itojun cc--; 963 1.1 itojun } 964 1.1 itojun 965 1.1 itojun if (cc != scc) { 966 1.1 itojun sc->sc_rbget = get; 967 1.1 itojun s = splserial(); 968 1.1 itojun cc = sc->sc_rbavail += scc - cc; 969 1.1 itojun /* Buffers should be ok again, release possible block. */ 970 1.1 itojun if (cc >= sc->sc_r_lowat) { 971 1.1 itojun if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 972 1.1 itojun CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 973 1.1 itojun SHREG_SCSCR |= SCSCR_RIE; 974 1.1 itojun } 975 1.1 itojun #if 0 976 1.1 itojun if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 977 1.1 itojun CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 978 1.1 itojun sci_hwiflow(sc); 979 1.1 itojun } 980 1.1 itojun #endif 981 1.1 itojun } 982 1.1 itojun splx(s); 983 1.1 itojun } 984 1.1 itojun } 985 1.1 itojun 986 1.1 itojun integrate void 987 1.52 dsl sci_txsoft(struct sci_softc *sc, struct tty *tp) 988 1.1 itojun { 989 1.1 itojun 990 1.1 itojun CLR(tp->t_state, TS_BUSY); 991 1.1 itojun if (ISSET(tp->t_state, TS_FLUSH)) 992 1.1 itojun CLR(tp->t_state, TS_FLUSH); 993 1.1 itojun else 994 1.1 itojun ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 995 1.10 eeh (*tp->t_linesw->l_start)(tp); 996 1.1 itojun } 997 1.1 itojun 998 1.1 itojun integrate void 999 1.18 uch sci_stsoft(struct sci_softc *sc, struct tty *tp) 1000 1.1 itojun { 1001 1.1 itojun #if 0 1002 1.1 itojun /* XXX (msaitoh) */ 1003 1.1 itojun u_char msr, delta; 1004 1.1 itojun int s; 1005 1.1 itojun 1006 1.1 itojun s = splserial(); 1007 1.1 itojun msr = sc->sc_msr; 1008 1.1 itojun delta = sc->sc_msr_delta; 1009 1.1 itojun sc->sc_msr_delta = 0; 1010 1.1 itojun splx(s); 1011 1.1 itojun 1012 1.1 itojun if (ISSET(delta, sc->sc_msr_dcd)) { 1013 1.1 itojun /* 1014 1.1 itojun * Inform the tty layer that carrier detect changed. 1015 1.1 itojun */ 1016 1.10 eeh (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD)); 1017 1.1 itojun } 1018 1.1 itojun 1019 1.1 itojun if (ISSET(delta, sc->sc_msr_cts)) { 1020 1.1 itojun /* Block or unblock output according to flow control. */ 1021 1.1 itojun if (ISSET(msr, sc->sc_msr_cts)) { 1022 1.1 itojun sc->sc_tx_stopped = 0; 1023 1.10 eeh (*tp->t_linesw->l_start)(tp); 1024 1.1 itojun } else { 1025 1.1 itojun sc->sc_tx_stopped = 1; 1026 1.1 itojun } 1027 1.1 itojun } 1028 1.1 itojun 1029 1.64 andvar DPRINTF(("%s: sci_stsoft\n", device_xname(sc->sc_dev))); 1030 1.1 itojun #endif 1031 1.1 itojun } 1032 1.1 itojun 1033 1.1 itojun void 1034 1.18 uch scisoft(void *arg) 1035 1.1 itojun { 1036 1.1 itojun struct sci_softc *sc = arg; 1037 1.1 itojun struct tty *tp; 1038 1.1 itojun 1039 1.55 chs if (!device_is_active(sc->sc_dev)) 1040 1.1 itojun return; 1041 1.1 itojun 1042 1.47 ad tp = sc->sc_tty; 1043 1.1 itojun 1044 1.47 ad if (sc->sc_rx_ready) { 1045 1.47 ad sc->sc_rx_ready = 0; 1046 1.47 ad sci_rxsoft(sc, tp); 1047 1.47 ad } 1048 1.1 itojun 1049 1.1 itojun #if 0 1050 1.47 ad if (sc->sc_st_check) { 1051 1.47 ad sc->sc_st_check = 0; 1052 1.47 ad sci_stsoft(sc, tp); 1053 1.47 ad } 1054 1.1 itojun #endif 1055 1.1 itojun 1056 1.47 ad if (sc->sc_tx_done) { 1057 1.47 ad sc->sc_tx_done = 0; 1058 1.47 ad sci_txsoft(sc, tp); 1059 1.1 itojun } 1060 1.1 itojun } 1061 1.1 itojun 1062 1.1 itojun int 1063 1.18 uch sciintr(void *arg) 1064 1.1 itojun { 1065 1.1 itojun struct sci_softc *sc = arg; 1066 1.1 itojun u_char *put, *end; 1067 1.1 itojun u_int cc; 1068 1.1 itojun u_short ssr; 1069 1.1 itojun 1070 1.55 chs if (!device_is_active(sc->sc_dev)) 1071 1.1 itojun return (0); 1072 1.1 itojun 1073 1.1 itojun end = sc->sc_ebuf; 1074 1.1 itojun put = sc->sc_rbput; 1075 1.1 itojun cc = sc->sc_rbavail; 1076 1.1 itojun 1077 1.26 msaitoh do { 1078 1.26 msaitoh ssr = SHREG_SCSSR; 1079 1.26 msaitoh if (ISSET(ssr, SCSSR_FER)) { 1080 1.26 msaitoh SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_PER | SCSSR_FER); 1081 1.1 itojun #if defined(DDB) || defined(KGDB) 1082 1.23 msaitoh #ifdef SH4 1083 1.26 msaitoh if ((SHREG_SCSPTR & SCSPTR_SPB0DT) != 0) { 1084 1.16 msaitoh #else 1085 1.26 msaitoh if ((SHREG_SCSPDR & SCSPDR_SCP0DT) != 0) { 1086 1.16 msaitoh #endif 1087 1.1 itojun #ifdef DDB 1088 1.26 msaitoh if (ISSET(sc->sc_hwflags, SCI_HW_CONSOLE)) { 1089 1.26 msaitoh console_debugger(); 1090 1.26 msaitoh } 1091 1.1 itojun #endif 1092 1.1 itojun #ifdef KGDB 1093 1.26 msaitoh if (ISSET(sc->sc_hwflags, SCI_HW_KGDB)) { 1094 1.26 msaitoh kgdb_connect(1); 1095 1.26 msaitoh } 1096 1.26 msaitoh #endif 1097 1.16 msaitoh } 1098 1.26 msaitoh #endif /* DDB || KGDB */ 1099 1.6 msaitoh } 1100 1.26 msaitoh if ((SHREG_SCSSR & SCSSR_RDRF) != 0) { 1101 1.26 msaitoh if (cc > 0) { 1102 1.26 msaitoh put[0] = SHREG_SCRDR; 1103 1.26 msaitoh put[1] = SHREG_SCSSR & 0x00ff; 1104 1.26 msaitoh 1105 1.26 msaitoh put += 2; 1106 1.26 msaitoh if (put >= end) 1107 1.26 msaitoh put = sc->sc_rbuf; 1108 1.26 msaitoh cc--; 1109 1.26 msaitoh } 1110 1.6 msaitoh 1111 1.9 msaitoh SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_FER | SCSSR_PER | 1112 1.26 msaitoh SCSSR_RDRF); 1113 1.6 msaitoh 1114 1.26 msaitoh /* 1115 1.26 msaitoh * Current string of incoming characters ended because 1116 1.26 msaitoh * no more data was available or we ran out of space. 1117 1.26 msaitoh * Schedule a receive event if any data was received. 1118 1.26 msaitoh * If we're out of space, turn off receive interrupts. 1119 1.26 msaitoh */ 1120 1.26 msaitoh sc->sc_rbput = put; 1121 1.26 msaitoh sc->sc_rbavail = cc; 1122 1.26 msaitoh if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 1123 1.26 msaitoh sc->sc_rx_ready = 1; 1124 1.1 itojun 1125 1.26 msaitoh /* 1126 1.26 msaitoh * See if we are in danger of overflowing a buffer. If 1127 1.26 msaitoh * so, use hardware flow control to ease the pressure. 1128 1.26 msaitoh */ 1129 1.26 msaitoh if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 1130 1.26 msaitoh cc < sc->sc_r_hiwat) { 1131 1.26 msaitoh SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1132 1.1 itojun #if 0 1133 1.26 msaitoh sci_hwiflow(sc); 1134 1.1 itojun #endif 1135 1.26 msaitoh } 1136 1.1 itojun 1137 1.26 msaitoh /* 1138 1.26 msaitoh * If we're out of space, disable receive interrupts 1139 1.26 msaitoh * until the queue has drained a bit. 1140 1.26 msaitoh */ 1141 1.26 msaitoh if (!cc) { 1142 1.26 msaitoh SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1143 1.26 msaitoh SHREG_SCSCR &= ~SCSCR_RIE; 1144 1.26 msaitoh } 1145 1.26 msaitoh } else { 1146 1.26 msaitoh if (SHREG_SCSSR & SCSSR_RDRF) { 1147 1.26 msaitoh SHREG_SCSCR &= ~(SCSCR_TIE | SCSCR_RIE); 1148 1.26 msaitoh delay(10); 1149 1.26 msaitoh SHREG_SCSCR |= SCSCR_TIE | SCSCR_RIE; 1150 1.26 msaitoh continue; 1151 1.26 msaitoh } 1152 1.6 msaitoh } 1153 1.26 msaitoh } while (SHREG_SCSSR & SCSSR_RDRF); 1154 1.25 uch 1155 1.1 itojun #if 0 1156 1.6 msaitoh msr = bus_space_read_1(iot, ioh, sci_msr); 1157 1.6 msaitoh delta = msr ^ sc->sc_msr; 1158 1.6 msaitoh sc->sc_msr = msr; 1159 1.6 msaitoh if (ISSET(delta, sc->sc_msr_mask)) { 1160 1.6 msaitoh SET(sc->sc_msr_delta, delta); 1161 1.1 itojun 1162 1.6 msaitoh /* 1163 1.6 msaitoh * Pulse-per-second clock signal on edge of DCD? 1164 1.6 msaitoh */ 1165 1.6 msaitoh if (ISSET(delta, sc->sc_ppsmask)) { 1166 1.6 msaitoh struct timeval tv; 1167 1.6 msaitoh if (ISSET(msr, sc->sc_ppsmask) == 1168 1.6 msaitoh sc->sc_ppsassert) { 1169 1.6 msaitoh /* XXX nanotime() */ 1170 1.6 msaitoh microtime(&tv); 1171 1.6 msaitoh TIMEVAL_TO_TIMESPEC(&tv, 1172 1.6 msaitoh &sc->ppsinfo.assert_timestamp); 1173 1.6 msaitoh if (sc->ppsparam.mode & PPS_OFFSETASSERT) { 1174 1.6 msaitoh timespecadd(&sc->ppsinfo.assert_timestamp, 1175 1.1 itojun &sc->ppsparam.assert_offset, 1176 1.1 itojun &sc->ppsinfo.assert_timestamp); 1177 1.6 msaitoh TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.assert_timestamp); 1178 1.6 msaitoh } 1179 1.1 itojun 1180 1.1 itojun #ifdef PPS_SYNC 1181 1.6 msaitoh if (sc->ppsparam.mode & PPS_HARDPPSONASSERT) 1182 1.6 msaitoh hardpps(&tv, tv.tv_usec); 1183 1.1 itojun #endif 1184 1.6 msaitoh sc->ppsinfo.assert_sequence++; 1185 1.6 msaitoh sc->ppsinfo.current_mode = 1186 1.6 msaitoh sc->ppsparam.mode; 1187 1.6 msaitoh 1188 1.6 msaitoh } else if (ISSET(msr, sc->sc_ppsmask) == 1189 1.6 msaitoh sc->sc_ppsclear) { 1190 1.6 msaitoh /* XXX nanotime() */ 1191 1.6 msaitoh microtime(&tv); 1192 1.6 msaitoh TIMEVAL_TO_TIMESPEC(&tv, 1193 1.6 msaitoh &sc->ppsinfo.clear_timestamp); 1194 1.6 msaitoh if (sc->ppsparam.mode & PPS_OFFSETCLEAR) { 1195 1.6 msaitoh timespecadd(&sc->ppsinfo.clear_timestamp, 1196 1.1 itojun &sc->ppsparam.clear_offset, 1197 1.1 itojun &sc->ppsinfo.clear_timestamp); 1198 1.6 msaitoh TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.clear_timestamp); 1199 1.6 msaitoh } 1200 1.1 itojun 1201 1.1 itojun #ifdef PPS_SYNC 1202 1.6 msaitoh if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR) 1203 1.6 msaitoh hardpps(&tv, tv.tv_usec); 1204 1.1 itojun #endif 1205 1.6 msaitoh sc->ppsinfo.clear_sequence++; 1206 1.6 msaitoh sc->ppsinfo.current_mode = 1207 1.6 msaitoh sc->ppsparam.mode; 1208 1.1 itojun } 1209 1.6 msaitoh } 1210 1.1 itojun 1211 1.6 msaitoh /* 1212 1.6 msaitoh * Stop output immediately if we lose the output 1213 1.6 msaitoh * flow control signal or carrier detect. 1214 1.6 msaitoh */ 1215 1.6 msaitoh if (ISSET(~msr, sc->sc_msr_mask)) { 1216 1.6 msaitoh sc->sc_tbc = 0; 1217 1.6 msaitoh sc->sc_heldtbc = 0; 1218 1.65 andvar 1219 1.64 andvar DPRINTF(("%s: sciintr\n", device_xname(sc->sc_dev))); 1220 1.6 msaitoh } 1221 1.1 itojun 1222 1.6 msaitoh sc->sc_st_check = 1; 1223 1.6 msaitoh } 1224 1.1 itojun #endif 1225 1.1 itojun 1226 1.1 itojun /* 1227 1.1 itojun * Done handling any receive interrupts. See if data can be 1228 1.1 itojun * transmitted as well. Schedule tx done event if no data left 1229 1.1 itojun * and tty was marked busy. 1230 1.1 itojun */ 1231 1.1 itojun if ((SHREG_SCSSR & SCSSR_TDRE) != 0) { 1232 1.1 itojun /* 1233 1.1 itojun * If we've delayed a parameter change, do it now, and restart 1234 1.1 itojun * output. 1235 1.1 itojun */ 1236 1.1 itojun if (sc->sc_heldchange) { 1237 1.1 itojun sc->sc_heldchange = 0; 1238 1.1 itojun sc->sc_tbc = sc->sc_heldtbc; 1239 1.1 itojun sc->sc_heldtbc = 0; 1240 1.1 itojun } 1241 1.1 itojun 1242 1.1 itojun /* Output the next chunk of the contiguous buffer, if any. */ 1243 1.1 itojun if (sc->sc_tbc > 0) { 1244 1.11 msaitoh sci_putc(*(sc->sc_tba)); 1245 1.1 itojun sc->sc_tba++; 1246 1.1 itojun sc->sc_tbc--; 1247 1.1 itojun } else { 1248 1.1 itojun /* Disable transmit completion interrupts if necessary. */ 1249 1.1 itojun #if 0 1250 1.1 itojun if (ISSET(sc->sc_ier, IER_ETXRDY)) 1251 1.1 itojun #endif 1252 1.1 itojun SHREG_SCSCR &= ~SCSCR_TIE; 1253 1.1 itojun 1254 1.1 itojun if (sc->sc_tx_busy) { 1255 1.1 itojun sc->sc_tx_busy = 0; 1256 1.1 itojun sc->sc_tx_done = 1; 1257 1.1 itojun } 1258 1.1 itojun } 1259 1.1 itojun } 1260 1.1 itojun 1261 1.1 itojun /* Wake up the poller. */ 1262 1.49 ad softint_schedule(sc->sc_si); 1263 1.1 itojun 1264 1.54 tls #ifdef RND_SCI 1265 1.1 itojun rnd_add_uint32(&sc->rnd_source, iir | lsr); 1266 1.1 itojun #endif 1267 1.1 itojun 1268 1.1 itojun return (1); 1269 1.1 itojun } 1270 1.1 itojun 1271 1.1 itojun void 1272 1.52 dsl scicnprobe(struct consdev *cp) 1273 1.1 itojun { 1274 1.1 itojun int maj; 1275 1.1 itojun 1276 1.1 itojun /* locate the major number */ 1277 1.28 gehenna maj = cdevsw_lookup_major(&sci_cdevsw); 1278 1.1 itojun 1279 1.1 itojun /* Initialize required fields. */ 1280 1.1 itojun cp->cn_dev = makedev(maj, 0); 1281 1.4 msaitoh #ifdef SCICONSOLE 1282 1.4 msaitoh cp->cn_pri = CN_REMOTE; 1283 1.4 msaitoh #else 1284 1.1 itojun cp->cn_pri = CN_NORMAL; 1285 1.4 msaitoh #endif 1286 1.1 itojun } 1287 1.1 itojun 1288 1.1 itojun void 1289 1.18 uch scicninit(struct consdev *cp) 1290 1.1 itojun { 1291 1.1 itojun 1292 1.6 msaitoh InitializeSci(scicn_speed); 1293 1.8 msaitoh sciisconsole = 1; 1294 1.1 itojun } 1295 1.1 itojun 1296 1.1 itojun int 1297 1.18 uch scicngetc(dev_t dev) 1298 1.1 itojun { 1299 1.1 itojun int c; 1300 1.1 itojun int s; 1301 1.1 itojun 1302 1.1 itojun s = splserial(); 1303 1.1 itojun c = sci_getc(); 1304 1.1 itojun splx(s); 1305 1.1 itojun 1306 1.1 itojun return (c); 1307 1.1 itojun } 1308 1.1 itojun 1309 1.1 itojun void 1310 1.18 uch scicnputc(dev_t dev, int c) 1311 1.1 itojun { 1312 1.1 itojun int s; 1313 1.1 itojun 1314 1.1 itojun s = splserial(); 1315 1.11 msaitoh sci_putc((u_char)c); 1316 1.1 itojun splx(s); 1317 1.1 itojun } 1318