sci.c revision 1.12 1 1.12 thorpej /* $NetBSD: sci.c,v 1.12 2001/01/14 23:50:30 thorpej Exp $ */
2 1.1 itojun
3 1.1 itojun /*-
4 1.1 itojun * Copyright (C) 1999 T.Horiuchi and SAITOH Masanobu. All rights reserved.
5 1.1 itojun *
6 1.1 itojun * Redistribution and use in source and binary forms, with or without
7 1.1 itojun * modification, are permitted provided that the following conditions
8 1.1 itojun * are met:
9 1.1 itojun * 1. Redistributions of source code must retain the above copyright
10 1.1 itojun * notice, this list of conditions and the following disclaimer.
11 1.1 itojun * 2. Redistributions in binary form must reproduce the above copyright
12 1.1 itojun * notice, this list of conditions and the following disclaimer in the
13 1.1 itojun * documentation and/or other materials provided with the distribution.
14 1.1 itojun * 3. The name of the author may not be used to endorse or promote products
15 1.1 itojun * derived from this software without specific prior written permission.
16 1.1 itojun *
17 1.1 itojun * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 1.1 itojun * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 1.1 itojun * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 1.1 itojun * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 1.1 itojun * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 1.1 itojun * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 1.1 itojun * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 1.1 itojun * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 1.1 itojun * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 1.1 itojun * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 1.1 itojun */
28 1.1 itojun
29 1.2 msaitoh /*-
30 1.2 msaitoh * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
31 1.2 msaitoh * All rights reserved.
32 1.2 msaitoh *
33 1.2 msaitoh * This code is derived from software contributed to The NetBSD Foundation
34 1.2 msaitoh * by Charles M. Hannum.
35 1.2 msaitoh *
36 1.2 msaitoh * Redistribution and use in source and binary forms, with or without
37 1.2 msaitoh * modification, are permitted provided that the following conditions
38 1.2 msaitoh * are met:
39 1.2 msaitoh * 1. Redistributions of source code must retain the above copyright
40 1.2 msaitoh * notice, this list of conditions and the following disclaimer.
41 1.2 msaitoh * 2. Redistributions in binary form must reproduce the above copyright
42 1.2 msaitoh * notice, this list of conditions and the following disclaimer in the
43 1.2 msaitoh * documentation and/or other materials provided with the distribution.
44 1.2 msaitoh * 3. All advertising materials mentioning features or use of this software
45 1.2 msaitoh * must display the following acknowledgement:
46 1.2 msaitoh * This product includes software developed by the NetBSD
47 1.2 msaitoh * Foundation, Inc. and its contributors.
48 1.2 msaitoh * 4. Neither the name of The NetBSD Foundation nor the names of its
49 1.2 msaitoh * contributors may be used to endorse or promote products derived
50 1.2 msaitoh * from this software without specific prior written permission.
51 1.2 msaitoh *
52 1.2 msaitoh * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
53 1.2 msaitoh * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
54 1.2 msaitoh * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
55 1.2 msaitoh * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
56 1.2 msaitoh * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
57 1.2 msaitoh * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
58 1.2 msaitoh * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
59 1.2 msaitoh * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
60 1.2 msaitoh * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
61 1.2 msaitoh * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
62 1.2 msaitoh * POSSIBILITY OF SUCH DAMAGE.
63 1.2 msaitoh */
64 1.2 msaitoh
65 1.2 msaitoh /*
66 1.2 msaitoh * Copyright (c) 1991 The Regents of the University of California.
67 1.2 msaitoh * All rights reserved.
68 1.2 msaitoh *
69 1.2 msaitoh * Redistribution and use in source and binary forms, with or without
70 1.2 msaitoh * modification, are permitted provided that the following conditions
71 1.2 msaitoh * are met:
72 1.2 msaitoh * 1. Redistributions of source code must retain the above copyright
73 1.2 msaitoh * notice, this list of conditions and the following disclaimer.
74 1.2 msaitoh * 2. Redistributions in binary form must reproduce the above copyright
75 1.2 msaitoh * notice, this list of conditions and the following disclaimer in the
76 1.2 msaitoh * documentation and/or other materials provided with the distribution.
77 1.2 msaitoh * 3. All advertising materials mentioning features or use of this software
78 1.2 msaitoh * must display the following acknowledgement:
79 1.2 msaitoh * This product includes software developed by the University of
80 1.2 msaitoh * California, Berkeley and its contributors.
81 1.2 msaitoh * 4. Neither the name of the University nor the names of its contributors
82 1.2 msaitoh * may be used to endorse or promote products derived from this software
83 1.2 msaitoh * without specific prior written permission.
84 1.2 msaitoh *
85 1.2 msaitoh * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
86 1.2 msaitoh * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
87 1.2 msaitoh * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
88 1.2 msaitoh * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
89 1.2 msaitoh * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
90 1.2 msaitoh * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
91 1.2 msaitoh * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
92 1.2 msaitoh * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
93 1.2 msaitoh * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
94 1.2 msaitoh * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
95 1.2 msaitoh * SUCH DAMAGE.
96 1.2 msaitoh *
97 1.2 msaitoh * @(#)com.c 7.5 (Berkeley) 5/16/91
98 1.2 msaitoh */
99 1.2 msaitoh
100 1.2 msaitoh /*
101 1.2 msaitoh * SH internal serial driver
102 1.2 msaitoh *
103 1.2 msaitoh * This code is derived from both z8530tty.c and com.c
104 1.2 msaitoh */
105 1.2 msaitoh
106 1.1 itojun #include "opt_pclock.h"
107 1.1 itojun #include "opt_sci.h"
108 1.1 itojun
109 1.1 itojun #include <sys/param.h>
110 1.1 itojun #include <sys/systm.h>
111 1.1 itojun #include <sys/tty.h>
112 1.1 itojun #include <sys/proc.h>
113 1.1 itojun #include <sys/conf.h>
114 1.1 itojun #include <sys/file.h>
115 1.1 itojun #include <sys/syslog.h>
116 1.1 itojun #include <sys/kernel.h>
117 1.1 itojun #include <sys/device.h>
118 1.1 itojun #include <sys/malloc.h>
119 1.1 itojun
120 1.1 itojun #include <dev/cons.h>
121 1.1 itojun
122 1.1 itojun #include <machine/cpu.h>
123 1.1 itojun #include <sh3/scireg.h>
124 1.1 itojun #include <sh3/tmureg.h>
125 1.1 itojun
126 1.1 itojun #include <machine/shbvar.h>
127 1.1 itojun
128 1.1 itojun static void scistart __P((struct tty *));
129 1.1 itojun static int sciparam __P((struct tty *, struct termios *));
130 1.1 itojun
131 1.1 itojun void scicnprobe __P((struct consdev *));
132 1.1 itojun void scicninit __P((struct consdev *));
133 1.1 itojun void scicnputc __P((dev_t, int));
134 1.1 itojun int scicngetc __P((dev_t));
135 1.1 itojun void scicnpoolc __P((dev_t, int));
136 1.1 itojun int sciintr __P((void *));
137 1.1 itojun
138 1.1 itojun struct sci_softc {
139 1.1 itojun struct device sc_dev; /* boilerplate */
140 1.1 itojun struct tty *sc_tty;
141 1.1 itojun void *sc_ih;
142 1.1 itojun
143 1.7 thorpej struct callout sc_diag_ch;
144 1.7 thorpej
145 1.1 itojun #if 0
146 1.1 itojun bus_space_tag_t sc_iot; /* ISA i/o space identifier */
147 1.1 itojun bus_space_handle_t sc_ioh; /* ISA io handle */
148 1.1 itojun
149 1.1 itojun int sc_drq;
150 1.1 itojun
151 1.1 itojun int sc_frequency;
152 1.1 itojun #endif
153 1.1 itojun
154 1.1 itojun u_int sc_overflows,
155 1.1 itojun sc_floods,
156 1.1 itojun sc_errors; /* number of retries so far */
157 1.1 itojun u_char sc_status[7]; /* copy of registers */
158 1.1 itojun
159 1.1 itojun int sc_hwflags;
160 1.1 itojun int sc_swflags;
161 1.1 itojun u_int sc_fifolen; /* XXX always 0? */
162 1.1 itojun
163 1.1 itojun u_int sc_r_hiwat,
164 1.1 itojun sc_r_lowat;
165 1.1 itojun u_char *volatile sc_rbget,
166 1.1 itojun *volatile sc_rbput;
167 1.1 itojun volatile u_int sc_rbavail;
168 1.1 itojun u_char *sc_rbuf,
169 1.1 itojun *sc_ebuf;
170 1.1 itojun
171 1.1 itojun u_char *sc_tba; /* transmit buffer address */
172 1.1 itojun u_int sc_tbc, /* transmit byte count */
173 1.1 itojun sc_heldtbc;
174 1.1 itojun
175 1.2 msaitoh volatile u_char sc_rx_flags, /* receiver blocked */
176 1.1 itojun #define RX_TTY_BLOCKED 0x01
177 1.1 itojun #define RX_TTY_OVERFLOWED 0x02
178 1.1 itojun #define RX_IBUF_BLOCKED 0x04
179 1.1 itojun #define RX_IBUF_OVERFLOWED 0x08
180 1.1 itojun #define RX_ANY_BLOCK 0x0f
181 1.3 msaitoh sc_tx_busy, /* working on an output chunk */
182 1.3 msaitoh sc_tx_done, /* done with one output chunk */
183 1.2 msaitoh sc_tx_stopped, /* H/W level stop (lost CTS) */
184 1.2 msaitoh sc_st_check, /* got a status interrupt */
185 1.1 itojun sc_rx_ready;
186 1.1 itojun
187 1.1 itojun volatile u_char sc_heldchange;
188 1.1 itojun };
189 1.1 itojun
190 1.1 itojun /* controller driver configuration */
191 1.1 itojun static int sci_match __P((struct device *, struct cfdata *, void *));
192 1.1 itojun static void sci_attach __P((struct device *, struct device *, void *));
193 1.1 itojun
194 1.5 msaitoh void sci_break __P((struct sci_softc *, int));
195 1.1 itojun void sci_iflush __P((struct sci_softc *));
196 1.1 itojun
197 1.1 itojun #define integrate static inline
198 1.12 thorpej #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
199 1.1 itojun void scisoft __P((void *));
200 1.1 itojun #else
201 1.1 itojun #ifndef __NO_SOFT_SERIAL_INTERRUPT
202 1.1 itojun void scisoft __P((void));
203 1.1 itojun #else
204 1.1 itojun void scisoft __P((void *));
205 1.1 itojun #endif
206 1.1 itojun #endif
207 1.1 itojun integrate void sci_rxsoft __P((struct sci_softc *, struct tty *));
208 1.1 itojun integrate void sci_txsoft __P((struct sci_softc *, struct tty *));
209 1.1 itojun integrate void sci_stsoft __P((struct sci_softc *, struct tty *));
210 1.1 itojun integrate void sci_schedrx __P((struct sci_softc *));
211 1.1 itojun void scidiag __P((void *));
212 1.1 itojun
213 1.1 itojun #define SCIUNIT_MASK 0x7ffff
214 1.1 itojun #define SCIDIALOUT_MASK 0x80000
215 1.1 itojun
216 1.1 itojun #define SCIUNIT(x) (minor(x) & SCIUNIT_MASK)
217 1.1 itojun #define SCIDIALOUT(x) (minor(x) & SCIDIALOUT_MASK)
218 1.1 itojun
219 1.1 itojun /* Macros to clear/set/test flags. */
220 1.1 itojun #define SET(t, f) (t) |= (f)
221 1.1 itojun #define CLR(t, f) (t) &= ~(f)
222 1.1 itojun #define ISSET(t, f) ((t) & (f))
223 1.1 itojun
224 1.1 itojun /* Hardware flag masks */
225 1.1 itojun #define SCI_HW_NOIEN 0x01
226 1.1 itojun #define SCI_HW_FIFO 0x02
227 1.1 itojun #define SCI_HW_FLOW 0x08
228 1.1 itojun #define SCI_HW_DEV_OK 0x20
229 1.1 itojun #define SCI_HW_CONSOLE 0x40
230 1.1 itojun #define SCI_HW_KGDB 0x80
231 1.1 itojun
232 1.1 itojun /* Buffer size for character buffer */
233 1.1 itojun #define SCI_RING_SIZE 2048
234 1.1 itojun
235 1.1 itojun /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */
236 1.1 itojun u_int sci_rbuf_hiwat = (SCI_RING_SIZE * 1) / 4;
237 1.1 itojun u_int sci_rbuf_lowat = (SCI_RING_SIZE * 3) / 4;
238 1.1 itojun
239 1.1 itojun #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
240 1.1 itojun int sciconscflag = CONMODE;
241 1.8 msaitoh int sciisconsole = 0;
242 1.1 itojun
243 1.6 msaitoh #ifdef SCICN_SPEED
244 1.6 msaitoh int scicn_speed = SCICN_SPEED;
245 1.6 msaitoh #else
246 1.6 msaitoh int scicn_speed = 9600;
247 1.6 msaitoh #endif
248 1.6 msaitoh
249 1.1 itojun #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */
250 1.1 itojun
251 1.12 thorpej #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS
252 1.1 itojun #ifdef __NO_SOFT_SERIAL_INTERRUPT
253 1.1 itojun volatile int sci_softintr_scheduled;
254 1.7 thorpej struct callout sci_soft_ch = CALLOUT_INITIALIZER;
255 1.1 itojun #endif
256 1.1 itojun #endif
257 1.1 itojun
258 1.1 itojun u_int sci_rbuf_size = SCI_RING_SIZE;
259 1.1 itojun
260 1.1 itojun struct cfattach sci_ca = {
261 1.1 itojun sizeof(struct sci_softc), sci_match, sci_attach
262 1.1 itojun };
263 1.1 itojun
264 1.1 itojun extern struct cfdriver sci_cd;
265 1.1 itojun
266 1.1 itojun cdev_decl(sci);
267 1.1 itojun
268 1.1 itojun void InitializeSci __P((unsigned int));
269 1.1 itojun
270 1.1 itojun /*
271 1.1 itojun * following functions are debugging prupose only
272 1.1 itojun */
273 1.1 itojun #define CR 0x0D
274 1.1 itojun #define I2C_ADRS (*(volatile unsigned int *)0xa8000000)
275 1.1 itojun #define USART_ON (unsigned int)~0x08
276 1.1 itojun
277 1.1 itojun static void WaitFor __P((int));
278 1.11 msaitoh void sci_putc __P((unsigned char));
279 1.11 msaitoh unsigned char sci_getc __P((void));
280 1.1 itojun int SciErrCheck __P((void));
281 1.1 itojun
282 1.1 itojun /*
283 1.1 itojun * WaitFor
284 1.1 itojun * : int mSec;
285 1.1 itojun */
286 1.1 itojun static void
287 1.1 itojun WaitFor(mSec)
288 1.1 itojun int mSec;
289 1.1 itojun {
290 1.1 itojun
291 1.1 itojun /* Disable Under Flow interrupt, rising edge, 1/4 */
292 1.5 msaitoh SHREG_TCR2 = 0x0000;
293 1.1 itojun
294 1.1 itojun /* Set counter value (count down with 4 KHz) */
295 1.5 msaitoh SHREG_TCNT2 = mSec * 4;
296 1.1 itojun
297 1.5 msaitoh /* start Channel2 */
298 1.5 msaitoh SHREG_TSTR |= TSTR_STR2;
299 1.1 itojun
300 1.5 msaitoh /* wait for under flag ON of channel2 */
301 1.6 msaitoh while ((SHREG_TCR2 & TCR_UNF) == 0)
302 1.1 itojun ;
303 1.1 itojun
304 1.5 msaitoh /* stop channel2 */
305 1.5 msaitoh SHREG_TSTR &= ~TSTR_STR2;
306 1.1 itojun }
307 1.1 itojun
308 1.1 itojun /*
309 1.1 itojun * InitializeSci
310 1.1 itojun * : unsigned int bps;
311 1.1 itojun * : SCI(Serial Communication Interface)
312 1.1 itojun */
313 1.1 itojun
314 1.1 itojun void
315 1.1 itojun InitializeSci(bps)
316 1.1 itojun unsigned int bps;
317 1.1 itojun {
318 1.1 itojun
319 1.1 itojun /* Initialize SCR */
320 1.3 msaitoh SHREG_SCSCR = 0x00;
321 1.1 itojun
322 1.3 msaitoh /* Serial Mode Register */
323 1.3 msaitoh SHREG_SCSMR = 0x00; /* Async,8bit,NonParity,Even,1Stop,NoMulti */
324 1.1 itojun
325 1.3 msaitoh /* Bit Rate Register */
326 1.6 msaitoh SHREG_SCBRR = divrnd(PCLOCK, 32 * bps) - 1;
327 1.1 itojun
328 1.3 msaitoh /*
329 1.3 msaitoh * wait 1mSec, because Send/Recv must begin 1 bit period after
330 1.3 msaitoh * BRR is set.
331 1.3 msaitoh */
332 1.1 itojun WaitFor(1);
333 1.1 itojun
334 1.1 itojun /* Send permission, Recieve permission ON */
335 1.3 msaitoh SHREG_SCSCR = SCSCR_TE | SCSCR_RE;
336 1.1 itojun
337 1.6 msaitoh /* Serial Status Register */
338 1.1 itojun SHREG_SCSSR &= SCSSR_TDRE; /* Clear Status */
339 1.1 itojun
340 1.1 itojun #if 0
341 1.1 itojun I2C_ADRS &= ~0x08; /* enable RS-232C */
342 1.1 itojun #endif
343 1.1 itojun }
344 1.1 itojun
345 1.1 itojun
346 1.1 itojun /*
347 1.11 msaitoh * sci_putc
348 1.1 itojun * : unsigned char c;
349 1.1 itojun */
350 1.1 itojun void
351 1.11 msaitoh sci_putc(c)
352 1.1 itojun unsigned char c;
353 1.1 itojun {
354 1.1 itojun
355 1.11 msaitoh if (c == '\n')
356 1.11 msaitoh sci_putc('\r');
357 1.11 msaitoh
358 1.1 itojun /* wait for ready */
359 1.1 itojun while ((SHREG_SCSSR & SCSSR_TDRE) == NULL)
360 1.1 itojun ;
361 1.1 itojun
362 1.1 itojun /* write send data to send register */
363 1.1 itojun SHREG_SCTDR = c;
364 1.1 itojun
365 1.1 itojun /* clear ready flag */
366 1.1 itojun SHREG_SCSSR &= ~SCSSR_TDRE;
367 1.1 itojun }
368 1.1 itojun
369 1.1 itojun /*
370 1.1 itojun * : SciErrCheck
371 1.1 itojun * 0x20 = over run
372 1.1 itojun * 0x10 = frame error
373 1.1 itojun * 0x80 = parity error
374 1.1 itojun */
375 1.1 itojun int
376 1.1 itojun SciErrCheck(void)
377 1.1 itojun {
378 1.1 itojun
379 1.1 itojun return(SHREG_SCSSR & (SCSSR_ORER | SCSSR_FER | SCSSR_PER));
380 1.1 itojun }
381 1.1 itojun
382 1.1 itojun /*
383 1.11 msaitoh * sci_getc
384 1.1 itojun */
385 1.1 itojun unsigned char
386 1.11 msaitoh sci_getc(void)
387 1.1 itojun {
388 1.1 itojun unsigned char c, err_c;
389 1.1 itojun
390 1.1 itojun while (((err_c = SHREG_SCSSR)
391 1.1 itojun & (SCSSR_RDRF | SCSSR_ORER | SCSSR_FER | SCSSR_PER)) == 0)
392 1.1 itojun ;
393 1.9 msaitoh if ((err_c & (SCSSR_ORER | SCSSR_FER | SCSSR_PER)) != 0) {
394 1.9 msaitoh SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_FER | SCSSR_PER);
395 1.1 itojun return(err_c |= 0x80);
396 1.9 msaitoh }
397 1.1 itojun
398 1.1 itojun c = SHREG_SCRDR;
399 1.1 itojun
400 1.1 itojun SHREG_SCSSR &= ~SCSSR_RDRF;
401 1.1 itojun
402 1.1 itojun return(c);
403 1.1 itojun }
404 1.1 itojun
405 1.1 itojun #if 0
406 1.1 itojun #define SCI_MAX_UNITS 2
407 1.1 itojun #else
408 1.1 itojun #define SCI_MAX_UNITS 1
409 1.1 itojun #endif
410 1.1 itojun
411 1.1 itojun
412 1.1 itojun static int
413 1.1 itojun sci_match(parent, cfp, aux)
414 1.1 itojun struct device *parent;
415 1.1 itojun struct cfdata *cfp;
416 1.1 itojun void *aux;
417 1.1 itojun {
418 1.8 msaitoh struct shb_attach_args *sa = aux;
419 1.1 itojun
420 1.1 itojun if (strcmp(cfp->cf_driver->cd_name, "sci")
421 1.1 itojun || cfp->cf_unit >= SCI_MAX_UNITS)
422 1.1 itojun return 0;
423 1.1 itojun
424 1.8 msaitoh sa->ia_iosize = 0x10;
425 1.1 itojun return 1;
426 1.1 itojun }
427 1.1 itojun
428 1.1 itojun static void
429 1.1 itojun sci_attach(parent, self, aux)
430 1.1 itojun struct device *parent, *self;
431 1.1 itojun void *aux;
432 1.1 itojun {
433 1.1 itojun struct sci_softc *sc = (struct sci_softc *)self;
434 1.1 itojun struct tty *tp;
435 1.1 itojun int irq;
436 1.1 itojun struct shb_attach_args *ia = aux;
437 1.1 itojun
438 1.1 itojun sc->sc_hwflags = 0; /* XXX */
439 1.1 itojun sc->sc_swflags = 0; /* XXX */
440 1.1 itojun sc->sc_fifolen = 0; /* XXX */
441 1.1 itojun
442 1.1 itojun irq = ia->ia_irq;
443 1.1 itojun
444 1.8 msaitoh if (sciisconsole) {
445 1.8 msaitoh SET(sc->sc_hwflags, SCI_HW_CONSOLE);
446 1.8 msaitoh SET(sc->sc_swflags, TIOCFLAG_SOFTCAR);
447 1.8 msaitoh printf("\n%s: console\n", sc->sc_dev.dv_xname);
448 1.8 msaitoh } else {
449 1.8 msaitoh InitializeSci(9600);
450 1.8 msaitoh printf("\n");
451 1.8 msaitoh }
452 1.1 itojun
453 1.7 thorpej callout_init(&sc->sc_diag_ch);
454 1.7 thorpej
455 1.1 itojun #if 0
456 1.1 itojun if (irq != IRQUNK) {
457 1.1 itojun sc->sc_ih = shb_intr_establish(irq,
458 1.1 itojun IST_EDGE, IPL_SERIAL, sciintr, sc);
459 1.1 itojun }
460 1.1 itojun #else
461 1.1 itojun if (irq != IRQUNK) {
462 1.1 itojun sc->sc_ih = shb_intr_establish(SCI_IRQ,
463 1.1 itojun IST_EDGE, IPL_SERIAL, sciintr, sc);
464 1.1 itojun }
465 1.1 itojun #endif
466 1.1 itojun
467 1.8 msaitoh SET(sc->sc_hwflags, SCI_HW_DEV_OK);
468 1.1 itojun
469 1.1 itojun tp = ttymalloc();
470 1.1 itojun tp->t_oproc = scistart;
471 1.1 itojun tp->t_param = sciparam;
472 1.1 itojun tp->t_hwiflow = NULL;
473 1.1 itojun
474 1.1 itojun sc->sc_tty = tp;
475 1.1 itojun sc->sc_rbuf = malloc(sci_rbuf_size << 1, M_DEVBUF, M_NOWAIT);
476 1.1 itojun if (sc->sc_rbuf == NULL) {
477 1.1 itojun printf("%s: unable to allocate ring buffer\n",
478 1.1 itojun sc->sc_dev.dv_xname);
479 1.1 itojun return;
480 1.1 itojun }
481 1.1 itojun sc->sc_ebuf = sc->sc_rbuf + (sci_rbuf_size << 1);
482 1.1 itojun
483 1.1 itojun tty_attach(tp);
484 1.1 itojun }
485 1.1 itojun
486 1.1 itojun /*
487 1.1 itojun * Start or restart transmission.
488 1.1 itojun */
489 1.1 itojun static void
490 1.1 itojun scistart(tp)
491 1.1 itojun struct tty *tp;
492 1.1 itojun {
493 1.1 itojun struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(tp->t_dev)];
494 1.1 itojun int s;
495 1.1 itojun
496 1.1 itojun s = spltty();
497 1.1 itojun if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP))
498 1.1 itojun goto out;
499 1.1 itojun if (sc->sc_tx_stopped)
500 1.1 itojun goto out;
501 1.1 itojun
502 1.1 itojun if (tp->t_outq.c_cc <= tp->t_lowat) {
503 1.1 itojun if (ISSET(tp->t_state, TS_ASLEEP)) {
504 1.1 itojun CLR(tp->t_state, TS_ASLEEP);
505 1.1 itojun wakeup(&tp->t_outq);
506 1.1 itojun }
507 1.1 itojun selwakeup(&tp->t_wsel);
508 1.1 itojun if (tp->t_outq.c_cc == 0)
509 1.1 itojun goto out;
510 1.1 itojun }
511 1.1 itojun
512 1.1 itojun /* Grab the first contiguous region of buffer space. */
513 1.1 itojun {
514 1.1 itojun u_char *tba;
515 1.1 itojun int tbc;
516 1.1 itojun
517 1.1 itojun tba = tp->t_outq.c_cf;
518 1.1 itojun tbc = ndqb(&tp->t_outq, 0);
519 1.1 itojun
520 1.1 itojun (void)splserial();
521 1.1 itojun
522 1.1 itojun sc->sc_tba = tba;
523 1.1 itojun sc->sc_tbc = tbc;
524 1.1 itojun }
525 1.1 itojun
526 1.1 itojun SET(tp->t_state, TS_BUSY);
527 1.1 itojun sc->sc_tx_busy = 1;
528 1.1 itojun
529 1.1 itojun /* Enable transmit completion interrupts if necessary. */
530 1.1 itojun SHREG_SCSCR |= SCSCR_TIE | SCSCR_RIE;
531 1.1 itojun
532 1.1 itojun /* Output the first byte of the contiguous buffer. */
533 1.1 itojun {
534 1.1 itojun if (sc->sc_tbc > 0) {
535 1.11 msaitoh sci_putc(*(sc->sc_tba));
536 1.1 itojun sc->sc_tba++;
537 1.1 itojun sc->sc_tbc--;
538 1.1 itojun }
539 1.1 itojun }
540 1.1 itojun out:
541 1.1 itojun splx(s);
542 1.1 itojun return;
543 1.1 itojun }
544 1.1 itojun
545 1.1 itojun /*
546 1.1 itojun * Set SCI tty parameters from termios.
547 1.1 itojun * XXX - Should just copy the whole termios after
548 1.1 itojun * making sure all the changes could be done.
549 1.1 itojun */
550 1.1 itojun static int
551 1.1 itojun sciparam(tp, t)
552 1.1 itojun struct tty *tp;
553 1.1 itojun struct termios *t;
554 1.1 itojun {
555 1.1 itojun struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(tp->t_dev)];
556 1.1 itojun int ospeed = t->c_ospeed;
557 1.1 itojun int s;
558 1.1 itojun
559 1.1 itojun if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
560 1.1 itojun return (EIO);
561 1.1 itojun
562 1.1 itojun /* Check requested parameters. */
563 1.1 itojun if (ospeed < 0)
564 1.1 itojun return (EINVAL);
565 1.1 itojun if (t->c_ispeed && t->c_ispeed != t->c_ospeed)
566 1.1 itojun return (EINVAL);
567 1.1 itojun
568 1.1 itojun /*
569 1.1 itojun * For the console, always force CLOCAL and !HUPCL, so that the port
570 1.1 itojun * is always active.
571 1.1 itojun */
572 1.1 itojun if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) ||
573 1.1 itojun ISSET(sc->sc_hwflags, SCI_HW_CONSOLE)) {
574 1.1 itojun SET(t->c_cflag, CLOCAL);
575 1.1 itojun CLR(t->c_cflag, HUPCL);
576 1.1 itojun }
577 1.1 itojun
578 1.1 itojun /*
579 1.1 itojun * If there were no changes, don't do anything. This avoids dropping
580 1.1 itojun * input and improves performance when all we did was frob things like
581 1.1 itojun * VMIN and VTIME.
582 1.1 itojun */
583 1.1 itojun if (tp->t_ospeed == t->c_ospeed &&
584 1.1 itojun tp->t_cflag == t->c_cflag)
585 1.1 itojun return (0);
586 1.1 itojun
587 1.1 itojun #if 0
588 1.1 itojun /* XXX (msaitoh) */
589 1.1 itojun lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag);
590 1.1 itojun #endif
591 1.1 itojun
592 1.1 itojun s = splserial();
593 1.1 itojun
594 1.1 itojun /*
595 1.1 itojun * Set the FIFO threshold based on the receive speed.
596 1.1 itojun *
597 1.1 itojun * * If it's a low speed, it's probably a mouse or some other
598 1.1 itojun * interactive device, so set the threshold low.
599 1.1 itojun * * If it's a high speed, trim the trigger level down to prevent
600 1.1 itojun * overflows.
601 1.1 itojun * * Otherwise set it a bit higher.
602 1.1 itojun */
603 1.1 itojun #if 0
604 1.1 itojun /* XXX (msaitoh) */
605 1.1 itojun if (ISSET(sc->sc_hwflags, SCI_HW_HAYESP))
606 1.1 itojun sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8;
607 1.1 itojun else if (ISSET(sc->sc_hwflags, SCI_HW_FIFO))
608 1.1 itojun sc->sc_fifo = FIFO_ENABLE |
609 1.1 itojun (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 :
610 1.1 itojun t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4);
611 1.1 itojun else
612 1.1 itojun sc->sc_fifo = 0;
613 1.1 itojun #endif
614 1.1 itojun
615 1.1 itojun /* And copy to tty. */
616 1.1 itojun tp->t_ispeed = 0;
617 1.1 itojun tp->t_ospeed = t->c_ospeed;
618 1.1 itojun tp->t_cflag = t->c_cflag;
619 1.1 itojun
620 1.1 itojun if (!sc->sc_heldchange) {
621 1.1 itojun if (sc->sc_tx_busy) {
622 1.1 itojun sc->sc_heldtbc = sc->sc_tbc;
623 1.1 itojun sc->sc_tbc = 0;
624 1.1 itojun sc->sc_heldchange = 1;
625 1.1 itojun }
626 1.1 itojun #if 0
627 1.1 itojun /* XXX (msaitoh) */
628 1.1 itojun else
629 1.1 itojun sci_loadchannelregs(sc);
630 1.1 itojun #endif
631 1.1 itojun }
632 1.1 itojun
633 1.1 itojun if (!ISSET(t->c_cflag, CHWFLOW)) {
634 1.1 itojun /* Disable the high water mark. */
635 1.1 itojun sc->sc_r_hiwat = 0;
636 1.1 itojun sc->sc_r_lowat = 0;
637 1.1 itojun if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) {
638 1.1 itojun CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
639 1.1 itojun sci_schedrx(sc);
640 1.1 itojun }
641 1.1 itojun } else {
642 1.1 itojun sc->sc_r_hiwat = sci_rbuf_hiwat;
643 1.1 itojun sc->sc_r_lowat = sci_rbuf_lowat;
644 1.1 itojun }
645 1.1 itojun
646 1.1 itojun splx(s);
647 1.1 itojun
648 1.1 itojun #ifdef SCI_DEBUG
649 1.1 itojun if (sci_debug)
650 1.1 itojun scistatus(sc, "sciparam ");
651 1.1 itojun #endif
652 1.1 itojun
653 1.1 itojun if (!ISSET(t->c_cflag, CHWFLOW)) {
654 1.1 itojun if (sc->sc_tx_stopped) {
655 1.1 itojun sc->sc_tx_stopped = 0;
656 1.1 itojun scistart(tp);
657 1.1 itojun }
658 1.1 itojun }
659 1.1 itojun
660 1.1 itojun return (0);
661 1.1 itojun }
662 1.1 itojun
663 1.1 itojun void
664 1.1 itojun sci_iflush(sc)
665 1.1 itojun struct sci_softc *sc;
666 1.1 itojun {
667 1.1 itojun unsigned char err_c;
668 1.1 itojun volatile unsigned char c;
669 1.1 itojun
670 1.1 itojun if (((err_c = SHREG_SCSSR)
671 1.9 msaitoh & (SCSSR_RDRF | SCSSR_ORER | SCSSR_FER | SCSSR_PER)) != 0) {
672 1.1 itojun
673 1.9 msaitoh if ((err_c & (SCSSR_ORER | SCSSR_FER | SCSSR_PER)) != 0) {
674 1.9 msaitoh SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_FER | SCSSR_PER);
675 1.1 itojun return;
676 1.9 msaitoh }
677 1.1 itojun
678 1.1 itojun c = SHREG_SCRDR;
679 1.1 itojun
680 1.1 itojun SHREG_SCSSR &= ~SCSSR_RDRF;
681 1.1 itojun }
682 1.1 itojun }
683 1.1 itojun
684 1.1 itojun int
685 1.1 itojun sciopen(dev, flag, mode, p)
686 1.1 itojun dev_t dev;
687 1.1 itojun int flag, mode;
688 1.1 itojun struct proc *p;
689 1.1 itojun {
690 1.1 itojun int unit = SCIUNIT(dev);
691 1.1 itojun struct sci_softc *sc;
692 1.1 itojun struct tty *tp;
693 1.1 itojun int s, s2;
694 1.1 itojun int error;
695 1.1 itojun
696 1.1 itojun if (unit >= sci_cd.cd_ndevs)
697 1.1 itojun return (ENXIO);
698 1.1 itojun sc = sci_cd.cd_devs[unit];
699 1.1 itojun if (sc == 0 || !ISSET(sc->sc_hwflags, SCI_HW_DEV_OK) ||
700 1.1 itojun sc->sc_rbuf == NULL)
701 1.1 itojun return (ENXIO);
702 1.1 itojun
703 1.1 itojun if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
704 1.1 itojun return (ENXIO);
705 1.1 itojun
706 1.1 itojun #ifdef KGDB
707 1.1 itojun /*
708 1.1 itojun * If this is the kgdb port, no other use is permitted.
709 1.1 itojun */
710 1.1 itojun if (ISSET(sc->sc_hwflags, SCI_HW_KGDB))
711 1.1 itojun return (EBUSY);
712 1.1 itojun #endif
713 1.1 itojun
714 1.1 itojun tp = sc->sc_tty;
715 1.1 itojun
716 1.1 itojun if (ISSET(tp->t_state, TS_ISOPEN) &&
717 1.1 itojun ISSET(tp->t_state, TS_XCLUDE) &&
718 1.1 itojun p->p_ucred->cr_uid != 0)
719 1.1 itojun return (EBUSY);
720 1.1 itojun
721 1.1 itojun s = spltty();
722 1.1 itojun
723 1.1 itojun /*
724 1.1 itojun * Do the following iff this is a first open.
725 1.1 itojun */
726 1.1 itojun if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
727 1.1 itojun struct termios t;
728 1.1 itojun
729 1.1 itojun tp->t_dev = dev;
730 1.1 itojun
731 1.1 itojun s2 = splserial();
732 1.1 itojun
733 1.1 itojun /* Turn on interrupts. */
734 1.1 itojun SHREG_SCSCR |= SCSCR_TIE | SCSCR_RIE;
735 1.1 itojun
736 1.1 itojun splx(s2);
737 1.1 itojun
738 1.1 itojun /*
739 1.1 itojun * Initialize the termios status to the defaults. Add in the
740 1.1 itojun * sticky bits from TIOCSFLAGS.
741 1.1 itojun */
742 1.1 itojun t.c_ispeed = 0;
743 1.1 itojun if (ISSET(sc->sc_hwflags, SCI_HW_CONSOLE)) {
744 1.6 msaitoh t.c_ospeed = scicn_speed;
745 1.1 itojun t.c_cflag = sciconscflag;
746 1.1 itojun } else {
747 1.1 itojun t.c_ospeed = TTYDEF_SPEED;
748 1.1 itojun t.c_cflag = TTYDEF_CFLAG;
749 1.1 itojun }
750 1.1 itojun if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL))
751 1.1 itojun SET(t.c_cflag, CLOCAL);
752 1.1 itojun if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS))
753 1.1 itojun SET(t.c_cflag, CRTSCTS);
754 1.1 itojun if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF))
755 1.1 itojun SET(t.c_cflag, MDMBUF);
756 1.1 itojun /* Make sure sciparam() will do something. */
757 1.1 itojun tp->t_ospeed = 0;
758 1.1 itojun (void) sciparam(tp, &t);
759 1.1 itojun tp->t_iflag = TTYDEF_IFLAG;
760 1.1 itojun tp->t_oflag = TTYDEF_OFLAG;
761 1.1 itojun tp->t_lflag = TTYDEF_LFLAG;
762 1.1 itojun ttychars(tp);
763 1.1 itojun ttsetwater(tp);
764 1.1 itojun
765 1.1 itojun s2 = splserial();
766 1.1 itojun
767 1.1 itojun /* Clear the input ring, and unblock. */
768 1.1 itojun sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf;
769 1.1 itojun sc->sc_rbavail = sci_rbuf_size;
770 1.1 itojun sci_iflush(sc);
771 1.1 itojun CLR(sc->sc_rx_flags, RX_ANY_BLOCK);
772 1.1 itojun #if 0
773 1.1 itojun /* XXX (msaitoh) */
774 1.1 itojun sci_hwiflow(sc);
775 1.1 itojun #endif
776 1.1 itojun
777 1.1 itojun #ifdef SCI_DEBUG
778 1.1 itojun if (sci_debug)
779 1.1 itojun scistatus(sc, "sciopen ");
780 1.1 itojun #endif
781 1.1 itojun
782 1.1 itojun splx(s2);
783 1.1 itojun }
784 1.1 itojun
785 1.1 itojun splx(s);
786 1.1 itojun
787 1.1 itojun error = ttyopen(tp, SCIDIALOUT(dev), ISSET(flag, O_NONBLOCK));
788 1.1 itojun if (error)
789 1.1 itojun goto bad;
790 1.1 itojun
791 1.10 eeh error = (*tp->t_linesw->l_open)(dev, tp);
792 1.1 itojun if (error)
793 1.1 itojun goto bad;
794 1.1 itojun
795 1.1 itojun return (0);
796 1.1 itojun
797 1.1 itojun bad:
798 1.1 itojun
799 1.1 itojun return (error);
800 1.1 itojun }
801 1.1 itojun
802 1.1 itojun int
803 1.1 itojun sciclose(dev, flag, mode, p)
804 1.1 itojun dev_t dev;
805 1.1 itojun int flag, mode;
806 1.1 itojun struct proc *p;
807 1.1 itojun {
808 1.1 itojun struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
809 1.1 itojun struct tty *tp = sc->sc_tty;
810 1.1 itojun
811 1.1 itojun /* XXX This is for cons.c. */
812 1.1 itojun if (!ISSET(tp->t_state, TS_ISOPEN))
813 1.1 itojun return (0);
814 1.1 itojun
815 1.10 eeh (*tp->t_linesw->l_close)(tp, flag);
816 1.1 itojun ttyclose(tp);
817 1.1 itojun
818 1.1 itojun if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
819 1.1 itojun return (0);
820 1.1 itojun
821 1.1 itojun return (0);
822 1.1 itojun }
823 1.1 itojun
824 1.1 itojun int
825 1.1 itojun sciread(dev, uio, flag)
826 1.1 itojun dev_t dev;
827 1.1 itojun struct uio *uio;
828 1.1 itojun int flag;
829 1.1 itojun {
830 1.1 itojun struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
831 1.1 itojun struct tty *tp = sc->sc_tty;
832 1.1 itojun
833 1.10 eeh return ((*tp->t_linesw->l_read)(tp, uio, flag));
834 1.1 itojun }
835 1.1 itojun
836 1.1 itojun int
837 1.1 itojun sciwrite(dev, uio, flag)
838 1.1 itojun dev_t dev;
839 1.1 itojun struct uio *uio;
840 1.1 itojun int flag;
841 1.1 itojun {
842 1.1 itojun struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
843 1.1 itojun struct tty *tp = sc->sc_tty;
844 1.1 itojun
845 1.10 eeh return ((*tp->t_linesw->l_write)(tp, uio, flag));
846 1.1 itojun }
847 1.1 itojun
848 1.1 itojun struct tty *
849 1.1 itojun scitty(dev)
850 1.1 itojun dev_t dev;
851 1.1 itojun {
852 1.1 itojun struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
853 1.1 itojun struct tty *tp = sc->sc_tty;
854 1.1 itojun
855 1.1 itojun return (tp);
856 1.1 itojun }
857 1.1 itojun
858 1.1 itojun int
859 1.1 itojun sciioctl(dev, cmd, data, flag, p)
860 1.1 itojun dev_t dev;
861 1.1 itojun u_long cmd;
862 1.1 itojun caddr_t data;
863 1.1 itojun int flag;
864 1.1 itojun struct proc *p;
865 1.1 itojun {
866 1.1 itojun struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
867 1.1 itojun struct tty *tp = sc->sc_tty;
868 1.1 itojun int error;
869 1.1 itojun int s;
870 1.1 itojun
871 1.1 itojun if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
872 1.1 itojun return (EIO);
873 1.1 itojun
874 1.10 eeh error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, p);
875 1.1 itojun if (error >= 0)
876 1.1 itojun return (error);
877 1.1 itojun
878 1.1 itojun error = ttioctl(tp, cmd, data, flag, p);
879 1.1 itojun if (error >= 0)
880 1.1 itojun return (error);
881 1.1 itojun
882 1.1 itojun error = 0;
883 1.1 itojun
884 1.1 itojun s = splserial();
885 1.1 itojun
886 1.1 itojun switch (cmd) {
887 1.1 itojun case TIOCSBRK:
888 1.5 msaitoh sci_break(sc, 1);
889 1.1 itojun break;
890 1.1 itojun
891 1.1 itojun case TIOCCBRK:
892 1.5 msaitoh sci_break(sc, 0);
893 1.1 itojun break;
894 1.5 msaitoh
895 1.1 itojun case TIOCGFLAGS:
896 1.1 itojun *(int *)data = sc->sc_swflags;
897 1.1 itojun break;
898 1.1 itojun
899 1.1 itojun case TIOCSFLAGS:
900 1.1 itojun error = suser(p->p_ucred, &p->p_acflag);
901 1.1 itojun if (error)
902 1.1 itojun break;
903 1.1 itojun sc->sc_swflags = *(int *)data;
904 1.1 itojun break;
905 1.1 itojun
906 1.1 itojun default:
907 1.1 itojun error = ENOTTY;
908 1.1 itojun break;
909 1.1 itojun }
910 1.1 itojun
911 1.1 itojun splx(s);
912 1.1 itojun
913 1.1 itojun return (error);
914 1.1 itojun }
915 1.1 itojun
916 1.1 itojun integrate void
917 1.1 itojun sci_schedrx(sc)
918 1.1 itojun struct sci_softc *sc;
919 1.1 itojun {
920 1.1 itojun
921 1.1 itojun sc->sc_rx_ready = 1;
922 1.1 itojun
923 1.1 itojun /* Wake up the poller. */
924 1.12 thorpej #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
925 1.1 itojun softintr_schedule(sc->sc_si);
926 1.1 itojun #else
927 1.1 itojun #ifndef __NO_SOFT_SERIAL_INTERRUPT
928 1.1 itojun setsoftserial();
929 1.1 itojun #else
930 1.1 itojun if (!sci_softintr_scheduled) {
931 1.1 itojun sci_softintr_scheduled = 1;
932 1.7 thorpej callout_reset(&sci_soft_ch, 1, scisoft, NULL);
933 1.1 itojun }
934 1.1 itojun #endif
935 1.5 msaitoh #endif
936 1.5 msaitoh }
937 1.5 msaitoh
938 1.5 msaitoh void
939 1.5 msaitoh sci_break(sc, onoff)
940 1.5 msaitoh struct sci_softc *sc;
941 1.5 msaitoh int onoff;
942 1.5 msaitoh {
943 1.5 msaitoh
944 1.5 msaitoh if (onoff)
945 1.6 msaitoh SHREG_SCSSR &= ~SCSSR_TDRE;
946 1.5 msaitoh else
947 1.6 msaitoh SHREG_SCSSR |= SCSSR_TDRE;
948 1.5 msaitoh
949 1.5 msaitoh #if 0 /* XXX */
950 1.5 msaitoh if (!sc->sc_heldchange) {
951 1.5 msaitoh if (sc->sc_tx_busy) {
952 1.5 msaitoh sc->sc_heldtbc = sc->sc_tbc;
953 1.5 msaitoh sc->sc_tbc = 0;
954 1.5 msaitoh sc->sc_heldchange = 1;
955 1.5 msaitoh } else
956 1.5 msaitoh sci_loadchannelregs(sc);
957 1.5 msaitoh }
958 1.1 itojun #endif
959 1.1 itojun }
960 1.1 itojun
961 1.1 itojun /*
962 1.1 itojun * Stop output, e.g., for ^S or output flush.
963 1.1 itojun */
964 1.1 itojun void
965 1.1 itojun scistop(tp, flag)
966 1.1 itojun struct tty *tp;
967 1.1 itojun int flag;
968 1.1 itojun {
969 1.1 itojun struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(tp->t_dev)];
970 1.1 itojun int s;
971 1.1 itojun
972 1.1 itojun s = splserial();
973 1.1 itojun if (ISSET(tp->t_state, TS_BUSY)) {
974 1.1 itojun /* Stop transmitting at the next chunk. */
975 1.1 itojun sc->sc_tbc = 0;
976 1.1 itojun sc->sc_heldtbc = 0;
977 1.1 itojun if (!ISSET(tp->t_state, TS_TTSTOP))
978 1.1 itojun SET(tp->t_state, TS_FLUSH);
979 1.1 itojun }
980 1.1 itojun splx(s);
981 1.1 itojun }
982 1.1 itojun
983 1.1 itojun void
984 1.1 itojun scidiag(arg)
985 1.1 itojun void *arg;
986 1.1 itojun {
987 1.1 itojun struct sci_softc *sc = arg;
988 1.1 itojun int overflows, floods;
989 1.1 itojun int s;
990 1.1 itojun
991 1.1 itojun s = splserial();
992 1.1 itojun overflows = sc->sc_overflows;
993 1.1 itojun sc->sc_overflows = 0;
994 1.1 itojun floods = sc->sc_floods;
995 1.1 itojun sc->sc_floods = 0;
996 1.1 itojun sc->sc_errors = 0;
997 1.1 itojun splx(s);
998 1.1 itojun
999 1.1 itojun log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n",
1000 1.1 itojun sc->sc_dev.dv_xname,
1001 1.1 itojun overflows, overflows == 1 ? "" : "s",
1002 1.1 itojun floods, floods == 1 ? "" : "s");
1003 1.1 itojun }
1004 1.1 itojun
1005 1.1 itojun integrate void
1006 1.1 itojun sci_rxsoft(sc, tp)
1007 1.1 itojun struct sci_softc *sc;
1008 1.1 itojun struct tty *tp;
1009 1.1 itojun {
1010 1.10 eeh int (*rint) __P((int c, struct tty *tp)) = tp->t_linesw->l_rint;
1011 1.1 itojun u_char *get, *end;
1012 1.1 itojun u_int cc, scc;
1013 1.1 itojun u_char ssr;
1014 1.1 itojun int code;
1015 1.1 itojun int s;
1016 1.1 itojun
1017 1.1 itojun end = sc->sc_ebuf;
1018 1.1 itojun get = sc->sc_rbget;
1019 1.1 itojun scc = cc = sci_rbuf_size - sc->sc_rbavail;
1020 1.1 itojun
1021 1.1 itojun if (cc == sci_rbuf_size) {
1022 1.1 itojun sc->sc_floods++;
1023 1.1 itojun if (sc->sc_errors++ == 0)
1024 1.7 thorpej callout_reset(&sc->sc_diag_ch, 60 * hz, scidiag, sc);
1025 1.1 itojun }
1026 1.1 itojun
1027 1.1 itojun while (cc) {
1028 1.1 itojun code = get[0];
1029 1.1 itojun ssr = get[1];
1030 1.1 itojun if (ISSET(ssr, SCSSR_FER | SCSSR_PER)) {
1031 1.1 itojun if (ISSET(ssr, SCSSR_FER))
1032 1.1 itojun SET(code, TTY_FE);
1033 1.1 itojun if (ISSET(ssr, SCSSR_PER))
1034 1.1 itojun SET(code, TTY_PE);
1035 1.1 itojun }
1036 1.1 itojun if ((*rint)(code, tp) == -1) {
1037 1.1 itojun /*
1038 1.1 itojun * The line discipline's buffer is out of space.
1039 1.1 itojun */
1040 1.1 itojun if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) {
1041 1.1 itojun /*
1042 1.1 itojun * We're either not using flow control, or the
1043 1.1 itojun * line discipline didn't tell us to block for
1044 1.1 itojun * some reason. Either way, we have no way to
1045 1.1 itojun * know when there's more space available, so
1046 1.1 itojun * just drop the rest of the data.
1047 1.1 itojun */
1048 1.1 itojun get += cc << 1;
1049 1.1 itojun if (get >= end)
1050 1.1 itojun get -= sci_rbuf_size << 1;
1051 1.1 itojun cc = 0;
1052 1.1 itojun } else {
1053 1.1 itojun /*
1054 1.1 itojun * Don't schedule any more receive processing
1055 1.1 itojun * until the line discipline tells us there's
1056 1.1 itojun * space available (through scihwiflow()).
1057 1.1 itojun * Leave the rest of the data in the input
1058 1.1 itojun * buffer.
1059 1.1 itojun */
1060 1.1 itojun SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
1061 1.1 itojun }
1062 1.1 itojun break;
1063 1.1 itojun }
1064 1.1 itojun get += 2;
1065 1.1 itojun if (get >= end)
1066 1.1 itojun get = sc->sc_rbuf;
1067 1.1 itojun cc--;
1068 1.1 itojun }
1069 1.1 itojun
1070 1.1 itojun if (cc != scc) {
1071 1.1 itojun sc->sc_rbget = get;
1072 1.1 itojun s = splserial();
1073 1.1 itojun cc = sc->sc_rbavail += scc - cc;
1074 1.1 itojun /* Buffers should be ok again, release possible block. */
1075 1.1 itojun if (cc >= sc->sc_r_lowat) {
1076 1.1 itojun if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) {
1077 1.1 itojun CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED);
1078 1.1 itojun SHREG_SCSCR |= SCSCR_RIE;
1079 1.1 itojun }
1080 1.1 itojun #if 0
1081 1.1 itojun if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) {
1082 1.1 itojun CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED);
1083 1.1 itojun sci_hwiflow(sc);
1084 1.1 itojun }
1085 1.1 itojun #endif
1086 1.1 itojun }
1087 1.1 itojun splx(s);
1088 1.1 itojun }
1089 1.1 itojun }
1090 1.1 itojun
1091 1.1 itojun integrate void
1092 1.1 itojun sci_txsoft(sc, tp)
1093 1.1 itojun struct sci_softc *sc;
1094 1.1 itojun struct tty *tp;
1095 1.1 itojun {
1096 1.1 itojun
1097 1.1 itojun CLR(tp->t_state, TS_BUSY);
1098 1.1 itojun if (ISSET(tp->t_state, TS_FLUSH))
1099 1.1 itojun CLR(tp->t_state, TS_FLUSH);
1100 1.1 itojun else
1101 1.1 itojun ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf));
1102 1.10 eeh (*tp->t_linesw->l_start)(tp);
1103 1.1 itojun }
1104 1.1 itojun
1105 1.1 itojun integrate void
1106 1.1 itojun sci_stsoft(sc, tp)
1107 1.1 itojun struct sci_softc *sc;
1108 1.1 itojun struct tty *tp;
1109 1.1 itojun {
1110 1.1 itojun #if 0
1111 1.1 itojun /* XXX (msaitoh) */
1112 1.1 itojun u_char msr, delta;
1113 1.1 itojun int s;
1114 1.1 itojun
1115 1.1 itojun s = splserial();
1116 1.1 itojun msr = sc->sc_msr;
1117 1.1 itojun delta = sc->sc_msr_delta;
1118 1.1 itojun sc->sc_msr_delta = 0;
1119 1.1 itojun splx(s);
1120 1.1 itojun
1121 1.1 itojun if (ISSET(delta, sc->sc_msr_dcd)) {
1122 1.1 itojun /*
1123 1.1 itojun * Inform the tty layer that carrier detect changed.
1124 1.1 itojun */
1125 1.10 eeh (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD));
1126 1.1 itojun }
1127 1.1 itojun
1128 1.1 itojun if (ISSET(delta, sc->sc_msr_cts)) {
1129 1.1 itojun /* Block or unblock output according to flow control. */
1130 1.1 itojun if (ISSET(msr, sc->sc_msr_cts)) {
1131 1.1 itojun sc->sc_tx_stopped = 0;
1132 1.10 eeh (*tp->t_linesw->l_start)(tp);
1133 1.1 itojun } else {
1134 1.1 itojun sc->sc_tx_stopped = 1;
1135 1.1 itojun }
1136 1.1 itojun }
1137 1.1 itojun
1138 1.1 itojun #ifdef SCI_DEBUG
1139 1.1 itojun if (sci_debug)
1140 1.1 itojun scistatus(sc, "sci_stsoft");
1141 1.1 itojun #endif
1142 1.1 itojun #endif
1143 1.1 itojun }
1144 1.1 itojun
1145 1.12 thorpej #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
1146 1.1 itojun void
1147 1.1 itojun scisoft(arg)
1148 1.1 itojun void *arg;
1149 1.1 itojun {
1150 1.1 itojun struct sci_softc *sc = arg;
1151 1.1 itojun struct tty *tp;
1152 1.1 itojun
1153 1.1 itojun if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
1154 1.1 itojun return;
1155 1.1 itojun
1156 1.1 itojun {
1157 1.1 itojun #else
1158 1.1 itojun void
1159 1.1 itojun #ifndef __NO_SOFT_SERIAL_INTERRUPT
1160 1.1 itojun scisoft()
1161 1.1 itojun #else
1162 1.1 itojun scisoft(arg)
1163 1.1 itojun void *arg;
1164 1.1 itojun #endif
1165 1.1 itojun {
1166 1.1 itojun struct sci_softc *sc;
1167 1.1 itojun struct tty *tp;
1168 1.1 itojun int unit;
1169 1.1 itojun #ifdef __NO_SOFT_SERIAL_INTERRUPT
1170 1.1 itojun int s;
1171 1.1 itojun
1172 1.1 itojun s = splsoftserial();
1173 1.1 itojun sci_softintr_scheduled = 0;
1174 1.1 itojun #endif
1175 1.1 itojun
1176 1.1 itojun for (unit = 0; unit < sci_cd.cd_ndevs; unit++) {
1177 1.1 itojun sc = sci_cd.cd_devs[unit];
1178 1.1 itojun if (sc == NULL || !ISSET(sc->sc_hwflags, SCI_HW_DEV_OK))
1179 1.1 itojun continue;
1180 1.1 itojun
1181 1.1 itojun if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
1182 1.1 itojun continue;
1183 1.1 itojun
1184 1.1 itojun tp = sc->sc_tty;
1185 1.1 itojun if (tp == NULL)
1186 1.1 itojun continue;
1187 1.1 itojun if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0)
1188 1.1 itojun continue;
1189 1.1 itojun #endif
1190 1.1 itojun tp = sc->sc_tty;
1191 1.1 itojun
1192 1.1 itojun if (sc->sc_rx_ready) {
1193 1.1 itojun sc->sc_rx_ready = 0;
1194 1.1 itojun sci_rxsoft(sc, tp);
1195 1.1 itojun }
1196 1.1 itojun
1197 1.1 itojun #if 0
1198 1.1 itojun if (sc->sc_st_check) {
1199 1.1 itojun sc->sc_st_check = 0;
1200 1.1 itojun sci_stsoft(sc, tp);
1201 1.1 itojun }
1202 1.1 itojun #endif
1203 1.1 itojun
1204 1.1 itojun if (sc->sc_tx_done) {
1205 1.1 itojun sc->sc_tx_done = 0;
1206 1.1 itojun sci_txsoft(sc, tp);
1207 1.1 itojun }
1208 1.1 itojun }
1209 1.1 itojun
1210 1.12 thorpej #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS
1211 1.1 itojun #ifdef __NO_SOFT_SERIAL_INTERRUPT
1212 1.1 itojun splx(s);
1213 1.1 itojun #endif
1214 1.1 itojun #endif
1215 1.1 itojun }
1216 1.1 itojun
1217 1.1 itojun int
1218 1.1 itojun sciintr(arg)
1219 1.1 itojun void *arg;
1220 1.1 itojun {
1221 1.1 itojun struct sci_softc *sc = arg;
1222 1.1 itojun u_char *put, *end;
1223 1.1 itojun u_int cc;
1224 1.1 itojun u_short ssr;
1225 1.1 itojun
1226 1.1 itojun if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
1227 1.1 itojun return (0);
1228 1.1 itojun
1229 1.1 itojun end = sc->sc_ebuf;
1230 1.1 itojun put = sc->sc_rbput;
1231 1.1 itojun cc = sc->sc_rbavail;
1232 1.1 itojun
1233 1.6 msaitoh ssr = SHREG_SCSSR;
1234 1.1 itojun #if defined(DDB) || defined(KGDB)
1235 1.6 msaitoh if (ISSET(ssr, SCSSR_BRK)) {
1236 1.1 itojun #ifdef DDB
1237 1.6 msaitoh if (ISSET(sc->sc_hwflags, SCI_HW_CONSOLE)) {
1238 1.6 msaitoh console_debugger();
1239 1.6 msaitoh }
1240 1.1 itojun #endif
1241 1.1 itojun #ifdef KGDB
1242 1.6 msaitoh if (ISSET(sc->sc_hwflags, SCI_HW_KGDB)) {
1243 1.6 msaitoh kgdb_connect(1);
1244 1.6 msaitoh }
1245 1.1 itojun #endif
1246 1.6 msaitoh }
1247 1.6 msaitoh #endif /* DDB || KGDB */
1248 1.6 msaitoh if ((SHREG_SCSSR & SCSSR_RDRF) != 0) {
1249 1.6 msaitoh if (cc > 0) {
1250 1.6 msaitoh put[0] = SHREG_SCRDR;
1251 1.6 msaitoh put[1] = SHREG_SCSSR & 0x00ff;
1252 1.6 msaitoh
1253 1.9 msaitoh SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_FER | SCSSR_PER |
1254 1.9 msaitoh SCSSR_RDRF);
1255 1.6 msaitoh
1256 1.6 msaitoh put += 2;
1257 1.6 msaitoh if (put >= end)
1258 1.6 msaitoh put = sc->sc_rbuf;
1259 1.6 msaitoh cc--;
1260 1.1 itojun }
1261 1.1 itojun
1262 1.6 msaitoh /*
1263 1.6 msaitoh * Current string of incoming characters ended because
1264 1.6 msaitoh * no more data was available or we ran out of space.
1265 1.6 msaitoh * Schedule a receive event if any data was received.
1266 1.6 msaitoh * If we're out of space, turn off receive interrupts.
1267 1.6 msaitoh */
1268 1.6 msaitoh sc->sc_rbput = put;
1269 1.6 msaitoh sc->sc_rbavail = cc;
1270 1.6 msaitoh if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED))
1271 1.6 msaitoh sc->sc_rx_ready = 1;
1272 1.1 itojun
1273 1.6 msaitoh /*
1274 1.6 msaitoh * See if we are in danger of overflowing a buffer. If
1275 1.6 msaitoh * so, use hardware flow control to ease the pressure.
1276 1.6 msaitoh */
1277 1.6 msaitoh if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) &&
1278 1.6 msaitoh cc < sc->sc_r_hiwat) {
1279 1.6 msaitoh SET(sc->sc_rx_flags, RX_IBUF_BLOCKED);
1280 1.1 itojun #if 0
1281 1.6 msaitoh sci_hwiflow(sc);
1282 1.1 itojun #endif
1283 1.6 msaitoh }
1284 1.1 itojun
1285 1.6 msaitoh /*
1286 1.6 msaitoh * If we're out of space, disable receive interrupts
1287 1.6 msaitoh * until the queue has drained a bit.
1288 1.6 msaitoh */
1289 1.6 msaitoh if (!cc) {
1290 1.6 msaitoh SHREG_SCSCR &= ~SCSCR_RIE;
1291 1.6 msaitoh }
1292 1.6 msaitoh } else {
1293 1.6 msaitoh if (SHREG_SCSSR & SCSSR_RDRF) {
1294 1.6 msaitoh SHREG_SCSCR &= ~(SCSCR_TIE | SCSCR_RIE);
1295 1.1 itojun }
1296 1.6 msaitoh }
1297 1.6 msaitoh
1298 1.1 itojun #if 0
1299 1.6 msaitoh msr = bus_space_read_1(iot, ioh, sci_msr);
1300 1.6 msaitoh delta = msr ^ sc->sc_msr;
1301 1.6 msaitoh sc->sc_msr = msr;
1302 1.6 msaitoh if (ISSET(delta, sc->sc_msr_mask)) {
1303 1.6 msaitoh SET(sc->sc_msr_delta, delta);
1304 1.1 itojun
1305 1.6 msaitoh /*
1306 1.6 msaitoh * Pulse-per-second clock signal on edge of DCD?
1307 1.6 msaitoh */
1308 1.6 msaitoh if (ISSET(delta, sc->sc_ppsmask)) {
1309 1.6 msaitoh struct timeval tv;
1310 1.6 msaitoh if (ISSET(msr, sc->sc_ppsmask) ==
1311 1.6 msaitoh sc->sc_ppsassert) {
1312 1.6 msaitoh /* XXX nanotime() */
1313 1.6 msaitoh microtime(&tv);
1314 1.6 msaitoh TIMEVAL_TO_TIMESPEC(&tv,
1315 1.6 msaitoh &sc->ppsinfo.assert_timestamp);
1316 1.6 msaitoh if (sc->ppsparam.mode & PPS_OFFSETASSERT) {
1317 1.6 msaitoh timespecadd(&sc->ppsinfo.assert_timestamp,
1318 1.1 itojun &sc->ppsparam.assert_offset,
1319 1.1 itojun &sc->ppsinfo.assert_timestamp);
1320 1.6 msaitoh TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.assert_timestamp);
1321 1.6 msaitoh }
1322 1.1 itojun
1323 1.1 itojun #ifdef PPS_SYNC
1324 1.6 msaitoh if (sc->ppsparam.mode & PPS_HARDPPSONASSERT)
1325 1.6 msaitoh hardpps(&tv, tv.tv_usec);
1326 1.1 itojun #endif
1327 1.6 msaitoh sc->ppsinfo.assert_sequence++;
1328 1.6 msaitoh sc->ppsinfo.current_mode =
1329 1.6 msaitoh sc->ppsparam.mode;
1330 1.6 msaitoh
1331 1.6 msaitoh } else if (ISSET(msr, sc->sc_ppsmask) ==
1332 1.6 msaitoh sc->sc_ppsclear) {
1333 1.6 msaitoh /* XXX nanotime() */
1334 1.6 msaitoh microtime(&tv);
1335 1.6 msaitoh TIMEVAL_TO_TIMESPEC(&tv,
1336 1.6 msaitoh &sc->ppsinfo.clear_timestamp);
1337 1.6 msaitoh if (sc->ppsparam.mode & PPS_OFFSETCLEAR) {
1338 1.6 msaitoh timespecadd(&sc->ppsinfo.clear_timestamp,
1339 1.1 itojun &sc->ppsparam.clear_offset,
1340 1.1 itojun &sc->ppsinfo.clear_timestamp);
1341 1.6 msaitoh TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.clear_timestamp);
1342 1.6 msaitoh }
1343 1.1 itojun
1344 1.1 itojun #ifdef PPS_SYNC
1345 1.6 msaitoh if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR)
1346 1.6 msaitoh hardpps(&tv, tv.tv_usec);
1347 1.1 itojun #endif
1348 1.6 msaitoh sc->ppsinfo.clear_sequence++;
1349 1.6 msaitoh sc->ppsinfo.current_mode =
1350 1.6 msaitoh sc->ppsparam.mode;
1351 1.1 itojun }
1352 1.6 msaitoh }
1353 1.1 itojun
1354 1.6 msaitoh /*
1355 1.6 msaitoh * Stop output immediately if we lose the output
1356 1.6 msaitoh * flow control signal or carrier detect.
1357 1.6 msaitoh */
1358 1.6 msaitoh if (ISSET(~msr, sc->sc_msr_mask)) {
1359 1.6 msaitoh sc->sc_tbc = 0;
1360 1.6 msaitoh sc->sc_heldtbc = 0;
1361 1.1 itojun #ifdef SCI_DEBUG
1362 1.6 msaitoh if (sci_debug)
1363 1.6 msaitoh scistatus(sc, "sciintr ");
1364 1.1 itojun #endif
1365 1.6 msaitoh }
1366 1.1 itojun
1367 1.6 msaitoh sc->sc_st_check = 1;
1368 1.6 msaitoh }
1369 1.1 itojun #endif
1370 1.1 itojun
1371 1.1 itojun /*
1372 1.1 itojun * Done handling any receive interrupts. See if data can be
1373 1.1 itojun * transmitted as well. Schedule tx done event if no data left
1374 1.1 itojun * and tty was marked busy.
1375 1.1 itojun */
1376 1.1 itojun if ((SHREG_SCSSR & SCSSR_TDRE) != 0) {
1377 1.1 itojun /*
1378 1.1 itojun * If we've delayed a parameter change, do it now, and restart
1379 1.1 itojun * output.
1380 1.1 itojun */
1381 1.1 itojun if (sc->sc_heldchange) {
1382 1.1 itojun sc->sc_heldchange = 0;
1383 1.1 itojun sc->sc_tbc = sc->sc_heldtbc;
1384 1.1 itojun sc->sc_heldtbc = 0;
1385 1.1 itojun }
1386 1.1 itojun
1387 1.1 itojun /* Output the next chunk of the contiguous buffer, if any. */
1388 1.1 itojun if (sc->sc_tbc > 0) {
1389 1.11 msaitoh sci_putc(*(sc->sc_tba));
1390 1.1 itojun sc->sc_tba++;
1391 1.1 itojun sc->sc_tbc--;
1392 1.1 itojun } else {
1393 1.1 itojun /* Disable transmit completion interrupts if necessary. */
1394 1.1 itojun #if 0
1395 1.1 itojun if (ISSET(sc->sc_ier, IER_ETXRDY))
1396 1.1 itojun #endif
1397 1.1 itojun SHREG_SCSCR &= ~SCSCR_TIE;
1398 1.1 itojun
1399 1.1 itojun if (sc->sc_tx_busy) {
1400 1.1 itojun sc->sc_tx_busy = 0;
1401 1.1 itojun sc->sc_tx_done = 1;
1402 1.1 itojun }
1403 1.1 itojun }
1404 1.1 itojun }
1405 1.1 itojun
1406 1.1 itojun /* Wake up the poller. */
1407 1.12 thorpej #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
1408 1.1 itojun softintr_schedule(sc->sc_si);
1409 1.1 itojun #else
1410 1.1 itojun #ifndef __NO_SOFT_SERIAL_INTERRUPT
1411 1.1 itojun setsoftserial();
1412 1.1 itojun #else
1413 1.1 itojun if (!sci_softintr_scheduled) {
1414 1.1 itojun sci_softintr_scheduled = 1;
1415 1.7 thorpej callout_reset(&sci_soft_ch, 1, scisoft, 1);
1416 1.1 itojun }
1417 1.1 itojun #endif
1418 1.1 itojun #endif
1419 1.1 itojun
1420 1.1 itojun #if NRND > 0 && defined(RND_SCI)
1421 1.1 itojun rnd_add_uint32(&sc->rnd_source, iir | lsr);
1422 1.1 itojun #endif
1423 1.1 itojun
1424 1.1 itojun return (1);
1425 1.1 itojun }
1426 1.1 itojun
1427 1.1 itojun void
1428 1.1 itojun scicnprobe(cp)
1429 1.1 itojun struct consdev *cp;
1430 1.1 itojun {
1431 1.1 itojun int maj;
1432 1.1 itojun
1433 1.1 itojun /* locate the major number */
1434 1.1 itojun for (maj = 0; maj < nchrdev; maj++)
1435 1.1 itojun if (cdevsw[maj].d_open == sciopen)
1436 1.1 itojun break;
1437 1.1 itojun
1438 1.1 itojun /* Initialize required fields. */
1439 1.1 itojun cp->cn_dev = makedev(maj, 0);
1440 1.4 msaitoh #ifdef SCICONSOLE
1441 1.4 msaitoh cp->cn_pri = CN_REMOTE;
1442 1.4 msaitoh #else
1443 1.1 itojun cp->cn_pri = CN_NORMAL;
1444 1.4 msaitoh #endif
1445 1.1 itojun }
1446 1.1 itojun
1447 1.1 itojun void
1448 1.1 itojun scicninit(cp)
1449 1.1 itojun struct consdev *cp;
1450 1.1 itojun {
1451 1.1 itojun
1452 1.6 msaitoh InitializeSci(scicn_speed);
1453 1.8 msaitoh sciisconsole = 1;
1454 1.1 itojun }
1455 1.1 itojun
1456 1.1 itojun int
1457 1.1 itojun scicngetc(dev)
1458 1.1 itojun dev_t dev;
1459 1.1 itojun {
1460 1.1 itojun int c;
1461 1.1 itojun int s;
1462 1.1 itojun
1463 1.1 itojun s = splserial();
1464 1.1 itojun c = sci_getc();
1465 1.1 itojun splx(s);
1466 1.1 itojun
1467 1.1 itojun return (c);
1468 1.1 itojun }
1469 1.1 itojun
1470 1.1 itojun void
1471 1.1 itojun scicnputc(dev, c)
1472 1.1 itojun dev_t dev;
1473 1.1 itojun int c;
1474 1.1 itojun {
1475 1.1 itojun int s;
1476 1.1 itojun
1477 1.1 itojun s = splserial();
1478 1.11 msaitoh sci_putc((u_char)c);
1479 1.1 itojun splx(s);
1480 1.1 itojun }
1481