sci.c revision 1.16 1 1.16 msaitoh /* $NetBSD: sci.c,v 1.16 2001/09/10 08:50:33 msaitoh Exp $ */
2 1.1 itojun
3 1.1 itojun /*-
4 1.1 itojun * Copyright (C) 1999 T.Horiuchi and SAITOH Masanobu. All rights reserved.
5 1.1 itojun *
6 1.1 itojun * Redistribution and use in source and binary forms, with or without
7 1.1 itojun * modification, are permitted provided that the following conditions
8 1.1 itojun * are met:
9 1.1 itojun * 1. Redistributions of source code must retain the above copyright
10 1.1 itojun * notice, this list of conditions and the following disclaimer.
11 1.1 itojun * 2. Redistributions in binary form must reproduce the above copyright
12 1.1 itojun * notice, this list of conditions and the following disclaimer in the
13 1.1 itojun * documentation and/or other materials provided with the distribution.
14 1.1 itojun * 3. The name of the author may not be used to endorse or promote products
15 1.1 itojun * derived from this software without specific prior written permission.
16 1.1 itojun *
17 1.1 itojun * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 1.1 itojun * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 1.1 itojun * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 1.1 itojun * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 1.1 itojun * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 1.1 itojun * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 1.1 itojun * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 1.1 itojun * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 1.1 itojun * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 1.1 itojun * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 1.1 itojun */
28 1.1 itojun
29 1.2 msaitoh /*-
30 1.2 msaitoh * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
31 1.2 msaitoh * All rights reserved.
32 1.2 msaitoh *
33 1.2 msaitoh * This code is derived from software contributed to The NetBSD Foundation
34 1.2 msaitoh * by Charles M. Hannum.
35 1.2 msaitoh *
36 1.2 msaitoh * Redistribution and use in source and binary forms, with or without
37 1.2 msaitoh * modification, are permitted provided that the following conditions
38 1.2 msaitoh * are met:
39 1.2 msaitoh * 1. Redistributions of source code must retain the above copyright
40 1.2 msaitoh * notice, this list of conditions and the following disclaimer.
41 1.2 msaitoh * 2. Redistributions in binary form must reproduce the above copyright
42 1.2 msaitoh * notice, this list of conditions and the following disclaimer in the
43 1.2 msaitoh * documentation and/or other materials provided with the distribution.
44 1.2 msaitoh * 3. All advertising materials mentioning features or use of this software
45 1.2 msaitoh * must display the following acknowledgement:
46 1.2 msaitoh * This product includes software developed by the NetBSD
47 1.2 msaitoh * Foundation, Inc. and its contributors.
48 1.2 msaitoh * 4. Neither the name of The NetBSD Foundation nor the names of its
49 1.2 msaitoh * contributors may be used to endorse or promote products derived
50 1.2 msaitoh * from this software without specific prior written permission.
51 1.2 msaitoh *
52 1.2 msaitoh * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
53 1.2 msaitoh * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
54 1.2 msaitoh * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
55 1.2 msaitoh * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
56 1.2 msaitoh * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
57 1.2 msaitoh * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
58 1.2 msaitoh * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
59 1.2 msaitoh * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
60 1.2 msaitoh * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
61 1.2 msaitoh * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
62 1.2 msaitoh * POSSIBILITY OF SUCH DAMAGE.
63 1.2 msaitoh */
64 1.2 msaitoh
65 1.2 msaitoh /*
66 1.2 msaitoh * Copyright (c) 1991 The Regents of the University of California.
67 1.2 msaitoh * All rights reserved.
68 1.2 msaitoh *
69 1.2 msaitoh * Redistribution and use in source and binary forms, with or without
70 1.2 msaitoh * modification, are permitted provided that the following conditions
71 1.2 msaitoh * are met:
72 1.2 msaitoh * 1. Redistributions of source code must retain the above copyright
73 1.2 msaitoh * notice, this list of conditions and the following disclaimer.
74 1.2 msaitoh * 2. Redistributions in binary form must reproduce the above copyright
75 1.2 msaitoh * notice, this list of conditions and the following disclaimer in the
76 1.2 msaitoh * documentation and/or other materials provided with the distribution.
77 1.2 msaitoh * 3. All advertising materials mentioning features or use of this software
78 1.2 msaitoh * must display the following acknowledgement:
79 1.2 msaitoh * This product includes software developed by the University of
80 1.2 msaitoh * California, Berkeley and its contributors.
81 1.2 msaitoh * 4. Neither the name of the University nor the names of its contributors
82 1.2 msaitoh * may be used to endorse or promote products derived from this software
83 1.2 msaitoh * without specific prior written permission.
84 1.2 msaitoh *
85 1.2 msaitoh * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
86 1.2 msaitoh * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
87 1.2 msaitoh * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
88 1.2 msaitoh * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
89 1.2 msaitoh * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
90 1.2 msaitoh * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
91 1.2 msaitoh * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
92 1.2 msaitoh * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
93 1.2 msaitoh * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
94 1.2 msaitoh * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
95 1.2 msaitoh * SUCH DAMAGE.
96 1.2 msaitoh *
97 1.2 msaitoh * @(#)com.c 7.5 (Berkeley) 5/16/91
98 1.2 msaitoh */
99 1.2 msaitoh
100 1.2 msaitoh /*
101 1.2 msaitoh * SH internal serial driver
102 1.2 msaitoh *
103 1.2 msaitoh * This code is derived from both z8530tty.c and com.c
104 1.2 msaitoh */
105 1.2 msaitoh
106 1.14 lukem #include "opt_kgdb.h"
107 1.1 itojun #include "opt_pclock.h"
108 1.1 itojun #include "opt_sci.h"
109 1.1 itojun
110 1.1 itojun #include <sys/param.h>
111 1.1 itojun #include <sys/systm.h>
112 1.1 itojun #include <sys/tty.h>
113 1.1 itojun #include <sys/proc.h>
114 1.1 itojun #include <sys/conf.h>
115 1.1 itojun #include <sys/file.h>
116 1.1 itojun #include <sys/syslog.h>
117 1.1 itojun #include <sys/kernel.h>
118 1.1 itojun #include <sys/device.h>
119 1.1 itojun #include <sys/malloc.h>
120 1.1 itojun
121 1.1 itojun #include <dev/cons.h>
122 1.1 itojun
123 1.1 itojun #include <machine/cpu.h>
124 1.1 itojun #include <sh3/scireg.h>
125 1.1 itojun #include <sh3/tmureg.h>
126 1.1 itojun
127 1.1 itojun #include <machine/shbvar.h>
128 1.1 itojun
129 1.1 itojun static void scistart __P((struct tty *));
130 1.1 itojun static int sciparam __P((struct tty *, struct termios *));
131 1.1 itojun
132 1.1 itojun void scicnprobe __P((struct consdev *));
133 1.1 itojun void scicninit __P((struct consdev *));
134 1.1 itojun void scicnputc __P((dev_t, int));
135 1.1 itojun int scicngetc __P((dev_t));
136 1.1 itojun void scicnpoolc __P((dev_t, int));
137 1.1 itojun int sciintr __P((void *));
138 1.1 itojun
139 1.1 itojun struct sci_softc {
140 1.1 itojun struct device sc_dev; /* boilerplate */
141 1.1 itojun struct tty *sc_tty;
142 1.1 itojun void *sc_ih;
143 1.1 itojun
144 1.7 thorpej struct callout sc_diag_ch;
145 1.7 thorpej
146 1.1 itojun #if 0
147 1.1 itojun bus_space_tag_t sc_iot; /* ISA i/o space identifier */
148 1.1 itojun bus_space_handle_t sc_ioh; /* ISA io handle */
149 1.1 itojun
150 1.1 itojun int sc_drq;
151 1.1 itojun
152 1.1 itojun int sc_frequency;
153 1.1 itojun #endif
154 1.1 itojun
155 1.1 itojun u_int sc_overflows,
156 1.1 itojun sc_floods,
157 1.1 itojun sc_errors; /* number of retries so far */
158 1.1 itojun u_char sc_status[7]; /* copy of registers */
159 1.1 itojun
160 1.1 itojun int sc_hwflags;
161 1.1 itojun int sc_swflags;
162 1.1 itojun u_int sc_fifolen; /* XXX always 0? */
163 1.1 itojun
164 1.1 itojun u_int sc_r_hiwat,
165 1.1 itojun sc_r_lowat;
166 1.1 itojun u_char *volatile sc_rbget,
167 1.1 itojun *volatile sc_rbput;
168 1.1 itojun volatile u_int sc_rbavail;
169 1.1 itojun u_char *sc_rbuf,
170 1.1 itojun *sc_ebuf;
171 1.1 itojun
172 1.1 itojun u_char *sc_tba; /* transmit buffer address */
173 1.1 itojun u_int sc_tbc, /* transmit byte count */
174 1.1 itojun sc_heldtbc;
175 1.1 itojun
176 1.2 msaitoh volatile u_char sc_rx_flags, /* receiver blocked */
177 1.1 itojun #define RX_TTY_BLOCKED 0x01
178 1.1 itojun #define RX_TTY_OVERFLOWED 0x02
179 1.1 itojun #define RX_IBUF_BLOCKED 0x04
180 1.1 itojun #define RX_IBUF_OVERFLOWED 0x08
181 1.1 itojun #define RX_ANY_BLOCK 0x0f
182 1.3 msaitoh sc_tx_busy, /* working on an output chunk */
183 1.3 msaitoh sc_tx_done, /* done with one output chunk */
184 1.2 msaitoh sc_tx_stopped, /* H/W level stop (lost CTS) */
185 1.2 msaitoh sc_st_check, /* got a status interrupt */
186 1.1 itojun sc_rx_ready;
187 1.1 itojun
188 1.1 itojun volatile u_char sc_heldchange;
189 1.1 itojun };
190 1.1 itojun
191 1.1 itojun /* controller driver configuration */
192 1.1 itojun static int sci_match __P((struct device *, struct cfdata *, void *));
193 1.1 itojun static void sci_attach __P((struct device *, struct device *, void *));
194 1.1 itojun
195 1.5 msaitoh void sci_break __P((struct sci_softc *, int));
196 1.1 itojun void sci_iflush __P((struct sci_softc *));
197 1.1 itojun
198 1.1 itojun #define integrate static inline
199 1.12 thorpej #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
200 1.1 itojun void scisoft __P((void *));
201 1.1 itojun #else
202 1.1 itojun #ifndef __NO_SOFT_SERIAL_INTERRUPT
203 1.1 itojun void scisoft __P((void));
204 1.1 itojun #else
205 1.1 itojun void scisoft __P((void *));
206 1.1 itojun #endif
207 1.1 itojun #endif
208 1.1 itojun integrate void sci_rxsoft __P((struct sci_softc *, struct tty *));
209 1.1 itojun integrate void sci_txsoft __P((struct sci_softc *, struct tty *));
210 1.1 itojun integrate void sci_stsoft __P((struct sci_softc *, struct tty *));
211 1.1 itojun integrate void sci_schedrx __P((struct sci_softc *));
212 1.1 itojun void scidiag __P((void *));
213 1.1 itojun
214 1.1 itojun #define SCIUNIT_MASK 0x7ffff
215 1.1 itojun #define SCIDIALOUT_MASK 0x80000
216 1.1 itojun
217 1.1 itojun #define SCIUNIT(x) (minor(x) & SCIUNIT_MASK)
218 1.1 itojun #define SCIDIALOUT(x) (minor(x) & SCIDIALOUT_MASK)
219 1.1 itojun
220 1.1 itojun /* Macros to clear/set/test flags. */
221 1.1 itojun #define SET(t, f) (t) |= (f)
222 1.1 itojun #define CLR(t, f) (t) &= ~(f)
223 1.1 itojun #define ISSET(t, f) ((t) & (f))
224 1.1 itojun
225 1.1 itojun /* Hardware flag masks */
226 1.1 itojun #define SCI_HW_NOIEN 0x01
227 1.1 itojun #define SCI_HW_FIFO 0x02
228 1.1 itojun #define SCI_HW_FLOW 0x08
229 1.1 itojun #define SCI_HW_DEV_OK 0x20
230 1.1 itojun #define SCI_HW_CONSOLE 0x40
231 1.1 itojun #define SCI_HW_KGDB 0x80
232 1.1 itojun
233 1.1 itojun /* Buffer size for character buffer */
234 1.1 itojun #define SCI_RING_SIZE 2048
235 1.1 itojun
236 1.1 itojun /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */
237 1.1 itojun u_int sci_rbuf_hiwat = (SCI_RING_SIZE * 1) / 4;
238 1.1 itojun u_int sci_rbuf_lowat = (SCI_RING_SIZE * 3) / 4;
239 1.1 itojun
240 1.1 itojun #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
241 1.1 itojun int sciconscflag = CONMODE;
242 1.8 msaitoh int sciisconsole = 0;
243 1.1 itojun
244 1.6 msaitoh #ifdef SCICN_SPEED
245 1.6 msaitoh int scicn_speed = SCICN_SPEED;
246 1.6 msaitoh #else
247 1.6 msaitoh int scicn_speed = 9600;
248 1.6 msaitoh #endif
249 1.6 msaitoh
250 1.1 itojun #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */
251 1.1 itojun
252 1.12 thorpej #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS
253 1.1 itojun #ifdef __NO_SOFT_SERIAL_INTERRUPT
254 1.1 itojun volatile int sci_softintr_scheduled;
255 1.7 thorpej struct callout sci_soft_ch = CALLOUT_INITIALIZER;
256 1.1 itojun #endif
257 1.1 itojun #endif
258 1.1 itojun
259 1.1 itojun u_int sci_rbuf_size = SCI_RING_SIZE;
260 1.1 itojun
261 1.1 itojun struct cfattach sci_ca = {
262 1.1 itojun sizeof(struct sci_softc), sci_match, sci_attach
263 1.1 itojun };
264 1.1 itojun
265 1.1 itojun extern struct cfdriver sci_cd;
266 1.1 itojun
267 1.1 itojun cdev_decl(sci);
268 1.1 itojun
269 1.1 itojun void InitializeSci __P((unsigned int));
270 1.1 itojun
271 1.1 itojun /*
272 1.1 itojun * following functions are debugging prupose only
273 1.1 itojun */
274 1.1 itojun #define CR 0x0D
275 1.1 itojun #define I2C_ADRS (*(volatile unsigned int *)0xa8000000)
276 1.1 itojun #define USART_ON (unsigned int)~0x08
277 1.1 itojun
278 1.1 itojun static void WaitFor __P((int));
279 1.11 msaitoh void sci_putc __P((unsigned char));
280 1.11 msaitoh unsigned char sci_getc __P((void));
281 1.1 itojun int SciErrCheck __P((void));
282 1.1 itojun
283 1.1 itojun /*
284 1.1 itojun * WaitFor
285 1.1 itojun * : int mSec;
286 1.1 itojun */
287 1.1 itojun static void
288 1.1 itojun WaitFor(mSec)
289 1.1 itojun int mSec;
290 1.1 itojun {
291 1.1 itojun
292 1.1 itojun /* Disable Under Flow interrupt, rising edge, 1/4 */
293 1.5 msaitoh SHREG_TCR2 = 0x0000;
294 1.1 itojun
295 1.1 itojun /* Set counter value (count down with 4 KHz) */
296 1.5 msaitoh SHREG_TCNT2 = mSec * 4;
297 1.1 itojun
298 1.5 msaitoh /* start Channel2 */
299 1.5 msaitoh SHREG_TSTR |= TSTR_STR2;
300 1.1 itojun
301 1.5 msaitoh /* wait for under flag ON of channel2 */
302 1.6 msaitoh while ((SHREG_TCR2 & TCR_UNF) == 0)
303 1.1 itojun ;
304 1.1 itojun
305 1.5 msaitoh /* stop channel2 */
306 1.5 msaitoh SHREG_TSTR &= ~TSTR_STR2;
307 1.1 itojun }
308 1.1 itojun
309 1.1 itojun /*
310 1.1 itojun * InitializeSci
311 1.1 itojun * : unsigned int bps;
312 1.1 itojun * : SCI(Serial Communication Interface)
313 1.1 itojun */
314 1.1 itojun
315 1.1 itojun void
316 1.1 itojun InitializeSci(bps)
317 1.1 itojun unsigned int bps;
318 1.1 itojun {
319 1.1 itojun
320 1.1 itojun /* Initialize SCR */
321 1.3 msaitoh SHREG_SCSCR = 0x00;
322 1.1 itojun
323 1.3 msaitoh /* Serial Mode Register */
324 1.3 msaitoh SHREG_SCSMR = 0x00; /* Async,8bit,NonParity,Even,1Stop,NoMulti */
325 1.1 itojun
326 1.3 msaitoh /* Bit Rate Register */
327 1.6 msaitoh SHREG_SCBRR = divrnd(PCLOCK, 32 * bps) - 1;
328 1.1 itojun
329 1.3 msaitoh /*
330 1.3 msaitoh * wait 1mSec, because Send/Recv must begin 1 bit period after
331 1.3 msaitoh * BRR is set.
332 1.3 msaitoh */
333 1.1 itojun WaitFor(1);
334 1.1 itojun
335 1.15 wiz /* Send permission, Receive permission ON */
336 1.3 msaitoh SHREG_SCSCR = SCSCR_TE | SCSCR_RE;
337 1.1 itojun
338 1.6 msaitoh /* Serial Status Register */
339 1.1 itojun SHREG_SCSSR &= SCSSR_TDRE; /* Clear Status */
340 1.1 itojun
341 1.1 itojun #if 0
342 1.1 itojun I2C_ADRS &= ~0x08; /* enable RS-232C */
343 1.1 itojun #endif
344 1.1 itojun }
345 1.1 itojun
346 1.1 itojun
347 1.1 itojun /*
348 1.11 msaitoh * sci_putc
349 1.1 itojun * : unsigned char c;
350 1.1 itojun */
351 1.1 itojun void
352 1.11 msaitoh sci_putc(c)
353 1.1 itojun unsigned char c;
354 1.1 itojun {
355 1.1 itojun
356 1.11 msaitoh if (c == '\n')
357 1.11 msaitoh sci_putc('\r');
358 1.11 msaitoh
359 1.1 itojun /* wait for ready */
360 1.1 itojun while ((SHREG_SCSSR & SCSSR_TDRE) == NULL)
361 1.1 itojun ;
362 1.1 itojun
363 1.1 itojun /* write send data to send register */
364 1.1 itojun SHREG_SCTDR = c;
365 1.1 itojun
366 1.1 itojun /* clear ready flag */
367 1.1 itojun SHREG_SCSSR &= ~SCSSR_TDRE;
368 1.1 itojun }
369 1.1 itojun
370 1.1 itojun /*
371 1.1 itojun * : SciErrCheck
372 1.1 itojun * 0x20 = over run
373 1.1 itojun * 0x10 = frame error
374 1.1 itojun * 0x80 = parity error
375 1.1 itojun */
376 1.1 itojun int
377 1.1 itojun SciErrCheck(void)
378 1.1 itojun {
379 1.1 itojun
380 1.1 itojun return(SHREG_SCSSR & (SCSSR_ORER | SCSSR_FER | SCSSR_PER));
381 1.1 itojun }
382 1.1 itojun
383 1.1 itojun /*
384 1.11 msaitoh * sci_getc
385 1.1 itojun */
386 1.1 itojun unsigned char
387 1.11 msaitoh sci_getc(void)
388 1.1 itojun {
389 1.1 itojun unsigned char c, err_c;
390 1.1 itojun
391 1.1 itojun while (((err_c = SHREG_SCSSR)
392 1.1 itojun & (SCSSR_RDRF | SCSSR_ORER | SCSSR_FER | SCSSR_PER)) == 0)
393 1.1 itojun ;
394 1.9 msaitoh if ((err_c & (SCSSR_ORER | SCSSR_FER | SCSSR_PER)) != 0) {
395 1.9 msaitoh SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_FER | SCSSR_PER);
396 1.1 itojun return(err_c |= 0x80);
397 1.9 msaitoh }
398 1.1 itojun
399 1.1 itojun c = SHREG_SCRDR;
400 1.1 itojun
401 1.1 itojun SHREG_SCSSR &= ~SCSSR_RDRF;
402 1.1 itojun
403 1.1 itojun return(c);
404 1.1 itojun }
405 1.1 itojun
406 1.1 itojun #if 0
407 1.1 itojun #define SCI_MAX_UNITS 2
408 1.1 itojun #else
409 1.1 itojun #define SCI_MAX_UNITS 1
410 1.1 itojun #endif
411 1.1 itojun
412 1.1 itojun
413 1.1 itojun static int
414 1.1 itojun sci_match(parent, cfp, aux)
415 1.1 itojun struct device *parent;
416 1.1 itojun struct cfdata *cfp;
417 1.1 itojun void *aux;
418 1.1 itojun {
419 1.8 msaitoh struct shb_attach_args *sa = aux;
420 1.1 itojun
421 1.1 itojun if (strcmp(cfp->cf_driver->cd_name, "sci")
422 1.1 itojun || cfp->cf_unit >= SCI_MAX_UNITS)
423 1.1 itojun return 0;
424 1.1 itojun
425 1.8 msaitoh sa->ia_iosize = 0x10;
426 1.1 itojun return 1;
427 1.1 itojun }
428 1.1 itojun
429 1.1 itojun static void
430 1.1 itojun sci_attach(parent, self, aux)
431 1.1 itojun struct device *parent, *self;
432 1.1 itojun void *aux;
433 1.1 itojun {
434 1.1 itojun struct sci_softc *sc = (struct sci_softc *)self;
435 1.1 itojun struct tty *tp;
436 1.1 itojun int irq;
437 1.1 itojun struct shb_attach_args *ia = aux;
438 1.1 itojun
439 1.1 itojun sc->sc_hwflags = 0; /* XXX */
440 1.1 itojun sc->sc_swflags = 0; /* XXX */
441 1.1 itojun sc->sc_fifolen = 0; /* XXX */
442 1.1 itojun
443 1.1 itojun irq = ia->ia_irq;
444 1.1 itojun
445 1.8 msaitoh if (sciisconsole) {
446 1.8 msaitoh SET(sc->sc_hwflags, SCI_HW_CONSOLE);
447 1.8 msaitoh SET(sc->sc_swflags, TIOCFLAG_SOFTCAR);
448 1.8 msaitoh printf("\n%s: console\n", sc->sc_dev.dv_xname);
449 1.8 msaitoh } else {
450 1.8 msaitoh InitializeSci(9600);
451 1.8 msaitoh printf("\n");
452 1.8 msaitoh }
453 1.1 itojun
454 1.7 thorpej callout_init(&sc->sc_diag_ch);
455 1.7 thorpej
456 1.1 itojun #if 0
457 1.1 itojun if (irq != IRQUNK) {
458 1.1 itojun sc->sc_ih = shb_intr_establish(irq,
459 1.1 itojun IST_EDGE, IPL_SERIAL, sciintr, sc);
460 1.1 itojun }
461 1.1 itojun #else
462 1.1 itojun if (irq != IRQUNK) {
463 1.1 itojun sc->sc_ih = shb_intr_establish(SCI_IRQ,
464 1.1 itojun IST_EDGE, IPL_SERIAL, sciintr, sc);
465 1.1 itojun }
466 1.1 itojun #endif
467 1.1 itojun
468 1.8 msaitoh SET(sc->sc_hwflags, SCI_HW_DEV_OK);
469 1.1 itojun
470 1.1 itojun tp = ttymalloc();
471 1.1 itojun tp->t_oproc = scistart;
472 1.1 itojun tp->t_param = sciparam;
473 1.1 itojun tp->t_hwiflow = NULL;
474 1.1 itojun
475 1.1 itojun sc->sc_tty = tp;
476 1.1 itojun sc->sc_rbuf = malloc(sci_rbuf_size << 1, M_DEVBUF, M_NOWAIT);
477 1.1 itojun if (sc->sc_rbuf == NULL) {
478 1.1 itojun printf("%s: unable to allocate ring buffer\n",
479 1.1 itojun sc->sc_dev.dv_xname);
480 1.1 itojun return;
481 1.1 itojun }
482 1.1 itojun sc->sc_ebuf = sc->sc_rbuf + (sci_rbuf_size << 1);
483 1.1 itojun
484 1.1 itojun tty_attach(tp);
485 1.1 itojun }
486 1.1 itojun
487 1.1 itojun /*
488 1.1 itojun * Start or restart transmission.
489 1.1 itojun */
490 1.1 itojun static void
491 1.1 itojun scistart(tp)
492 1.1 itojun struct tty *tp;
493 1.1 itojun {
494 1.1 itojun struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(tp->t_dev)];
495 1.1 itojun int s;
496 1.1 itojun
497 1.1 itojun s = spltty();
498 1.1 itojun if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP))
499 1.1 itojun goto out;
500 1.1 itojun if (sc->sc_tx_stopped)
501 1.1 itojun goto out;
502 1.1 itojun
503 1.1 itojun if (tp->t_outq.c_cc <= tp->t_lowat) {
504 1.1 itojun if (ISSET(tp->t_state, TS_ASLEEP)) {
505 1.1 itojun CLR(tp->t_state, TS_ASLEEP);
506 1.1 itojun wakeup(&tp->t_outq);
507 1.1 itojun }
508 1.1 itojun selwakeup(&tp->t_wsel);
509 1.1 itojun if (tp->t_outq.c_cc == 0)
510 1.1 itojun goto out;
511 1.1 itojun }
512 1.1 itojun
513 1.1 itojun /* Grab the first contiguous region of buffer space. */
514 1.1 itojun {
515 1.1 itojun u_char *tba;
516 1.1 itojun int tbc;
517 1.1 itojun
518 1.1 itojun tba = tp->t_outq.c_cf;
519 1.1 itojun tbc = ndqb(&tp->t_outq, 0);
520 1.1 itojun
521 1.1 itojun (void)splserial();
522 1.1 itojun
523 1.1 itojun sc->sc_tba = tba;
524 1.1 itojun sc->sc_tbc = tbc;
525 1.1 itojun }
526 1.1 itojun
527 1.1 itojun SET(tp->t_state, TS_BUSY);
528 1.1 itojun sc->sc_tx_busy = 1;
529 1.1 itojun
530 1.1 itojun /* Enable transmit completion interrupts if necessary. */
531 1.1 itojun SHREG_SCSCR |= SCSCR_TIE | SCSCR_RIE;
532 1.1 itojun
533 1.1 itojun /* Output the first byte of the contiguous buffer. */
534 1.1 itojun {
535 1.1 itojun if (sc->sc_tbc > 0) {
536 1.11 msaitoh sci_putc(*(sc->sc_tba));
537 1.1 itojun sc->sc_tba++;
538 1.1 itojun sc->sc_tbc--;
539 1.1 itojun }
540 1.1 itojun }
541 1.1 itojun out:
542 1.1 itojun splx(s);
543 1.1 itojun return;
544 1.1 itojun }
545 1.1 itojun
546 1.1 itojun /*
547 1.1 itojun * Set SCI tty parameters from termios.
548 1.1 itojun * XXX - Should just copy the whole termios after
549 1.1 itojun * making sure all the changes could be done.
550 1.1 itojun */
551 1.1 itojun static int
552 1.1 itojun sciparam(tp, t)
553 1.1 itojun struct tty *tp;
554 1.1 itojun struct termios *t;
555 1.1 itojun {
556 1.1 itojun struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(tp->t_dev)];
557 1.1 itojun int ospeed = t->c_ospeed;
558 1.1 itojun int s;
559 1.1 itojun
560 1.1 itojun if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
561 1.1 itojun return (EIO);
562 1.1 itojun
563 1.1 itojun /* Check requested parameters. */
564 1.1 itojun if (ospeed < 0)
565 1.1 itojun return (EINVAL);
566 1.1 itojun if (t->c_ispeed && t->c_ispeed != t->c_ospeed)
567 1.1 itojun return (EINVAL);
568 1.1 itojun
569 1.1 itojun /*
570 1.1 itojun * For the console, always force CLOCAL and !HUPCL, so that the port
571 1.1 itojun * is always active.
572 1.1 itojun */
573 1.1 itojun if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) ||
574 1.1 itojun ISSET(sc->sc_hwflags, SCI_HW_CONSOLE)) {
575 1.1 itojun SET(t->c_cflag, CLOCAL);
576 1.1 itojun CLR(t->c_cflag, HUPCL);
577 1.1 itojun }
578 1.1 itojun
579 1.1 itojun /*
580 1.1 itojun * If there were no changes, don't do anything. This avoids dropping
581 1.1 itojun * input and improves performance when all we did was frob things like
582 1.1 itojun * VMIN and VTIME.
583 1.1 itojun */
584 1.1 itojun if (tp->t_ospeed == t->c_ospeed &&
585 1.1 itojun tp->t_cflag == t->c_cflag)
586 1.1 itojun return (0);
587 1.1 itojun
588 1.1 itojun #if 0
589 1.1 itojun /* XXX (msaitoh) */
590 1.1 itojun lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag);
591 1.1 itojun #endif
592 1.1 itojun
593 1.1 itojun s = splserial();
594 1.1 itojun
595 1.1 itojun /*
596 1.1 itojun * Set the FIFO threshold based on the receive speed.
597 1.1 itojun *
598 1.1 itojun * * If it's a low speed, it's probably a mouse or some other
599 1.1 itojun * interactive device, so set the threshold low.
600 1.1 itojun * * If it's a high speed, trim the trigger level down to prevent
601 1.1 itojun * overflows.
602 1.1 itojun * * Otherwise set it a bit higher.
603 1.1 itojun */
604 1.1 itojun #if 0
605 1.1 itojun /* XXX (msaitoh) */
606 1.1 itojun if (ISSET(sc->sc_hwflags, SCI_HW_HAYESP))
607 1.1 itojun sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8;
608 1.1 itojun else if (ISSET(sc->sc_hwflags, SCI_HW_FIFO))
609 1.1 itojun sc->sc_fifo = FIFO_ENABLE |
610 1.1 itojun (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 :
611 1.1 itojun t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4);
612 1.1 itojun else
613 1.1 itojun sc->sc_fifo = 0;
614 1.1 itojun #endif
615 1.1 itojun
616 1.1 itojun /* And copy to tty. */
617 1.1 itojun tp->t_ispeed = 0;
618 1.1 itojun tp->t_ospeed = t->c_ospeed;
619 1.1 itojun tp->t_cflag = t->c_cflag;
620 1.1 itojun
621 1.1 itojun if (!sc->sc_heldchange) {
622 1.1 itojun if (sc->sc_tx_busy) {
623 1.1 itojun sc->sc_heldtbc = sc->sc_tbc;
624 1.1 itojun sc->sc_tbc = 0;
625 1.1 itojun sc->sc_heldchange = 1;
626 1.1 itojun }
627 1.1 itojun #if 0
628 1.1 itojun /* XXX (msaitoh) */
629 1.1 itojun else
630 1.1 itojun sci_loadchannelregs(sc);
631 1.1 itojun #endif
632 1.1 itojun }
633 1.1 itojun
634 1.1 itojun if (!ISSET(t->c_cflag, CHWFLOW)) {
635 1.1 itojun /* Disable the high water mark. */
636 1.1 itojun sc->sc_r_hiwat = 0;
637 1.1 itojun sc->sc_r_lowat = 0;
638 1.1 itojun if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) {
639 1.1 itojun CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
640 1.1 itojun sci_schedrx(sc);
641 1.1 itojun }
642 1.1 itojun } else {
643 1.1 itojun sc->sc_r_hiwat = sci_rbuf_hiwat;
644 1.1 itojun sc->sc_r_lowat = sci_rbuf_lowat;
645 1.1 itojun }
646 1.1 itojun
647 1.1 itojun splx(s);
648 1.1 itojun
649 1.1 itojun #ifdef SCI_DEBUG
650 1.1 itojun if (sci_debug)
651 1.1 itojun scistatus(sc, "sciparam ");
652 1.1 itojun #endif
653 1.1 itojun
654 1.1 itojun if (!ISSET(t->c_cflag, CHWFLOW)) {
655 1.1 itojun if (sc->sc_tx_stopped) {
656 1.1 itojun sc->sc_tx_stopped = 0;
657 1.1 itojun scistart(tp);
658 1.1 itojun }
659 1.1 itojun }
660 1.1 itojun
661 1.1 itojun return (0);
662 1.1 itojun }
663 1.1 itojun
664 1.1 itojun void
665 1.1 itojun sci_iflush(sc)
666 1.1 itojun struct sci_softc *sc;
667 1.1 itojun {
668 1.1 itojun unsigned char err_c;
669 1.1 itojun volatile unsigned char c;
670 1.1 itojun
671 1.1 itojun if (((err_c = SHREG_SCSSR)
672 1.9 msaitoh & (SCSSR_RDRF | SCSSR_ORER | SCSSR_FER | SCSSR_PER)) != 0) {
673 1.1 itojun
674 1.9 msaitoh if ((err_c & (SCSSR_ORER | SCSSR_FER | SCSSR_PER)) != 0) {
675 1.9 msaitoh SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_FER | SCSSR_PER);
676 1.1 itojun return;
677 1.9 msaitoh }
678 1.1 itojun
679 1.1 itojun c = SHREG_SCRDR;
680 1.1 itojun
681 1.1 itojun SHREG_SCSSR &= ~SCSSR_RDRF;
682 1.1 itojun }
683 1.1 itojun }
684 1.1 itojun
685 1.1 itojun int
686 1.1 itojun sciopen(dev, flag, mode, p)
687 1.1 itojun dev_t dev;
688 1.1 itojun int flag, mode;
689 1.1 itojun struct proc *p;
690 1.1 itojun {
691 1.1 itojun int unit = SCIUNIT(dev);
692 1.1 itojun struct sci_softc *sc;
693 1.1 itojun struct tty *tp;
694 1.1 itojun int s, s2;
695 1.1 itojun int error;
696 1.1 itojun
697 1.1 itojun if (unit >= sci_cd.cd_ndevs)
698 1.1 itojun return (ENXIO);
699 1.1 itojun sc = sci_cd.cd_devs[unit];
700 1.1 itojun if (sc == 0 || !ISSET(sc->sc_hwflags, SCI_HW_DEV_OK) ||
701 1.1 itojun sc->sc_rbuf == NULL)
702 1.1 itojun return (ENXIO);
703 1.1 itojun
704 1.1 itojun if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
705 1.1 itojun return (ENXIO);
706 1.1 itojun
707 1.1 itojun #ifdef KGDB
708 1.1 itojun /*
709 1.1 itojun * If this is the kgdb port, no other use is permitted.
710 1.1 itojun */
711 1.1 itojun if (ISSET(sc->sc_hwflags, SCI_HW_KGDB))
712 1.1 itojun return (EBUSY);
713 1.1 itojun #endif
714 1.1 itojun
715 1.1 itojun tp = sc->sc_tty;
716 1.1 itojun
717 1.1 itojun if (ISSET(tp->t_state, TS_ISOPEN) &&
718 1.1 itojun ISSET(tp->t_state, TS_XCLUDE) &&
719 1.1 itojun p->p_ucred->cr_uid != 0)
720 1.1 itojun return (EBUSY);
721 1.1 itojun
722 1.1 itojun s = spltty();
723 1.1 itojun
724 1.1 itojun /*
725 1.1 itojun * Do the following iff this is a first open.
726 1.1 itojun */
727 1.1 itojun if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
728 1.1 itojun struct termios t;
729 1.1 itojun
730 1.1 itojun tp->t_dev = dev;
731 1.1 itojun
732 1.1 itojun s2 = splserial();
733 1.1 itojun
734 1.1 itojun /* Turn on interrupts. */
735 1.1 itojun SHREG_SCSCR |= SCSCR_TIE | SCSCR_RIE;
736 1.1 itojun
737 1.1 itojun splx(s2);
738 1.1 itojun
739 1.1 itojun /*
740 1.1 itojun * Initialize the termios status to the defaults. Add in the
741 1.1 itojun * sticky bits from TIOCSFLAGS.
742 1.1 itojun */
743 1.1 itojun t.c_ispeed = 0;
744 1.1 itojun if (ISSET(sc->sc_hwflags, SCI_HW_CONSOLE)) {
745 1.6 msaitoh t.c_ospeed = scicn_speed;
746 1.1 itojun t.c_cflag = sciconscflag;
747 1.1 itojun } else {
748 1.1 itojun t.c_ospeed = TTYDEF_SPEED;
749 1.1 itojun t.c_cflag = TTYDEF_CFLAG;
750 1.1 itojun }
751 1.1 itojun if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL))
752 1.1 itojun SET(t.c_cflag, CLOCAL);
753 1.1 itojun if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS))
754 1.1 itojun SET(t.c_cflag, CRTSCTS);
755 1.1 itojun if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF))
756 1.1 itojun SET(t.c_cflag, MDMBUF);
757 1.1 itojun /* Make sure sciparam() will do something. */
758 1.1 itojun tp->t_ospeed = 0;
759 1.1 itojun (void) sciparam(tp, &t);
760 1.1 itojun tp->t_iflag = TTYDEF_IFLAG;
761 1.1 itojun tp->t_oflag = TTYDEF_OFLAG;
762 1.1 itojun tp->t_lflag = TTYDEF_LFLAG;
763 1.1 itojun ttychars(tp);
764 1.1 itojun ttsetwater(tp);
765 1.1 itojun
766 1.1 itojun s2 = splserial();
767 1.1 itojun
768 1.1 itojun /* Clear the input ring, and unblock. */
769 1.1 itojun sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf;
770 1.1 itojun sc->sc_rbavail = sci_rbuf_size;
771 1.1 itojun sci_iflush(sc);
772 1.1 itojun CLR(sc->sc_rx_flags, RX_ANY_BLOCK);
773 1.1 itojun #if 0
774 1.1 itojun /* XXX (msaitoh) */
775 1.1 itojun sci_hwiflow(sc);
776 1.1 itojun #endif
777 1.1 itojun
778 1.1 itojun #ifdef SCI_DEBUG
779 1.1 itojun if (sci_debug)
780 1.1 itojun scistatus(sc, "sciopen ");
781 1.1 itojun #endif
782 1.1 itojun
783 1.1 itojun splx(s2);
784 1.1 itojun }
785 1.1 itojun
786 1.1 itojun splx(s);
787 1.1 itojun
788 1.1 itojun error = ttyopen(tp, SCIDIALOUT(dev), ISSET(flag, O_NONBLOCK));
789 1.1 itojun if (error)
790 1.1 itojun goto bad;
791 1.1 itojun
792 1.10 eeh error = (*tp->t_linesw->l_open)(dev, tp);
793 1.1 itojun if (error)
794 1.1 itojun goto bad;
795 1.1 itojun
796 1.1 itojun return (0);
797 1.1 itojun
798 1.1 itojun bad:
799 1.1 itojun
800 1.1 itojun return (error);
801 1.1 itojun }
802 1.1 itojun
803 1.1 itojun int
804 1.1 itojun sciclose(dev, flag, mode, p)
805 1.1 itojun dev_t dev;
806 1.1 itojun int flag, mode;
807 1.1 itojun struct proc *p;
808 1.1 itojun {
809 1.1 itojun struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
810 1.1 itojun struct tty *tp = sc->sc_tty;
811 1.1 itojun
812 1.1 itojun /* XXX This is for cons.c. */
813 1.1 itojun if (!ISSET(tp->t_state, TS_ISOPEN))
814 1.1 itojun return (0);
815 1.1 itojun
816 1.10 eeh (*tp->t_linesw->l_close)(tp, flag);
817 1.1 itojun ttyclose(tp);
818 1.1 itojun
819 1.1 itojun if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
820 1.1 itojun return (0);
821 1.1 itojun
822 1.1 itojun return (0);
823 1.1 itojun }
824 1.1 itojun
825 1.1 itojun int
826 1.1 itojun sciread(dev, uio, flag)
827 1.1 itojun dev_t dev;
828 1.1 itojun struct uio *uio;
829 1.1 itojun int flag;
830 1.1 itojun {
831 1.1 itojun struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
832 1.1 itojun struct tty *tp = sc->sc_tty;
833 1.1 itojun
834 1.10 eeh return ((*tp->t_linesw->l_read)(tp, uio, flag));
835 1.1 itojun }
836 1.1 itojun
837 1.1 itojun int
838 1.1 itojun sciwrite(dev, uio, flag)
839 1.1 itojun dev_t dev;
840 1.1 itojun struct uio *uio;
841 1.1 itojun int flag;
842 1.1 itojun {
843 1.1 itojun struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
844 1.1 itojun struct tty *tp = sc->sc_tty;
845 1.1 itojun
846 1.10 eeh return ((*tp->t_linesw->l_write)(tp, uio, flag));
847 1.13 scw }
848 1.13 scw
849 1.13 scw int
850 1.13 scw scipoll(dev, events, p)
851 1.13 scw dev_t dev;
852 1.13 scw int events;
853 1.13 scw struct proc *p;
854 1.13 scw {
855 1.13 scw struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
856 1.13 scw struct tty *tp = sc->sc_tty;
857 1.13 scw
858 1.13 scw return ((*tp->t_linesw->l_poll)(tp, events, p));
859 1.1 itojun }
860 1.1 itojun
861 1.1 itojun struct tty *
862 1.1 itojun scitty(dev)
863 1.1 itojun dev_t dev;
864 1.1 itojun {
865 1.1 itojun struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
866 1.1 itojun struct tty *tp = sc->sc_tty;
867 1.1 itojun
868 1.1 itojun return (tp);
869 1.1 itojun }
870 1.1 itojun
871 1.1 itojun int
872 1.1 itojun sciioctl(dev, cmd, data, flag, p)
873 1.1 itojun dev_t dev;
874 1.1 itojun u_long cmd;
875 1.1 itojun caddr_t data;
876 1.1 itojun int flag;
877 1.1 itojun struct proc *p;
878 1.1 itojun {
879 1.1 itojun struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
880 1.1 itojun struct tty *tp = sc->sc_tty;
881 1.1 itojun int error;
882 1.1 itojun int s;
883 1.1 itojun
884 1.1 itojun if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
885 1.1 itojun return (EIO);
886 1.1 itojun
887 1.10 eeh error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, p);
888 1.1 itojun if (error >= 0)
889 1.1 itojun return (error);
890 1.1 itojun
891 1.1 itojun error = ttioctl(tp, cmd, data, flag, p);
892 1.1 itojun if (error >= 0)
893 1.1 itojun return (error);
894 1.1 itojun
895 1.1 itojun error = 0;
896 1.1 itojun
897 1.1 itojun s = splserial();
898 1.1 itojun
899 1.1 itojun switch (cmd) {
900 1.1 itojun case TIOCSBRK:
901 1.5 msaitoh sci_break(sc, 1);
902 1.1 itojun break;
903 1.1 itojun
904 1.1 itojun case TIOCCBRK:
905 1.5 msaitoh sci_break(sc, 0);
906 1.1 itojun break;
907 1.5 msaitoh
908 1.1 itojun case TIOCGFLAGS:
909 1.1 itojun *(int *)data = sc->sc_swflags;
910 1.1 itojun break;
911 1.1 itojun
912 1.1 itojun case TIOCSFLAGS:
913 1.1 itojun error = suser(p->p_ucred, &p->p_acflag);
914 1.1 itojun if (error)
915 1.1 itojun break;
916 1.1 itojun sc->sc_swflags = *(int *)data;
917 1.1 itojun break;
918 1.1 itojun
919 1.1 itojun default:
920 1.1 itojun error = ENOTTY;
921 1.1 itojun break;
922 1.1 itojun }
923 1.1 itojun
924 1.1 itojun splx(s);
925 1.1 itojun
926 1.1 itojun return (error);
927 1.1 itojun }
928 1.1 itojun
929 1.1 itojun integrate void
930 1.1 itojun sci_schedrx(sc)
931 1.1 itojun struct sci_softc *sc;
932 1.1 itojun {
933 1.1 itojun
934 1.1 itojun sc->sc_rx_ready = 1;
935 1.1 itojun
936 1.1 itojun /* Wake up the poller. */
937 1.12 thorpej #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
938 1.1 itojun softintr_schedule(sc->sc_si);
939 1.1 itojun #else
940 1.1 itojun #ifndef __NO_SOFT_SERIAL_INTERRUPT
941 1.1 itojun setsoftserial();
942 1.1 itojun #else
943 1.1 itojun if (!sci_softintr_scheduled) {
944 1.1 itojun sci_softintr_scheduled = 1;
945 1.7 thorpej callout_reset(&sci_soft_ch, 1, scisoft, NULL);
946 1.1 itojun }
947 1.1 itojun #endif
948 1.5 msaitoh #endif
949 1.5 msaitoh }
950 1.5 msaitoh
951 1.5 msaitoh void
952 1.5 msaitoh sci_break(sc, onoff)
953 1.5 msaitoh struct sci_softc *sc;
954 1.5 msaitoh int onoff;
955 1.5 msaitoh {
956 1.5 msaitoh
957 1.5 msaitoh if (onoff)
958 1.6 msaitoh SHREG_SCSSR &= ~SCSSR_TDRE;
959 1.5 msaitoh else
960 1.6 msaitoh SHREG_SCSSR |= SCSSR_TDRE;
961 1.5 msaitoh
962 1.5 msaitoh #if 0 /* XXX */
963 1.5 msaitoh if (!sc->sc_heldchange) {
964 1.5 msaitoh if (sc->sc_tx_busy) {
965 1.5 msaitoh sc->sc_heldtbc = sc->sc_tbc;
966 1.5 msaitoh sc->sc_tbc = 0;
967 1.5 msaitoh sc->sc_heldchange = 1;
968 1.5 msaitoh } else
969 1.5 msaitoh sci_loadchannelregs(sc);
970 1.5 msaitoh }
971 1.1 itojun #endif
972 1.1 itojun }
973 1.1 itojun
974 1.1 itojun /*
975 1.1 itojun * Stop output, e.g., for ^S or output flush.
976 1.1 itojun */
977 1.1 itojun void
978 1.1 itojun scistop(tp, flag)
979 1.1 itojun struct tty *tp;
980 1.1 itojun int flag;
981 1.1 itojun {
982 1.1 itojun struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(tp->t_dev)];
983 1.1 itojun int s;
984 1.1 itojun
985 1.1 itojun s = splserial();
986 1.1 itojun if (ISSET(tp->t_state, TS_BUSY)) {
987 1.1 itojun /* Stop transmitting at the next chunk. */
988 1.1 itojun sc->sc_tbc = 0;
989 1.1 itojun sc->sc_heldtbc = 0;
990 1.1 itojun if (!ISSET(tp->t_state, TS_TTSTOP))
991 1.1 itojun SET(tp->t_state, TS_FLUSH);
992 1.1 itojun }
993 1.1 itojun splx(s);
994 1.1 itojun }
995 1.1 itojun
996 1.1 itojun void
997 1.1 itojun scidiag(arg)
998 1.1 itojun void *arg;
999 1.1 itojun {
1000 1.1 itojun struct sci_softc *sc = arg;
1001 1.1 itojun int overflows, floods;
1002 1.1 itojun int s;
1003 1.1 itojun
1004 1.1 itojun s = splserial();
1005 1.1 itojun overflows = sc->sc_overflows;
1006 1.1 itojun sc->sc_overflows = 0;
1007 1.1 itojun floods = sc->sc_floods;
1008 1.1 itojun sc->sc_floods = 0;
1009 1.1 itojun sc->sc_errors = 0;
1010 1.1 itojun splx(s);
1011 1.1 itojun
1012 1.1 itojun log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n",
1013 1.1 itojun sc->sc_dev.dv_xname,
1014 1.1 itojun overflows, overflows == 1 ? "" : "s",
1015 1.1 itojun floods, floods == 1 ? "" : "s");
1016 1.1 itojun }
1017 1.1 itojun
1018 1.1 itojun integrate void
1019 1.1 itojun sci_rxsoft(sc, tp)
1020 1.1 itojun struct sci_softc *sc;
1021 1.1 itojun struct tty *tp;
1022 1.1 itojun {
1023 1.10 eeh int (*rint) __P((int c, struct tty *tp)) = tp->t_linesw->l_rint;
1024 1.1 itojun u_char *get, *end;
1025 1.1 itojun u_int cc, scc;
1026 1.1 itojun u_char ssr;
1027 1.1 itojun int code;
1028 1.1 itojun int s;
1029 1.1 itojun
1030 1.1 itojun end = sc->sc_ebuf;
1031 1.1 itojun get = sc->sc_rbget;
1032 1.1 itojun scc = cc = sci_rbuf_size - sc->sc_rbavail;
1033 1.1 itojun
1034 1.1 itojun if (cc == sci_rbuf_size) {
1035 1.1 itojun sc->sc_floods++;
1036 1.1 itojun if (sc->sc_errors++ == 0)
1037 1.7 thorpej callout_reset(&sc->sc_diag_ch, 60 * hz, scidiag, sc);
1038 1.1 itojun }
1039 1.1 itojun
1040 1.1 itojun while (cc) {
1041 1.1 itojun code = get[0];
1042 1.1 itojun ssr = get[1];
1043 1.1 itojun if (ISSET(ssr, SCSSR_FER | SCSSR_PER)) {
1044 1.1 itojun if (ISSET(ssr, SCSSR_FER))
1045 1.1 itojun SET(code, TTY_FE);
1046 1.1 itojun if (ISSET(ssr, SCSSR_PER))
1047 1.1 itojun SET(code, TTY_PE);
1048 1.1 itojun }
1049 1.1 itojun if ((*rint)(code, tp) == -1) {
1050 1.1 itojun /*
1051 1.1 itojun * The line discipline's buffer is out of space.
1052 1.1 itojun */
1053 1.1 itojun if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) {
1054 1.1 itojun /*
1055 1.1 itojun * We're either not using flow control, or the
1056 1.1 itojun * line discipline didn't tell us to block for
1057 1.1 itojun * some reason. Either way, we have no way to
1058 1.1 itojun * know when there's more space available, so
1059 1.1 itojun * just drop the rest of the data.
1060 1.1 itojun */
1061 1.1 itojun get += cc << 1;
1062 1.1 itojun if (get >= end)
1063 1.1 itojun get -= sci_rbuf_size << 1;
1064 1.1 itojun cc = 0;
1065 1.1 itojun } else {
1066 1.1 itojun /*
1067 1.1 itojun * Don't schedule any more receive processing
1068 1.1 itojun * until the line discipline tells us there's
1069 1.1 itojun * space available (through scihwiflow()).
1070 1.1 itojun * Leave the rest of the data in the input
1071 1.1 itojun * buffer.
1072 1.1 itojun */
1073 1.1 itojun SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
1074 1.1 itojun }
1075 1.1 itojun break;
1076 1.1 itojun }
1077 1.1 itojun get += 2;
1078 1.1 itojun if (get >= end)
1079 1.1 itojun get = sc->sc_rbuf;
1080 1.1 itojun cc--;
1081 1.1 itojun }
1082 1.1 itojun
1083 1.1 itojun if (cc != scc) {
1084 1.1 itojun sc->sc_rbget = get;
1085 1.1 itojun s = splserial();
1086 1.1 itojun cc = sc->sc_rbavail += scc - cc;
1087 1.1 itojun /* Buffers should be ok again, release possible block. */
1088 1.1 itojun if (cc >= sc->sc_r_lowat) {
1089 1.1 itojun if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) {
1090 1.1 itojun CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED);
1091 1.1 itojun SHREG_SCSCR |= SCSCR_RIE;
1092 1.1 itojun }
1093 1.1 itojun #if 0
1094 1.1 itojun if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) {
1095 1.1 itojun CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED);
1096 1.1 itojun sci_hwiflow(sc);
1097 1.1 itojun }
1098 1.1 itojun #endif
1099 1.1 itojun }
1100 1.1 itojun splx(s);
1101 1.1 itojun }
1102 1.1 itojun }
1103 1.1 itojun
1104 1.1 itojun integrate void
1105 1.1 itojun sci_txsoft(sc, tp)
1106 1.1 itojun struct sci_softc *sc;
1107 1.1 itojun struct tty *tp;
1108 1.1 itojun {
1109 1.1 itojun
1110 1.1 itojun CLR(tp->t_state, TS_BUSY);
1111 1.1 itojun if (ISSET(tp->t_state, TS_FLUSH))
1112 1.1 itojun CLR(tp->t_state, TS_FLUSH);
1113 1.1 itojun else
1114 1.1 itojun ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf));
1115 1.10 eeh (*tp->t_linesw->l_start)(tp);
1116 1.1 itojun }
1117 1.1 itojun
1118 1.1 itojun integrate void
1119 1.1 itojun sci_stsoft(sc, tp)
1120 1.1 itojun struct sci_softc *sc;
1121 1.1 itojun struct tty *tp;
1122 1.1 itojun {
1123 1.1 itojun #if 0
1124 1.1 itojun /* XXX (msaitoh) */
1125 1.1 itojun u_char msr, delta;
1126 1.1 itojun int s;
1127 1.1 itojun
1128 1.1 itojun s = splserial();
1129 1.1 itojun msr = sc->sc_msr;
1130 1.1 itojun delta = sc->sc_msr_delta;
1131 1.1 itojun sc->sc_msr_delta = 0;
1132 1.1 itojun splx(s);
1133 1.1 itojun
1134 1.1 itojun if (ISSET(delta, sc->sc_msr_dcd)) {
1135 1.1 itojun /*
1136 1.1 itojun * Inform the tty layer that carrier detect changed.
1137 1.1 itojun */
1138 1.10 eeh (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD));
1139 1.1 itojun }
1140 1.1 itojun
1141 1.1 itojun if (ISSET(delta, sc->sc_msr_cts)) {
1142 1.1 itojun /* Block or unblock output according to flow control. */
1143 1.1 itojun if (ISSET(msr, sc->sc_msr_cts)) {
1144 1.1 itojun sc->sc_tx_stopped = 0;
1145 1.10 eeh (*tp->t_linesw->l_start)(tp);
1146 1.1 itojun } else {
1147 1.1 itojun sc->sc_tx_stopped = 1;
1148 1.1 itojun }
1149 1.1 itojun }
1150 1.1 itojun
1151 1.1 itojun #ifdef SCI_DEBUG
1152 1.1 itojun if (sci_debug)
1153 1.1 itojun scistatus(sc, "sci_stsoft");
1154 1.1 itojun #endif
1155 1.1 itojun #endif
1156 1.1 itojun }
1157 1.1 itojun
1158 1.12 thorpej #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
1159 1.1 itojun void
1160 1.1 itojun scisoft(arg)
1161 1.1 itojun void *arg;
1162 1.1 itojun {
1163 1.1 itojun struct sci_softc *sc = arg;
1164 1.1 itojun struct tty *tp;
1165 1.1 itojun
1166 1.1 itojun if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
1167 1.1 itojun return;
1168 1.1 itojun
1169 1.1 itojun {
1170 1.1 itojun #else
1171 1.1 itojun void
1172 1.1 itojun #ifndef __NO_SOFT_SERIAL_INTERRUPT
1173 1.1 itojun scisoft()
1174 1.1 itojun #else
1175 1.1 itojun scisoft(arg)
1176 1.1 itojun void *arg;
1177 1.1 itojun #endif
1178 1.1 itojun {
1179 1.1 itojun struct sci_softc *sc;
1180 1.1 itojun struct tty *tp;
1181 1.1 itojun int unit;
1182 1.1 itojun #ifdef __NO_SOFT_SERIAL_INTERRUPT
1183 1.1 itojun int s;
1184 1.1 itojun
1185 1.1 itojun s = splsoftserial();
1186 1.1 itojun sci_softintr_scheduled = 0;
1187 1.1 itojun #endif
1188 1.1 itojun
1189 1.1 itojun for (unit = 0; unit < sci_cd.cd_ndevs; unit++) {
1190 1.1 itojun sc = sci_cd.cd_devs[unit];
1191 1.1 itojun if (sc == NULL || !ISSET(sc->sc_hwflags, SCI_HW_DEV_OK))
1192 1.1 itojun continue;
1193 1.1 itojun
1194 1.1 itojun if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
1195 1.1 itojun continue;
1196 1.1 itojun
1197 1.1 itojun tp = sc->sc_tty;
1198 1.1 itojun if (tp == NULL)
1199 1.1 itojun continue;
1200 1.1 itojun if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0)
1201 1.1 itojun continue;
1202 1.1 itojun #endif
1203 1.1 itojun tp = sc->sc_tty;
1204 1.1 itojun
1205 1.1 itojun if (sc->sc_rx_ready) {
1206 1.1 itojun sc->sc_rx_ready = 0;
1207 1.1 itojun sci_rxsoft(sc, tp);
1208 1.1 itojun }
1209 1.1 itojun
1210 1.1 itojun #if 0
1211 1.1 itojun if (sc->sc_st_check) {
1212 1.1 itojun sc->sc_st_check = 0;
1213 1.1 itojun sci_stsoft(sc, tp);
1214 1.1 itojun }
1215 1.1 itojun #endif
1216 1.1 itojun
1217 1.1 itojun if (sc->sc_tx_done) {
1218 1.1 itojun sc->sc_tx_done = 0;
1219 1.1 itojun sci_txsoft(sc, tp);
1220 1.1 itojun }
1221 1.1 itojun }
1222 1.1 itojun
1223 1.12 thorpej #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS
1224 1.1 itojun #ifdef __NO_SOFT_SERIAL_INTERRUPT
1225 1.1 itojun splx(s);
1226 1.1 itojun #endif
1227 1.1 itojun #endif
1228 1.1 itojun }
1229 1.1 itojun
1230 1.1 itojun int
1231 1.1 itojun sciintr(arg)
1232 1.1 itojun void *arg;
1233 1.1 itojun {
1234 1.1 itojun struct sci_softc *sc = arg;
1235 1.1 itojun u_char *put, *end;
1236 1.1 itojun u_int cc;
1237 1.1 itojun u_short ssr;
1238 1.1 itojun
1239 1.1 itojun if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
1240 1.1 itojun return (0);
1241 1.1 itojun
1242 1.1 itojun end = sc->sc_ebuf;
1243 1.1 itojun put = sc->sc_rbput;
1244 1.1 itojun cc = sc->sc_rbavail;
1245 1.1 itojun
1246 1.6 msaitoh ssr = SHREG_SCSSR;
1247 1.16 msaitoh if (ISSET(ssr, SCSSR_FER)) {
1248 1.16 msaitoh SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_PER | SCSSR_FER);
1249 1.1 itojun #if defined(DDB) || defined(KGDB)
1250 1.16 msaitoh #ifdef SH4
1251 1.16 msaitoh if ((SHREG_SCSPTR & SCPTR_SPB0DT) != 0) {
1252 1.16 msaitoh #else
1253 1.16 msaitoh if ((SHREG_SCSPDR & SCPDR_SCP0DT) != 0) {
1254 1.16 msaitoh #endif
1255 1.1 itojun #ifdef DDB
1256 1.16 msaitoh if (ISSET(sc->sc_hwflags, SCI_HW_CONSOLE)) {
1257 1.16 msaitoh console_debugger();
1258 1.16 msaitoh }
1259 1.1 itojun #endif
1260 1.1 itojun #ifdef KGDB
1261 1.16 msaitoh if (ISSET(sc->sc_hwflags, SCI_HW_KGDB)) {
1262 1.16 msaitoh kgdb_connect(1);
1263 1.16 msaitoh }
1264 1.16 msaitoh #endif
1265 1.6 msaitoh }
1266 1.16 msaitoh #endif /* DDB || KGDB */
1267 1.6 msaitoh }
1268 1.6 msaitoh if ((SHREG_SCSSR & SCSSR_RDRF) != 0) {
1269 1.6 msaitoh if (cc > 0) {
1270 1.6 msaitoh put[0] = SHREG_SCRDR;
1271 1.6 msaitoh put[1] = SHREG_SCSSR & 0x00ff;
1272 1.6 msaitoh
1273 1.9 msaitoh SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_FER | SCSSR_PER |
1274 1.9 msaitoh SCSSR_RDRF);
1275 1.6 msaitoh
1276 1.6 msaitoh put += 2;
1277 1.6 msaitoh if (put >= end)
1278 1.6 msaitoh put = sc->sc_rbuf;
1279 1.6 msaitoh cc--;
1280 1.1 itojun }
1281 1.1 itojun
1282 1.6 msaitoh /*
1283 1.6 msaitoh * Current string of incoming characters ended because
1284 1.6 msaitoh * no more data was available or we ran out of space.
1285 1.6 msaitoh * Schedule a receive event if any data was received.
1286 1.6 msaitoh * If we're out of space, turn off receive interrupts.
1287 1.6 msaitoh */
1288 1.6 msaitoh sc->sc_rbput = put;
1289 1.6 msaitoh sc->sc_rbavail = cc;
1290 1.6 msaitoh if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED))
1291 1.6 msaitoh sc->sc_rx_ready = 1;
1292 1.1 itojun
1293 1.6 msaitoh /*
1294 1.6 msaitoh * See if we are in danger of overflowing a buffer. If
1295 1.6 msaitoh * so, use hardware flow control to ease the pressure.
1296 1.6 msaitoh */
1297 1.6 msaitoh if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) &&
1298 1.6 msaitoh cc < sc->sc_r_hiwat) {
1299 1.6 msaitoh SET(sc->sc_rx_flags, RX_IBUF_BLOCKED);
1300 1.1 itojun #if 0
1301 1.6 msaitoh sci_hwiflow(sc);
1302 1.1 itojun #endif
1303 1.6 msaitoh }
1304 1.1 itojun
1305 1.6 msaitoh /*
1306 1.6 msaitoh * If we're out of space, disable receive interrupts
1307 1.6 msaitoh * until the queue has drained a bit.
1308 1.6 msaitoh */
1309 1.6 msaitoh if (!cc) {
1310 1.6 msaitoh SHREG_SCSCR &= ~SCSCR_RIE;
1311 1.6 msaitoh }
1312 1.6 msaitoh } else {
1313 1.6 msaitoh if (SHREG_SCSSR & SCSSR_RDRF) {
1314 1.6 msaitoh SHREG_SCSCR &= ~(SCSCR_TIE | SCSCR_RIE);
1315 1.1 itojun }
1316 1.6 msaitoh }
1317 1.6 msaitoh
1318 1.1 itojun #if 0
1319 1.6 msaitoh msr = bus_space_read_1(iot, ioh, sci_msr);
1320 1.6 msaitoh delta = msr ^ sc->sc_msr;
1321 1.6 msaitoh sc->sc_msr = msr;
1322 1.6 msaitoh if (ISSET(delta, sc->sc_msr_mask)) {
1323 1.6 msaitoh SET(sc->sc_msr_delta, delta);
1324 1.1 itojun
1325 1.6 msaitoh /*
1326 1.6 msaitoh * Pulse-per-second clock signal on edge of DCD?
1327 1.6 msaitoh */
1328 1.6 msaitoh if (ISSET(delta, sc->sc_ppsmask)) {
1329 1.6 msaitoh struct timeval tv;
1330 1.6 msaitoh if (ISSET(msr, sc->sc_ppsmask) ==
1331 1.6 msaitoh sc->sc_ppsassert) {
1332 1.6 msaitoh /* XXX nanotime() */
1333 1.6 msaitoh microtime(&tv);
1334 1.6 msaitoh TIMEVAL_TO_TIMESPEC(&tv,
1335 1.6 msaitoh &sc->ppsinfo.assert_timestamp);
1336 1.6 msaitoh if (sc->ppsparam.mode & PPS_OFFSETASSERT) {
1337 1.6 msaitoh timespecadd(&sc->ppsinfo.assert_timestamp,
1338 1.1 itojun &sc->ppsparam.assert_offset,
1339 1.1 itojun &sc->ppsinfo.assert_timestamp);
1340 1.6 msaitoh TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.assert_timestamp);
1341 1.6 msaitoh }
1342 1.1 itojun
1343 1.1 itojun #ifdef PPS_SYNC
1344 1.6 msaitoh if (sc->ppsparam.mode & PPS_HARDPPSONASSERT)
1345 1.6 msaitoh hardpps(&tv, tv.tv_usec);
1346 1.1 itojun #endif
1347 1.6 msaitoh sc->ppsinfo.assert_sequence++;
1348 1.6 msaitoh sc->ppsinfo.current_mode =
1349 1.6 msaitoh sc->ppsparam.mode;
1350 1.6 msaitoh
1351 1.6 msaitoh } else if (ISSET(msr, sc->sc_ppsmask) ==
1352 1.6 msaitoh sc->sc_ppsclear) {
1353 1.6 msaitoh /* XXX nanotime() */
1354 1.6 msaitoh microtime(&tv);
1355 1.6 msaitoh TIMEVAL_TO_TIMESPEC(&tv,
1356 1.6 msaitoh &sc->ppsinfo.clear_timestamp);
1357 1.6 msaitoh if (sc->ppsparam.mode & PPS_OFFSETCLEAR) {
1358 1.6 msaitoh timespecadd(&sc->ppsinfo.clear_timestamp,
1359 1.1 itojun &sc->ppsparam.clear_offset,
1360 1.1 itojun &sc->ppsinfo.clear_timestamp);
1361 1.6 msaitoh TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.clear_timestamp);
1362 1.6 msaitoh }
1363 1.1 itojun
1364 1.1 itojun #ifdef PPS_SYNC
1365 1.6 msaitoh if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR)
1366 1.6 msaitoh hardpps(&tv, tv.tv_usec);
1367 1.1 itojun #endif
1368 1.6 msaitoh sc->ppsinfo.clear_sequence++;
1369 1.6 msaitoh sc->ppsinfo.current_mode =
1370 1.6 msaitoh sc->ppsparam.mode;
1371 1.1 itojun }
1372 1.6 msaitoh }
1373 1.1 itojun
1374 1.6 msaitoh /*
1375 1.6 msaitoh * Stop output immediately if we lose the output
1376 1.6 msaitoh * flow control signal or carrier detect.
1377 1.6 msaitoh */
1378 1.6 msaitoh if (ISSET(~msr, sc->sc_msr_mask)) {
1379 1.6 msaitoh sc->sc_tbc = 0;
1380 1.6 msaitoh sc->sc_heldtbc = 0;
1381 1.1 itojun #ifdef SCI_DEBUG
1382 1.6 msaitoh if (sci_debug)
1383 1.6 msaitoh scistatus(sc, "sciintr ");
1384 1.1 itojun #endif
1385 1.6 msaitoh }
1386 1.1 itojun
1387 1.6 msaitoh sc->sc_st_check = 1;
1388 1.6 msaitoh }
1389 1.1 itojun #endif
1390 1.1 itojun
1391 1.1 itojun /*
1392 1.1 itojun * Done handling any receive interrupts. See if data can be
1393 1.1 itojun * transmitted as well. Schedule tx done event if no data left
1394 1.1 itojun * and tty was marked busy.
1395 1.1 itojun */
1396 1.1 itojun if ((SHREG_SCSSR & SCSSR_TDRE) != 0) {
1397 1.1 itojun /*
1398 1.1 itojun * If we've delayed a parameter change, do it now, and restart
1399 1.1 itojun * output.
1400 1.1 itojun */
1401 1.1 itojun if (sc->sc_heldchange) {
1402 1.1 itojun sc->sc_heldchange = 0;
1403 1.1 itojun sc->sc_tbc = sc->sc_heldtbc;
1404 1.1 itojun sc->sc_heldtbc = 0;
1405 1.1 itojun }
1406 1.1 itojun
1407 1.1 itojun /* Output the next chunk of the contiguous buffer, if any. */
1408 1.1 itojun if (sc->sc_tbc > 0) {
1409 1.11 msaitoh sci_putc(*(sc->sc_tba));
1410 1.1 itojun sc->sc_tba++;
1411 1.1 itojun sc->sc_tbc--;
1412 1.1 itojun } else {
1413 1.1 itojun /* Disable transmit completion interrupts if necessary. */
1414 1.1 itojun #if 0
1415 1.1 itojun if (ISSET(sc->sc_ier, IER_ETXRDY))
1416 1.1 itojun #endif
1417 1.1 itojun SHREG_SCSCR &= ~SCSCR_TIE;
1418 1.1 itojun
1419 1.1 itojun if (sc->sc_tx_busy) {
1420 1.1 itojun sc->sc_tx_busy = 0;
1421 1.1 itojun sc->sc_tx_done = 1;
1422 1.1 itojun }
1423 1.1 itojun }
1424 1.1 itojun }
1425 1.1 itojun
1426 1.1 itojun /* Wake up the poller. */
1427 1.12 thorpej #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
1428 1.1 itojun softintr_schedule(sc->sc_si);
1429 1.1 itojun #else
1430 1.1 itojun #ifndef __NO_SOFT_SERIAL_INTERRUPT
1431 1.1 itojun setsoftserial();
1432 1.1 itojun #else
1433 1.1 itojun if (!sci_softintr_scheduled) {
1434 1.1 itojun sci_softintr_scheduled = 1;
1435 1.7 thorpej callout_reset(&sci_soft_ch, 1, scisoft, 1);
1436 1.1 itojun }
1437 1.1 itojun #endif
1438 1.1 itojun #endif
1439 1.1 itojun
1440 1.1 itojun #if NRND > 0 && defined(RND_SCI)
1441 1.1 itojun rnd_add_uint32(&sc->rnd_source, iir | lsr);
1442 1.1 itojun #endif
1443 1.1 itojun
1444 1.1 itojun return (1);
1445 1.1 itojun }
1446 1.1 itojun
1447 1.1 itojun void
1448 1.1 itojun scicnprobe(cp)
1449 1.1 itojun struct consdev *cp;
1450 1.1 itojun {
1451 1.1 itojun int maj;
1452 1.1 itojun
1453 1.1 itojun /* locate the major number */
1454 1.1 itojun for (maj = 0; maj < nchrdev; maj++)
1455 1.1 itojun if (cdevsw[maj].d_open == sciopen)
1456 1.1 itojun break;
1457 1.1 itojun
1458 1.1 itojun /* Initialize required fields. */
1459 1.1 itojun cp->cn_dev = makedev(maj, 0);
1460 1.4 msaitoh #ifdef SCICONSOLE
1461 1.4 msaitoh cp->cn_pri = CN_REMOTE;
1462 1.4 msaitoh #else
1463 1.1 itojun cp->cn_pri = CN_NORMAL;
1464 1.4 msaitoh #endif
1465 1.1 itojun }
1466 1.1 itojun
1467 1.1 itojun void
1468 1.1 itojun scicninit(cp)
1469 1.1 itojun struct consdev *cp;
1470 1.1 itojun {
1471 1.1 itojun
1472 1.6 msaitoh InitializeSci(scicn_speed);
1473 1.8 msaitoh sciisconsole = 1;
1474 1.1 itojun }
1475 1.1 itojun
1476 1.1 itojun int
1477 1.1 itojun scicngetc(dev)
1478 1.1 itojun dev_t dev;
1479 1.1 itojun {
1480 1.1 itojun int c;
1481 1.1 itojun int s;
1482 1.1 itojun
1483 1.1 itojun s = splserial();
1484 1.1 itojun c = sci_getc();
1485 1.1 itojun splx(s);
1486 1.1 itojun
1487 1.1 itojun return (c);
1488 1.1 itojun }
1489 1.1 itojun
1490 1.1 itojun void
1491 1.1 itojun scicnputc(dev, c)
1492 1.1 itojun dev_t dev;
1493 1.1 itojun int c;
1494 1.1 itojun {
1495 1.1 itojun int s;
1496 1.1 itojun
1497 1.1 itojun s = splserial();
1498 1.11 msaitoh sci_putc((u_char)c);
1499 1.1 itojun splx(s);
1500 1.1 itojun }
1501