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sci.c revision 1.25.2.3
      1  1.25.2.3  gehenna /* $NetBSD: sci.c,v 1.25.2.3 2002/08/31 13:45:53 gehenna Exp $ */
      2       1.1   itojun 
      3       1.1   itojun /*-
      4       1.1   itojun  * Copyright (C) 1999 T.Horiuchi and SAITOH Masanobu.  All rights reserved.
      5       1.1   itojun  *
      6       1.1   itojun  * Redistribution and use in source and binary forms, with or without
      7       1.1   itojun  * modification, are permitted provided that the following conditions
      8       1.1   itojun  * are met:
      9       1.1   itojun  * 1. Redistributions of source code must retain the above copyright
     10       1.1   itojun  *    notice, this list of conditions and the following disclaimer.
     11       1.1   itojun  * 2. Redistributions in binary form must reproduce the above copyright
     12       1.1   itojun  *    notice, this list of conditions and the following disclaimer in the
     13       1.1   itojun  *    documentation and/or other materials provided with the distribution.
     14       1.1   itojun  * 3. The name of the author may not be used to endorse or promote products
     15       1.1   itojun  *    derived from this software without specific prior written permission.
     16       1.1   itojun  *
     17       1.1   itojun  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     18       1.1   itojun  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     19       1.1   itojun  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     20       1.1   itojun  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     21       1.1   itojun  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     22       1.1   itojun  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     23       1.1   itojun  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     24       1.1   itojun  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     25       1.1   itojun  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
     26       1.1   itojun  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     27       1.1   itojun  */
     28       1.1   itojun 
     29       1.2  msaitoh /*-
     30       1.2  msaitoh  * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
     31       1.2  msaitoh  * All rights reserved.
     32       1.2  msaitoh  *
     33       1.2  msaitoh  * This code is derived from software contributed to The NetBSD Foundation
     34       1.2  msaitoh  * by Charles M. Hannum.
     35       1.2  msaitoh  *
     36       1.2  msaitoh  * Redistribution and use in source and binary forms, with or without
     37       1.2  msaitoh  * modification, are permitted provided that the following conditions
     38       1.2  msaitoh  * are met:
     39       1.2  msaitoh  * 1. Redistributions of source code must retain the above copyright
     40       1.2  msaitoh  *    notice, this list of conditions and the following disclaimer.
     41       1.2  msaitoh  * 2. Redistributions in binary form must reproduce the above copyright
     42       1.2  msaitoh  *    notice, this list of conditions and the following disclaimer in the
     43       1.2  msaitoh  *    documentation and/or other materials provided with the distribution.
     44       1.2  msaitoh  * 3. All advertising materials mentioning features or use of this software
     45       1.2  msaitoh  *    must display the following acknowledgement:
     46       1.2  msaitoh  *        This product includes software developed by the NetBSD
     47       1.2  msaitoh  *        Foundation, Inc. and its contributors.
     48       1.2  msaitoh  * 4. Neither the name of The NetBSD Foundation nor the names of its
     49       1.2  msaitoh  *    contributors may be used to endorse or promote products derived
     50       1.2  msaitoh  *    from this software without specific prior written permission.
     51       1.2  msaitoh  *
     52       1.2  msaitoh  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     53       1.2  msaitoh  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     54       1.2  msaitoh  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     55       1.2  msaitoh  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     56       1.2  msaitoh  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     57       1.2  msaitoh  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     58       1.2  msaitoh  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     59       1.2  msaitoh  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     60       1.2  msaitoh  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     61       1.2  msaitoh  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     62       1.2  msaitoh  * POSSIBILITY OF SUCH DAMAGE.
     63       1.2  msaitoh  */
     64       1.2  msaitoh 
     65       1.2  msaitoh /*
     66       1.2  msaitoh  * Copyright (c) 1991 The Regents of the University of California.
     67       1.2  msaitoh  * All rights reserved.
     68       1.2  msaitoh  *
     69       1.2  msaitoh  * Redistribution and use in source and binary forms, with or without
     70       1.2  msaitoh  * modification, are permitted provided that the following conditions
     71       1.2  msaitoh  * are met:
     72       1.2  msaitoh  * 1. Redistributions of source code must retain the above copyright
     73       1.2  msaitoh  *    notice, this list of conditions and the following disclaimer.
     74       1.2  msaitoh  * 2. Redistributions in binary form must reproduce the above copyright
     75       1.2  msaitoh  *    notice, this list of conditions and the following disclaimer in the
     76       1.2  msaitoh  *    documentation and/or other materials provided with the distribution.
     77       1.2  msaitoh  * 3. All advertising materials mentioning features or use of this software
     78       1.2  msaitoh  *    must display the following acknowledgement:
     79       1.2  msaitoh  *	This product includes software developed by the University of
     80       1.2  msaitoh  *	California, Berkeley and its contributors.
     81       1.2  msaitoh  * 4. Neither the name of the University nor the names of its contributors
     82       1.2  msaitoh  *    may be used to endorse or promote products derived from this software
     83       1.2  msaitoh  *    without specific prior written permission.
     84       1.2  msaitoh  *
     85       1.2  msaitoh  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     86       1.2  msaitoh  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     87       1.2  msaitoh  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     88       1.2  msaitoh  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     89       1.2  msaitoh  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     90       1.2  msaitoh  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     91       1.2  msaitoh  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     92       1.2  msaitoh  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     93       1.2  msaitoh  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     94       1.2  msaitoh  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     95       1.2  msaitoh  * SUCH DAMAGE.
     96       1.2  msaitoh  *
     97       1.2  msaitoh  *	@(#)com.c	7.5 (Berkeley) 5/16/91
     98       1.2  msaitoh  */
     99       1.2  msaitoh 
    100       1.2  msaitoh /*
    101       1.2  msaitoh  * SH internal serial driver
    102       1.2  msaitoh  *
    103       1.2  msaitoh  * This code is derived from both z8530tty.c and com.c
    104       1.2  msaitoh  */
    105       1.2  msaitoh 
    106      1.14    lukem #include "opt_kgdb.h"
    107       1.1   itojun #include "opt_sci.h"
    108       1.1   itojun 
    109       1.1   itojun #include <sys/param.h>
    110       1.1   itojun #include <sys/systm.h>
    111       1.1   itojun #include <sys/tty.h>
    112       1.1   itojun #include <sys/proc.h>
    113       1.1   itojun #include <sys/conf.h>
    114       1.1   itojun #include <sys/file.h>
    115       1.1   itojun #include <sys/syslog.h>
    116       1.1   itojun #include <sys/kernel.h>
    117       1.1   itojun #include <sys/device.h>
    118       1.1   itojun #include <sys/malloc.h>
    119       1.1   itojun 
    120       1.1   itojun #include <dev/cons.h>
    121       1.1   itojun 
    122      1.19      uch #include <sh3/clock.h>
    123       1.1   itojun #include <sh3/scireg.h>
    124      1.22      uch #include <sh3/pfcreg.h>
    125       1.1   itojun #include <sh3/tmureg.h>
    126      1.22      uch #include <sh3/exception.h>
    127      1.22      uch #include <machine/intr.h>
    128       1.1   itojun 
    129      1.18      uch static void	scistart(struct tty *);
    130      1.18      uch static int	sciparam(struct tty *, struct termios *);
    131       1.1   itojun 
    132      1.18      uch void scicnprobe(struct consdev *);
    133      1.18      uch void scicninit(struct consdev *);
    134      1.18      uch void scicnputc(dev_t, int);
    135      1.18      uch int scicngetc(dev_t);
    136      1.18      uch void scicnpoolc(dev_t, int);
    137      1.18      uch int sciintr(void *);
    138       1.1   itojun 
    139       1.1   itojun struct sci_softc {
    140       1.1   itojun 	struct device sc_dev;		/* boilerplate */
    141       1.1   itojun 	struct tty *sc_tty;
    142      1.22      uch 	void *sc_si;
    143       1.7  thorpej 	struct callout sc_diag_ch;
    144       1.7  thorpej 
    145       1.1   itojun #if 0
    146       1.1   itojun 	bus_space_tag_t sc_iot;		/* ISA i/o space identifier */
    147       1.1   itojun 	bus_space_handle_t   sc_ioh;	/* ISA io handle */
    148       1.1   itojun 
    149       1.1   itojun 	int sc_drq;
    150       1.1   itojun 
    151       1.1   itojun 	int sc_frequency;
    152       1.1   itojun #endif
    153       1.1   itojun 
    154       1.1   itojun 	u_int sc_overflows,
    155       1.1   itojun 	      sc_floods,
    156       1.1   itojun 	      sc_errors;		/* number of retries so far */
    157       1.1   itojun 	u_char sc_status[7];		/* copy of registers */
    158       1.1   itojun 
    159       1.1   itojun 	int sc_hwflags;
    160       1.1   itojun 	int sc_swflags;
    161       1.1   itojun 	u_int sc_fifolen;		/* XXX always 0? */
    162       1.1   itojun 
    163       1.1   itojun 	u_int sc_r_hiwat,
    164       1.1   itojun 	      sc_r_lowat;
    165       1.1   itojun 	u_char *volatile sc_rbget,
    166       1.1   itojun 	       *volatile sc_rbput;
    167       1.1   itojun  	volatile u_int sc_rbavail;
    168       1.1   itojun 	u_char *sc_rbuf,
    169       1.1   itojun 	       *sc_ebuf;
    170       1.1   itojun 
    171       1.1   itojun  	u_char *sc_tba;			/* transmit buffer address */
    172       1.1   itojun  	u_int sc_tbc,			/* transmit byte count */
    173       1.1   itojun 	      sc_heldtbc;
    174       1.1   itojun 
    175       1.2  msaitoh 	volatile u_char sc_rx_flags,	/* receiver blocked */
    176       1.1   itojun #define	RX_TTY_BLOCKED		0x01
    177       1.1   itojun #define	RX_TTY_OVERFLOWED	0x02
    178       1.1   itojun #define	RX_IBUF_BLOCKED		0x04
    179       1.1   itojun #define	RX_IBUF_OVERFLOWED	0x08
    180       1.1   itojun #define	RX_ANY_BLOCK		0x0f
    181       1.3  msaitoh 			sc_tx_busy,	/* working on an output chunk */
    182       1.3  msaitoh 			sc_tx_done,	/* done with one output chunk */
    183       1.2  msaitoh 			sc_tx_stopped,	/* H/W level stop (lost CTS) */
    184       1.2  msaitoh 			sc_st_check,	/* got a status interrupt */
    185       1.1   itojun 			sc_rx_ready;
    186       1.1   itojun 
    187       1.1   itojun 	volatile u_char sc_heldchange;
    188       1.1   itojun };
    189       1.1   itojun 
    190       1.1   itojun /* controller driver configuration */
    191      1.18      uch static int sci_match(struct device *, struct cfdata *, void *);
    192      1.18      uch static void sci_attach(struct device *, struct device *, void *);
    193       1.1   itojun 
    194      1.18      uch void	sci_break(struct sci_softc *, int);
    195      1.18      uch void	sci_iflush(struct sci_softc *);
    196       1.1   itojun 
    197       1.1   itojun #define	integrate	static inline
    198      1.12  thorpej #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
    199      1.18      uch void 	scisoft(void *);
    200       1.1   itojun #else
    201       1.1   itojun #ifndef __NO_SOFT_SERIAL_INTERRUPT
    202      1.18      uch void 	scisoft(void);
    203       1.1   itojun #else
    204      1.18      uch void 	scisoft(void *);
    205       1.1   itojun #endif
    206       1.1   itojun #endif
    207      1.18      uch integrate void sci_rxsoft(struct sci_softc *, struct tty *);
    208      1.18      uch integrate void sci_txsoft(struct sci_softc *, struct tty *);
    209      1.18      uch integrate void sci_stsoft(struct sci_softc *, struct tty *);
    210      1.18      uch integrate void sci_schedrx(struct sci_softc *);
    211      1.18      uch void	scidiag(void *);
    212       1.1   itojun 
    213       1.1   itojun #define	SCIUNIT_MASK		0x7ffff
    214       1.1   itojun #define	SCIDIALOUT_MASK	0x80000
    215       1.1   itojun 
    216       1.1   itojun #define	SCIUNIT(x)	(minor(x) & SCIUNIT_MASK)
    217       1.1   itojun #define	SCIDIALOUT(x)	(minor(x) & SCIDIALOUT_MASK)
    218       1.1   itojun 
    219       1.1   itojun /* Macros to clear/set/test flags. */
    220      1.25      uch #define	SET(t, f)	(t) |= (f)
    221      1.25      uch #define	CLR(t, f)	(t) &= ~(f)
    222      1.25      uch #define	ISSET(t, f)	((t) & (f))
    223       1.1   itojun 
    224       1.1   itojun /* Hardware flag masks */
    225       1.1   itojun #define	SCI_HW_NOIEN	0x01
    226       1.1   itojun #define	SCI_HW_FIFO	0x02
    227       1.1   itojun #define	SCI_HW_FLOW	0x08
    228       1.1   itojun #define	SCI_HW_DEV_OK	0x20
    229       1.1   itojun #define	SCI_HW_CONSOLE	0x40
    230       1.1   itojun #define	SCI_HW_KGDB	0x80
    231       1.1   itojun 
    232       1.1   itojun /* Buffer size for character buffer */
    233       1.1   itojun #define	SCI_RING_SIZE	2048
    234       1.1   itojun 
    235       1.1   itojun /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */
    236       1.1   itojun u_int sci_rbuf_hiwat = (SCI_RING_SIZE * 1) / 4;
    237       1.1   itojun u_int sci_rbuf_lowat = (SCI_RING_SIZE * 3) / 4;
    238       1.1   itojun 
    239      1.25      uch #define	CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
    240       1.1   itojun int sciconscflag = CONMODE;
    241       1.8  msaitoh int sciisconsole = 0;
    242       1.1   itojun 
    243       1.6  msaitoh #ifdef SCICN_SPEED
    244       1.6  msaitoh int scicn_speed = SCICN_SPEED;
    245       1.6  msaitoh #else
    246       1.6  msaitoh int scicn_speed = 9600;
    247       1.6  msaitoh #endif
    248       1.6  msaitoh 
    249       1.1   itojun #define	divrnd(n, q)	(((n)*2/(q)+1)/2)	/* divide and round off */
    250       1.1   itojun 
    251      1.12  thorpej #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS
    252       1.1   itojun #ifdef __NO_SOFT_SERIAL_INTERRUPT
    253       1.1   itojun volatile int	sci_softintr_scheduled;
    254       1.7  thorpej struct callout sci_soft_ch = CALLOUT_INITIALIZER;
    255       1.1   itojun #endif
    256       1.1   itojun #endif
    257       1.1   itojun 
    258       1.1   itojun u_int sci_rbuf_size = SCI_RING_SIZE;
    259       1.1   itojun 
    260       1.1   itojun struct cfattach sci_ca = {
    261       1.1   itojun 	sizeof(struct sci_softc), sci_match, sci_attach
    262       1.1   itojun };
    263       1.1   itojun 
    264       1.1   itojun extern struct cfdriver sci_cd;
    265       1.1   itojun 
    266  1.25.2.1  gehenna dev_type_open(sciopen);
    267  1.25.2.1  gehenna dev_type_close(sciclose);
    268  1.25.2.1  gehenna dev_type_read(sciread);
    269  1.25.2.1  gehenna dev_type_write(sciwrite);
    270  1.25.2.1  gehenna dev_type_ioctl(sciioctl);
    271  1.25.2.1  gehenna dev_type_stop(scistop);
    272  1.25.2.1  gehenna dev_type_tty(scitty);
    273  1.25.2.1  gehenna dev_type_poll(scipoll);
    274  1.25.2.1  gehenna 
    275  1.25.2.1  gehenna const struct cdevsw sci_cdevsw = {
    276  1.25.2.1  gehenna 	sciopen, sciclose, sciread, sciwrite, sciioctl,
    277  1.25.2.1  gehenna 	scistop, scitty, scipoll, nommap, D_TTY
    278  1.25.2.1  gehenna };
    279       1.1   itojun 
    280      1.18      uch void InitializeSci (unsigned int);
    281       1.1   itojun 
    282       1.1   itojun /*
    283       1.1   itojun  * following functions are debugging prupose only
    284       1.1   itojun  */
    285      1.25      uch #define	CR      0x0D
    286      1.25      uch #define	I2C_ADRS (*(volatile unsigned int *)0xa8000000)
    287      1.25      uch #define	USART_ON (unsigned int)~0x08
    288       1.1   itojun 
    289      1.18      uch void sci_putc(unsigned char);
    290      1.18      uch unsigned char sci_getc(void);
    291      1.18      uch int SciErrCheck(void);
    292       1.1   itojun 
    293       1.1   itojun /*
    294       1.1   itojun  * InitializeSci
    295       1.1   itojun  * : unsigned int bps;
    296       1.1   itojun  * : SCI(Serial Communication Interface)
    297       1.1   itojun  */
    298       1.1   itojun 
    299       1.1   itojun void
    300      1.18      uch InitializeSci(unsigned int bps)
    301       1.1   itojun {
    302       1.1   itojun 
    303       1.1   itojun 	/* Initialize SCR */
    304       1.3  msaitoh 	SHREG_SCSCR = 0x00;
    305       1.1   itojun 
    306       1.3  msaitoh 	/* Serial Mode Register */
    307       1.3  msaitoh 	SHREG_SCSMR = 0x00;	/* Async,8bit,NonParity,Even,1Stop,NoMulti */
    308       1.1   itojun 
    309       1.3  msaitoh 	/* Bit Rate Register */
    310      1.20      uch 	SHREG_SCBRR = divrnd(sh_clock_get_pclock(), 32 * bps) - 1;
    311       1.1   itojun 
    312       1.3  msaitoh 	/*
    313       1.3  msaitoh 	 * wait 1mSec, because Send/Recv must begin 1 bit period after
    314       1.3  msaitoh 	 * BRR is set.
    315       1.3  msaitoh 	 */
    316      1.19      uch 	delay(1000);
    317       1.1   itojun 
    318      1.15      wiz 	/* Send permission, Receive permission ON */
    319       1.3  msaitoh 	SHREG_SCSCR = SCSCR_TE | SCSCR_RE;
    320       1.1   itojun 
    321       1.6  msaitoh 	/* Serial Status Register */
    322       1.1   itojun 	SHREG_SCSSR &= SCSSR_TDRE;	/* Clear Status */
    323       1.1   itojun 
    324       1.1   itojun #if 0
    325       1.1   itojun 	I2C_ADRS &= ~0x08;	/* enable RS-232C */
    326       1.1   itojun #endif
    327       1.1   itojun }
    328       1.1   itojun 
    329       1.1   itojun 
    330       1.1   itojun /*
    331      1.11  msaitoh  * sci_putc
    332       1.1   itojun  *  : unsigned char c;
    333       1.1   itojun  */
    334       1.1   itojun void
    335      1.18      uch sci_putc(unsigned char c)
    336       1.1   itojun {
    337      1.11  msaitoh 
    338       1.1   itojun 	/* wait for ready */
    339       1.1   itojun 	while ((SHREG_SCSSR & SCSSR_TDRE) == NULL)
    340       1.1   itojun 		;
    341       1.1   itojun 
    342       1.1   itojun 	/* write send data to send register */
    343       1.1   itojun 	SHREG_SCTDR = c;
    344       1.1   itojun 
    345       1.1   itojun 	/* clear ready flag */
    346       1.1   itojun 	SHREG_SCSSR &= ~SCSSR_TDRE;
    347       1.1   itojun }
    348       1.1   itojun 
    349       1.1   itojun /*
    350       1.1   itojun  * : SciErrCheck
    351       1.1   itojun  *	0x20 = over run
    352       1.1   itojun  *	0x10 = frame error
    353       1.1   itojun  *	0x80 = parity error
    354       1.1   itojun  */
    355       1.1   itojun int
    356       1.1   itojun SciErrCheck(void)
    357       1.1   itojun {
    358       1.1   itojun 
    359       1.1   itojun 	return(SHREG_SCSSR & (SCSSR_ORER | SCSSR_FER | SCSSR_PER));
    360       1.1   itojun }
    361       1.1   itojun 
    362       1.1   itojun /*
    363      1.11  msaitoh  * sci_getc
    364       1.1   itojun  */
    365       1.1   itojun unsigned char
    366      1.11  msaitoh sci_getc(void)
    367       1.1   itojun {
    368       1.1   itojun 	unsigned char c, err_c;
    369       1.1   itojun 
    370       1.1   itojun 	while (((err_c = SHREG_SCSSR)
    371       1.1   itojun 		& (SCSSR_RDRF | SCSSR_ORER | SCSSR_FER | SCSSR_PER)) == 0)
    372       1.1   itojun 		;
    373       1.9  msaitoh 	if ((err_c & (SCSSR_ORER | SCSSR_FER | SCSSR_PER)) != 0) {
    374       1.9  msaitoh 		SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_FER | SCSSR_PER);
    375       1.1   itojun 		return(err_c |= 0x80);
    376       1.9  msaitoh 	}
    377       1.1   itojun 
    378       1.1   itojun 	c = SHREG_SCRDR;
    379       1.1   itojun 
    380       1.1   itojun 	SHREG_SCSSR &= ~SCSSR_RDRF;
    381       1.1   itojun 
    382       1.1   itojun 	return(c);
    383       1.1   itojun }
    384       1.1   itojun 
    385       1.1   itojun #if 0
    386      1.25      uch #define	SCI_MAX_UNITS 2
    387       1.1   itojun #else
    388      1.25      uch #define	SCI_MAX_UNITS 1
    389       1.1   itojun #endif
    390       1.1   itojun 
    391       1.1   itojun 
    392       1.1   itojun static int
    393      1.18      uch sci_match(struct device *parent, struct cfdata *cfp, void *aux)
    394       1.1   itojun {
    395       1.1   itojun 
    396       1.1   itojun 	if (strcmp(cfp->cf_driver->cd_name, "sci")
    397      1.22      uch 	    || cfp->cf_unit >= SCI_MAX_UNITS) //XXX __BROKEN_CONFIG_UNIT_USAGE
    398       1.1   itojun 		return 0;
    399       1.1   itojun 
    400       1.1   itojun 	return 1;
    401       1.1   itojun }
    402       1.1   itojun 
    403       1.1   itojun static void
    404      1.18      uch sci_attach(struct device *parent, struct device *self, void *aux)
    405       1.1   itojun {
    406       1.1   itojun 	struct sci_softc *sc = (struct sci_softc *)self;
    407       1.1   itojun 	struct tty *tp;
    408       1.1   itojun 
    409       1.1   itojun 	sc->sc_hwflags = 0;	/* XXX */
    410       1.1   itojun 	sc->sc_swflags = 0;	/* XXX */
    411       1.1   itojun 	sc->sc_fifolen = 0;	/* XXX */
    412       1.1   itojun 
    413       1.8  msaitoh 	if (sciisconsole) {
    414       1.8  msaitoh 		SET(sc->sc_hwflags, SCI_HW_CONSOLE);
    415       1.8  msaitoh 		SET(sc->sc_swflags, TIOCFLAG_SOFTCAR);
    416       1.8  msaitoh 		printf("\n%s: console\n", sc->sc_dev.dv_xname);
    417       1.8  msaitoh 	} else {
    418       1.8  msaitoh 		InitializeSci(9600);
    419       1.8  msaitoh 		printf("\n");
    420       1.8  msaitoh 	}
    421       1.1   itojun 
    422       1.7  thorpej 	callout_init(&sc->sc_diag_ch);
    423       1.7  thorpej 
    424      1.22      uch 	intc_intr_establish(SH_INTEVT_SCI_ERI, IST_LEVEL, IPL_SERIAL, sciintr,
    425      1.22      uch 	    sc);
    426      1.22      uch 	intc_intr_establish(SH_INTEVT_SCI_RXI, IST_LEVEL, IPL_SERIAL, sciintr,
    427      1.22      uch 	    sc);
    428      1.22      uch 	intc_intr_establish(SH_INTEVT_SCI_TXI, IST_LEVEL, IPL_SERIAL, sciintr,
    429      1.22      uch 	    sc);
    430      1.22      uch 	intc_intr_establish(SH_INTEVT_SCI_TEI, IST_LEVEL, IPL_SERIAL, sciintr,
    431      1.22      uch 	    sc);
    432       1.1   itojun 
    433      1.24  msaitoh #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
    434      1.24  msaitoh 	sc->sc_si = softintr_establish(IPL_SOFTSERIAL, scisoft, sc);
    435      1.24  msaitoh #endif
    436       1.8  msaitoh 	SET(sc->sc_hwflags, SCI_HW_DEV_OK);
    437       1.1   itojun 
    438       1.1   itojun 	tp = ttymalloc();
    439       1.1   itojun 	tp->t_oproc = scistart;
    440       1.1   itojun 	tp->t_param = sciparam;
    441       1.1   itojun 	tp->t_hwiflow = NULL;
    442       1.1   itojun 
    443       1.1   itojun 	sc->sc_tty = tp;
    444       1.1   itojun 	sc->sc_rbuf = malloc(sci_rbuf_size << 1, M_DEVBUF, M_NOWAIT);
    445       1.1   itojun 	if (sc->sc_rbuf == NULL) {
    446       1.1   itojun 		printf("%s: unable to allocate ring buffer\n",
    447       1.1   itojun 		    sc->sc_dev.dv_xname);
    448       1.1   itojun 		return;
    449       1.1   itojun 	}
    450       1.1   itojun 	sc->sc_ebuf = sc->sc_rbuf + (sci_rbuf_size << 1);
    451       1.1   itojun 
    452       1.1   itojun 	tty_attach(tp);
    453       1.1   itojun }
    454       1.1   itojun 
    455       1.1   itojun /*
    456       1.1   itojun  * Start or restart transmission.
    457       1.1   itojun  */
    458       1.1   itojun static void
    459      1.18      uch scistart(struct tty *tp)
    460       1.1   itojun {
    461       1.1   itojun 	struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(tp->t_dev)];
    462       1.1   itojun 	int s;
    463       1.1   itojun 
    464       1.1   itojun 	s = spltty();
    465       1.1   itojun 	if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP))
    466       1.1   itojun 		goto out;
    467       1.1   itojun 	if (sc->sc_tx_stopped)
    468       1.1   itojun 		goto out;
    469       1.1   itojun 
    470       1.1   itojun 	if (tp->t_outq.c_cc <= tp->t_lowat) {
    471       1.1   itojun 		if (ISSET(tp->t_state, TS_ASLEEP)) {
    472       1.1   itojun 			CLR(tp->t_state, TS_ASLEEP);
    473       1.1   itojun 			wakeup(&tp->t_outq);
    474       1.1   itojun 		}
    475       1.1   itojun 		selwakeup(&tp->t_wsel);
    476       1.1   itojun 		if (tp->t_outq.c_cc == 0)
    477       1.1   itojun 			goto out;
    478       1.1   itojun 	}
    479       1.1   itojun 
    480       1.1   itojun 	/* Grab the first contiguous region of buffer space. */
    481       1.1   itojun 	{
    482       1.1   itojun 		u_char *tba;
    483       1.1   itojun 		int tbc;
    484       1.1   itojun 
    485       1.1   itojun 		tba = tp->t_outq.c_cf;
    486       1.1   itojun 		tbc = ndqb(&tp->t_outq, 0);
    487       1.1   itojun 
    488       1.1   itojun 		(void)splserial();
    489       1.1   itojun 
    490       1.1   itojun 		sc->sc_tba = tba;
    491       1.1   itojun 		sc->sc_tbc = tbc;
    492       1.1   itojun 	}
    493       1.1   itojun 
    494       1.1   itojun 	SET(tp->t_state, TS_BUSY);
    495       1.1   itojun 	sc->sc_tx_busy = 1;
    496       1.1   itojun 
    497       1.1   itojun 	/* Enable transmit completion interrupts if necessary. */
    498       1.1   itojun 	SHREG_SCSCR |= SCSCR_TIE | SCSCR_RIE;
    499       1.1   itojun 
    500       1.1   itojun 	/* Output the first byte of the contiguous buffer. */
    501       1.1   itojun 	{
    502       1.1   itojun 		if (sc->sc_tbc > 0) {
    503      1.11  msaitoh 			sci_putc(*(sc->sc_tba));
    504       1.1   itojun 			sc->sc_tba++;
    505       1.1   itojun 			sc->sc_tbc--;
    506       1.1   itojun 		}
    507       1.1   itojun 	}
    508       1.1   itojun out:
    509       1.1   itojun 	splx(s);
    510       1.1   itojun 	return;
    511       1.1   itojun }
    512       1.1   itojun 
    513       1.1   itojun /*
    514       1.1   itojun  * Set SCI tty parameters from termios.
    515       1.1   itojun  * XXX - Should just copy the whole termios after
    516       1.1   itojun  * making sure all the changes could be done.
    517       1.1   itojun  */
    518       1.1   itojun static int
    519      1.18      uch sciparam(struct tty *tp, struct termios *t)
    520       1.1   itojun {
    521       1.1   itojun 	struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(tp->t_dev)];
    522       1.1   itojun 	int ospeed = t->c_ospeed;
    523       1.1   itojun 	int s;
    524       1.1   itojun 
    525       1.1   itojun 	if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
    526       1.1   itojun 		return (EIO);
    527       1.1   itojun 
    528       1.1   itojun 	/* Check requested parameters. */
    529       1.1   itojun 	if (ospeed < 0)
    530       1.1   itojun 		return (EINVAL);
    531       1.1   itojun 	if (t->c_ispeed && t->c_ispeed != t->c_ospeed)
    532       1.1   itojun 		return (EINVAL);
    533       1.1   itojun 
    534       1.1   itojun 	/*
    535       1.1   itojun 	 * For the console, always force CLOCAL and !HUPCL, so that the port
    536       1.1   itojun 	 * is always active.
    537       1.1   itojun 	 */
    538       1.1   itojun 	if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) ||
    539       1.1   itojun 	    ISSET(sc->sc_hwflags, SCI_HW_CONSOLE)) {
    540       1.1   itojun 		SET(t->c_cflag, CLOCAL);
    541       1.1   itojun 		CLR(t->c_cflag, HUPCL);
    542       1.1   itojun 	}
    543       1.1   itojun 
    544       1.1   itojun 	/*
    545       1.1   itojun 	 * If there were no changes, don't do anything.  This avoids dropping
    546       1.1   itojun 	 * input and improves performance when all we did was frob things like
    547       1.1   itojun 	 * VMIN and VTIME.
    548       1.1   itojun 	 */
    549       1.1   itojun 	if (tp->t_ospeed == t->c_ospeed &&
    550       1.1   itojun 	    tp->t_cflag == t->c_cflag)
    551       1.1   itojun 		return (0);
    552       1.1   itojun 
    553       1.1   itojun #if 0
    554       1.1   itojun /* XXX (msaitoh) */
    555       1.1   itojun 	lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag);
    556       1.1   itojun #endif
    557       1.1   itojun 
    558       1.1   itojun 	s = splserial();
    559       1.1   itojun 
    560       1.1   itojun 	/*
    561       1.1   itojun 	 * Set the FIFO threshold based on the receive speed.
    562       1.1   itojun 	 *
    563       1.1   itojun 	 *  * If it's a low speed, it's probably a mouse or some other
    564       1.1   itojun 	 *    interactive device, so set the threshold low.
    565       1.1   itojun 	 *  * If it's a high speed, trim the trigger level down to prevent
    566       1.1   itojun 	 *    overflows.
    567       1.1   itojun 	 *  * Otherwise set it a bit higher.
    568       1.1   itojun 	 */
    569       1.1   itojun #if 0
    570       1.1   itojun /* XXX (msaitoh) */
    571       1.1   itojun 	if (ISSET(sc->sc_hwflags, SCI_HW_HAYESP))
    572       1.1   itojun 		sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8;
    573       1.1   itojun 	else if (ISSET(sc->sc_hwflags, SCI_HW_FIFO))
    574       1.1   itojun 		sc->sc_fifo = FIFO_ENABLE |
    575       1.1   itojun 		    (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 :
    576       1.1   itojun 		     t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4);
    577       1.1   itojun 	else
    578       1.1   itojun 		sc->sc_fifo = 0;
    579       1.1   itojun #endif
    580       1.1   itojun 
    581       1.1   itojun 	/* And copy to tty. */
    582       1.1   itojun 	tp->t_ispeed = 0;
    583       1.1   itojun 	tp->t_ospeed = t->c_ospeed;
    584       1.1   itojun 	tp->t_cflag = t->c_cflag;
    585       1.1   itojun 
    586       1.1   itojun 	if (!sc->sc_heldchange) {
    587       1.1   itojun 		if (sc->sc_tx_busy) {
    588       1.1   itojun 			sc->sc_heldtbc = sc->sc_tbc;
    589       1.1   itojun 			sc->sc_tbc = 0;
    590       1.1   itojun 			sc->sc_heldchange = 1;
    591       1.1   itojun 		}
    592       1.1   itojun #if 0
    593       1.1   itojun /* XXX (msaitoh) */
    594       1.1   itojun 		else
    595       1.1   itojun 			sci_loadchannelregs(sc);
    596       1.1   itojun #endif
    597       1.1   itojun 	}
    598       1.1   itojun 
    599       1.1   itojun 	if (!ISSET(t->c_cflag, CHWFLOW)) {
    600       1.1   itojun 		/* Disable the high water mark. */
    601       1.1   itojun 		sc->sc_r_hiwat = 0;
    602       1.1   itojun 		sc->sc_r_lowat = 0;
    603       1.1   itojun 		if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) {
    604       1.1   itojun 			CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
    605       1.1   itojun 			sci_schedrx(sc);
    606       1.1   itojun 		}
    607       1.1   itojun 	} else {
    608       1.1   itojun 		sc->sc_r_hiwat = sci_rbuf_hiwat;
    609       1.1   itojun 		sc->sc_r_lowat = sci_rbuf_lowat;
    610       1.1   itojun 	}
    611       1.1   itojun 
    612       1.1   itojun 	splx(s);
    613       1.1   itojun 
    614       1.1   itojun #ifdef SCI_DEBUG
    615       1.1   itojun 	if (sci_debug)
    616       1.1   itojun 		scistatus(sc, "sciparam ");
    617       1.1   itojun #endif
    618       1.1   itojun 
    619       1.1   itojun 	if (!ISSET(t->c_cflag, CHWFLOW)) {
    620       1.1   itojun 		if (sc->sc_tx_stopped) {
    621       1.1   itojun 			sc->sc_tx_stopped = 0;
    622       1.1   itojun 			scistart(tp);
    623       1.1   itojun 		}
    624       1.1   itojun 	}
    625       1.1   itojun 
    626       1.1   itojun 	return (0);
    627       1.1   itojun }
    628       1.1   itojun 
    629       1.1   itojun void
    630      1.18      uch sci_iflush(struct sci_softc *sc)
    631       1.1   itojun {
    632       1.1   itojun 	unsigned char err_c;
    633       1.1   itojun 	volatile unsigned char c;
    634       1.1   itojun 
    635       1.1   itojun 	if (((err_c = SHREG_SCSSR)
    636       1.9  msaitoh 	     & (SCSSR_RDRF | SCSSR_ORER | SCSSR_FER | SCSSR_PER)) != 0) {
    637       1.1   itojun 
    638       1.9  msaitoh 		if ((err_c & (SCSSR_ORER | SCSSR_FER | SCSSR_PER)) != 0) {
    639       1.9  msaitoh 			SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_FER | SCSSR_PER);
    640       1.1   itojun 			return;
    641       1.9  msaitoh 		}
    642       1.1   itojun 
    643       1.1   itojun 		c = SHREG_SCRDR;
    644       1.1   itojun 
    645       1.1   itojun 		SHREG_SCSSR &= ~SCSSR_RDRF;
    646       1.1   itojun 	}
    647       1.1   itojun }
    648       1.1   itojun 
    649       1.1   itojun int
    650      1.18      uch sciopen(dev_t dev, int flag, int mode, struct proc *p)
    651       1.1   itojun {
    652       1.1   itojun 	int unit = SCIUNIT(dev);
    653       1.1   itojun 	struct sci_softc *sc;
    654       1.1   itojun 	struct tty *tp;
    655       1.1   itojun 	int s, s2;
    656       1.1   itojun 	int error;
    657       1.1   itojun 
    658       1.1   itojun 	if (unit >= sci_cd.cd_ndevs)
    659       1.1   itojun 		return (ENXIO);
    660       1.1   itojun 	sc = sci_cd.cd_devs[unit];
    661       1.1   itojun 	if (sc == 0 || !ISSET(sc->sc_hwflags, SCI_HW_DEV_OK) ||
    662       1.1   itojun 	    sc->sc_rbuf == NULL)
    663       1.1   itojun 		return (ENXIO);
    664       1.1   itojun 
    665       1.1   itojun 	if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
    666       1.1   itojun 		return (ENXIO);
    667       1.1   itojun 
    668       1.1   itojun #ifdef KGDB
    669       1.1   itojun 	/*
    670       1.1   itojun 	 * If this is the kgdb port, no other use is permitted.
    671       1.1   itojun 	 */
    672       1.1   itojun 	if (ISSET(sc->sc_hwflags, SCI_HW_KGDB))
    673       1.1   itojun 		return (EBUSY);
    674       1.1   itojun #endif
    675       1.1   itojun 
    676       1.1   itojun 	tp = sc->sc_tty;
    677       1.1   itojun 
    678       1.1   itojun 	if (ISSET(tp->t_state, TS_ISOPEN) &&
    679       1.1   itojun 	    ISSET(tp->t_state, TS_XCLUDE) &&
    680       1.1   itojun 	    p->p_ucred->cr_uid != 0)
    681       1.1   itojun 		return (EBUSY);
    682       1.1   itojun 
    683       1.1   itojun 	s = spltty();
    684       1.1   itojun 
    685       1.1   itojun 	/*
    686       1.1   itojun 	 * Do the following iff this is a first open.
    687       1.1   itojun 	 */
    688       1.1   itojun 	if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
    689       1.1   itojun 		struct termios t;
    690       1.1   itojun 
    691       1.1   itojun 		tp->t_dev = dev;
    692       1.1   itojun 
    693       1.1   itojun 		s2 = splserial();
    694       1.1   itojun 
    695       1.1   itojun 		/* Turn on interrupts. */
    696       1.1   itojun 		SHREG_SCSCR |= SCSCR_TIE | SCSCR_RIE;
    697       1.1   itojun 
    698       1.1   itojun 		splx(s2);
    699       1.1   itojun 
    700       1.1   itojun 		/*
    701       1.1   itojun 		 * Initialize the termios status to the defaults.  Add in the
    702       1.1   itojun 		 * sticky bits from TIOCSFLAGS.
    703       1.1   itojun 		 */
    704       1.1   itojun 		t.c_ispeed = 0;
    705       1.1   itojun 		if (ISSET(sc->sc_hwflags, SCI_HW_CONSOLE)) {
    706       1.6  msaitoh 			t.c_ospeed = scicn_speed;
    707       1.1   itojun 			t.c_cflag = sciconscflag;
    708       1.1   itojun 		} else {
    709       1.1   itojun 			t.c_ospeed = TTYDEF_SPEED;
    710       1.1   itojun 			t.c_cflag = TTYDEF_CFLAG;
    711       1.1   itojun 		}
    712       1.1   itojun 		if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL))
    713       1.1   itojun 			SET(t.c_cflag, CLOCAL);
    714       1.1   itojun 		if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS))
    715       1.1   itojun 			SET(t.c_cflag, CRTSCTS);
    716       1.1   itojun 		if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF))
    717       1.1   itojun 			SET(t.c_cflag, MDMBUF);
    718       1.1   itojun 		/* Make sure sciparam() will do something. */
    719       1.1   itojun 		tp->t_ospeed = 0;
    720       1.1   itojun 		(void) sciparam(tp, &t);
    721       1.1   itojun 		tp->t_iflag = TTYDEF_IFLAG;
    722       1.1   itojun 		tp->t_oflag = TTYDEF_OFLAG;
    723       1.1   itojun 		tp->t_lflag = TTYDEF_LFLAG;
    724       1.1   itojun 		ttychars(tp);
    725       1.1   itojun 		ttsetwater(tp);
    726       1.1   itojun 
    727       1.1   itojun 		s2 = splserial();
    728       1.1   itojun 
    729       1.1   itojun 		/* Clear the input ring, and unblock. */
    730       1.1   itojun 		sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf;
    731       1.1   itojun 		sc->sc_rbavail = sci_rbuf_size;
    732       1.1   itojun 		sci_iflush(sc);
    733       1.1   itojun 		CLR(sc->sc_rx_flags, RX_ANY_BLOCK);
    734       1.1   itojun #if 0
    735       1.1   itojun /* XXX (msaitoh) */
    736       1.1   itojun 		sci_hwiflow(sc);
    737       1.1   itojun #endif
    738       1.1   itojun 
    739       1.1   itojun #ifdef SCI_DEBUG
    740       1.1   itojun 		if (sci_debug)
    741       1.1   itojun 			scistatus(sc, "sciopen  ");
    742       1.1   itojun #endif
    743       1.1   itojun 
    744       1.1   itojun 		splx(s2);
    745       1.1   itojun 	}
    746       1.1   itojun 
    747       1.1   itojun 	splx(s);
    748       1.1   itojun 
    749       1.1   itojun 	error = ttyopen(tp, SCIDIALOUT(dev), ISSET(flag, O_NONBLOCK));
    750       1.1   itojun 	if (error)
    751       1.1   itojun 		goto bad;
    752       1.1   itojun 
    753      1.10      eeh 	error = (*tp->t_linesw->l_open)(dev, tp);
    754       1.1   itojun 	if (error)
    755       1.1   itojun 		goto bad;
    756       1.1   itojun 
    757       1.1   itojun 	return (0);
    758       1.1   itojun 
    759       1.1   itojun bad:
    760       1.1   itojun 
    761       1.1   itojun 	return (error);
    762       1.1   itojun }
    763       1.1   itojun 
    764       1.1   itojun int
    765      1.18      uch sciclose(dev_t dev, int flag, int mode, struct proc *p)
    766       1.1   itojun {
    767       1.1   itojun 	struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
    768       1.1   itojun 	struct tty *tp = sc->sc_tty;
    769       1.1   itojun 
    770       1.1   itojun 	/* XXX This is for cons.c. */
    771       1.1   itojun 	if (!ISSET(tp->t_state, TS_ISOPEN))
    772       1.1   itojun 		return (0);
    773       1.1   itojun 
    774      1.10      eeh 	(*tp->t_linesw->l_close)(tp, flag);
    775       1.1   itojun 	ttyclose(tp);
    776       1.1   itojun 
    777       1.1   itojun 	if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
    778       1.1   itojun 		return (0);
    779       1.1   itojun 
    780       1.1   itojun 	return (0);
    781       1.1   itojun }
    782       1.1   itojun 
    783       1.1   itojun int
    784      1.18      uch sciread(dev_t dev, struct uio *uio, int flag)
    785       1.1   itojun {
    786       1.1   itojun 	struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
    787       1.1   itojun 	struct tty *tp = sc->sc_tty;
    788       1.1   itojun 
    789      1.10      eeh 	return ((*tp->t_linesw->l_read)(tp, uio, flag));
    790       1.1   itojun }
    791       1.1   itojun 
    792       1.1   itojun int
    793      1.18      uch sciwrite(dev_t dev, struct uio *uio, int flag)
    794       1.1   itojun {
    795       1.1   itojun 	struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
    796       1.1   itojun 	struct tty *tp = sc->sc_tty;
    797       1.1   itojun 
    798      1.10      eeh 	return ((*tp->t_linesw->l_write)(tp, uio, flag));
    799      1.13      scw }
    800      1.13      scw 
    801      1.13      scw int
    802      1.18      uch scipoll(dev_t dev, int events, struct proc *p)
    803      1.13      scw {
    804      1.13      scw 	struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
    805      1.13      scw 	struct tty *tp = sc->sc_tty;
    806      1.25      uch 
    807      1.13      scw 	return ((*tp->t_linesw->l_poll)(tp, events, p));
    808       1.1   itojun }
    809       1.1   itojun 
    810       1.1   itojun struct tty *
    811      1.18      uch scitty(dev_t dev)
    812       1.1   itojun {
    813       1.1   itojun 	struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
    814       1.1   itojun 	struct tty *tp = sc->sc_tty;
    815       1.1   itojun 
    816       1.1   itojun 	return (tp);
    817       1.1   itojun }
    818       1.1   itojun 
    819       1.1   itojun int
    820      1.18      uch sciioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct proc *p)
    821       1.1   itojun {
    822       1.1   itojun 	struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
    823       1.1   itojun 	struct tty *tp = sc->sc_tty;
    824       1.1   itojun 	int error;
    825       1.1   itojun 	int s;
    826       1.1   itojun 
    827       1.1   itojun 	if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
    828       1.1   itojun 		return (EIO);
    829       1.1   itojun 
    830      1.10      eeh 	error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, p);
    831      1.21   atatat 	if (error != EPASSTHROUGH)
    832       1.1   itojun 		return (error);
    833       1.1   itojun 
    834       1.1   itojun 	error = ttioctl(tp, cmd, data, flag, p);
    835      1.21   atatat 	if (error != EPASSTHROUGH)
    836       1.1   itojun 		return (error);
    837       1.1   itojun 
    838       1.1   itojun 	error = 0;
    839       1.1   itojun 
    840       1.1   itojun 	s = splserial();
    841       1.1   itojun 
    842       1.1   itojun 	switch (cmd) {
    843       1.1   itojun 	case TIOCSBRK:
    844       1.5  msaitoh 		sci_break(sc, 1);
    845       1.1   itojun 		break;
    846       1.1   itojun 
    847       1.1   itojun 	case TIOCCBRK:
    848       1.5  msaitoh 		sci_break(sc, 0);
    849       1.1   itojun 		break;
    850       1.5  msaitoh 
    851       1.1   itojun 	case TIOCGFLAGS:
    852       1.1   itojun 		*(int *)data = sc->sc_swflags;
    853       1.1   itojun 		break;
    854       1.1   itojun 
    855       1.1   itojun 	case TIOCSFLAGS:
    856       1.1   itojun 		error = suser(p->p_ucred, &p->p_acflag);
    857       1.1   itojun 		if (error)
    858       1.1   itojun 			break;
    859       1.1   itojun 		sc->sc_swflags = *(int *)data;
    860       1.1   itojun 		break;
    861       1.1   itojun 
    862       1.1   itojun 	default:
    863      1.21   atatat 		error = EPASSTHROUGH;
    864       1.1   itojun 		break;
    865       1.1   itojun 	}
    866       1.1   itojun 
    867       1.1   itojun 	splx(s);
    868       1.1   itojun 
    869       1.1   itojun 	return (error);
    870       1.1   itojun }
    871       1.1   itojun 
    872       1.1   itojun integrate void
    873      1.18      uch sci_schedrx(struct sci_softc *sc)
    874       1.1   itojun {
    875       1.1   itojun 
    876       1.1   itojun 	sc->sc_rx_ready = 1;
    877       1.1   itojun 
    878       1.1   itojun 	/* Wake up the poller. */
    879      1.12  thorpej #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
    880       1.1   itojun 	softintr_schedule(sc->sc_si);
    881       1.1   itojun #else
    882       1.1   itojun #ifndef __NO_SOFT_SERIAL_INTERRUPT
    883       1.1   itojun 	setsoftserial();
    884       1.1   itojun #else
    885       1.1   itojun 	if (!sci_softintr_scheduled) {
    886       1.1   itojun 		sci_softintr_scheduled = 1;
    887       1.7  thorpej 		callout_reset(&sci_soft_ch, 1, scisoft, NULL);
    888       1.1   itojun 	}
    889       1.1   itojun #endif
    890       1.5  msaitoh #endif
    891       1.5  msaitoh }
    892       1.5  msaitoh 
    893       1.5  msaitoh void
    894      1.18      uch sci_break(struct sci_softc *sc, int onoff)
    895       1.5  msaitoh {
    896       1.5  msaitoh 
    897       1.5  msaitoh 	if (onoff)
    898       1.6  msaitoh 		SHREG_SCSSR &= ~SCSSR_TDRE;
    899       1.5  msaitoh 	else
    900       1.6  msaitoh 		SHREG_SCSSR |= SCSSR_TDRE;
    901       1.5  msaitoh 
    902       1.5  msaitoh #if 0	/* XXX */
    903       1.5  msaitoh 	if (!sc->sc_heldchange) {
    904       1.5  msaitoh 		if (sc->sc_tx_busy) {
    905       1.5  msaitoh 			sc->sc_heldtbc = sc->sc_tbc;
    906       1.5  msaitoh 			sc->sc_tbc = 0;
    907       1.5  msaitoh 			sc->sc_heldchange = 1;
    908       1.5  msaitoh 		} else
    909       1.5  msaitoh 			sci_loadchannelregs(sc);
    910       1.5  msaitoh 	}
    911       1.1   itojun #endif
    912       1.1   itojun }
    913       1.1   itojun 
    914       1.1   itojun /*
    915       1.1   itojun  * Stop output, e.g., for ^S or output flush.
    916       1.1   itojun  */
    917       1.1   itojun void
    918      1.18      uch scistop(struct tty *tp, int flag)
    919       1.1   itojun {
    920       1.1   itojun 	struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(tp->t_dev)];
    921       1.1   itojun 	int s;
    922       1.1   itojun 
    923       1.1   itojun 	s = splserial();
    924       1.1   itojun 	if (ISSET(tp->t_state, TS_BUSY)) {
    925       1.1   itojun 		/* Stop transmitting at the next chunk. */
    926       1.1   itojun 		sc->sc_tbc = 0;
    927       1.1   itojun 		sc->sc_heldtbc = 0;
    928       1.1   itojun 		if (!ISSET(tp->t_state, TS_TTSTOP))
    929       1.1   itojun 			SET(tp->t_state, TS_FLUSH);
    930       1.1   itojun 	}
    931       1.1   itojun 	splx(s);
    932       1.1   itojun }
    933       1.1   itojun 
    934       1.1   itojun void
    935      1.18      uch scidiag(void *arg)
    936       1.1   itojun {
    937       1.1   itojun 	struct sci_softc *sc = arg;
    938       1.1   itojun 	int overflows, floods;
    939       1.1   itojun 	int s;
    940       1.1   itojun 
    941       1.1   itojun 	s = splserial();
    942       1.1   itojun 	overflows = sc->sc_overflows;
    943       1.1   itojun 	sc->sc_overflows = 0;
    944       1.1   itojun 	floods = sc->sc_floods;
    945       1.1   itojun 	sc->sc_floods = 0;
    946       1.1   itojun 	sc->sc_errors = 0;
    947       1.1   itojun 	splx(s);
    948       1.1   itojun 
    949       1.1   itojun 	log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n",
    950       1.1   itojun 	    sc->sc_dev.dv_xname,
    951       1.1   itojun 	    overflows, overflows == 1 ? "" : "s",
    952       1.1   itojun 	    floods, floods == 1 ? "" : "s");
    953       1.1   itojun }
    954       1.1   itojun 
    955       1.1   itojun integrate void
    956      1.18      uch sci_rxsoft(struct sci_softc *sc, struct tty *tp)
    957       1.1   itojun {
    958      1.18      uch 	int (*rint)(int c, struct tty *tp) = tp->t_linesw->l_rint;
    959       1.1   itojun 	u_char *get, *end;
    960       1.1   itojun 	u_int cc, scc;
    961       1.1   itojun 	u_char ssr;
    962       1.1   itojun 	int code;
    963       1.1   itojun 	int s;
    964       1.1   itojun 
    965       1.1   itojun 	end = sc->sc_ebuf;
    966       1.1   itojun 	get = sc->sc_rbget;
    967       1.1   itojun 	scc = cc = sci_rbuf_size - sc->sc_rbavail;
    968       1.1   itojun 
    969       1.1   itojun 	if (cc == sci_rbuf_size) {
    970       1.1   itojun 		sc->sc_floods++;
    971       1.1   itojun 		if (sc->sc_errors++ == 0)
    972       1.7  thorpej 			callout_reset(&sc->sc_diag_ch, 60 * hz, scidiag, sc);
    973       1.1   itojun 	}
    974       1.1   itojun 
    975       1.1   itojun 	while (cc) {
    976       1.1   itojun 		code = get[0];
    977       1.1   itojun 		ssr = get[1];
    978       1.1   itojun 		if (ISSET(ssr, SCSSR_FER | SCSSR_PER)) {
    979       1.1   itojun 			if (ISSET(ssr, SCSSR_FER))
    980       1.1   itojun 				SET(code, TTY_FE);
    981       1.1   itojun 			if (ISSET(ssr, SCSSR_PER))
    982       1.1   itojun 				SET(code, TTY_PE);
    983       1.1   itojun 		}
    984       1.1   itojun 		if ((*rint)(code, tp) == -1) {
    985       1.1   itojun 			/*
    986       1.1   itojun 			 * The line discipline's buffer is out of space.
    987       1.1   itojun 			 */
    988       1.1   itojun 			if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) {
    989       1.1   itojun 				/*
    990       1.1   itojun 				 * We're either not using flow control, or the
    991       1.1   itojun 				 * line discipline didn't tell us to block for
    992       1.1   itojun 				 * some reason.  Either way, we have no way to
    993       1.1   itojun 				 * know when there's more space available, so
    994       1.1   itojun 				 * just drop the rest of the data.
    995       1.1   itojun 				 */
    996       1.1   itojun 				get += cc << 1;
    997       1.1   itojun 				if (get >= end)
    998       1.1   itojun 					get -= sci_rbuf_size << 1;
    999       1.1   itojun 				cc = 0;
   1000       1.1   itojun 			} else {
   1001       1.1   itojun 				/*
   1002       1.1   itojun 				 * Don't schedule any more receive processing
   1003       1.1   itojun 				 * until the line discipline tells us there's
   1004       1.1   itojun 				 * space available (through scihwiflow()).
   1005       1.1   itojun 				 * Leave the rest of the data in the input
   1006       1.1   itojun 				 * buffer.
   1007       1.1   itojun 				 */
   1008       1.1   itojun 				SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
   1009       1.1   itojun 			}
   1010       1.1   itojun 			break;
   1011       1.1   itojun 		}
   1012       1.1   itojun 		get += 2;
   1013       1.1   itojun 		if (get >= end)
   1014       1.1   itojun 			get = sc->sc_rbuf;
   1015       1.1   itojun 		cc--;
   1016       1.1   itojun 	}
   1017       1.1   itojun 
   1018       1.1   itojun 	if (cc != scc) {
   1019       1.1   itojun 		sc->sc_rbget = get;
   1020       1.1   itojun 		s = splserial();
   1021       1.1   itojun 		cc = sc->sc_rbavail += scc - cc;
   1022       1.1   itojun 		/* Buffers should be ok again, release possible block. */
   1023       1.1   itojun 		if (cc >= sc->sc_r_lowat) {
   1024       1.1   itojun 			if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) {
   1025       1.1   itojun 				CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED);
   1026       1.1   itojun 				SHREG_SCSCR |= SCSCR_RIE;
   1027       1.1   itojun 			}
   1028       1.1   itojun #if 0
   1029       1.1   itojun 			if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) {
   1030       1.1   itojun 				CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED);
   1031       1.1   itojun 				sci_hwiflow(sc);
   1032       1.1   itojun 			}
   1033       1.1   itojun #endif
   1034       1.1   itojun 		}
   1035       1.1   itojun 		splx(s);
   1036       1.1   itojun 	}
   1037       1.1   itojun }
   1038       1.1   itojun 
   1039       1.1   itojun integrate void
   1040       1.1   itojun sci_txsoft(sc, tp)
   1041       1.1   itojun 	struct sci_softc *sc;
   1042       1.1   itojun 	struct tty *tp;
   1043       1.1   itojun {
   1044       1.1   itojun 
   1045       1.1   itojun 	CLR(tp->t_state, TS_BUSY);
   1046       1.1   itojun 	if (ISSET(tp->t_state, TS_FLUSH))
   1047       1.1   itojun 		CLR(tp->t_state, TS_FLUSH);
   1048       1.1   itojun 	else
   1049       1.1   itojun 		ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf));
   1050      1.10      eeh 	(*tp->t_linesw->l_start)(tp);
   1051       1.1   itojun }
   1052       1.1   itojun 
   1053       1.1   itojun integrate void
   1054      1.18      uch sci_stsoft(struct sci_softc *sc, struct tty *tp)
   1055       1.1   itojun {
   1056       1.1   itojun #if 0
   1057       1.1   itojun /* XXX (msaitoh) */
   1058       1.1   itojun 	u_char msr, delta;
   1059       1.1   itojun 	int s;
   1060       1.1   itojun 
   1061       1.1   itojun 	s = splserial();
   1062       1.1   itojun 	msr = sc->sc_msr;
   1063       1.1   itojun 	delta = sc->sc_msr_delta;
   1064       1.1   itojun 	sc->sc_msr_delta = 0;
   1065       1.1   itojun 	splx(s);
   1066       1.1   itojun 
   1067       1.1   itojun 	if (ISSET(delta, sc->sc_msr_dcd)) {
   1068       1.1   itojun 		/*
   1069       1.1   itojun 		 * Inform the tty layer that carrier detect changed.
   1070       1.1   itojun 		 */
   1071      1.10      eeh 		(void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD));
   1072       1.1   itojun 	}
   1073       1.1   itojun 
   1074       1.1   itojun 	if (ISSET(delta, sc->sc_msr_cts)) {
   1075       1.1   itojun 		/* Block or unblock output according to flow control. */
   1076       1.1   itojun 		if (ISSET(msr, sc->sc_msr_cts)) {
   1077       1.1   itojun 			sc->sc_tx_stopped = 0;
   1078      1.10      eeh 			(*tp->t_linesw->l_start)(tp);
   1079       1.1   itojun 		} else {
   1080       1.1   itojun 			sc->sc_tx_stopped = 1;
   1081       1.1   itojun 		}
   1082       1.1   itojun 	}
   1083       1.1   itojun 
   1084       1.1   itojun #ifdef SCI_DEBUG
   1085       1.1   itojun 	if (sci_debug)
   1086       1.1   itojun 		scistatus(sc, "sci_stsoft");
   1087       1.1   itojun #endif
   1088       1.1   itojun #endif
   1089       1.1   itojun }
   1090       1.1   itojun 
   1091      1.12  thorpej #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
   1092       1.1   itojun void
   1093      1.18      uch scisoft(void *arg)
   1094       1.1   itojun {
   1095       1.1   itojun 	struct sci_softc *sc = arg;
   1096       1.1   itojun 	struct tty *tp;
   1097       1.1   itojun 
   1098       1.1   itojun 	if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
   1099       1.1   itojun 		return;
   1100       1.1   itojun 
   1101       1.1   itojun 	{
   1102       1.1   itojun #else
   1103       1.1   itojun void
   1104       1.1   itojun #ifndef __NO_SOFT_SERIAL_INTERRUPT
   1105       1.1   itojun scisoft()
   1106       1.1   itojun #else
   1107      1.18      uch scisoft(void *arg)
   1108       1.1   itojun #endif
   1109       1.1   itojun {
   1110       1.1   itojun 	struct sci_softc	*sc;
   1111       1.1   itojun 	struct tty	*tp;
   1112       1.1   itojun 	int	unit;
   1113       1.1   itojun #ifdef __NO_SOFT_SERIAL_INTERRUPT
   1114       1.1   itojun 	int s;
   1115       1.1   itojun 
   1116       1.1   itojun 	s = splsoftserial();
   1117       1.1   itojun 	sci_softintr_scheduled = 0;
   1118       1.1   itojun #endif
   1119       1.1   itojun 
   1120       1.1   itojun 	for (unit = 0; unit < sci_cd.cd_ndevs; unit++) {
   1121       1.1   itojun 		sc = sci_cd.cd_devs[unit];
   1122       1.1   itojun 		if (sc == NULL || !ISSET(sc->sc_hwflags, SCI_HW_DEV_OK))
   1123       1.1   itojun 			continue;
   1124       1.1   itojun 
   1125       1.1   itojun 		if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
   1126       1.1   itojun 			continue;
   1127       1.1   itojun 
   1128       1.1   itojun 		tp = sc->sc_tty;
   1129       1.1   itojun 		if (tp == NULL)
   1130       1.1   itojun 			continue;
   1131       1.1   itojun 		if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0)
   1132       1.1   itojun 			continue;
   1133       1.1   itojun #endif
   1134       1.1   itojun 		tp = sc->sc_tty;
   1135       1.1   itojun 
   1136       1.1   itojun 		if (sc->sc_rx_ready) {
   1137       1.1   itojun 			sc->sc_rx_ready = 0;
   1138       1.1   itojun 			sci_rxsoft(sc, tp);
   1139       1.1   itojun 		}
   1140       1.1   itojun 
   1141       1.1   itojun #if 0
   1142       1.1   itojun 		if (sc->sc_st_check) {
   1143       1.1   itojun 			sc->sc_st_check = 0;
   1144       1.1   itojun 			sci_stsoft(sc, tp);
   1145       1.1   itojun 		}
   1146       1.1   itojun #endif
   1147       1.1   itojun 
   1148       1.1   itojun 		if (sc->sc_tx_done) {
   1149       1.1   itojun 			sc->sc_tx_done = 0;
   1150       1.1   itojun 			sci_txsoft(sc, tp);
   1151       1.1   itojun 		}
   1152       1.1   itojun 	}
   1153       1.1   itojun 
   1154      1.12  thorpej #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS
   1155       1.1   itojun #ifdef __NO_SOFT_SERIAL_INTERRUPT
   1156       1.1   itojun 	splx(s);
   1157       1.1   itojun #endif
   1158       1.1   itojun #endif
   1159       1.1   itojun }
   1160       1.1   itojun 
   1161       1.1   itojun int
   1162      1.18      uch sciintr(void *arg)
   1163       1.1   itojun {
   1164       1.1   itojun 	struct sci_softc *sc = arg;
   1165       1.1   itojun 	u_char *put, *end;
   1166       1.1   itojun 	u_int cc;
   1167       1.1   itojun 	u_short ssr;
   1168       1.1   itojun 
   1169       1.1   itojun 	if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
   1170       1.1   itojun 		return (0);
   1171       1.1   itojun 
   1172       1.1   itojun 	end = sc->sc_ebuf;
   1173       1.1   itojun 	put = sc->sc_rbput;
   1174       1.1   itojun 	cc = sc->sc_rbavail;
   1175       1.1   itojun 
   1176  1.25.2.2  gehenna 	do {
   1177  1.25.2.2  gehenna 		ssr = SHREG_SCSSR;
   1178  1.25.2.2  gehenna 		if (ISSET(ssr, SCSSR_FER)) {
   1179  1.25.2.2  gehenna 			SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_PER | SCSSR_FER);
   1180       1.1   itojun #if defined(DDB) || defined(KGDB)
   1181      1.23  msaitoh #ifdef SH4
   1182  1.25.2.2  gehenna 			if ((SHREG_SCSPTR & SCSPTR_SPB0DT) != 0) {
   1183      1.16  msaitoh #else
   1184  1.25.2.2  gehenna 			if ((SHREG_SCSPDR & SCSPDR_SCP0DT) != 0) {
   1185      1.16  msaitoh #endif
   1186       1.1   itojun #ifdef DDB
   1187  1.25.2.2  gehenna 				if (ISSET(sc->sc_hwflags, SCI_HW_CONSOLE)) {
   1188  1.25.2.2  gehenna 					console_debugger();
   1189  1.25.2.2  gehenna 				}
   1190       1.1   itojun #endif
   1191       1.1   itojun #ifdef KGDB
   1192  1.25.2.2  gehenna 				if (ISSET(sc->sc_hwflags, SCI_HW_KGDB)) {
   1193  1.25.2.2  gehenna 					kgdb_connect(1);
   1194  1.25.2.2  gehenna 				}
   1195      1.16  msaitoh #endif
   1196  1.25.2.2  gehenna 			}
   1197      1.16  msaitoh #endif /* DDB || KGDB */
   1198  1.25.2.2  gehenna 		}
   1199  1.25.2.2  gehenna 		if ((SHREG_SCSSR & SCSSR_RDRF) != 0) {
   1200  1.25.2.2  gehenna 			if (cc > 0) {
   1201  1.25.2.2  gehenna 				put[0] = SHREG_SCRDR;
   1202  1.25.2.2  gehenna 				put[1] = SHREG_SCSSR & 0x00ff;
   1203  1.25.2.2  gehenna 
   1204  1.25.2.2  gehenna 				put += 2;
   1205  1.25.2.2  gehenna 				if (put >= end)
   1206  1.25.2.2  gehenna 					put = sc->sc_rbuf;
   1207  1.25.2.2  gehenna 				cc--;
   1208  1.25.2.2  gehenna 			}
   1209       1.6  msaitoh 
   1210       1.9  msaitoh 			SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_FER | SCSSR_PER |
   1211  1.25.2.2  gehenna 			    SCSSR_RDRF);
   1212       1.6  msaitoh 
   1213  1.25.2.2  gehenna 				/*
   1214  1.25.2.2  gehenna 				 * Current string of incoming characters ended because
   1215  1.25.2.2  gehenna 				 * no more data was available or we ran out of space.
   1216  1.25.2.2  gehenna 				 * Schedule a receive event if any data was received.
   1217  1.25.2.2  gehenna 				 * If we're out of space, turn off receive interrupts.
   1218  1.25.2.2  gehenna 				 */
   1219  1.25.2.2  gehenna 			sc->sc_rbput = put;
   1220  1.25.2.2  gehenna 			sc->sc_rbavail = cc;
   1221  1.25.2.2  gehenna 			if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED))
   1222  1.25.2.2  gehenna 				sc->sc_rx_ready = 1;
   1223       1.1   itojun 
   1224  1.25.2.2  gehenna 				/*
   1225  1.25.2.2  gehenna 				 * See if we are in danger of overflowing a buffer. If
   1226  1.25.2.2  gehenna 				 * so, use hardware flow control to ease the pressure.
   1227  1.25.2.2  gehenna 				 */
   1228  1.25.2.2  gehenna 			if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) &&
   1229  1.25.2.2  gehenna 			    cc < sc->sc_r_hiwat) {
   1230  1.25.2.2  gehenna 				SET(sc->sc_rx_flags, RX_IBUF_BLOCKED);
   1231       1.1   itojun #if 0
   1232  1.25.2.2  gehenna 				sci_hwiflow(sc);
   1233       1.1   itojun #endif
   1234  1.25.2.2  gehenna 			}
   1235       1.1   itojun 
   1236  1.25.2.2  gehenna 				/*
   1237  1.25.2.2  gehenna 				 * If we're out of space, disable receive interrupts
   1238  1.25.2.2  gehenna 				 * until the queue has drained a bit.
   1239  1.25.2.2  gehenna 				 */
   1240  1.25.2.2  gehenna 			if (!cc) {
   1241  1.25.2.2  gehenna 				SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED);
   1242  1.25.2.2  gehenna 				SHREG_SCSCR &= ~SCSCR_RIE;
   1243  1.25.2.2  gehenna 			}
   1244  1.25.2.2  gehenna 		} else {
   1245  1.25.2.2  gehenna 			if (SHREG_SCSSR & SCSSR_RDRF) {
   1246  1.25.2.2  gehenna 				SHREG_SCSCR &= ~(SCSCR_TIE | SCSCR_RIE);
   1247  1.25.2.2  gehenna 				delay(10);
   1248  1.25.2.2  gehenna 				SHREG_SCSCR |= SCSCR_TIE | SCSCR_RIE;
   1249  1.25.2.2  gehenna 				continue;
   1250  1.25.2.2  gehenna 			}
   1251       1.1   itojun 		}
   1252  1.25.2.2  gehenna 	} while (SHREG_SCSSR & SCSSR_RDRF);
   1253      1.25      uch 
   1254       1.1   itojun #if 0
   1255       1.6  msaitoh 	msr = bus_space_read_1(iot, ioh, sci_msr);
   1256       1.6  msaitoh 	delta = msr ^ sc->sc_msr;
   1257       1.6  msaitoh 	sc->sc_msr = msr;
   1258       1.6  msaitoh 	if (ISSET(delta, sc->sc_msr_mask)) {
   1259       1.6  msaitoh 		SET(sc->sc_msr_delta, delta);
   1260       1.1   itojun 
   1261       1.6  msaitoh 		/*
   1262       1.6  msaitoh 		 * Pulse-per-second clock signal on edge of DCD?
   1263       1.6  msaitoh 		 */
   1264       1.6  msaitoh 		if (ISSET(delta, sc->sc_ppsmask)) {
   1265       1.6  msaitoh 			struct timeval tv;
   1266       1.6  msaitoh 			if (ISSET(msr, sc->sc_ppsmask) ==
   1267       1.6  msaitoh 			    sc->sc_ppsassert) {
   1268       1.6  msaitoh 				/* XXX nanotime() */
   1269       1.6  msaitoh 				microtime(&tv);
   1270       1.6  msaitoh 				TIMEVAL_TO_TIMESPEC(&tv,
   1271       1.6  msaitoh 						    &sc->ppsinfo.assert_timestamp);
   1272       1.6  msaitoh 				if (sc->ppsparam.mode & PPS_OFFSETASSERT) {
   1273       1.6  msaitoh 					timespecadd(&sc->ppsinfo.assert_timestamp,
   1274       1.1   itojun 						    &sc->ppsparam.assert_offset,
   1275       1.1   itojun 						    &sc->ppsinfo.assert_timestamp);
   1276       1.6  msaitoh 					TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.assert_timestamp);
   1277       1.6  msaitoh 				}
   1278       1.1   itojun 
   1279       1.1   itojun #ifdef PPS_SYNC
   1280       1.6  msaitoh 				if (sc->ppsparam.mode & PPS_HARDPPSONASSERT)
   1281       1.6  msaitoh 					hardpps(&tv, tv.tv_usec);
   1282       1.1   itojun #endif
   1283       1.6  msaitoh 				sc->ppsinfo.assert_sequence++;
   1284       1.6  msaitoh 				sc->ppsinfo.current_mode =
   1285       1.6  msaitoh 					sc->ppsparam.mode;
   1286       1.6  msaitoh 
   1287       1.6  msaitoh 			} else if (ISSET(msr, sc->sc_ppsmask) ==
   1288       1.6  msaitoh 				   sc->sc_ppsclear) {
   1289       1.6  msaitoh 				/* XXX nanotime() */
   1290       1.6  msaitoh 				microtime(&tv);
   1291       1.6  msaitoh 				TIMEVAL_TO_TIMESPEC(&tv,
   1292       1.6  msaitoh 						    &sc->ppsinfo.clear_timestamp);
   1293       1.6  msaitoh 				if (sc->ppsparam.mode & PPS_OFFSETCLEAR) {
   1294       1.6  msaitoh 					timespecadd(&sc->ppsinfo.clear_timestamp,
   1295       1.1   itojun 						    &sc->ppsparam.clear_offset,
   1296       1.1   itojun 						    &sc->ppsinfo.clear_timestamp);
   1297       1.6  msaitoh 					TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.clear_timestamp);
   1298       1.6  msaitoh 				}
   1299       1.1   itojun 
   1300       1.1   itojun #ifdef PPS_SYNC
   1301       1.6  msaitoh 				if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR)
   1302       1.6  msaitoh 					hardpps(&tv, tv.tv_usec);
   1303       1.1   itojun #endif
   1304       1.6  msaitoh 				sc->ppsinfo.clear_sequence++;
   1305       1.6  msaitoh 				sc->ppsinfo.current_mode =
   1306       1.6  msaitoh 					sc->ppsparam.mode;
   1307       1.1   itojun 			}
   1308       1.6  msaitoh 		}
   1309       1.1   itojun 
   1310       1.6  msaitoh 		/*
   1311       1.6  msaitoh 		 * Stop output immediately if we lose the output
   1312       1.6  msaitoh 		 * flow control signal or carrier detect.
   1313       1.6  msaitoh 		 */
   1314       1.6  msaitoh 		if (ISSET(~msr, sc->sc_msr_mask)) {
   1315       1.6  msaitoh 			sc->sc_tbc = 0;
   1316       1.6  msaitoh 			sc->sc_heldtbc = 0;
   1317       1.1   itojun #ifdef SCI_DEBUG
   1318       1.6  msaitoh 			if (sci_debug)
   1319       1.6  msaitoh 				scistatus(sc, "sciintr  ");
   1320       1.1   itojun #endif
   1321       1.6  msaitoh 		}
   1322       1.1   itojun 
   1323       1.6  msaitoh 		sc->sc_st_check = 1;
   1324       1.6  msaitoh 	}
   1325       1.1   itojun #endif
   1326       1.1   itojun 
   1327       1.1   itojun 	/*
   1328       1.1   itojun 	 * Done handling any receive interrupts. See if data can be
   1329       1.1   itojun 	 * transmitted as well. Schedule tx done event if no data left
   1330       1.1   itojun 	 * and tty was marked busy.
   1331       1.1   itojun 	 */
   1332       1.1   itojun 	if ((SHREG_SCSSR & SCSSR_TDRE) != 0) {
   1333       1.1   itojun 		/*
   1334       1.1   itojun 		 * If we've delayed a parameter change, do it now, and restart
   1335       1.1   itojun 		 * output.
   1336       1.1   itojun 		 */
   1337       1.1   itojun 		if (sc->sc_heldchange) {
   1338       1.1   itojun 			sc->sc_heldchange = 0;
   1339       1.1   itojun 			sc->sc_tbc = sc->sc_heldtbc;
   1340       1.1   itojun 			sc->sc_heldtbc = 0;
   1341       1.1   itojun 		}
   1342       1.1   itojun 
   1343       1.1   itojun 		/* Output the next chunk of the contiguous buffer, if any. */
   1344       1.1   itojun 		if (sc->sc_tbc > 0) {
   1345      1.11  msaitoh 			sci_putc(*(sc->sc_tba));
   1346       1.1   itojun 			sc->sc_tba++;
   1347       1.1   itojun 			sc->sc_tbc--;
   1348       1.1   itojun 		} else {
   1349       1.1   itojun 			/* Disable transmit completion interrupts if necessary. */
   1350       1.1   itojun #if 0
   1351       1.1   itojun 			if (ISSET(sc->sc_ier, IER_ETXRDY))
   1352       1.1   itojun #endif
   1353       1.1   itojun 				SHREG_SCSCR &= ~SCSCR_TIE;
   1354       1.1   itojun 
   1355       1.1   itojun 			if (sc->sc_tx_busy) {
   1356       1.1   itojun 				sc->sc_tx_busy = 0;
   1357       1.1   itojun 				sc->sc_tx_done = 1;
   1358       1.1   itojun 			}
   1359       1.1   itojun 		}
   1360       1.1   itojun 	}
   1361       1.1   itojun 
   1362       1.1   itojun 	/* Wake up the poller. */
   1363      1.12  thorpej #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
   1364       1.1   itojun 	softintr_schedule(sc->sc_si);
   1365       1.1   itojun #else
   1366       1.1   itojun #ifndef __NO_SOFT_SERIAL_INTERRUPT
   1367       1.1   itojun 	setsoftserial();
   1368       1.1   itojun #else
   1369       1.1   itojun 	if (!sci_softintr_scheduled) {
   1370       1.1   itojun 		sci_softintr_scheduled = 1;
   1371       1.7  thorpej 		callout_reset(&sci_soft_ch, 1, scisoft, 1);
   1372       1.1   itojun 	}
   1373       1.1   itojun #endif
   1374       1.1   itojun #endif
   1375       1.1   itojun 
   1376       1.1   itojun #if NRND > 0 && defined(RND_SCI)
   1377       1.1   itojun 	rnd_add_uint32(&sc->rnd_source, iir | lsr);
   1378       1.1   itojun #endif
   1379       1.1   itojun 
   1380       1.1   itojun 	return (1);
   1381       1.1   itojun }
   1382       1.1   itojun 
   1383       1.1   itojun void
   1384       1.1   itojun scicnprobe(cp)
   1385       1.1   itojun 	struct consdev *cp;
   1386       1.1   itojun {
   1387       1.1   itojun 	int maj;
   1388       1.1   itojun 
   1389       1.1   itojun 	/* locate the major number */
   1390  1.25.2.1  gehenna 	maj = cdevsw_lookup_major(&sci_cdevsw);
   1391       1.1   itojun 
   1392       1.1   itojun 	/* Initialize required fields. */
   1393       1.1   itojun 	cp->cn_dev = makedev(maj, 0);
   1394       1.4  msaitoh #ifdef SCICONSOLE
   1395       1.4  msaitoh 	cp->cn_pri = CN_REMOTE;
   1396       1.4  msaitoh #else
   1397       1.1   itojun 	cp->cn_pri = CN_NORMAL;
   1398       1.4  msaitoh #endif
   1399       1.1   itojun }
   1400       1.1   itojun 
   1401       1.1   itojun void
   1402      1.18      uch scicninit(struct consdev *cp)
   1403       1.1   itojun {
   1404       1.1   itojun 
   1405       1.6  msaitoh 	InitializeSci(scicn_speed);
   1406       1.8  msaitoh 	sciisconsole = 1;
   1407       1.1   itojun }
   1408       1.1   itojun 
   1409       1.1   itojun int
   1410      1.18      uch scicngetc(dev_t dev)
   1411       1.1   itojun {
   1412       1.1   itojun 	int c;
   1413       1.1   itojun 	int s;
   1414       1.1   itojun 
   1415       1.1   itojun 	s = splserial();
   1416       1.1   itojun 	c = sci_getc();
   1417       1.1   itojun 	splx(s);
   1418       1.1   itojun 
   1419       1.1   itojun 	return (c);
   1420       1.1   itojun }
   1421       1.1   itojun 
   1422       1.1   itojun void
   1423      1.18      uch scicnputc(dev_t dev, int c)
   1424       1.1   itojun {
   1425       1.1   itojun 	int s;
   1426       1.1   itojun 
   1427       1.1   itojun 	s = splserial();
   1428      1.11  msaitoh 	sci_putc((u_char)c);
   1429       1.1   itojun 	splx(s);
   1430       1.1   itojun }
   1431