sci.c revision 1.32 1 1.32 thorpej /* $NetBSD: sci.c,v 1.32 2002/10/02 15:52:34 thorpej Exp $ */
2 1.1 itojun
3 1.1 itojun /*-
4 1.1 itojun * Copyright (C) 1999 T.Horiuchi and SAITOH Masanobu. All rights reserved.
5 1.1 itojun *
6 1.1 itojun * Redistribution and use in source and binary forms, with or without
7 1.1 itojun * modification, are permitted provided that the following conditions
8 1.1 itojun * are met:
9 1.1 itojun * 1. Redistributions of source code must retain the above copyright
10 1.1 itojun * notice, this list of conditions and the following disclaimer.
11 1.1 itojun * 2. Redistributions in binary form must reproduce the above copyright
12 1.1 itojun * notice, this list of conditions and the following disclaimer in the
13 1.1 itojun * documentation and/or other materials provided with the distribution.
14 1.1 itojun * 3. The name of the author may not be used to endorse or promote products
15 1.1 itojun * derived from this software without specific prior written permission.
16 1.1 itojun *
17 1.1 itojun * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 1.1 itojun * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 1.1 itojun * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 1.1 itojun * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 1.1 itojun * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 1.1 itojun * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 1.1 itojun * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 1.1 itojun * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 1.1 itojun * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 1.1 itojun * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 1.1 itojun */
28 1.1 itojun
29 1.2 msaitoh /*-
30 1.2 msaitoh * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
31 1.2 msaitoh * All rights reserved.
32 1.2 msaitoh *
33 1.2 msaitoh * This code is derived from software contributed to The NetBSD Foundation
34 1.2 msaitoh * by Charles M. Hannum.
35 1.2 msaitoh *
36 1.2 msaitoh * Redistribution and use in source and binary forms, with or without
37 1.2 msaitoh * modification, are permitted provided that the following conditions
38 1.2 msaitoh * are met:
39 1.2 msaitoh * 1. Redistributions of source code must retain the above copyright
40 1.2 msaitoh * notice, this list of conditions and the following disclaimer.
41 1.2 msaitoh * 2. Redistributions in binary form must reproduce the above copyright
42 1.2 msaitoh * notice, this list of conditions and the following disclaimer in the
43 1.2 msaitoh * documentation and/or other materials provided with the distribution.
44 1.2 msaitoh * 3. All advertising materials mentioning features or use of this software
45 1.2 msaitoh * must display the following acknowledgement:
46 1.2 msaitoh * This product includes software developed by the NetBSD
47 1.2 msaitoh * Foundation, Inc. and its contributors.
48 1.2 msaitoh * 4. Neither the name of The NetBSD Foundation nor the names of its
49 1.2 msaitoh * contributors may be used to endorse or promote products derived
50 1.2 msaitoh * from this software without specific prior written permission.
51 1.2 msaitoh *
52 1.2 msaitoh * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
53 1.2 msaitoh * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
54 1.2 msaitoh * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
55 1.2 msaitoh * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
56 1.2 msaitoh * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
57 1.2 msaitoh * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
58 1.2 msaitoh * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
59 1.2 msaitoh * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
60 1.2 msaitoh * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
61 1.2 msaitoh * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
62 1.2 msaitoh * POSSIBILITY OF SUCH DAMAGE.
63 1.2 msaitoh */
64 1.2 msaitoh
65 1.2 msaitoh /*
66 1.2 msaitoh * Copyright (c) 1991 The Regents of the University of California.
67 1.2 msaitoh * All rights reserved.
68 1.2 msaitoh *
69 1.2 msaitoh * Redistribution and use in source and binary forms, with or without
70 1.2 msaitoh * modification, are permitted provided that the following conditions
71 1.2 msaitoh * are met:
72 1.2 msaitoh * 1. Redistributions of source code must retain the above copyright
73 1.2 msaitoh * notice, this list of conditions and the following disclaimer.
74 1.2 msaitoh * 2. Redistributions in binary form must reproduce the above copyright
75 1.2 msaitoh * notice, this list of conditions and the following disclaimer in the
76 1.2 msaitoh * documentation and/or other materials provided with the distribution.
77 1.2 msaitoh * 3. All advertising materials mentioning features or use of this software
78 1.2 msaitoh * must display the following acknowledgement:
79 1.2 msaitoh * This product includes software developed by the University of
80 1.2 msaitoh * California, Berkeley and its contributors.
81 1.2 msaitoh * 4. Neither the name of the University nor the names of its contributors
82 1.2 msaitoh * may be used to endorse or promote products derived from this software
83 1.2 msaitoh * without specific prior written permission.
84 1.2 msaitoh *
85 1.2 msaitoh * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
86 1.2 msaitoh * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
87 1.2 msaitoh * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
88 1.2 msaitoh * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
89 1.2 msaitoh * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
90 1.2 msaitoh * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
91 1.2 msaitoh * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
92 1.2 msaitoh * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
93 1.2 msaitoh * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
94 1.2 msaitoh * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
95 1.2 msaitoh * SUCH DAMAGE.
96 1.2 msaitoh *
97 1.2 msaitoh * @(#)com.c 7.5 (Berkeley) 5/16/91
98 1.2 msaitoh */
99 1.2 msaitoh
100 1.2 msaitoh /*
101 1.2 msaitoh * SH internal serial driver
102 1.2 msaitoh *
103 1.2 msaitoh * This code is derived from both z8530tty.c and com.c
104 1.2 msaitoh */
105 1.2 msaitoh
106 1.14 lukem #include "opt_kgdb.h"
107 1.1 itojun #include "opt_sci.h"
108 1.1 itojun
109 1.1 itojun #include <sys/param.h>
110 1.1 itojun #include <sys/systm.h>
111 1.1 itojun #include <sys/tty.h>
112 1.1 itojun #include <sys/proc.h>
113 1.1 itojun #include <sys/conf.h>
114 1.1 itojun #include <sys/file.h>
115 1.1 itojun #include <sys/syslog.h>
116 1.1 itojun #include <sys/kernel.h>
117 1.1 itojun #include <sys/device.h>
118 1.1 itojun #include <sys/malloc.h>
119 1.1 itojun
120 1.1 itojun #include <dev/cons.h>
121 1.1 itojun
122 1.19 uch #include <sh3/clock.h>
123 1.1 itojun #include <sh3/scireg.h>
124 1.22 uch #include <sh3/pfcreg.h>
125 1.1 itojun #include <sh3/tmureg.h>
126 1.22 uch #include <sh3/exception.h>
127 1.22 uch #include <machine/intr.h>
128 1.1 itojun
129 1.18 uch static void scistart(struct tty *);
130 1.18 uch static int sciparam(struct tty *, struct termios *);
131 1.1 itojun
132 1.18 uch void scicnprobe(struct consdev *);
133 1.18 uch void scicninit(struct consdev *);
134 1.18 uch void scicnputc(dev_t, int);
135 1.18 uch int scicngetc(dev_t);
136 1.18 uch void scicnpoolc(dev_t, int);
137 1.18 uch int sciintr(void *);
138 1.1 itojun
139 1.1 itojun struct sci_softc {
140 1.1 itojun struct device sc_dev; /* boilerplate */
141 1.1 itojun struct tty *sc_tty;
142 1.22 uch void *sc_si;
143 1.7 thorpej struct callout sc_diag_ch;
144 1.7 thorpej
145 1.1 itojun #if 0
146 1.1 itojun bus_space_tag_t sc_iot; /* ISA i/o space identifier */
147 1.1 itojun bus_space_handle_t sc_ioh; /* ISA io handle */
148 1.1 itojun
149 1.1 itojun int sc_drq;
150 1.1 itojun
151 1.1 itojun int sc_frequency;
152 1.1 itojun #endif
153 1.1 itojun
154 1.1 itojun u_int sc_overflows,
155 1.1 itojun sc_floods,
156 1.1 itojun sc_errors; /* number of retries so far */
157 1.1 itojun u_char sc_status[7]; /* copy of registers */
158 1.1 itojun
159 1.1 itojun int sc_hwflags;
160 1.1 itojun int sc_swflags;
161 1.1 itojun u_int sc_fifolen; /* XXX always 0? */
162 1.1 itojun
163 1.1 itojun u_int sc_r_hiwat,
164 1.1 itojun sc_r_lowat;
165 1.1 itojun u_char *volatile sc_rbget,
166 1.1 itojun *volatile sc_rbput;
167 1.1 itojun volatile u_int sc_rbavail;
168 1.1 itojun u_char *sc_rbuf,
169 1.1 itojun *sc_ebuf;
170 1.1 itojun
171 1.1 itojun u_char *sc_tba; /* transmit buffer address */
172 1.1 itojun u_int sc_tbc, /* transmit byte count */
173 1.1 itojun sc_heldtbc;
174 1.1 itojun
175 1.2 msaitoh volatile u_char sc_rx_flags, /* receiver blocked */
176 1.1 itojun #define RX_TTY_BLOCKED 0x01
177 1.1 itojun #define RX_TTY_OVERFLOWED 0x02
178 1.1 itojun #define RX_IBUF_BLOCKED 0x04
179 1.1 itojun #define RX_IBUF_OVERFLOWED 0x08
180 1.1 itojun #define RX_ANY_BLOCK 0x0f
181 1.3 msaitoh sc_tx_busy, /* working on an output chunk */
182 1.3 msaitoh sc_tx_done, /* done with one output chunk */
183 1.2 msaitoh sc_tx_stopped, /* H/W level stop (lost CTS) */
184 1.2 msaitoh sc_st_check, /* got a status interrupt */
185 1.1 itojun sc_rx_ready;
186 1.1 itojun
187 1.1 itojun volatile u_char sc_heldchange;
188 1.1 itojun };
189 1.1 itojun
190 1.1 itojun /* controller driver configuration */
191 1.18 uch static int sci_match(struct device *, struct cfdata *, void *);
192 1.18 uch static void sci_attach(struct device *, struct device *, void *);
193 1.1 itojun
194 1.18 uch void sci_break(struct sci_softc *, int);
195 1.18 uch void sci_iflush(struct sci_softc *);
196 1.1 itojun
197 1.1 itojun #define integrate static inline
198 1.12 thorpej #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
199 1.18 uch void scisoft(void *);
200 1.1 itojun #else
201 1.1 itojun #ifndef __NO_SOFT_SERIAL_INTERRUPT
202 1.18 uch void scisoft(void);
203 1.1 itojun #else
204 1.18 uch void scisoft(void *);
205 1.1 itojun #endif
206 1.1 itojun #endif
207 1.18 uch integrate void sci_rxsoft(struct sci_softc *, struct tty *);
208 1.18 uch integrate void sci_txsoft(struct sci_softc *, struct tty *);
209 1.18 uch integrate void sci_stsoft(struct sci_softc *, struct tty *);
210 1.18 uch integrate void sci_schedrx(struct sci_softc *);
211 1.18 uch void scidiag(void *);
212 1.1 itojun
213 1.1 itojun #define SCIUNIT_MASK 0x7ffff
214 1.1 itojun #define SCIDIALOUT_MASK 0x80000
215 1.1 itojun
216 1.1 itojun #define SCIUNIT(x) (minor(x) & SCIUNIT_MASK)
217 1.1 itojun #define SCIDIALOUT(x) (minor(x) & SCIDIALOUT_MASK)
218 1.1 itojun
219 1.1 itojun /* Macros to clear/set/test flags. */
220 1.25 uch #define SET(t, f) (t) |= (f)
221 1.25 uch #define CLR(t, f) (t) &= ~(f)
222 1.25 uch #define ISSET(t, f) ((t) & (f))
223 1.1 itojun
224 1.1 itojun /* Hardware flag masks */
225 1.1 itojun #define SCI_HW_NOIEN 0x01
226 1.1 itojun #define SCI_HW_FIFO 0x02
227 1.1 itojun #define SCI_HW_FLOW 0x08
228 1.1 itojun #define SCI_HW_DEV_OK 0x20
229 1.1 itojun #define SCI_HW_CONSOLE 0x40
230 1.1 itojun #define SCI_HW_KGDB 0x80
231 1.1 itojun
232 1.1 itojun /* Buffer size for character buffer */
233 1.1 itojun #define SCI_RING_SIZE 2048
234 1.1 itojun
235 1.1 itojun /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */
236 1.1 itojun u_int sci_rbuf_hiwat = (SCI_RING_SIZE * 1) / 4;
237 1.1 itojun u_int sci_rbuf_lowat = (SCI_RING_SIZE * 3) / 4;
238 1.1 itojun
239 1.25 uch #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
240 1.1 itojun int sciconscflag = CONMODE;
241 1.8 msaitoh int sciisconsole = 0;
242 1.1 itojun
243 1.6 msaitoh #ifdef SCICN_SPEED
244 1.6 msaitoh int scicn_speed = SCICN_SPEED;
245 1.6 msaitoh #else
246 1.6 msaitoh int scicn_speed = 9600;
247 1.6 msaitoh #endif
248 1.6 msaitoh
249 1.1 itojun #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */
250 1.1 itojun
251 1.12 thorpej #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS
252 1.1 itojun #ifdef __NO_SOFT_SERIAL_INTERRUPT
253 1.1 itojun volatile int sci_softintr_scheduled;
254 1.7 thorpej struct callout sci_soft_ch = CALLOUT_INITIALIZER;
255 1.1 itojun #endif
256 1.1 itojun #endif
257 1.1 itojun
258 1.1 itojun u_int sci_rbuf_size = SCI_RING_SIZE;
259 1.1 itojun
260 1.31 thorpej CFATTACH_DECL(sci, sizeof(struct sci_softc),
261 1.32 thorpej sci_match, sci_attach, NULL, NULL);
262 1.1 itojun
263 1.1 itojun extern struct cfdriver sci_cd;
264 1.1 itojun
265 1.28 gehenna dev_type_open(sciopen);
266 1.28 gehenna dev_type_close(sciclose);
267 1.28 gehenna dev_type_read(sciread);
268 1.28 gehenna dev_type_write(sciwrite);
269 1.28 gehenna dev_type_ioctl(sciioctl);
270 1.28 gehenna dev_type_stop(scistop);
271 1.28 gehenna dev_type_tty(scitty);
272 1.28 gehenna dev_type_poll(scipoll);
273 1.28 gehenna
274 1.28 gehenna const struct cdevsw sci_cdevsw = {
275 1.28 gehenna sciopen, sciclose, sciread, sciwrite, sciioctl,
276 1.28 gehenna scistop, scitty, scipoll, nommap, D_TTY
277 1.28 gehenna };
278 1.1 itojun
279 1.18 uch void InitializeSci (unsigned int);
280 1.1 itojun
281 1.1 itojun /*
282 1.1 itojun * following functions are debugging prupose only
283 1.1 itojun */
284 1.25 uch #define CR 0x0D
285 1.25 uch #define I2C_ADRS (*(volatile unsigned int *)0xa8000000)
286 1.25 uch #define USART_ON (unsigned int)~0x08
287 1.1 itojun
288 1.18 uch void sci_putc(unsigned char);
289 1.18 uch unsigned char sci_getc(void);
290 1.18 uch int SciErrCheck(void);
291 1.1 itojun
292 1.1 itojun /*
293 1.1 itojun * InitializeSci
294 1.1 itojun * : unsigned int bps;
295 1.1 itojun * : SCI(Serial Communication Interface)
296 1.1 itojun */
297 1.1 itojun
298 1.1 itojun void
299 1.18 uch InitializeSci(unsigned int bps)
300 1.1 itojun {
301 1.1 itojun
302 1.1 itojun /* Initialize SCR */
303 1.3 msaitoh SHREG_SCSCR = 0x00;
304 1.1 itojun
305 1.3 msaitoh /* Serial Mode Register */
306 1.3 msaitoh SHREG_SCSMR = 0x00; /* Async,8bit,NonParity,Even,1Stop,NoMulti */
307 1.1 itojun
308 1.3 msaitoh /* Bit Rate Register */
309 1.20 uch SHREG_SCBRR = divrnd(sh_clock_get_pclock(), 32 * bps) - 1;
310 1.1 itojun
311 1.3 msaitoh /*
312 1.3 msaitoh * wait 1mSec, because Send/Recv must begin 1 bit period after
313 1.3 msaitoh * BRR is set.
314 1.3 msaitoh */
315 1.19 uch delay(1000);
316 1.1 itojun
317 1.15 wiz /* Send permission, Receive permission ON */
318 1.3 msaitoh SHREG_SCSCR = SCSCR_TE | SCSCR_RE;
319 1.1 itojun
320 1.6 msaitoh /* Serial Status Register */
321 1.1 itojun SHREG_SCSSR &= SCSSR_TDRE; /* Clear Status */
322 1.1 itojun
323 1.1 itojun #if 0
324 1.1 itojun I2C_ADRS &= ~0x08; /* enable RS-232C */
325 1.1 itojun #endif
326 1.1 itojun }
327 1.1 itojun
328 1.1 itojun
329 1.1 itojun /*
330 1.11 msaitoh * sci_putc
331 1.1 itojun * : unsigned char c;
332 1.1 itojun */
333 1.1 itojun void
334 1.18 uch sci_putc(unsigned char c)
335 1.1 itojun {
336 1.11 msaitoh
337 1.1 itojun /* wait for ready */
338 1.1 itojun while ((SHREG_SCSSR & SCSSR_TDRE) == NULL)
339 1.1 itojun ;
340 1.1 itojun
341 1.1 itojun /* write send data to send register */
342 1.1 itojun SHREG_SCTDR = c;
343 1.1 itojun
344 1.1 itojun /* clear ready flag */
345 1.1 itojun SHREG_SCSSR &= ~SCSSR_TDRE;
346 1.1 itojun }
347 1.1 itojun
348 1.1 itojun /*
349 1.1 itojun * : SciErrCheck
350 1.1 itojun * 0x20 = over run
351 1.1 itojun * 0x10 = frame error
352 1.1 itojun * 0x80 = parity error
353 1.1 itojun */
354 1.1 itojun int
355 1.1 itojun SciErrCheck(void)
356 1.1 itojun {
357 1.1 itojun
358 1.1 itojun return(SHREG_SCSSR & (SCSSR_ORER | SCSSR_FER | SCSSR_PER));
359 1.1 itojun }
360 1.1 itojun
361 1.1 itojun /*
362 1.11 msaitoh * sci_getc
363 1.1 itojun */
364 1.1 itojun unsigned char
365 1.11 msaitoh sci_getc(void)
366 1.1 itojun {
367 1.1 itojun unsigned char c, err_c;
368 1.1 itojun
369 1.1 itojun while (((err_c = SHREG_SCSSR)
370 1.1 itojun & (SCSSR_RDRF | SCSSR_ORER | SCSSR_FER | SCSSR_PER)) == 0)
371 1.1 itojun ;
372 1.9 msaitoh if ((err_c & (SCSSR_ORER | SCSSR_FER | SCSSR_PER)) != 0) {
373 1.9 msaitoh SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_FER | SCSSR_PER);
374 1.1 itojun return(err_c |= 0x80);
375 1.9 msaitoh }
376 1.1 itojun
377 1.1 itojun c = SHREG_SCRDR;
378 1.1 itojun
379 1.1 itojun SHREG_SCSSR &= ~SCSSR_RDRF;
380 1.1 itojun
381 1.1 itojun return(c);
382 1.1 itojun }
383 1.1 itojun
384 1.1 itojun #if 0
385 1.25 uch #define SCI_MAX_UNITS 2
386 1.1 itojun #else
387 1.25 uch #define SCI_MAX_UNITS 1
388 1.1 itojun #endif
389 1.1 itojun
390 1.1 itojun
391 1.1 itojun static int
392 1.18 uch sci_match(struct device *parent, struct cfdata *cfp, void *aux)
393 1.1 itojun {
394 1.1 itojun
395 1.29 thorpej if (strcmp(cfp->cf_name, "sci")
396 1.22 uch || cfp->cf_unit >= SCI_MAX_UNITS) //XXX __BROKEN_CONFIG_UNIT_USAGE
397 1.1 itojun return 0;
398 1.1 itojun
399 1.1 itojun return 1;
400 1.1 itojun }
401 1.1 itojun
402 1.1 itojun static void
403 1.18 uch sci_attach(struct device *parent, struct device *self, void *aux)
404 1.1 itojun {
405 1.1 itojun struct sci_softc *sc = (struct sci_softc *)self;
406 1.1 itojun struct tty *tp;
407 1.1 itojun
408 1.1 itojun sc->sc_hwflags = 0; /* XXX */
409 1.1 itojun sc->sc_swflags = 0; /* XXX */
410 1.1 itojun sc->sc_fifolen = 0; /* XXX */
411 1.1 itojun
412 1.8 msaitoh if (sciisconsole) {
413 1.8 msaitoh SET(sc->sc_hwflags, SCI_HW_CONSOLE);
414 1.8 msaitoh SET(sc->sc_swflags, TIOCFLAG_SOFTCAR);
415 1.8 msaitoh printf("\n%s: console\n", sc->sc_dev.dv_xname);
416 1.8 msaitoh } else {
417 1.8 msaitoh InitializeSci(9600);
418 1.8 msaitoh printf("\n");
419 1.8 msaitoh }
420 1.1 itojun
421 1.7 thorpej callout_init(&sc->sc_diag_ch);
422 1.7 thorpej
423 1.22 uch intc_intr_establish(SH_INTEVT_SCI_ERI, IST_LEVEL, IPL_SERIAL, sciintr,
424 1.22 uch sc);
425 1.22 uch intc_intr_establish(SH_INTEVT_SCI_RXI, IST_LEVEL, IPL_SERIAL, sciintr,
426 1.22 uch sc);
427 1.22 uch intc_intr_establish(SH_INTEVT_SCI_TXI, IST_LEVEL, IPL_SERIAL, sciintr,
428 1.22 uch sc);
429 1.22 uch intc_intr_establish(SH_INTEVT_SCI_TEI, IST_LEVEL, IPL_SERIAL, sciintr,
430 1.22 uch sc);
431 1.1 itojun
432 1.24 msaitoh #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
433 1.24 msaitoh sc->sc_si = softintr_establish(IPL_SOFTSERIAL, scisoft, sc);
434 1.24 msaitoh #endif
435 1.8 msaitoh SET(sc->sc_hwflags, SCI_HW_DEV_OK);
436 1.1 itojun
437 1.1 itojun tp = ttymalloc();
438 1.1 itojun tp->t_oproc = scistart;
439 1.1 itojun tp->t_param = sciparam;
440 1.1 itojun tp->t_hwiflow = NULL;
441 1.1 itojun
442 1.1 itojun sc->sc_tty = tp;
443 1.1 itojun sc->sc_rbuf = malloc(sci_rbuf_size << 1, M_DEVBUF, M_NOWAIT);
444 1.1 itojun if (sc->sc_rbuf == NULL) {
445 1.1 itojun printf("%s: unable to allocate ring buffer\n",
446 1.1 itojun sc->sc_dev.dv_xname);
447 1.1 itojun return;
448 1.1 itojun }
449 1.1 itojun sc->sc_ebuf = sc->sc_rbuf + (sci_rbuf_size << 1);
450 1.1 itojun
451 1.1 itojun tty_attach(tp);
452 1.1 itojun }
453 1.1 itojun
454 1.1 itojun /*
455 1.1 itojun * Start or restart transmission.
456 1.1 itojun */
457 1.1 itojun static void
458 1.18 uch scistart(struct tty *tp)
459 1.1 itojun {
460 1.1 itojun struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(tp->t_dev)];
461 1.1 itojun int s;
462 1.1 itojun
463 1.1 itojun s = spltty();
464 1.1 itojun if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP))
465 1.1 itojun goto out;
466 1.1 itojun if (sc->sc_tx_stopped)
467 1.1 itojun goto out;
468 1.1 itojun
469 1.1 itojun if (tp->t_outq.c_cc <= tp->t_lowat) {
470 1.1 itojun if (ISSET(tp->t_state, TS_ASLEEP)) {
471 1.1 itojun CLR(tp->t_state, TS_ASLEEP);
472 1.1 itojun wakeup(&tp->t_outq);
473 1.1 itojun }
474 1.1 itojun selwakeup(&tp->t_wsel);
475 1.1 itojun if (tp->t_outq.c_cc == 0)
476 1.1 itojun goto out;
477 1.1 itojun }
478 1.1 itojun
479 1.1 itojun /* Grab the first contiguous region of buffer space. */
480 1.1 itojun {
481 1.1 itojun u_char *tba;
482 1.1 itojun int tbc;
483 1.1 itojun
484 1.1 itojun tba = tp->t_outq.c_cf;
485 1.1 itojun tbc = ndqb(&tp->t_outq, 0);
486 1.1 itojun
487 1.1 itojun (void)splserial();
488 1.1 itojun
489 1.1 itojun sc->sc_tba = tba;
490 1.1 itojun sc->sc_tbc = tbc;
491 1.1 itojun }
492 1.1 itojun
493 1.1 itojun SET(tp->t_state, TS_BUSY);
494 1.1 itojun sc->sc_tx_busy = 1;
495 1.1 itojun
496 1.1 itojun /* Enable transmit completion interrupts if necessary. */
497 1.1 itojun SHREG_SCSCR |= SCSCR_TIE | SCSCR_RIE;
498 1.1 itojun
499 1.1 itojun /* Output the first byte of the contiguous buffer. */
500 1.1 itojun {
501 1.1 itojun if (sc->sc_tbc > 0) {
502 1.11 msaitoh sci_putc(*(sc->sc_tba));
503 1.1 itojun sc->sc_tba++;
504 1.1 itojun sc->sc_tbc--;
505 1.1 itojun }
506 1.1 itojun }
507 1.1 itojun out:
508 1.1 itojun splx(s);
509 1.1 itojun return;
510 1.1 itojun }
511 1.1 itojun
512 1.1 itojun /*
513 1.1 itojun * Set SCI tty parameters from termios.
514 1.1 itojun * XXX - Should just copy the whole termios after
515 1.1 itojun * making sure all the changes could be done.
516 1.1 itojun */
517 1.1 itojun static int
518 1.18 uch sciparam(struct tty *tp, struct termios *t)
519 1.1 itojun {
520 1.1 itojun struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(tp->t_dev)];
521 1.1 itojun int ospeed = t->c_ospeed;
522 1.1 itojun int s;
523 1.1 itojun
524 1.1 itojun if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
525 1.1 itojun return (EIO);
526 1.1 itojun
527 1.1 itojun /* Check requested parameters. */
528 1.1 itojun if (ospeed < 0)
529 1.1 itojun return (EINVAL);
530 1.1 itojun if (t->c_ispeed && t->c_ispeed != t->c_ospeed)
531 1.1 itojun return (EINVAL);
532 1.1 itojun
533 1.1 itojun /*
534 1.1 itojun * For the console, always force CLOCAL and !HUPCL, so that the port
535 1.1 itojun * is always active.
536 1.1 itojun */
537 1.1 itojun if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) ||
538 1.1 itojun ISSET(sc->sc_hwflags, SCI_HW_CONSOLE)) {
539 1.1 itojun SET(t->c_cflag, CLOCAL);
540 1.1 itojun CLR(t->c_cflag, HUPCL);
541 1.1 itojun }
542 1.1 itojun
543 1.1 itojun /*
544 1.1 itojun * If there were no changes, don't do anything. This avoids dropping
545 1.1 itojun * input and improves performance when all we did was frob things like
546 1.1 itojun * VMIN and VTIME.
547 1.1 itojun */
548 1.1 itojun if (tp->t_ospeed == t->c_ospeed &&
549 1.1 itojun tp->t_cflag == t->c_cflag)
550 1.1 itojun return (0);
551 1.1 itojun
552 1.1 itojun #if 0
553 1.1 itojun /* XXX (msaitoh) */
554 1.1 itojun lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag);
555 1.1 itojun #endif
556 1.1 itojun
557 1.1 itojun s = splserial();
558 1.1 itojun
559 1.1 itojun /*
560 1.1 itojun * Set the FIFO threshold based on the receive speed.
561 1.1 itojun *
562 1.1 itojun * * If it's a low speed, it's probably a mouse or some other
563 1.1 itojun * interactive device, so set the threshold low.
564 1.1 itojun * * If it's a high speed, trim the trigger level down to prevent
565 1.1 itojun * overflows.
566 1.1 itojun * * Otherwise set it a bit higher.
567 1.1 itojun */
568 1.1 itojun #if 0
569 1.1 itojun /* XXX (msaitoh) */
570 1.1 itojun if (ISSET(sc->sc_hwflags, SCI_HW_HAYESP))
571 1.1 itojun sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8;
572 1.1 itojun else if (ISSET(sc->sc_hwflags, SCI_HW_FIFO))
573 1.1 itojun sc->sc_fifo = FIFO_ENABLE |
574 1.1 itojun (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 :
575 1.1 itojun t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4);
576 1.1 itojun else
577 1.1 itojun sc->sc_fifo = 0;
578 1.1 itojun #endif
579 1.1 itojun
580 1.1 itojun /* And copy to tty. */
581 1.1 itojun tp->t_ispeed = 0;
582 1.1 itojun tp->t_ospeed = t->c_ospeed;
583 1.1 itojun tp->t_cflag = t->c_cflag;
584 1.1 itojun
585 1.1 itojun if (!sc->sc_heldchange) {
586 1.1 itojun if (sc->sc_tx_busy) {
587 1.1 itojun sc->sc_heldtbc = sc->sc_tbc;
588 1.1 itojun sc->sc_tbc = 0;
589 1.1 itojun sc->sc_heldchange = 1;
590 1.1 itojun }
591 1.1 itojun #if 0
592 1.1 itojun /* XXX (msaitoh) */
593 1.1 itojun else
594 1.1 itojun sci_loadchannelregs(sc);
595 1.1 itojun #endif
596 1.1 itojun }
597 1.1 itojun
598 1.1 itojun if (!ISSET(t->c_cflag, CHWFLOW)) {
599 1.1 itojun /* Disable the high water mark. */
600 1.1 itojun sc->sc_r_hiwat = 0;
601 1.1 itojun sc->sc_r_lowat = 0;
602 1.1 itojun if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) {
603 1.1 itojun CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
604 1.1 itojun sci_schedrx(sc);
605 1.1 itojun }
606 1.1 itojun } else {
607 1.1 itojun sc->sc_r_hiwat = sci_rbuf_hiwat;
608 1.1 itojun sc->sc_r_lowat = sci_rbuf_lowat;
609 1.1 itojun }
610 1.1 itojun
611 1.1 itojun splx(s);
612 1.1 itojun
613 1.1 itojun #ifdef SCI_DEBUG
614 1.1 itojun if (sci_debug)
615 1.1 itojun scistatus(sc, "sciparam ");
616 1.1 itojun #endif
617 1.1 itojun
618 1.1 itojun if (!ISSET(t->c_cflag, CHWFLOW)) {
619 1.1 itojun if (sc->sc_tx_stopped) {
620 1.1 itojun sc->sc_tx_stopped = 0;
621 1.1 itojun scistart(tp);
622 1.1 itojun }
623 1.1 itojun }
624 1.1 itojun
625 1.1 itojun return (0);
626 1.1 itojun }
627 1.1 itojun
628 1.1 itojun void
629 1.18 uch sci_iflush(struct sci_softc *sc)
630 1.1 itojun {
631 1.1 itojun unsigned char err_c;
632 1.1 itojun volatile unsigned char c;
633 1.1 itojun
634 1.1 itojun if (((err_c = SHREG_SCSSR)
635 1.9 msaitoh & (SCSSR_RDRF | SCSSR_ORER | SCSSR_FER | SCSSR_PER)) != 0) {
636 1.1 itojun
637 1.9 msaitoh if ((err_c & (SCSSR_ORER | SCSSR_FER | SCSSR_PER)) != 0) {
638 1.9 msaitoh SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_FER | SCSSR_PER);
639 1.1 itojun return;
640 1.9 msaitoh }
641 1.1 itojun
642 1.1 itojun c = SHREG_SCRDR;
643 1.1 itojun
644 1.1 itojun SHREG_SCSSR &= ~SCSSR_RDRF;
645 1.1 itojun }
646 1.1 itojun }
647 1.1 itojun
648 1.1 itojun int
649 1.18 uch sciopen(dev_t dev, int flag, int mode, struct proc *p)
650 1.1 itojun {
651 1.1 itojun int unit = SCIUNIT(dev);
652 1.1 itojun struct sci_softc *sc;
653 1.1 itojun struct tty *tp;
654 1.1 itojun int s, s2;
655 1.1 itojun int error;
656 1.1 itojun
657 1.1 itojun if (unit >= sci_cd.cd_ndevs)
658 1.1 itojun return (ENXIO);
659 1.1 itojun sc = sci_cd.cd_devs[unit];
660 1.1 itojun if (sc == 0 || !ISSET(sc->sc_hwflags, SCI_HW_DEV_OK) ||
661 1.1 itojun sc->sc_rbuf == NULL)
662 1.1 itojun return (ENXIO);
663 1.1 itojun
664 1.1 itojun if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
665 1.1 itojun return (ENXIO);
666 1.1 itojun
667 1.1 itojun #ifdef KGDB
668 1.1 itojun /*
669 1.1 itojun * If this is the kgdb port, no other use is permitted.
670 1.1 itojun */
671 1.1 itojun if (ISSET(sc->sc_hwflags, SCI_HW_KGDB))
672 1.1 itojun return (EBUSY);
673 1.1 itojun #endif
674 1.1 itojun
675 1.1 itojun tp = sc->sc_tty;
676 1.1 itojun
677 1.1 itojun if (ISSET(tp->t_state, TS_ISOPEN) &&
678 1.1 itojun ISSET(tp->t_state, TS_XCLUDE) &&
679 1.1 itojun p->p_ucred->cr_uid != 0)
680 1.1 itojun return (EBUSY);
681 1.1 itojun
682 1.1 itojun s = spltty();
683 1.1 itojun
684 1.1 itojun /*
685 1.1 itojun * Do the following iff this is a first open.
686 1.1 itojun */
687 1.1 itojun if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
688 1.1 itojun struct termios t;
689 1.1 itojun
690 1.1 itojun tp->t_dev = dev;
691 1.1 itojun
692 1.1 itojun s2 = splserial();
693 1.1 itojun
694 1.1 itojun /* Turn on interrupts. */
695 1.1 itojun SHREG_SCSCR |= SCSCR_TIE | SCSCR_RIE;
696 1.1 itojun
697 1.1 itojun splx(s2);
698 1.1 itojun
699 1.1 itojun /*
700 1.1 itojun * Initialize the termios status to the defaults. Add in the
701 1.1 itojun * sticky bits from TIOCSFLAGS.
702 1.1 itojun */
703 1.1 itojun t.c_ispeed = 0;
704 1.1 itojun if (ISSET(sc->sc_hwflags, SCI_HW_CONSOLE)) {
705 1.6 msaitoh t.c_ospeed = scicn_speed;
706 1.1 itojun t.c_cflag = sciconscflag;
707 1.1 itojun } else {
708 1.1 itojun t.c_ospeed = TTYDEF_SPEED;
709 1.1 itojun t.c_cflag = TTYDEF_CFLAG;
710 1.1 itojun }
711 1.1 itojun if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL))
712 1.1 itojun SET(t.c_cflag, CLOCAL);
713 1.1 itojun if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS))
714 1.1 itojun SET(t.c_cflag, CRTSCTS);
715 1.1 itojun if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF))
716 1.1 itojun SET(t.c_cflag, MDMBUF);
717 1.1 itojun /* Make sure sciparam() will do something. */
718 1.1 itojun tp->t_ospeed = 0;
719 1.1 itojun (void) sciparam(tp, &t);
720 1.1 itojun tp->t_iflag = TTYDEF_IFLAG;
721 1.1 itojun tp->t_oflag = TTYDEF_OFLAG;
722 1.1 itojun tp->t_lflag = TTYDEF_LFLAG;
723 1.1 itojun ttychars(tp);
724 1.1 itojun ttsetwater(tp);
725 1.1 itojun
726 1.1 itojun s2 = splserial();
727 1.1 itojun
728 1.1 itojun /* Clear the input ring, and unblock. */
729 1.1 itojun sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf;
730 1.1 itojun sc->sc_rbavail = sci_rbuf_size;
731 1.1 itojun sci_iflush(sc);
732 1.1 itojun CLR(sc->sc_rx_flags, RX_ANY_BLOCK);
733 1.1 itojun #if 0
734 1.1 itojun /* XXX (msaitoh) */
735 1.1 itojun sci_hwiflow(sc);
736 1.1 itojun #endif
737 1.1 itojun
738 1.1 itojun #ifdef SCI_DEBUG
739 1.1 itojun if (sci_debug)
740 1.1 itojun scistatus(sc, "sciopen ");
741 1.1 itojun #endif
742 1.1 itojun
743 1.1 itojun splx(s2);
744 1.1 itojun }
745 1.1 itojun
746 1.1 itojun splx(s);
747 1.1 itojun
748 1.1 itojun error = ttyopen(tp, SCIDIALOUT(dev), ISSET(flag, O_NONBLOCK));
749 1.1 itojun if (error)
750 1.1 itojun goto bad;
751 1.1 itojun
752 1.10 eeh error = (*tp->t_linesw->l_open)(dev, tp);
753 1.1 itojun if (error)
754 1.1 itojun goto bad;
755 1.1 itojun
756 1.1 itojun return (0);
757 1.1 itojun
758 1.1 itojun bad:
759 1.1 itojun
760 1.1 itojun return (error);
761 1.1 itojun }
762 1.1 itojun
763 1.1 itojun int
764 1.18 uch sciclose(dev_t dev, int flag, int mode, struct proc *p)
765 1.1 itojun {
766 1.1 itojun struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
767 1.1 itojun struct tty *tp = sc->sc_tty;
768 1.1 itojun
769 1.1 itojun /* XXX This is for cons.c. */
770 1.1 itojun if (!ISSET(tp->t_state, TS_ISOPEN))
771 1.1 itojun return (0);
772 1.1 itojun
773 1.10 eeh (*tp->t_linesw->l_close)(tp, flag);
774 1.1 itojun ttyclose(tp);
775 1.1 itojun
776 1.1 itojun if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
777 1.1 itojun return (0);
778 1.1 itojun
779 1.1 itojun return (0);
780 1.1 itojun }
781 1.1 itojun
782 1.1 itojun int
783 1.18 uch sciread(dev_t dev, struct uio *uio, int flag)
784 1.1 itojun {
785 1.1 itojun struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
786 1.1 itojun struct tty *tp = sc->sc_tty;
787 1.1 itojun
788 1.10 eeh return ((*tp->t_linesw->l_read)(tp, uio, flag));
789 1.1 itojun }
790 1.1 itojun
791 1.1 itojun int
792 1.18 uch sciwrite(dev_t dev, struct uio *uio, int flag)
793 1.1 itojun {
794 1.1 itojun struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
795 1.1 itojun struct tty *tp = sc->sc_tty;
796 1.1 itojun
797 1.10 eeh return ((*tp->t_linesw->l_write)(tp, uio, flag));
798 1.13 scw }
799 1.13 scw
800 1.13 scw int
801 1.18 uch scipoll(dev_t dev, int events, struct proc *p)
802 1.13 scw {
803 1.13 scw struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
804 1.13 scw struct tty *tp = sc->sc_tty;
805 1.25 uch
806 1.13 scw return ((*tp->t_linesw->l_poll)(tp, events, p));
807 1.1 itojun }
808 1.1 itojun
809 1.1 itojun struct tty *
810 1.18 uch scitty(dev_t dev)
811 1.1 itojun {
812 1.1 itojun struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
813 1.1 itojun struct tty *tp = sc->sc_tty;
814 1.1 itojun
815 1.1 itojun return (tp);
816 1.1 itojun }
817 1.1 itojun
818 1.1 itojun int
819 1.18 uch sciioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct proc *p)
820 1.1 itojun {
821 1.1 itojun struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
822 1.1 itojun struct tty *tp = sc->sc_tty;
823 1.1 itojun int error;
824 1.1 itojun int s;
825 1.1 itojun
826 1.1 itojun if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
827 1.1 itojun return (EIO);
828 1.1 itojun
829 1.10 eeh error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, p);
830 1.21 atatat if (error != EPASSTHROUGH)
831 1.1 itojun return (error);
832 1.1 itojun
833 1.1 itojun error = ttioctl(tp, cmd, data, flag, p);
834 1.21 atatat if (error != EPASSTHROUGH)
835 1.1 itojun return (error);
836 1.1 itojun
837 1.1 itojun error = 0;
838 1.1 itojun
839 1.1 itojun s = splserial();
840 1.1 itojun
841 1.1 itojun switch (cmd) {
842 1.1 itojun case TIOCSBRK:
843 1.5 msaitoh sci_break(sc, 1);
844 1.1 itojun break;
845 1.1 itojun
846 1.1 itojun case TIOCCBRK:
847 1.5 msaitoh sci_break(sc, 0);
848 1.1 itojun break;
849 1.5 msaitoh
850 1.1 itojun case TIOCGFLAGS:
851 1.1 itojun *(int *)data = sc->sc_swflags;
852 1.1 itojun break;
853 1.1 itojun
854 1.1 itojun case TIOCSFLAGS:
855 1.1 itojun error = suser(p->p_ucred, &p->p_acflag);
856 1.1 itojun if (error)
857 1.1 itojun break;
858 1.1 itojun sc->sc_swflags = *(int *)data;
859 1.1 itojun break;
860 1.1 itojun
861 1.1 itojun default:
862 1.21 atatat error = EPASSTHROUGH;
863 1.1 itojun break;
864 1.1 itojun }
865 1.1 itojun
866 1.1 itojun splx(s);
867 1.1 itojun
868 1.1 itojun return (error);
869 1.1 itojun }
870 1.1 itojun
871 1.1 itojun integrate void
872 1.18 uch sci_schedrx(struct sci_softc *sc)
873 1.1 itojun {
874 1.1 itojun
875 1.1 itojun sc->sc_rx_ready = 1;
876 1.1 itojun
877 1.1 itojun /* Wake up the poller. */
878 1.12 thorpej #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
879 1.1 itojun softintr_schedule(sc->sc_si);
880 1.1 itojun #else
881 1.1 itojun #ifndef __NO_SOFT_SERIAL_INTERRUPT
882 1.1 itojun setsoftserial();
883 1.1 itojun #else
884 1.1 itojun if (!sci_softintr_scheduled) {
885 1.1 itojun sci_softintr_scheduled = 1;
886 1.7 thorpej callout_reset(&sci_soft_ch, 1, scisoft, NULL);
887 1.1 itojun }
888 1.1 itojun #endif
889 1.5 msaitoh #endif
890 1.5 msaitoh }
891 1.5 msaitoh
892 1.5 msaitoh void
893 1.18 uch sci_break(struct sci_softc *sc, int onoff)
894 1.5 msaitoh {
895 1.5 msaitoh
896 1.5 msaitoh if (onoff)
897 1.6 msaitoh SHREG_SCSSR &= ~SCSSR_TDRE;
898 1.5 msaitoh else
899 1.6 msaitoh SHREG_SCSSR |= SCSSR_TDRE;
900 1.5 msaitoh
901 1.5 msaitoh #if 0 /* XXX */
902 1.5 msaitoh if (!sc->sc_heldchange) {
903 1.5 msaitoh if (sc->sc_tx_busy) {
904 1.5 msaitoh sc->sc_heldtbc = sc->sc_tbc;
905 1.5 msaitoh sc->sc_tbc = 0;
906 1.5 msaitoh sc->sc_heldchange = 1;
907 1.5 msaitoh } else
908 1.5 msaitoh sci_loadchannelregs(sc);
909 1.5 msaitoh }
910 1.1 itojun #endif
911 1.1 itojun }
912 1.1 itojun
913 1.1 itojun /*
914 1.1 itojun * Stop output, e.g., for ^S or output flush.
915 1.1 itojun */
916 1.1 itojun void
917 1.18 uch scistop(struct tty *tp, int flag)
918 1.1 itojun {
919 1.1 itojun struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(tp->t_dev)];
920 1.1 itojun int s;
921 1.1 itojun
922 1.1 itojun s = splserial();
923 1.1 itojun if (ISSET(tp->t_state, TS_BUSY)) {
924 1.1 itojun /* Stop transmitting at the next chunk. */
925 1.1 itojun sc->sc_tbc = 0;
926 1.1 itojun sc->sc_heldtbc = 0;
927 1.1 itojun if (!ISSET(tp->t_state, TS_TTSTOP))
928 1.1 itojun SET(tp->t_state, TS_FLUSH);
929 1.1 itojun }
930 1.1 itojun splx(s);
931 1.1 itojun }
932 1.1 itojun
933 1.1 itojun void
934 1.18 uch scidiag(void *arg)
935 1.1 itojun {
936 1.1 itojun struct sci_softc *sc = arg;
937 1.1 itojun int overflows, floods;
938 1.1 itojun int s;
939 1.1 itojun
940 1.1 itojun s = splserial();
941 1.1 itojun overflows = sc->sc_overflows;
942 1.1 itojun sc->sc_overflows = 0;
943 1.1 itojun floods = sc->sc_floods;
944 1.1 itojun sc->sc_floods = 0;
945 1.1 itojun sc->sc_errors = 0;
946 1.1 itojun splx(s);
947 1.1 itojun
948 1.1 itojun log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n",
949 1.1 itojun sc->sc_dev.dv_xname,
950 1.1 itojun overflows, overflows == 1 ? "" : "s",
951 1.1 itojun floods, floods == 1 ? "" : "s");
952 1.1 itojun }
953 1.1 itojun
954 1.1 itojun integrate void
955 1.18 uch sci_rxsoft(struct sci_softc *sc, struct tty *tp)
956 1.1 itojun {
957 1.18 uch int (*rint)(int c, struct tty *tp) = tp->t_linesw->l_rint;
958 1.1 itojun u_char *get, *end;
959 1.1 itojun u_int cc, scc;
960 1.1 itojun u_char ssr;
961 1.1 itojun int code;
962 1.1 itojun int s;
963 1.1 itojun
964 1.1 itojun end = sc->sc_ebuf;
965 1.1 itojun get = sc->sc_rbget;
966 1.1 itojun scc = cc = sci_rbuf_size - sc->sc_rbavail;
967 1.1 itojun
968 1.1 itojun if (cc == sci_rbuf_size) {
969 1.1 itojun sc->sc_floods++;
970 1.1 itojun if (sc->sc_errors++ == 0)
971 1.7 thorpej callout_reset(&sc->sc_diag_ch, 60 * hz, scidiag, sc);
972 1.1 itojun }
973 1.1 itojun
974 1.1 itojun while (cc) {
975 1.1 itojun code = get[0];
976 1.1 itojun ssr = get[1];
977 1.1 itojun if (ISSET(ssr, SCSSR_FER | SCSSR_PER)) {
978 1.1 itojun if (ISSET(ssr, SCSSR_FER))
979 1.1 itojun SET(code, TTY_FE);
980 1.1 itojun if (ISSET(ssr, SCSSR_PER))
981 1.1 itojun SET(code, TTY_PE);
982 1.1 itojun }
983 1.1 itojun if ((*rint)(code, tp) == -1) {
984 1.1 itojun /*
985 1.1 itojun * The line discipline's buffer is out of space.
986 1.1 itojun */
987 1.1 itojun if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) {
988 1.1 itojun /*
989 1.1 itojun * We're either not using flow control, or the
990 1.1 itojun * line discipline didn't tell us to block for
991 1.1 itojun * some reason. Either way, we have no way to
992 1.1 itojun * know when there's more space available, so
993 1.1 itojun * just drop the rest of the data.
994 1.1 itojun */
995 1.1 itojun get += cc << 1;
996 1.1 itojun if (get >= end)
997 1.1 itojun get -= sci_rbuf_size << 1;
998 1.1 itojun cc = 0;
999 1.1 itojun } else {
1000 1.1 itojun /*
1001 1.1 itojun * Don't schedule any more receive processing
1002 1.1 itojun * until the line discipline tells us there's
1003 1.1 itojun * space available (through scihwiflow()).
1004 1.1 itojun * Leave the rest of the data in the input
1005 1.1 itojun * buffer.
1006 1.1 itojun */
1007 1.1 itojun SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
1008 1.1 itojun }
1009 1.1 itojun break;
1010 1.1 itojun }
1011 1.1 itojun get += 2;
1012 1.1 itojun if (get >= end)
1013 1.1 itojun get = sc->sc_rbuf;
1014 1.1 itojun cc--;
1015 1.1 itojun }
1016 1.1 itojun
1017 1.1 itojun if (cc != scc) {
1018 1.1 itojun sc->sc_rbget = get;
1019 1.1 itojun s = splserial();
1020 1.1 itojun cc = sc->sc_rbavail += scc - cc;
1021 1.1 itojun /* Buffers should be ok again, release possible block. */
1022 1.1 itojun if (cc >= sc->sc_r_lowat) {
1023 1.1 itojun if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) {
1024 1.1 itojun CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED);
1025 1.1 itojun SHREG_SCSCR |= SCSCR_RIE;
1026 1.1 itojun }
1027 1.1 itojun #if 0
1028 1.1 itojun if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) {
1029 1.1 itojun CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED);
1030 1.1 itojun sci_hwiflow(sc);
1031 1.1 itojun }
1032 1.1 itojun #endif
1033 1.1 itojun }
1034 1.1 itojun splx(s);
1035 1.1 itojun }
1036 1.1 itojun }
1037 1.1 itojun
1038 1.1 itojun integrate void
1039 1.1 itojun sci_txsoft(sc, tp)
1040 1.1 itojun struct sci_softc *sc;
1041 1.1 itojun struct tty *tp;
1042 1.1 itojun {
1043 1.1 itojun
1044 1.1 itojun CLR(tp->t_state, TS_BUSY);
1045 1.1 itojun if (ISSET(tp->t_state, TS_FLUSH))
1046 1.1 itojun CLR(tp->t_state, TS_FLUSH);
1047 1.1 itojun else
1048 1.1 itojun ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf));
1049 1.10 eeh (*tp->t_linesw->l_start)(tp);
1050 1.1 itojun }
1051 1.1 itojun
1052 1.1 itojun integrate void
1053 1.18 uch sci_stsoft(struct sci_softc *sc, struct tty *tp)
1054 1.1 itojun {
1055 1.1 itojun #if 0
1056 1.1 itojun /* XXX (msaitoh) */
1057 1.1 itojun u_char msr, delta;
1058 1.1 itojun int s;
1059 1.1 itojun
1060 1.1 itojun s = splserial();
1061 1.1 itojun msr = sc->sc_msr;
1062 1.1 itojun delta = sc->sc_msr_delta;
1063 1.1 itojun sc->sc_msr_delta = 0;
1064 1.1 itojun splx(s);
1065 1.1 itojun
1066 1.1 itojun if (ISSET(delta, sc->sc_msr_dcd)) {
1067 1.1 itojun /*
1068 1.1 itojun * Inform the tty layer that carrier detect changed.
1069 1.1 itojun */
1070 1.10 eeh (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD));
1071 1.1 itojun }
1072 1.1 itojun
1073 1.1 itojun if (ISSET(delta, sc->sc_msr_cts)) {
1074 1.1 itojun /* Block or unblock output according to flow control. */
1075 1.1 itojun if (ISSET(msr, sc->sc_msr_cts)) {
1076 1.1 itojun sc->sc_tx_stopped = 0;
1077 1.10 eeh (*tp->t_linesw->l_start)(tp);
1078 1.1 itojun } else {
1079 1.1 itojun sc->sc_tx_stopped = 1;
1080 1.1 itojun }
1081 1.1 itojun }
1082 1.1 itojun
1083 1.1 itojun #ifdef SCI_DEBUG
1084 1.1 itojun if (sci_debug)
1085 1.1 itojun scistatus(sc, "sci_stsoft");
1086 1.1 itojun #endif
1087 1.1 itojun #endif
1088 1.1 itojun }
1089 1.1 itojun
1090 1.12 thorpej #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
1091 1.1 itojun void
1092 1.18 uch scisoft(void *arg)
1093 1.1 itojun {
1094 1.1 itojun struct sci_softc *sc = arg;
1095 1.1 itojun struct tty *tp;
1096 1.1 itojun
1097 1.1 itojun if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
1098 1.1 itojun return;
1099 1.1 itojun
1100 1.1 itojun {
1101 1.1 itojun #else
1102 1.1 itojun void
1103 1.1 itojun #ifndef __NO_SOFT_SERIAL_INTERRUPT
1104 1.1 itojun scisoft()
1105 1.1 itojun #else
1106 1.18 uch scisoft(void *arg)
1107 1.1 itojun #endif
1108 1.1 itojun {
1109 1.1 itojun struct sci_softc *sc;
1110 1.1 itojun struct tty *tp;
1111 1.1 itojun int unit;
1112 1.1 itojun #ifdef __NO_SOFT_SERIAL_INTERRUPT
1113 1.1 itojun int s;
1114 1.1 itojun
1115 1.1 itojun s = splsoftserial();
1116 1.1 itojun sci_softintr_scheduled = 0;
1117 1.1 itojun #endif
1118 1.1 itojun
1119 1.1 itojun for (unit = 0; unit < sci_cd.cd_ndevs; unit++) {
1120 1.1 itojun sc = sci_cd.cd_devs[unit];
1121 1.1 itojun if (sc == NULL || !ISSET(sc->sc_hwflags, SCI_HW_DEV_OK))
1122 1.1 itojun continue;
1123 1.1 itojun
1124 1.1 itojun if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
1125 1.1 itojun continue;
1126 1.1 itojun
1127 1.1 itojun tp = sc->sc_tty;
1128 1.1 itojun if (tp == NULL)
1129 1.1 itojun continue;
1130 1.1 itojun if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0)
1131 1.1 itojun continue;
1132 1.1 itojun #endif
1133 1.1 itojun tp = sc->sc_tty;
1134 1.1 itojun
1135 1.1 itojun if (sc->sc_rx_ready) {
1136 1.1 itojun sc->sc_rx_ready = 0;
1137 1.1 itojun sci_rxsoft(sc, tp);
1138 1.1 itojun }
1139 1.1 itojun
1140 1.1 itojun #if 0
1141 1.1 itojun if (sc->sc_st_check) {
1142 1.1 itojun sc->sc_st_check = 0;
1143 1.1 itojun sci_stsoft(sc, tp);
1144 1.1 itojun }
1145 1.1 itojun #endif
1146 1.1 itojun
1147 1.1 itojun if (sc->sc_tx_done) {
1148 1.1 itojun sc->sc_tx_done = 0;
1149 1.1 itojun sci_txsoft(sc, tp);
1150 1.1 itojun }
1151 1.1 itojun }
1152 1.1 itojun
1153 1.12 thorpej #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS
1154 1.1 itojun #ifdef __NO_SOFT_SERIAL_INTERRUPT
1155 1.1 itojun splx(s);
1156 1.1 itojun #endif
1157 1.1 itojun #endif
1158 1.1 itojun }
1159 1.1 itojun
1160 1.1 itojun int
1161 1.18 uch sciintr(void *arg)
1162 1.1 itojun {
1163 1.1 itojun struct sci_softc *sc = arg;
1164 1.1 itojun u_char *put, *end;
1165 1.1 itojun u_int cc;
1166 1.1 itojun u_short ssr;
1167 1.1 itojun
1168 1.1 itojun if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
1169 1.1 itojun return (0);
1170 1.1 itojun
1171 1.1 itojun end = sc->sc_ebuf;
1172 1.1 itojun put = sc->sc_rbput;
1173 1.1 itojun cc = sc->sc_rbavail;
1174 1.1 itojun
1175 1.26 msaitoh do {
1176 1.26 msaitoh ssr = SHREG_SCSSR;
1177 1.26 msaitoh if (ISSET(ssr, SCSSR_FER)) {
1178 1.26 msaitoh SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_PER | SCSSR_FER);
1179 1.1 itojun #if defined(DDB) || defined(KGDB)
1180 1.23 msaitoh #ifdef SH4
1181 1.26 msaitoh if ((SHREG_SCSPTR & SCSPTR_SPB0DT) != 0) {
1182 1.16 msaitoh #else
1183 1.26 msaitoh if ((SHREG_SCSPDR & SCSPDR_SCP0DT) != 0) {
1184 1.16 msaitoh #endif
1185 1.1 itojun #ifdef DDB
1186 1.26 msaitoh if (ISSET(sc->sc_hwflags, SCI_HW_CONSOLE)) {
1187 1.26 msaitoh console_debugger();
1188 1.26 msaitoh }
1189 1.1 itojun #endif
1190 1.1 itojun #ifdef KGDB
1191 1.26 msaitoh if (ISSET(sc->sc_hwflags, SCI_HW_KGDB)) {
1192 1.26 msaitoh kgdb_connect(1);
1193 1.26 msaitoh }
1194 1.26 msaitoh #endif
1195 1.16 msaitoh }
1196 1.26 msaitoh #endif /* DDB || KGDB */
1197 1.6 msaitoh }
1198 1.26 msaitoh if ((SHREG_SCSSR & SCSSR_RDRF) != 0) {
1199 1.26 msaitoh if (cc > 0) {
1200 1.26 msaitoh put[0] = SHREG_SCRDR;
1201 1.26 msaitoh put[1] = SHREG_SCSSR & 0x00ff;
1202 1.26 msaitoh
1203 1.26 msaitoh put += 2;
1204 1.26 msaitoh if (put >= end)
1205 1.26 msaitoh put = sc->sc_rbuf;
1206 1.26 msaitoh cc--;
1207 1.26 msaitoh }
1208 1.6 msaitoh
1209 1.9 msaitoh SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_FER | SCSSR_PER |
1210 1.26 msaitoh SCSSR_RDRF);
1211 1.6 msaitoh
1212 1.26 msaitoh /*
1213 1.26 msaitoh * Current string of incoming characters ended because
1214 1.26 msaitoh * no more data was available or we ran out of space.
1215 1.26 msaitoh * Schedule a receive event if any data was received.
1216 1.26 msaitoh * If we're out of space, turn off receive interrupts.
1217 1.26 msaitoh */
1218 1.26 msaitoh sc->sc_rbput = put;
1219 1.26 msaitoh sc->sc_rbavail = cc;
1220 1.26 msaitoh if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED))
1221 1.26 msaitoh sc->sc_rx_ready = 1;
1222 1.1 itojun
1223 1.26 msaitoh /*
1224 1.26 msaitoh * See if we are in danger of overflowing a buffer. If
1225 1.26 msaitoh * so, use hardware flow control to ease the pressure.
1226 1.26 msaitoh */
1227 1.26 msaitoh if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) &&
1228 1.26 msaitoh cc < sc->sc_r_hiwat) {
1229 1.26 msaitoh SET(sc->sc_rx_flags, RX_IBUF_BLOCKED);
1230 1.1 itojun #if 0
1231 1.26 msaitoh sci_hwiflow(sc);
1232 1.1 itojun #endif
1233 1.26 msaitoh }
1234 1.1 itojun
1235 1.26 msaitoh /*
1236 1.26 msaitoh * If we're out of space, disable receive interrupts
1237 1.26 msaitoh * until the queue has drained a bit.
1238 1.26 msaitoh */
1239 1.26 msaitoh if (!cc) {
1240 1.26 msaitoh SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED);
1241 1.26 msaitoh SHREG_SCSCR &= ~SCSCR_RIE;
1242 1.26 msaitoh }
1243 1.26 msaitoh } else {
1244 1.26 msaitoh if (SHREG_SCSSR & SCSSR_RDRF) {
1245 1.26 msaitoh SHREG_SCSCR &= ~(SCSCR_TIE | SCSCR_RIE);
1246 1.26 msaitoh delay(10);
1247 1.26 msaitoh SHREG_SCSCR |= SCSCR_TIE | SCSCR_RIE;
1248 1.26 msaitoh continue;
1249 1.26 msaitoh }
1250 1.6 msaitoh }
1251 1.26 msaitoh } while (SHREG_SCSSR & SCSSR_RDRF);
1252 1.25 uch
1253 1.1 itojun #if 0
1254 1.6 msaitoh msr = bus_space_read_1(iot, ioh, sci_msr);
1255 1.6 msaitoh delta = msr ^ sc->sc_msr;
1256 1.6 msaitoh sc->sc_msr = msr;
1257 1.6 msaitoh if (ISSET(delta, sc->sc_msr_mask)) {
1258 1.6 msaitoh SET(sc->sc_msr_delta, delta);
1259 1.1 itojun
1260 1.6 msaitoh /*
1261 1.6 msaitoh * Pulse-per-second clock signal on edge of DCD?
1262 1.6 msaitoh */
1263 1.6 msaitoh if (ISSET(delta, sc->sc_ppsmask)) {
1264 1.6 msaitoh struct timeval tv;
1265 1.6 msaitoh if (ISSET(msr, sc->sc_ppsmask) ==
1266 1.6 msaitoh sc->sc_ppsassert) {
1267 1.6 msaitoh /* XXX nanotime() */
1268 1.6 msaitoh microtime(&tv);
1269 1.6 msaitoh TIMEVAL_TO_TIMESPEC(&tv,
1270 1.6 msaitoh &sc->ppsinfo.assert_timestamp);
1271 1.6 msaitoh if (sc->ppsparam.mode & PPS_OFFSETASSERT) {
1272 1.6 msaitoh timespecadd(&sc->ppsinfo.assert_timestamp,
1273 1.1 itojun &sc->ppsparam.assert_offset,
1274 1.1 itojun &sc->ppsinfo.assert_timestamp);
1275 1.6 msaitoh TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.assert_timestamp);
1276 1.6 msaitoh }
1277 1.1 itojun
1278 1.1 itojun #ifdef PPS_SYNC
1279 1.6 msaitoh if (sc->ppsparam.mode & PPS_HARDPPSONASSERT)
1280 1.6 msaitoh hardpps(&tv, tv.tv_usec);
1281 1.1 itojun #endif
1282 1.6 msaitoh sc->ppsinfo.assert_sequence++;
1283 1.6 msaitoh sc->ppsinfo.current_mode =
1284 1.6 msaitoh sc->ppsparam.mode;
1285 1.6 msaitoh
1286 1.6 msaitoh } else if (ISSET(msr, sc->sc_ppsmask) ==
1287 1.6 msaitoh sc->sc_ppsclear) {
1288 1.6 msaitoh /* XXX nanotime() */
1289 1.6 msaitoh microtime(&tv);
1290 1.6 msaitoh TIMEVAL_TO_TIMESPEC(&tv,
1291 1.6 msaitoh &sc->ppsinfo.clear_timestamp);
1292 1.6 msaitoh if (sc->ppsparam.mode & PPS_OFFSETCLEAR) {
1293 1.6 msaitoh timespecadd(&sc->ppsinfo.clear_timestamp,
1294 1.1 itojun &sc->ppsparam.clear_offset,
1295 1.1 itojun &sc->ppsinfo.clear_timestamp);
1296 1.6 msaitoh TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.clear_timestamp);
1297 1.6 msaitoh }
1298 1.1 itojun
1299 1.1 itojun #ifdef PPS_SYNC
1300 1.6 msaitoh if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR)
1301 1.6 msaitoh hardpps(&tv, tv.tv_usec);
1302 1.1 itojun #endif
1303 1.6 msaitoh sc->ppsinfo.clear_sequence++;
1304 1.6 msaitoh sc->ppsinfo.current_mode =
1305 1.6 msaitoh sc->ppsparam.mode;
1306 1.1 itojun }
1307 1.6 msaitoh }
1308 1.1 itojun
1309 1.6 msaitoh /*
1310 1.6 msaitoh * Stop output immediately if we lose the output
1311 1.6 msaitoh * flow control signal or carrier detect.
1312 1.6 msaitoh */
1313 1.6 msaitoh if (ISSET(~msr, sc->sc_msr_mask)) {
1314 1.6 msaitoh sc->sc_tbc = 0;
1315 1.6 msaitoh sc->sc_heldtbc = 0;
1316 1.1 itojun #ifdef SCI_DEBUG
1317 1.6 msaitoh if (sci_debug)
1318 1.6 msaitoh scistatus(sc, "sciintr ");
1319 1.1 itojun #endif
1320 1.6 msaitoh }
1321 1.1 itojun
1322 1.6 msaitoh sc->sc_st_check = 1;
1323 1.6 msaitoh }
1324 1.1 itojun #endif
1325 1.1 itojun
1326 1.1 itojun /*
1327 1.1 itojun * Done handling any receive interrupts. See if data can be
1328 1.1 itojun * transmitted as well. Schedule tx done event if no data left
1329 1.1 itojun * and tty was marked busy.
1330 1.1 itojun */
1331 1.1 itojun if ((SHREG_SCSSR & SCSSR_TDRE) != 0) {
1332 1.1 itojun /*
1333 1.1 itojun * If we've delayed a parameter change, do it now, and restart
1334 1.1 itojun * output.
1335 1.1 itojun */
1336 1.1 itojun if (sc->sc_heldchange) {
1337 1.1 itojun sc->sc_heldchange = 0;
1338 1.1 itojun sc->sc_tbc = sc->sc_heldtbc;
1339 1.1 itojun sc->sc_heldtbc = 0;
1340 1.1 itojun }
1341 1.1 itojun
1342 1.1 itojun /* Output the next chunk of the contiguous buffer, if any. */
1343 1.1 itojun if (sc->sc_tbc > 0) {
1344 1.11 msaitoh sci_putc(*(sc->sc_tba));
1345 1.1 itojun sc->sc_tba++;
1346 1.1 itojun sc->sc_tbc--;
1347 1.1 itojun } else {
1348 1.1 itojun /* Disable transmit completion interrupts if necessary. */
1349 1.1 itojun #if 0
1350 1.1 itojun if (ISSET(sc->sc_ier, IER_ETXRDY))
1351 1.1 itojun #endif
1352 1.1 itojun SHREG_SCSCR &= ~SCSCR_TIE;
1353 1.1 itojun
1354 1.1 itojun if (sc->sc_tx_busy) {
1355 1.1 itojun sc->sc_tx_busy = 0;
1356 1.1 itojun sc->sc_tx_done = 1;
1357 1.1 itojun }
1358 1.1 itojun }
1359 1.1 itojun }
1360 1.1 itojun
1361 1.1 itojun /* Wake up the poller. */
1362 1.12 thorpej #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
1363 1.1 itojun softintr_schedule(sc->sc_si);
1364 1.1 itojun #else
1365 1.1 itojun #ifndef __NO_SOFT_SERIAL_INTERRUPT
1366 1.1 itojun setsoftserial();
1367 1.1 itojun #else
1368 1.1 itojun if (!sci_softintr_scheduled) {
1369 1.1 itojun sci_softintr_scheduled = 1;
1370 1.7 thorpej callout_reset(&sci_soft_ch, 1, scisoft, 1);
1371 1.1 itojun }
1372 1.1 itojun #endif
1373 1.1 itojun #endif
1374 1.1 itojun
1375 1.1 itojun #if NRND > 0 && defined(RND_SCI)
1376 1.1 itojun rnd_add_uint32(&sc->rnd_source, iir | lsr);
1377 1.1 itojun #endif
1378 1.1 itojun
1379 1.1 itojun return (1);
1380 1.1 itojun }
1381 1.1 itojun
1382 1.1 itojun void
1383 1.1 itojun scicnprobe(cp)
1384 1.1 itojun struct consdev *cp;
1385 1.1 itojun {
1386 1.1 itojun int maj;
1387 1.1 itojun
1388 1.1 itojun /* locate the major number */
1389 1.28 gehenna maj = cdevsw_lookup_major(&sci_cdevsw);
1390 1.1 itojun
1391 1.1 itojun /* Initialize required fields. */
1392 1.1 itojun cp->cn_dev = makedev(maj, 0);
1393 1.4 msaitoh #ifdef SCICONSOLE
1394 1.4 msaitoh cp->cn_pri = CN_REMOTE;
1395 1.4 msaitoh #else
1396 1.1 itojun cp->cn_pri = CN_NORMAL;
1397 1.4 msaitoh #endif
1398 1.1 itojun }
1399 1.1 itojun
1400 1.1 itojun void
1401 1.18 uch scicninit(struct consdev *cp)
1402 1.1 itojun {
1403 1.1 itojun
1404 1.6 msaitoh InitializeSci(scicn_speed);
1405 1.8 msaitoh sciisconsole = 1;
1406 1.1 itojun }
1407 1.1 itojun
1408 1.1 itojun int
1409 1.18 uch scicngetc(dev_t dev)
1410 1.1 itojun {
1411 1.1 itojun int c;
1412 1.1 itojun int s;
1413 1.1 itojun
1414 1.1 itojun s = splserial();
1415 1.1 itojun c = sci_getc();
1416 1.1 itojun splx(s);
1417 1.1 itojun
1418 1.1 itojun return (c);
1419 1.1 itojun }
1420 1.1 itojun
1421 1.1 itojun void
1422 1.18 uch scicnputc(dev_t dev, int c)
1423 1.1 itojun {
1424 1.1 itojun int s;
1425 1.1 itojun
1426 1.1 itojun s = splserial();
1427 1.11 msaitoh sci_putc((u_char)c);
1428 1.1 itojun splx(s);
1429 1.1 itojun }
1430