Home | History | Annotate | Line # | Download | only in dev
sci.c revision 1.40
      1  1.40   thorpej /* $NetBSD: sci.c,v 1.40 2006/02/20 16:50:36 thorpej Exp $ */
      2   1.1    itojun 
      3   1.1    itojun /*-
      4   1.1    itojun  * Copyright (C) 1999 T.Horiuchi and SAITOH Masanobu.  All rights reserved.
      5   1.1    itojun  *
      6   1.1    itojun  * Redistribution and use in source and binary forms, with or without
      7   1.1    itojun  * modification, are permitted provided that the following conditions
      8   1.1    itojun  * are met:
      9   1.1    itojun  * 1. Redistributions of source code must retain the above copyright
     10   1.1    itojun  *    notice, this list of conditions and the following disclaimer.
     11   1.1    itojun  * 2. Redistributions in binary form must reproduce the above copyright
     12   1.1    itojun  *    notice, this list of conditions and the following disclaimer in the
     13   1.1    itojun  *    documentation and/or other materials provided with the distribution.
     14   1.1    itojun  * 3. The name of the author may not be used to endorse or promote products
     15   1.1    itojun  *    derived from this software without specific prior written permission.
     16   1.1    itojun  *
     17   1.1    itojun  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     18   1.1    itojun  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     19   1.1    itojun  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     20   1.1    itojun  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     21   1.1    itojun  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     22   1.1    itojun  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     23   1.1    itojun  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     24   1.1    itojun  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     25   1.1    itojun  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
     26   1.1    itojun  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     27   1.1    itojun  */
     28   1.1    itojun 
     29   1.2   msaitoh /*-
     30   1.2   msaitoh  * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
     31   1.2   msaitoh  * All rights reserved.
     32   1.2   msaitoh  *
     33   1.2   msaitoh  * This code is derived from software contributed to The NetBSD Foundation
     34   1.2   msaitoh  * by Charles M. Hannum.
     35   1.2   msaitoh  *
     36   1.2   msaitoh  * Redistribution and use in source and binary forms, with or without
     37   1.2   msaitoh  * modification, are permitted provided that the following conditions
     38   1.2   msaitoh  * are met:
     39   1.2   msaitoh  * 1. Redistributions of source code must retain the above copyright
     40   1.2   msaitoh  *    notice, this list of conditions and the following disclaimer.
     41   1.2   msaitoh  * 2. Redistributions in binary form must reproduce the above copyright
     42   1.2   msaitoh  *    notice, this list of conditions and the following disclaimer in the
     43   1.2   msaitoh  *    documentation and/or other materials provided with the distribution.
     44   1.2   msaitoh  * 3. All advertising materials mentioning features or use of this software
     45   1.2   msaitoh  *    must display the following acknowledgement:
     46   1.2   msaitoh  *        This product includes software developed by the NetBSD
     47   1.2   msaitoh  *        Foundation, Inc. and its contributors.
     48   1.2   msaitoh  * 4. Neither the name of The NetBSD Foundation nor the names of its
     49   1.2   msaitoh  *    contributors may be used to endorse or promote products derived
     50   1.2   msaitoh  *    from this software without specific prior written permission.
     51   1.2   msaitoh  *
     52   1.2   msaitoh  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     53   1.2   msaitoh  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     54   1.2   msaitoh  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     55   1.2   msaitoh  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     56   1.2   msaitoh  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     57   1.2   msaitoh  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     58   1.2   msaitoh  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     59   1.2   msaitoh  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     60   1.2   msaitoh  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     61   1.2   msaitoh  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     62   1.2   msaitoh  * POSSIBILITY OF SUCH DAMAGE.
     63   1.2   msaitoh  */
     64   1.2   msaitoh 
     65   1.2   msaitoh /*
     66   1.2   msaitoh  * Copyright (c) 1991 The Regents of the University of California.
     67   1.2   msaitoh  * All rights reserved.
     68   1.2   msaitoh  *
     69   1.2   msaitoh  * Redistribution and use in source and binary forms, with or without
     70   1.2   msaitoh  * modification, are permitted provided that the following conditions
     71   1.2   msaitoh  * are met:
     72   1.2   msaitoh  * 1. Redistributions of source code must retain the above copyright
     73   1.2   msaitoh  *    notice, this list of conditions and the following disclaimer.
     74   1.2   msaitoh  * 2. Redistributions in binary form must reproduce the above copyright
     75   1.2   msaitoh  *    notice, this list of conditions and the following disclaimer in the
     76   1.2   msaitoh  *    documentation and/or other materials provided with the distribution.
     77  1.35       agc  * 3. Neither the name of the University nor the names of its contributors
     78   1.2   msaitoh  *    may be used to endorse or promote products derived from this software
     79   1.2   msaitoh  *    without specific prior written permission.
     80   1.2   msaitoh  *
     81   1.2   msaitoh  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     82   1.2   msaitoh  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     83   1.2   msaitoh  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     84   1.2   msaitoh  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     85   1.2   msaitoh  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     86   1.2   msaitoh  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     87   1.2   msaitoh  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     88   1.2   msaitoh  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     89   1.2   msaitoh  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     90   1.2   msaitoh  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     91   1.2   msaitoh  * SUCH DAMAGE.
     92   1.2   msaitoh  *
     93   1.2   msaitoh  *	@(#)com.c	7.5 (Berkeley) 5/16/91
     94   1.2   msaitoh  */
     95   1.2   msaitoh 
     96   1.2   msaitoh /*
     97   1.2   msaitoh  * SH internal serial driver
     98   1.2   msaitoh  *
     99   1.2   msaitoh  * This code is derived from both z8530tty.c and com.c
    100   1.2   msaitoh  */
    101  1.34     lukem 
    102  1.34     lukem #include <sys/cdefs.h>
    103  1.40   thorpej __KERNEL_RCSID(0, "$NetBSD: sci.c,v 1.40 2006/02/20 16:50:36 thorpej Exp $");
    104   1.2   msaitoh 
    105  1.14     lukem #include "opt_kgdb.h"
    106   1.1    itojun #include "opt_sci.h"
    107   1.1    itojun 
    108   1.1    itojun #include <sys/param.h>
    109   1.1    itojun #include <sys/systm.h>
    110   1.1    itojun #include <sys/tty.h>
    111   1.1    itojun #include <sys/proc.h>
    112   1.1    itojun #include <sys/conf.h>
    113   1.1    itojun #include <sys/file.h>
    114   1.1    itojun #include <sys/syslog.h>
    115   1.1    itojun #include <sys/kernel.h>
    116   1.1    itojun #include <sys/device.h>
    117   1.1    itojun #include <sys/malloc.h>
    118   1.1    itojun 
    119   1.1    itojun #include <dev/cons.h>
    120   1.1    itojun 
    121  1.19       uch #include <sh3/clock.h>
    122   1.1    itojun #include <sh3/scireg.h>
    123  1.22       uch #include <sh3/pfcreg.h>
    124   1.1    itojun #include <sh3/tmureg.h>
    125  1.22       uch #include <sh3/exception.h>
    126  1.22       uch #include <machine/intr.h>
    127   1.1    itojun 
    128  1.18       uch static void	scistart(struct tty *);
    129  1.18       uch static int	sciparam(struct tty *, struct termios *);
    130   1.1    itojun 
    131  1.18       uch void scicnprobe(struct consdev *);
    132  1.18       uch void scicninit(struct consdev *);
    133  1.18       uch void scicnputc(dev_t, int);
    134  1.18       uch int scicngetc(dev_t);
    135  1.18       uch void scicnpoolc(dev_t, int);
    136  1.18       uch int sciintr(void *);
    137   1.1    itojun 
    138   1.1    itojun struct sci_softc {
    139   1.1    itojun 	struct device sc_dev;		/* boilerplate */
    140   1.1    itojun 	struct tty *sc_tty;
    141  1.22       uch 	void *sc_si;
    142   1.7   thorpej 	struct callout sc_diag_ch;
    143   1.7   thorpej 
    144   1.1    itojun #if 0
    145   1.1    itojun 	bus_space_tag_t sc_iot;		/* ISA i/o space identifier */
    146   1.1    itojun 	bus_space_handle_t   sc_ioh;	/* ISA io handle */
    147   1.1    itojun 
    148   1.1    itojun 	int sc_drq;
    149   1.1    itojun 
    150   1.1    itojun 	int sc_frequency;
    151   1.1    itojun #endif
    152   1.1    itojun 
    153   1.1    itojun 	u_int sc_overflows,
    154   1.1    itojun 	      sc_floods,
    155   1.1    itojun 	      sc_errors;		/* number of retries so far */
    156   1.1    itojun 	u_char sc_status[7];		/* copy of registers */
    157   1.1    itojun 
    158   1.1    itojun 	int sc_hwflags;
    159   1.1    itojun 	int sc_swflags;
    160   1.1    itojun 	u_int sc_fifolen;		/* XXX always 0? */
    161   1.1    itojun 
    162   1.1    itojun 	u_int sc_r_hiwat,
    163   1.1    itojun 	      sc_r_lowat;
    164   1.1    itojun 	u_char *volatile sc_rbget,
    165   1.1    itojun 	       *volatile sc_rbput;
    166   1.1    itojun  	volatile u_int sc_rbavail;
    167   1.1    itojun 	u_char *sc_rbuf,
    168   1.1    itojun 	       *sc_ebuf;
    169   1.1    itojun 
    170   1.1    itojun  	u_char *sc_tba;			/* transmit buffer address */
    171   1.1    itojun  	u_int sc_tbc,			/* transmit byte count */
    172   1.1    itojun 	      sc_heldtbc;
    173   1.1    itojun 
    174   1.2   msaitoh 	volatile u_char sc_rx_flags,	/* receiver blocked */
    175   1.1    itojun #define	RX_TTY_BLOCKED		0x01
    176   1.1    itojun #define	RX_TTY_OVERFLOWED	0x02
    177   1.1    itojun #define	RX_IBUF_BLOCKED		0x04
    178   1.1    itojun #define	RX_IBUF_OVERFLOWED	0x08
    179   1.1    itojun #define	RX_ANY_BLOCK		0x0f
    180   1.3   msaitoh 			sc_tx_busy,	/* working on an output chunk */
    181   1.3   msaitoh 			sc_tx_done,	/* done with one output chunk */
    182   1.2   msaitoh 			sc_tx_stopped,	/* H/W level stop (lost CTS) */
    183   1.2   msaitoh 			sc_st_check,	/* got a status interrupt */
    184   1.1    itojun 			sc_rx_ready;
    185   1.1    itojun 
    186   1.1    itojun 	volatile u_char sc_heldchange;
    187   1.1    itojun };
    188   1.1    itojun 
    189   1.1    itojun /* controller driver configuration */
    190  1.18       uch static int sci_match(struct device *, struct cfdata *, void *);
    191  1.18       uch static void sci_attach(struct device *, struct device *, void *);
    192   1.1    itojun 
    193  1.18       uch void	sci_break(struct sci_softc *, int);
    194  1.18       uch void	sci_iflush(struct sci_softc *);
    195   1.1    itojun 
    196   1.1    itojun #define	integrate	static inline
    197  1.12   thorpej #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
    198  1.18       uch void 	scisoft(void *);
    199   1.1    itojun #else
    200   1.1    itojun #ifndef __NO_SOFT_SERIAL_INTERRUPT
    201  1.18       uch void 	scisoft(void);
    202   1.1    itojun #else
    203  1.18       uch void 	scisoft(void *);
    204   1.1    itojun #endif
    205   1.1    itojun #endif
    206  1.18       uch integrate void sci_rxsoft(struct sci_softc *, struct tty *);
    207  1.18       uch integrate void sci_txsoft(struct sci_softc *, struct tty *);
    208  1.18       uch integrate void sci_stsoft(struct sci_softc *, struct tty *);
    209  1.18       uch integrate void sci_schedrx(struct sci_softc *);
    210  1.18       uch void	scidiag(void *);
    211   1.1    itojun 
    212   1.1    itojun #define	SCIUNIT_MASK		0x7ffff
    213   1.1    itojun #define	SCIDIALOUT_MASK	0x80000
    214   1.1    itojun 
    215   1.1    itojun #define	SCIUNIT(x)	(minor(x) & SCIUNIT_MASK)
    216   1.1    itojun #define	SCIDIALOUT(x)	(minor(x) & SCIDIALOUT_MASK)
    217   1.1    itojun 
    218   1.1    itojun /* Macros to clear/set/test flags. */
    219  1.25       uch #define	SET(t, f)	(t) |= (f)
    220  1.25       uch #define	CLR(t, f)	(t) &= ~(f)
    221  1.25       uch #define	ISSET(t, f)	((t) & (f))
    222   1.1    itojun 
    223   1.1    itojun /* Hardware flag masks */
    224   1.1    itojun #define	SCI_HW_NOIEN	0x01
    225   1.1    itojun #define	SCI_HW_FIFO	0x02
    226   1.1    itojun #define	SCI_HW_FLOW	0x08
    227   1.1    itojun #define	SCI_HW_DEV_OK	0x20
    228   1.1    itojun #define	SCI_HW_CONSOLE	0x40
    229   1.1    itojun #define	SCI_HW_KGDB	0x80
    230   1.1    itojun 
    231   1.1    itojun /* Buffer size for character buffer */
    232   1.1    itojun #define	SCI_RING_SIZE	2048
    233   1.1    itojun 
    234   1.1    itojun /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */
    235   1.1    itojun u_int sci_rbuf_hiwat = (SCI_RING_SIZE * 1) / 4;
    236   1.1    itojun u_int sci_rbuf_lowat = (SCI_RING_SIZE * 3) / 4;
    237   1.1    itojun 
    238  1.25       uch #define	CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
    239   1.1    itojun int sciconscflag = CONMODE;
    240   1.8   msaitoh int sciisconsole = 0;
    241   1.1    itojun 
    242   1.6   msaitoh #ifdef SCICN_SPEED
    243   1.6   msaitoh int scicn_speed = SCICN_SPEED;
    244   1.6   msaitoh #else
    245   1.6   msaitoh int scicn_speed = 9600;
    246   1.6   msaitoh #endif
    247   1.6   msaitoh 
    248   1.1    itojun #define	divrnd(n, q)	(((n)*2/(q)+1)/2)	/* divide and round off */
    249   1.1    itojun 
    250  1.12   thorpej #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS
    251   1.1    itojun #ifdef __NO_SOFT_SERIAL_INTERRUPT
    252   1.1    itojun volatile int	sci_softintr_scheduled;
    253   1.7   thorpej struct callout sci_soft_ch = CALLOUT_INITIALIZER;
    254   1.1    itojun #endif
    255   1.1    itojun #endif
    256   1.1    itojun 
    257   1.1    itojun u_int sci_rbuf_size = SCI_RING_SIZE;
    258   1.1    itojun 
    259  1.31   thorpej CFATTACH_DECL(sci, sizeof(struct sci_softc),
    260  1.32   thorpej     sci_match, sci_attach, NULL, NULL);
    261   1.1    itojun 
    262   1.1    itojun extern struct cfdriver sci_cd;
    263   1.1    itojun 
    264  1.36       chs static int sci_attached;
    265  1.36       chs 
    266  1.28   gehenna dev_type_open(sciopen);
    267  1.28   gehenna dev_type_close(sciclose);
    268  1.28   gehenna dev_type_read(sciread);
    269  1.28   gehenna dev_type_write(sciwrite);
    270  1.28   gehenna dev_type_ioctl(sciioctl);
    271  1.28   gehenna dev_type_stop(scistop);
    272  1.28   gehenna dev_type_tty(scitty);
    273  1.28   gehenna dev_type_poll(scipoll);
    274  1.28   gehenna 
    275  1.28   gehenna const struct cdevsw sci_cdevsw = {
    276  1.28   gehenna 	sciopen, sciclose, sciread, sciwrite, sciioctl,
    277  1.33  jdolecek 	scistop, scitty, scipoll, nommap, ttykqfilter, D_TTY
    278  1.28   gehenna };
    279   1.1    itojun 
    280  1.18       uch void InitializeSci (unsigned int);
    281   1.1    itojun 
    282   1.1    itojun /*
    283   1.1    itojun  * following functions are debugging prupose only
    284   1.1    itojun  */
    285  1.25       uch #define	CR      0x0D
    286  1.25       uch #define	I2C_ADRS (*(volatile unsigned int *)0xa8000000)
    287  1.25       uch #define	USART_ON (unsigned int)~0x08
    288   1.1    itojun 
    289  1.18       uch void sci_putc(unsigned char);
    290  1.18       uch unsigned char sci_getc(void);
    291  1.18       uch int SciErrCheck(void);
    292   1.1    itojun 
    293   1.1    itojun /*
    294   1.1    itojun  * InitializeSci
    295   1.1    itojun  * : unsigned int bps;
    296   1.1    itojun  * : SCI(Serial Communication Interface)
    297   1.1    itojun  */
    298   1.1    itojun 
    299   1.1    itojun void
    300  1.18       uch InitializeSci(unsigned int bps)
    301   1.1    itojun {
    302   1.1    itojun 
    303   1.1    itojun 	/* Initialize SCR */
    304   1.3   msaitoh 	SHREG_SCSCR = 0x00;
    305   1.1    itojun 
    306   1.3   msaitoh 	/* Serial Mode Register */
    307   1.3   msaitoh 	SHREG_SCSMR = 0x00;	/* Async,8bit,NonParity,Even,1Stop,NoMulti */
    308   1.1    itojun 
    309   1.3   msaitoh 	/* Bit Rate Register */
    310  1.20       uch 	SHREG_SCBRR = divrnd(sh_clock_get_pclock(), 32 * bps) - 1;
    311   1.1    itojun 
    312   1.3   msaitoh 	/*
    313   1.3   msaitoh 	 * wait 1mSec, because Send/Recv must begin 1 bit period after
    314   1.3   msaitoh 	 * BRR is set.
    315   1.3   msaitoh 	 */
    316  1.19       uch 	delay(1000);
    317   1.1    itojun 
    318  1.15       wiz 	/* Send permission, Receive permission ON */
    319   1.3   msaitoh 	SHREG_SCSCR = SCSCR_TE | SCSCR_RE;
    320   1.1    itojun 
    321   1.6   msaitoh 	/* Serial Status Register */
    322   1.1    itojun 	SHREG_SCSSR &= SCSSR_TDRE;	/* Clear Status */
    323   1.1    itojun 
    324   1.1    itojun #if 0
    325   1.1    itojun 	I2C_ADRS &= ~0x08;	/* enable RS-232C */
    326   1.1    itojun #endif
    327   1.1    itojun }
    328   1.1    itojun 
    329   1.1    itojun 
    330   1.1    itojun /*
    331  1.11   msaitoh  * sci_putc
    332   1.1    itojun  *  : unsigned char c;
    333   1.1    itojun  */
    334   1.1    itojun void
    335  1.18       uch sci_putc(unsigned char c)
    336   1.1    itojun {
    337  1.11   msaitoh 
    338   1.1    itojun 	/* wait for ready */
    339  1.37      matt 	while ((SHREG_SCSSR & SCSSR_TDRE) == 0)
    340   1.1    itojun 		;
    341   1.1    itojun 
    342   1.1    itojun 	/* write send data to send register */
    343   1.1    itojun 	SHREG_SCTDR = c;
    344   1.1    itojun 
    345   1.1    itojun 	/* clear ready flag */
    346   1.1    itojun 	SHREG_SCSSR &= ~SCSSR_TDRE;
    347   1.1    itojun }
    348   1.1    itojun 
    349   1.1    itojun /*
    350   1.1    itojun  * : SciErrCheck
    351   1.1    itojun  *	0x20 = over run
    352   1.1    itojun  *	0x10 = frame error
    353   1.1    itojun  *	0x80 = parity error
    354   1.1    itojun  */
    355   1.1    itojun int
    356   1.1    itojun SciErrCheck(void)
    357   1.1    itojun {
    358   1.1    itojun 
    359   1.1    itojun 	return(SHREG_SCSSR & (SCSSR_ORER | SCSSR_FER | SCSSR_PER));
    360   1.1    itojun }
    361   1.1    itojun 
    362   1.1    itojun /*
    363  1.11   msaitoh  * sci_getc
    364   1.1    itojun  */
    365   1.1    itojun unsigned char
    366  1.11   msaitoh sci_getc(void)
    367   1.1    itojun {
    368   1.1    itojun 	unsigned char c, err_c;
    369   1.1    itojun 
    370   1.1    itojun 	while (((err_c = SHREG_SCSSR)
    371   1.1    itojun 		& (SCSSR_RDRF | SCSSR_ORER | SCSSR_FER | SCSSR_PER)) == 0)
    372   1.1    itojun 		;
    373   1.9   msaitoh 	if ((err_c & (SCSSR_ORER | SCSSR_FER | SCSSR_PER)) != 0) {
    374   1.9   msaitoh 		SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_FER | SCSSR_PER);
    375   1.1    itojun 		return(err_c |= 0x80);
    376   1.9   msaitoh 	}
    377   1.1    itojun 
    378   1.1    itojun 	c = SHREG_SCRDR;
    379   1.1    itojun 
    380   1.1    itojun 	SHREG_SCSSR &= ~SCSSR_RDRF;
    381   1.1    itojun 
    382   1.1    itojun 	return(c);
    383   1.1    itojun }
    384   1.1    itojun 
    385   1.1    itojun static int
    386  1.18       uch sci_match(struct device *parent, struct cfdata *cfp, void *aux)
    387   1.1    itojun {
    388   1.1    itojun 
    389  1.36       chs 	if (strcmp(cfp->cf_name, "sci") || sci_attached)
    390   1.1    itojun 		return 0;
    391   1.1    itojun 
    392   1.1    itojun 	return 1;
    393   1.1    itojun }
    394   1.1    itojun 
    395   1.1    itojun static void
    396  1.18       uch sci_attach(struct device *parent, struct device *self, void *aux)
    397   1.1    itojun {
    398   1.1    itojun 	struct sci_softc *sc = (struct sci_softc *)self;
    399   1.1    itojun 	struct tty *tp;
    400   1.1    itojun 
    401  1.36       chs 	sci_attached = 1;
    402  1.36       chs 
    403   1.1    itojun 	sc->sc_hwflags = 0;	/* XXX */
    404   1.1    itojun 	sc->sc_swflags = 0;	/* XXX */
    405   1.1    itojun 	sc->sc_fifolen = 0;	/* XXX */
    406   1.1    itojun 
    407   1.8   msaitoh 	if (sciisconsole) {
    408   1.8   msaitoh 		SET(sc->sc_hwflags, SCI_HW_CONSOLE);
    409   1.8   msaitoh 		SET(sc->sc_swflags, TIOCFLAG_SOFTCAR);
    410   1.8   msaitoh 		printf("\n%s: console\n", sc->sc_dev.dv_xname);
    411   1.8   msaitoh 	} else {
    412   1.8   msaitoh 		InitializeSci(9600);
    413   1.8   msaitoh 		printf("\n");
    414   1.8   msaitoh 	}
    415   1.1    itojun 
    416   1.7   thorpej 	callout_init(&sc->sc_diag_ch);
    417   1.7   thorpej 
    418  1.22       uch 	intc_intr_establish(SH_INTEVT_SCI_ERI, IST_LEVEL, IPL_SERIAL, sciintr,
    419  1.22       uch 	    sc);
    420  1.22       uch 	intc_intr_establish(SH_INTEVT_SCI_RXI, IST_LEVEL, IPL_SERIAL, sciintr,
    421  1.22       uch 	    sc);
    422  1.22       uch 	intc_intr_establish(SH_INTEVT_SCI_TXI, IST_LEVEL, IPL_SERIAL, sciintr,
    423  1.22       uch 	    sc);
    424  1.22       uch 	intc_intr_establish(SH_INTEVT_SCI_TEI, IST_LEVEL, IPL_SERIAL, sciintr,
    425  1.22       uch 	    sc);
    426   1.1    itojun 
    427  1.24   msaitoh #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
    428  1.24   msaitoh 	sc->sc_si = softintr_establish(IPL_SOFTSERIAL, scisoft, sc);
    429  1.24   msaitoh #endif
    430   1.8   msaitoh 	SET(sc->sc_hwflags, SCI_HW_DEV_OK);
    431   1.1    itojun 
    432   1.1    itojun 	tp = ttymalloc();
    433   1.1    itojun 	tp->t_oproc = scistart;
    434   1.1    itojun 	tp->t_param = sciparam;
    435   1.1    itojun 	tp->t_hwiflow = NULL;
    436   1.1    itojun 
    437   1.1    itojun 	sc->sc_tty = tp;
    438   1.1    itojun 	sc->sc_rbuf = malloc(sci_rbuf_size << 1, M_DEVBUF, M_NOWAIT);
    439   1.1    itojun 	if (sc->sc_rbuf == NULL) {
    440   1.1    itojun 		printf("%s: unable to allocate ring buffer\n",
    441   1.1    itojun 		    sc->sc_dev.dv_xname);
    442   1.1    itojun 		return;
    443   1.1    itojun 	}
    444   1.1    itojun 	sc->sc_ebuf = sc->sc_rbuf + (sci_rbuf_size << 1);
    445   1.1    itojun 
    446   1.1    itojun 	tty_attach(tp);
    447   1.1    itojun }
    448   1.1    itojun 
    449   1.1    itojun /*
    450   1.1    itojun  * Start or restart transmission.
    451   1.1    itojun  */
    452   1.1    itojun static void
    453  1.18       uch scistart(struct tty *tp)
    454   1.1    itojun {
    455   1.1    itojun 	struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(tp->t_dev)];
    456   1.1    itojun 	int s;
    457   1.1    itojun 
    458   1.1    itojun 	s = spltty();
    459   1.1    itojun 	if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP))
    460   1.1    itojun 		goto out;
    461   1.1    itojun 	if (sc->sc_tx_stopped)
    462   1.1    itojun 		goto out;
    463   1.1    itojun 
    464   1.1    itojun 	if (tp->t_outq.c_cc <= tp->t_lowat) {
    465   1.1    itojun 		if (ISSET(tp->t_state, TS_ASLEEP)) {
    466   1.1    itojun 			CLR(tp->t_state, TS_ASLEEP);
    467   1.1    itojun 			wakeup(&tp->t_outq);
    468   1.1    itojun 		}
    469   1.1    itojun 		selwakeup(&tp->t_wsel);
    470   1.1    itojun 		if (tp->t_outq.c_cc == 0)
    471   1.1    itojun 			goto out;
    472   1.1    itojun 	}
    473   1.1    itojun 
    474   1.1    itojun 	/* Grab the first contiguous region of buffer space. */
    475   1.1    itojun 	{
    476   1.1    itojun 		u_char *tba;
    477   1.1    itojun 		int tbc;
    478   1.1    itojun 
    479   1.1    itojun 		tba = tp->t_outq.c_cf;
    480   1.1    itojun 		tbc = ndqb(&tp->t_outq, 0);
    481   1.1    itojun 
    482   1.1    itojun 		(void)splserial();
    483   1.1    itojun 
    484   1.1    itojun 		sc->sc_tba = tba;
    485   1.1    itojun 		sc->sc_tbc = tbc;
    486   1.1    itojun 	}
    487   1.1    itojun 
    488   1.1    itojun 	SET(tp->t_state, TS_BUSY);
    489   1.1    itojun 	sc->sc_tx_busy = 1;
    490   1.1    itojun 
    491   1.1    itojun 	/* Enable transmit completion interrupts if necessary. */
    492   1.1    itojun 	SHREG_SCSCR |= SCSCR_TIE | SCSCR_RIE;
    493   1.1    itojun 
    494   1.1    itojun 	/* Output the first byte of the contiguous buffer. */
    495   1.1    itojun 	{
    496   1.1    itojun 		if (sc->sc_tbc > 0) {
    497  1.11   msaitoh 			sci_putc(*(sc->sc_tba));
    498   1.1    itojun 			sc->sc_tba++;
    499   1.1    itojun 			sc->sc_tbc--;
    500   1.1    itojun 		}
    501   1.1    itojun 	}
    502   1.1    itojun out:
    503   1.1    itojun 	splx(s);
    504   1.1    itojun 	return;
    505   1.1    itojun }
    506   1.1    itojun 
    507   1.1    itojun /*
    508   1.1    itojun  * Set SCI tty parameters from termios.
    509   1.1    itojun  * XXX - Should just copy the whole termios after
    510   1.1    itojun  * making sure all the changes could be done.
    511   1.1    itojun  */
    512   1.1    itojun static int
    513  1.18       uch sciparam(struct tty *tp, struct termios *t)
    514   1.1    itojun {
    515   1.1    itojun 	struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(tp->t_dev)];
    516   1.1    itojun 	int ospeed = t->c_ospeed;
    517   1.1    itojun 	int s;
    518   1.1    itojun 
    519  1.40   thorpej 	if (!device_is_active(&sc->sc_dev))
    520   1.1    itojun 		return (EIO);
    521   1.1    itojun 
    522   1.1    itojun 	/* Check requested parameters. */
    523   1.1    itojun 	if (ospeed < 0)
    524   1.1    itojun 		return (EINVAL);
    525   1.1    itojun 	if (t->c_ispeed && t->c_ispeed != t->c_ospeed)
    526   1.1    itojun 		return (EINVAL);
    527   1.1    itojun 
    528   1.1    itojun 	/*
    529   1.1    itojun 	 * For the console, always force CLOCAL and !HUPCL, so that the port
    530   1.1    itojun 	 * is always active.
    531   1.1    itojun 	 */
    532   1.1    itojun 	if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) ||
    533   1.1    itojun 	    ISSET(sc->sc_hwflags, SCI_HW_CONSOLE)) {
    534   1.1    itojun 		SET(t->c_cflag, CLOCAL);
    535   1.1    itojun 		CLR(t->c_cflag, HUPCL);
    536   1.1    itojun 	}
    537   1.1    itojun 
    538   1.1    itojun 	/*
    539   1.1    itojun 	 * If there were no changes, don't do anything.  This avoids dropping
    540   1.1    itojun 	 * input and improves performance when all we did was frob things like
    541   1.1    itojun 	 * VMIN and VTIME.
    542   1.1    itojun 	 */
    543   1.1    itojun 	if (tp->t_ospeed == t->c_ospeed &&
    544   1.1    itojun 	    tp->t_cflag == t->c_cflag)
    545   1.1    itojun 		return (0);
    546   1.1    itojun 
    547   1.1    itojun #if 0
    548   1.1    itojun /* XXX (msaitoh) */
    549   1.1    itojun 	lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag);
    550   1.1    itojun #endif
    551   1.1    itojun 
    552   1.1    itojun 	s = splserial();
    553   1.1    itojun 
    554   1.1    itojun 	/*
    555   1.1    itojun 	 * Set the FIFO threshold based on the receive speed.
    556   1.1    itojun 	 *
    557   1.1    itojun 	 *  * If it's a low speed, it's probably a mouse or some other
    558   1.1    itojun 	 *    interactive device, so set the threshold low.
    559   1.1    itojun 	 *  * If it's a high speed, trim the trigger level down to prevent
    560   1.1    itojun 	 *    overflows.
    561   1.1    itojun 	 *  * Otherwise set it a bit higher.
    562   1.1    itojun 	 */
    563   1.1    itojun #if 0
    564   1.1    itojun /* XXX (msaitoh) */
    565   1.1    itojun 	if (ISSET(sc->sc_hwflags, SCI_HW_HAYESP))
    566   1.1    itojun 		sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8;
    567   1.1    itojun 	else if (ISSET(sc->sc_hwflags, SCI_HW_FIFO))
    568   1.1    itojun 		sc->sc_fifo = FIFO_ENABLE |
    569   1.1    itojun 		    (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 :
    570   1.1    itojun 		     t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4);
    571   1.1    itojun 	else
    572   1.1    itojun 		sc->sc_fifo = 0;
    573   1.1    itojun #endif
    574   1.1    itojun 
    575   1.1    itojun 	/* And copy to tty. */
    576   1.1    itojun 	tp->t_ispeed = 0;
    577   1.1    itojun 	tp->t_ospeed = t->c_ospeed;
    578   1.1    itojun 	tp->t_cflag = t->c_cflag;
    579   1.1    itojun 
    580   1.1    itojun 	if (!sc->sc_heldchange) {
    581   1.1    itojun 		if (sc->sc_tx_busy) {
    582   1.1    itojun 			sc->sc_heldtbc = sc->sc_tbc;
    583   1.1    itojun 			sc->sc_tbc = 0;
    584   1.1    itojun 			sc->sc_heldchange = 1;
    585   1.1    itojun 		}
    586   1.1    itojun #if 0
    587   1.1    itojun /* XXX (msaitoh) */
    588   1.1    itojun 		else
    589   1.1    itojun 			sci_loadchannelregs(sc);
    590   1.1    itojun #endif
    591   1.1    itojun 	}
    592   1.1    itojun 
    593   1.1    itojun 	if (!ISSET(t->c_cflag, CHWFLOW)) {
    594   1.1    itojun 		/* Disable the high water mark. */
    595   1.1    itojun 		sc->sc_r_hiwat = 0;
    596   1.1    itojun 		sc->sc_r_lowat = 0;
    597   1.1    itojun 		if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) {
    598   1.1    itojun 			CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
    599   1.1    itojun 			sci_schedrx(sc);
    600   1.1    itojun 		}
    601   1.1    itojun 	} else {
    602   1.1    itojun 		sc->sc_r_hiwat = sci_rbuf_hiwat;
    603   1.1    itojun 		sc->sc_r_lowat = sci_rbuf_lowat;
    604   1.1    itojun 	}
    605   1.1    itojun 
    606   1.1    itojun 	splx(s);
    607   1.1    itojun 
    608   1.1    itojun #ifdef SCI_DEBUG
    609   1.1    itojun 	if (sci_debug)
    610   1.1    itojun 		scistatus(sc, "sciparam ");
    611   1.1    itojun #endif
    612   1.1    itojun 
    613   1.1    itojun 	if (!ISSET(t->c_cflag, CHWFLOW)) {
    614   1.1    itojun 		if (sc->sc_tx_stopped) {
    615   1.1    itojun 			sc->sc_tx_stopped = 0;
    616   1.1    itojun 			scistart(tp);
    617   1.1    itojun 		}
    618   1.1    itojun 	}
    619   1.1    itojun 
    620   1.1    itojun 	return (0);
    621   1.1    itojun }
    622   1.1    itojun 
    623   1.1    itojun void
    624  1.18       uch sci_iflush(struct sci_softc *sc)
    625   1.1    itojun {
    626   1.1    itojun 	unsigned char err_c;
    627   1.1    itojun 	volatile unsigned char c;
    628   1.1    itojun 
    629   1.1    itojun 	if (((err_c = SHREG_SCSSR)
    630   1.9   msaitoh 	     & (SCSSR_RDRF | SCSSR_ORER | SCSSR_FER | SCSSR_PER)) != 0) {
    631   1.1    itojun 
    632   1.9   msaitoh 		if ((err_c & (SCSSR_ORER | SCSSR_FER | SCSSR_PER)) != 0) {
    633   1.9   msaitoh 			SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_FER | SCSSR_PER);
    634   1.1    itojun 			return;
    635   1.9   msaitoh 		}
    636   1.1    itojun 
    637   1.1    itojun 		c = SHREG_SCRDR;
    638   1.1    itojun 
    639   1.1    itojun 		SHREG_SCSSR &= ~SCSSR_RDRF;
    640   1.1    itojun 	}
    641   1.1    itojun }
    642   1.1    itojun 
    643   1.1    itojun int
    644  1.39  christos sciopen(dev_t dev, int flag, int mode, struct lwp *l)
    645   1.1    itojun {
    646   1.1    itojun 	int unit = SCIUNIT(dev);
    647   1.1    itojun 	struct sci_softc *sc;
    648   1.1    itojun 	struct tty *tp;
    649   1.1    itojun 	int s, s2;
    650   1.1    itojun 	int error;
    651   1.1    itojun 
    652   1.1    itojun 	if (unit >= sci_cd.cd_ndevs)
    653   1.1    itojun 		return (ENXIO);
    654   1.1    itojun 	sc = sci_cd.cd_devs[unit];
    655   1.1    itojun 	if (sc == 0 || !ISSET(sc->sc_hwflags, SCI_HW_DEV_OK) ||
    656   1.1    itojun 	    sc->sc_rbuf == NULL)
    657   1.1    itojun 		return (ENXIO);
    658   1.1    itojun 
    659  1.40   thorpej 	if (!device_is_active(&sc->sc_dev))
    660   1.1    itojun 		return (ENXIO);
    661   1.1    itojun 
    662   1.1    itojun #ifdef KGDB
    663   1.1    itojun 	/*
    664   1.1    itojun 	 * If this is the kgdb port, no other use is permitted.
    665   1.1    itojun 	 */
    666   1.1    itojun 	if (ISSET(sc->sc_hwflags, SCI_HW_KGDB))
    667   1.1    itojun 		return (EBUSY);
    668   1.1    itojun #endif
    669   1.1    itojun 
    670   1.1    itojun 	tp = sc->sc_tty;
    671   1.1    itojun 
    672   1.1    itojun 	if (ISSET(tp->t_state, TS_ISOPEN) &&
    673   1.1    itojun 	    ISSET(tp->t_state, TS_XCLUDE) &&
    674  1.39  christos 	    suser(l->l_proc->p_ucred, &l->l_proc->p_acflag) != 0)
    675   1.1    itojun 		return (EBUSY);
    676   1.1    itojun 
    677   1.1    itojun 	s = spltty();
    678   1.1    itojun 
    679   1.1    itojun 	/*
    680   1.1    itojun 	 * Do the following iff this is a first open.
    681   1.1    itojun 	 */
    682   1.1    itojun 	if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
    683   1.1    itojun 		struct termios t;
    684   1.1    itojun 
    685   1.1    itojun 		tp->t_dev = dev;
    686   1.1    itojun 
    687   1.1    itojun 		s2 = splserial();
    688   1.1    itojun 
    689   1.1    itojun 		/* Turn on interrupts. */
    690   1.1    itojun 		SHREG_SCSCR |= SCSCR_TIE | SCSCR_RIE;
    691   1.1    itojun 
    692   1.1    itojun 		splx(s2);
    693   1.1    itojun 
    694   1.1    itojun 		/*
    695   1.1    itojun 		 * Initialize the termios status to the defaults.  Add in the
    696   1.1    itojun 		 * sticky bits from TIOCSFLAGS.
    697   1.1    itojun 		 */
    698   1.1    itojun 		t.c_ispeed = 0;
    699   1.1    itojun 		if (ISSET(sc->sc_hwflags, SCI_HW_CONSOLE)) {
    700   1.6   msaitoh 			t.c_ospeed = scicn_speed;
    701   1.1    itojun 			t.c_cflag = sciconscflag;
    702   1.1    itojun 		} else {
    703   1.1    itojun 			t.c_ospeed = TTYDEF_SPEED;
    704   1.1    itojun 			t.c_cflag = TTYDEF_CFLAG;
    705   1.1    itojun 		}
    706   1.1    itojun 		if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL))
    707   1.1    itojun 			SET(t.c_cflag, CLOCAL);
    708   1.1    itojun 		if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS))
    709   1.1    itojun 			SET(t.c_cflag, CRTSCTS);
    710   1.1    itojun 		if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF))
    711   1.1    itojun 			SET(t.c_cflag, MDMBUF);
    712   1.1    itojun 		/* Make sure sciparam() will do something. */
    713   1.1    itojun 		tp->t_ospeed = 0;
    714   1.1    itojun 		(void) sciparam(tp, &t);
    715   1.1    itojun 		tp->t_iflag = TTYDEF_IFLAG;
    716   1.1    itojun 		tp->t_oflag = TTYDEF_OFLAG;
    717   1.1    itojun 		tp->t_lflag = TTYDEF_LFLAG;
    718   1.1    itojun 		ttychars(tp);
    719   1.1    itojun 		ttsetwater(tp);
    720   1.1    itojun 
    721   1.1    itojun 		s2 = splserial();
    722   1.1    itojun 
    723   1.1    itojun 		/* Clear the input ring, and unblock. */
    724   1.1    itojun 		sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf;
    725   1.1    itojun 		sc->sc_rbavail = sci_rbuf_size;
    726   1.1    itojun 		sci_iflush(sc);
    727   1.1    itojun 		CLR(sc->sc_rx_flags, RX_ANY_BLOCK);
    728   1.1    itojun #if 0
    729   1.1    itojun /* XXX (msaitoh) */
    730   1.1    itojun 		sci_hwiflow(sc);
    731   1.1    itojun #endif
    732   1.1    itojun 
    733   1.1    itojun #ifdef SCI_DEBUG
    734   1.1    itojun 		if (sci_debug)
    735   1.1    itojun 			scistatus(sc, "sciopen  ");
    736   1.1    itojun #endif
    737   1.1    itojun 
    738   1.1    itojun 		splx(s2);
    739   1.1    itojun 	}
    740   1.1    itojun 
    741   1.1    itojun 	splx(s);
    742   1.1    itojun 
    743   1.1    itojun 	error = ttyopen(tp, SCIDIALOUT(dev), ISSET(flag, O_NONBLOCK));
    744   1.1    itojun 	if (error)
    745   1.1    itojun 		goto bad;
    746   1.1    itojun 
    747  1.10       eeh 	error = (*tp->t_linesw->l_open)(dev, tp);
    748   1.1    itojun 	if (error)
    749   1.1    itojun 		goto bad;
    750   1.1    itojun 
    751   1.1    itojun 	return (0);
    752   1.1    itojun 
    753   1.1    itojun bad:
    754   1.1    itojun 
    755   1.1    itojun 	return (error);
    756   1.1    itojun }
    757   1.1    itojun 
    758   1.1    itojun int
    759  1.39  christos sciclose(dev_t dev, int flag, int mode, struct lwp *l)
    760   1.1    itojun {
    761   1.1    itojun 	struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
    762   1.1    itojun 	struct tty *tp = sc->sc_tty;
    763   1.1    itojun 
    764   1.1    itojun 	/* XXX This is for cons.c. */
    765   1.1    itojun 	if (!ISSET(tp->t_state, TS_ISOPEN))
    766   1.1    itojun 		return (0);
    767   1.1    itojun 
    768  1.10       eeh 	(*tp->t_linesw->l_close)(tp, flag);
    769   1.1    itojun 	ttyclose(tp);
    770   1.1    itojun 
    771  1.40   thorpej 	if (!device_is_active(&sc->sc_dev))
    772   1.1    itojun 		return (0);
    773   1.1    itojun 
    774   1.1    itojun 	return (0);
    775   1.1    itojun }
    776   1.1    itojun 
    777   1.1    itojun int
    778  1.18       uch sciread(dev_t dev, struct uio *uio, int flag)
    779   1.1    itojun {
    780   1.1    itojun 	struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
    781   1.1    itojun 	struct tty *tp = sc->sc_tty;
    782   1.1    itojun 
    783  1.10       eeh 	return ((*tp->t_linesw->l_read)(tp, uio, flag));
    784   1.1    itojun }
    785   1.1    itojun 
    786   1.1    itojun int
    787  1.18       uch sciwrite(dev_t dev, struct uio *uio, int flag)
    788   1.1    itojun {
    789   1.1    itojun 	struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
    790   1.1    itojun 	struct tty *tp = sc->sc_tty;
    791   1.1    itojun 
    792  1.10       eeh 	return ((*tp->t_linesw->l_write)(tp, uio, flag));
    793  1.13       scw }
    794  1.13       scw 
    795  1.13       scw int
    796  1.39  christos scipoll(dev_t dev, int events, struct lwp *l)
    797  1.13       scw {
    798  1.13       scw 	struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
    799  1.13       scw 	struct tty *tp = sc->sc_tty;
    800  1.25       uch 
    801  1.39  christos 	return ((*tp->t_linesw->l_poll)(tp, events, l));
    802   1.1    itojun }
    803   1.1    itojun 
    804   1.1    itojun struct tty *
    805  1.18       uch scitty(dev_t dev)
    806   1.1    itojun {
    807   1.1    itojun 	struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
    808   1.1    itojun 	struct tty *tp = sc->sc_tty;
    809   1.1    itojun 
    810   1.1    itojun 	return (tp);
    811   1.1    itojun }
    812   1.1    itojun 
    813   1.1    itojun int
    814  1.39  christos sciioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct lwp *l)
    815   1.1    itojun {
    816   1.1    itojun 	struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
    817   1.1    itojun 	struct tty *tp = sc->sc_tty;
    818   1.1    itojun 	int error;
    819   1.1    itojun 	int s;
    820   1.1    itojun 
    821  1.40   thorpej 	if (!device_is_active(&sc->sc_dev))
    822   1.1    itojun 		return (EIO);
    823   1.1    itojun 
    824  1.39  christos 	error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l);
    825  1.21    atatat 	if (error != EPASSTHROUGH)
    826   1.1    itojun 		return (error);
    827   1.1    itojun 
    828  1.39  christos 	error = ttioctl(tp, cmd, data, flag, l);
    829  1.21    atatat 	if (error != EPASSTHROUGH)
    830   1.1    itojun 		return (error);
    831   1.1    itojun 
    832   1.1    itojun 	error = 0;
    833   1.1    itojun 
    834   1.1    itojun 	s = splserial();
    835   1.1    itojun 
    836   1.1    itojun 	switch (cmd) {
    837   1.1    itojun 	case TIOCSBRK:
    838   1.5   msaitoh 		sci_break(sc, 1);
    839   1.1    itojun 		break;
    840   1.1    itojun 
    841   1.1    itojun 	case TIOCCBRK:
    842   1.5   msaitoh 		sci_break(sc, 0);
    843   1.1    itojun 		break;
    844   1.5   msaitoh 
    845   1.1    itojun 	case TIOCGFLAGS:
    846   1.1    itojun 		*(int *)data = sc->sc_swflags;
    847   1.1    itojun 		break;
    848   1.1    itojun 
    849   1.1    itojun 	case TIOCSFLAGS:
    850  1.39  christos 		error = suser(l->l_proc->p_ucred, &l->l_proc->p_acflag);
    851   1.1    itojun 		if (error)
    852   1.1    itojun 			break;
    853   1.1    itojun 		sc->sc_swflags = *(int *)data;
    854   1.1    itojun 		break;
    855   1.1    itojun 
    856   1.1    itojun 	default:
    857  1.21    atatat 		error = EPASSTHROUGH;
    858   1.1    itojun 		break;
    859   1.1    itojun 	}
    860   1.1    itojun 
    861   1.1    itojun 	splx(s);
    862   1.1    itojun 
    863   1.1    itojun 	return (error);
    864   1.1    itojun }
    865   1.1    itojun 
    866   1.1    itojun integrate void
    867  1.18       uch sci_schedrx(struct sci_softc *sc)
    868   1.1    itojun {
    869   1.1    itojun 
    870   1.1    itojun 	sc->sc_rx_ready = 1;
    871   1.1    itojun 
    872   1.1    itojun 	/* Wake up the poller. */
    873  1.12   thorpej #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
    874   1.1    itojun 	softintr_schedule(sc->sc_si);
    875   1.1    itojun #else
    876   1.1    itojun #ifndef __NO_SOFT_SERIAL_INTERRUPT
    877   1.1    itojun 	setsoftserial();
    878   1.1    itojun #else
    879   1.1    itojun 	if (!sci_softintr_scheduled) {
    880   1.1    itojun 		sci_softintr_scheduled = 1;
    881   1.7   thorpej 		callout_reset(&sci_soft_ch, 1, scisoft, NULL);
    882   1.1    itojun 	}
    883   1.1    itojun #endif
    884   1.5   msaitoh #endif
    885   1.5   msaitoh }
    886   1.5   msaitoh 
    887   1.5   msaitoh void
    888  1.18       uch sci_break(struct sci_softc *sc, int onoff)
    889   1.5   msaitoh {
    890   1.5   msaitoh 
    891   1.5   msaitoh 	if (onoff)
    892   1.6   msaitoh 		SHREG_SCSSR &= ~SCSSR_TDRE;
    893   1.5   msaitoh 	else
    894   1.6   msaitoh 		SHREG_SCSSR |= SCSSR_TDRE;
    895   1.5   msaitoh 
    896   1.5   msaitoh #if 0	/* XXX */
    897   1.5   msaitoh 	if (!sc->sc_heldchange) {
    898   1.5   msaitoh 		if (sc->sc_tx_busy) {
    899   1.5   msaitoh 			sc->sc_heldtbc = sc->sc_tbc;
    900   1.5   msaitoh 			sc->sc_tbc = 0;
    901   1.5   msaitoh 			sc->sc_heldchange = 1;
    902   1.5   msaitoh 		} else
    903   1.5   msaitoh 			sci_loadchannelregs(sc);
    904   1.5   msaitoh 	}
    905   1.1    itojun #endif
    906   1.1    itojun }
    907   1.1    itojun 
    908   1.1    itojun /*
    909   1.1    itojun  * Stop output, e.g., for ^S or output flush.
    910   1.1    itojun  */
    911   1.1    itojun void
    912  1.18       uch scistop(struct tty *tp, int flag)
    913   1.1    itojun {
    914   1.1    itojun 	struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(tp->t_dev)];
    915   1.1    itojun 	int s;
    916   1.1    itojun 
    917   1.1    itojun 	s = splserial();
    918   1.1    itojun 	if (ISSET(tp->t_state, TS_BUSY)) {
    919   1.1    itojun 		/* Stop transmitting at the next chunk. */
    920   1.1    itojun 		sc->sc_tbc = 0;
    921   1.1    itojun 		sc->sc_heldtbc = 0;
    922   1.1    itojun 		if (!ISSET(tp->t_state, TS_TTSTOP))
    923   1.1    itojun 			SET(tp->t_state, TS_FLUSH);
    924   1.1    itojun 	}
    925   1.1    itojun 	splx(s);
    926   1.1    itojun }
    927   1.1    itojun 
    928   1.1    itojun void
    929  1.18       uch scidiag(void *arg)
    930   1.1    itojun {
    931   1.1    itojun 	struct sci_softc *sc = arg;
    932   1.1    itojun 	int overflows, floods;
    933   1.1    itojun 	int s;
    934   1.1    itojun 
    935   1.1    itojun 	s = splserial();
    936   1.1    itojun 	overflows = sc->sc_overflows;
    937   1.1    itojun 	sc->sc_overflows = 0;
    938   1.1    itojun 	floods = sc->sc_floods;
    939   1.1    itojun 	sc->sc_floods = 0;
    940   1.1    itojun 	sc->sc_errors = 0;
    941   1.1    itojun 	splx(s);
    942   1.1    itojun 
    943   1.1    itojun 	log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n",
    944   1.1    itojun 	    sc->sc_dev.dv_xname,
    945   1.1    itojun 	    overflows, overflows == 1 ? "" : "s",
    946   1.1    itojun 	    floods, floods == 1 ? "" : "s");
    947   1.1    itojun }
    948   1.1    itojun 
    949   1.1    itojun integrate void
    950  1.18       uch sci_rxsoft(struct sci_softc *sc, struct tty *tp)
    951   1.1    itojun {
    952  1.18       uch 	int (*rint)(int c, struct tty *tp) = tp->t_linesw->l_rint;
    953   1.1    itojun 	u_char *get, *end;
    954   1.1    itojun 	u_int cc, scc;
    955   1.1    itojun 	u_char ssr;
    956   1.1    itojun 	int code;
    957   1.1    itojun 	int s;
    958   1.1    itojun 
    959   1.1    itojun 	end = sc->sc_ebuf;
    960   1.1    itojun 	get = sc->sc_rbget;
    961   1.1    itojun 	scc = cc = sci_rbuf_size - sc->sc_rbavail;
    962   1.1    itojun 
    963   1.1    itojun 	if (cc == sci_rbuf_size) {
    964   1.1    itojun 		sc->sc_floods++;
    965   1.1    itojun 		if (sc->sc_errors++ == 0)
    966   1.7   thorpej 			callout_reset(&sc->sc_diag_ch, 60 * hz, scidiag, sc);
    967   1.1    itojun 	}
    968   1.1    itojun 
    969   1.1    itojun 	while (cc) {
    970   1.1    itojun 		code = get[0];
    971   1.1    itojun 		ssr = get[1];
    972   1.1    itojun 		if (ISSET(ssr, SCSSR_FER | SCSSR_PER)) {
    973   1.1    itojun 			if (ISSET(ssr, SCSSR_FER))
    974   1.1    itojun 				SET(code, TTY_FE);
    975   1.1    itojun 			if (ISSET(ssr, SCSSR_PER))
    976   1.1    itojun 				SET(code, TTY_PE);
    977   1.1    itojun 		}
    978   1.1    itojun 		if ((*rint)(code, tp) == -1) {
    979   1.1    itojun 			/*
    980   1.1    itojun 			 * The line discipline's buffer is out of space.
    981   1.1    itojun 			 */
    982   1.1    itojun 			if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) {
    983   1.1    itojun 				/*
    984   1.1    itojun 				 * We're either not using flow control, or the
    985   1.1    itojun 				 * line discipline didn't tell us to block for
    986   1.1    itojun 				 * some reason.  Either way, we have no way to
    987   1.1    itojun 				 * know when there's more space available, so
    988   1.1    itojun 				 * just drop the rest of the data.
    989   1.1    itojun 				 */
    990   1.1    itojun 				get += cc << 1;
    991   1.1    itojun 				if (get >= end)
    992   1.1    itojun 					get -= sci_rbuf_size << 1;
    993   1.1    itojun 				cc = 0;
    994   1.1    itojun 			} else {
    995   1.1    itojun 				/*
    996   1.1    itojun 				 * Don't schedule any more receive processing
    997   1.1    itojun 				 * until the line discipline tells us there's
    998   1.1    itojun 				 * space available (through scihwiflow()).
    999   1.1    itojun 				 * Leave the rest of the data in the input
   1000   1.1    itojun 				 * buffer.
   1001   1.1    itojun 				 */
   1002   1.1    itojun 				SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
   1003   1.1    itojun 			}
   1004   1.1    itojun 			break;
   1005   1.1    itojun 		}
   1006   1.1    itojun 		get += 2;
   1007   1.1    itojun 		if (get >= end)
   1008   1.1    itojun 			get = sc->sc_rbuf;
   1009   1.1    itojun 		cc--;
   1010   1.1    itojun 	}
   1011   1.1    itojun 
   1012   1.1    itojun 	if (cc != scc) {
   1013   1.1    itojun 		sc->sc_rbget = get;
   1014   1.1    itojun 		s = splserial();
   1015   1.1    itojun 		cc = sc->sc_rbavail += scc - cc;
   1016   1.1    itojun 		/* Buffers should be ok again, release possible block. */
   1017   1.1    itojun 		if (cc >= sc->sc_r_lowat) {
   1018   1.1    itojun 			if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) {
   1019   1.1    itojun 				CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED);
   1020   1.1    itojun 				SHREG_SCSCR |= SCSCR_RIE;
   1021   1.1    itojun 			}
   1022   1.1    itojun #if 0
   1023   1.1    itojun 			if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) {
   1024   1.1    itojun 				CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED);
   1025   1.1    itojun 				sci_hwiflow(sc);
   1026   1.1    itojun 			}
   1027   1.1    itojun #endif
   1028   1.1    itojun 		}
   1029   1.1    itojun 		splx(s);
   1030   1.1    itojun 	}
   1031   1.1    itojun }
   1032   1.1    itojun 
   1033   1.1    itojun integrate void
   1034   1.1    itojun sci_txsoft(sc, tp)
   1035   1.1    itojun 	struct sci_softc *sc;
   1036   1.1    itojun 	struct tty *tp;
   1037   1.1    itojun {
   1038   1.1    itojun 
   1039   1.1    itojun 	CLR(tp->t_state, TS_BUSY);
   1040   1.1    itojun 	if (ISSET(tp->t_state, TS_FLUSH))
   1041   1.1    itojun 		CLR(tp->t_state, TS_FLUSH);
   1042   1.1    itojun 	else
   1043   1.1    itojun 		ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf));
   1044  1.10       eeh 	(*tp->t_linesw->l_start)(tp);
   1045   1.1    itojun }
   1046   1.1    itojun 
   1047   1.1    itojun integrate void
   1048  1.18       uch sci_stsoft(struct sci_softc *sc, struct tty *tp)
   1049   1.1    itojun {
   1050   1.1    itojun #if 0
   1051   1.1    itojun /* XXX (msaitoh) */
   1052   1.1    itojun 	u_char msr, delta;
   1053   1.1    itojun 	int s;
   1054   1.1    itojun 
   1055   1.1    itojun 	s = splserial();
   1056   1.1    itojun 	msr = sc->sc_msr;
   1057   1.1    itojun 	delta = sc->sc_msr_delta;
   1058   1.1    itojun 	sc->sc_msr_delta = 0;
   1059   1.1    itojun 	splx(s);
   1060   1.1    itojun 
   1061   1.1    itojun 	if (ISSET(delta, sc->sc_msr_dcd)) {
   1062   1.1    itojun 		/*
   1063   1.1    itojun 		 * Inform the tty layer that carrier detect changed.
   1064   1.1    itojun 		 */
   1065  1.10       eeh 		(void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD));
   1066   1.1    itojun 	}
   1067   1.1    itojun 
   1068   1.1    itojun 	if (ISSET(delta, sc->sc_msr_cts)) {
   1069   1.1    itojun 		/* Block or unblock output according to flow control. */
   1070   1.1    itojun 		if (ISSET(msr, sc->sc_msr_cts)) {
   1071   1.1    itojun 			sc->sc_tx_stopped = 0;
   1072  1.10       eeh 			(*tp->t_linesw->l_start)(tp);
   1073   1.1    itojun 		} else {
   1074   1.1    itojun 			sc->sc_tx_stopped = 1;
   1075   1.1    itojun 		}
   1076   1.1    itojun 	}
   1077   1.1    itojun 
   1078   1.1    itojun #ifdef SCI_DEBUG
   1079   1.1    itojun 	if (sci_debug)
   1080   1.1    itojun 		scistatus(sc, "sci_stsoft");
   1081   1.1    itojun #endif
   1082   1.1    itojun #endif
   1083   1.1    itojun }
   1084   1.1    itojun 
   1085  1.12   thorpej #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
   1086   1.1    itojun void
   1087  1.18       uch scisoft(void *arg)
   1088   1.1    itojun {
   1089   1.1    itojun 	struct sci_softc *sc = arg;
   1090   1.1    itojun 	struct tty *tp;
   1091   1.1    itojun 
   1092  1.40   thorpej 	if (!device_is_active(&sc->sc_dev))
   1093   1.1    itojun 		return;
   1094   1.1    itojun 
   1095   1.1    itojun 	{
   1096   1.1    itojun #else
   1097   1.1    itojun void
   1098   1.1    itojun #ifndef __NO_SOFT_SERIAL_INTERRUPT
   1099   1.1    itojun scisoft()
   1100   1.1    itojun #else
   1101  1.18       uch scisoft(void *arg)
   1102   1.1    itojun #endif
   1103   1.1    itojun {
   1104   1.1    itojun 	struct sci_softc	*sc;
   1105   1.1    itojun 	struct tty	*tp;
   1106   1.1    itojun 	int	unit;
   1107   1.1    itojun #ifdef __NO_SOFT_SERIAL_INTERRUPT
   1108   1.1    itojun 	int s;
   1109   1.1    itojun 
   1110   1.1    itojun 	s = splsoftserial();
   1111   1.1    itojun 	sci_softintr_scheduled = 0;
   1112   1.1    itojun #endif
   1113   1.1    itojun 
   1114   1.1    itojun 	for (unit = 0; unit < sci_cd.cd_ndevs; unit++) {
   1115   1.1    itojun 		sc = sci_cd.cd_devs[unit];
   1116   1.1    itojun 		if (sc == NULL || !ISSET(sc->sc_hwflags, SCI_HW_DEV_OK))
   1117   1.1    itojun 			continue;
   1118   1.1    itojun 
   1119  1.40   thorpej 		if (!device_is_active(&sc->sc_dev))
   1120   1.1    itojun 			continue;
   1121   1.1    itojun 
   1122   1.1    itojun 		tp = sc->sc_tty;
   1123   1.1    itojun 		if (tp == NULL)
   1124   1.1    itojun 			continue;
   1125   1.1    itojun 		if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0)
   1126   1.1    itojun 			continue;
   1127   1.1    itojun #endif
   1128   1.1    itojun 		tp = sc->sc_tty;
   1129   1.1    itojun 
   1130   1.1    itojun 		if (sc->sc_rx_ready) {
   1131   1.1    itojun 			sc->sc_rx_ready = 0;
   1132   1.1    itojun 			sci_rxsoft(sc, tp);
   1133   1.1    itojun 		}
   1134   1.1    itojun 
   1135   1.1    itojun #if 0
   1136   1.1    itojun 		if (sc->sc_st_check) {
   1137   1.1    itojun 			sc->sc_st_check = 0;
   1138   1.1    itojun 			sci_stsoft(sc, tp);
   1139   1.1    itojun 		}
   1140   1.1    itojun #endif
   1141   1.1    itojun 
   1142   1.1    itojun 		if (sc->sc_tx_done) {
   1143   1.1    itojun 			sc->sc_tx_done = 0;
   1144   1.1    itojun 			sci_txsoft(sc, tp);
   1145   1.1    itojun 		}
   1146   1.1    itojun 	}
   1147   1.1    itojun 
   1148  1.12   thorpej #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS
   1149   1.1    itojun #ifdef __NO_SOFT_SERIAL_INTERRUPT
   1150   1.1    itojun 	splx(s);
   1151   1.1    itojun #endif
   1152   1.1    itojun #endif
   1153   1.1    itojun }
   1154   1.1    itojun 
   1155   1.1    itojun int
   1156  1.18       uch sciintr(void *arg)
   1157   1.1    itojun {
   1158   1.1    itojun 	struct sci_softc *sc = arg;
   1159   1.1    itojun 	u_char *put, *end;
   1160   1.1    itojun 	u_int cc;
   1161   1.1    itojun 	u_short ssr;
   1162   1.1    itojun 
   1163  1.40   thorpej 	if (!device_is_active(&sc->sc_dev))
   1164   1.1    itojun 		return (0);
   1165   1.1    itojun 
   1166   1.1    itojun 	end = sc->sc_ebuf;
   1167   1.1    itojun 	put = sc->sc_rbput;
   1168   1.1    itojun 	cc = sc->sc_rbavail;
   1169   1.1    itojun 
   1170  1.26   msaitoh 	do {
   1171  1.26   msaitoh 		ssr = SHREG_SCSSR;
   1172  1.26   msaitoh 		if (ISSET(ssr, SCSSR_FER)) {
   1173  1.26   msaitoh 			SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_PER | SCSSR_FER);
   1174   1.1    itojun #if defined(DDB) || defined(KGDB)
   1175  1.23   msaitoh #ifdef SH4
   1176  1.26   msaitoh 			if ((SHREG_SCSPTR & SCSPTR_SPB0DT) != 0) {
   1177  1.16   msaitoh #else
   1178  1.26   msaitoh 			if ((SHREG_SCSPDR & SCSPDR_SCP0DT) != 0) {
   1179  1.16   msaitoh #endif
   1180   1.1    itojun #ifdef DDB
   1181  1.26   msaitoh 				if (ISSET(sc->sc_hwflags, SCI_HW_CONSOLE)) {
   1182  1.26   msaitoh 					console_debugger();
   1183  1.26   msaitoh 				}
   1184   1.1    itojun #endif
   1185   1.1    itojun #ifdef KGDB
   1186  1.26   msaitoh 				if (ISSET(sc->sc_hwflags, SCI_HW_KGDB)) {
   1187  1.26   msaitoh 					kgdb_connect(1);
   1188  1.26   msaitoh 				}
   1189  1.26   msaitoh #endif
   1190  1.16   msaitoh 			}
   1191  1.26   msaitoh #endif /* DDB || KGDB */
   1192   1.6   msaitoh 		}
   1193  1.26   msaitoh 		if ((SHREG_SCSSR & SCSSR_RDRF) != 0) {
   1194  1.26   msaitoh 			if (cc > 0) {
   1195  1.26   msaitoh 				put[0] = SHREG_SCRDR;
   1196  1.26   msaitoh 				put[1] = SHREG_SCSSR & 0x00ff;
   1197  1.26   msaitoh 
   1198  1.26   msaitoh 				put += 2;
   1199  1.26   msaitoh 				if (put >= end)
   1200  1.26   msaitoh 					put = sc->sc_rbuf;
   1201  1.26   msaitoh 				cc--;
   1202  1.26   msaitoh 			}
   1203   1.6   msaitoh 
   1204   1.9   msaitoh 			SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_FER | SCSSR_PER |
   1205  1.26   msaitoh 			    SCSSR_RDRF);
   1206   1.6   msaitoh 
   1207  1.26   msaitoh 				/*
   1208  1.26   msaitoh 				 * Current string of incoming characters ended because
   1209  1.26   msaitoh 				 * no more data was available or we ran out of space.
   1210  1.26   msaitoh 				 * Schedule a receive event if any data was received.
   1211  1.26   msaitoh 				 * If we're out of space, turn off receive interrupts.
   1212  1.26   msaitoh 				 */
   1213  1.26   msaitoh 			sc->sc_rbput = put;
   1214  1.26   msaitoh 			sc->sc_rbavail = cc;
   1215  1.26   msaitoh 			if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED))
   1216  1.26   msaitoh 				sc->sc_rx_ready = 1;
   1217   1.1    itojun 
   1218  1.26   msaitoh 				/*
   1219  1.26   msaitoh 				 * See if we are in danger of overflowing a buffer. If
   1220  1.26   msaitoh 				 * so, use hardware flow control to ease the pressure.
   1221  1.26   msaitoh 				 */
   1222  1.26   msaitoh 			if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) &&
   1223  1.26   msaitoh 			    cc < sc->sc_r_hiwat) {
   1224  1.26   msaitoh 				SET(sc->sc_rx_flags, RX_IBUF_BLOCKED);
   1225   1.1    itojun #if 0
   1226  1.26   msaitoh 				sci_hwiflow(sc);
   1227   1.1    itojun #endif
   1228  1.26   msaitoh 			}
   1229   1.1    itojun 
   1230  1.26   msaitoh 				/*
   1231  1.26   msaitoh 				 * If we're out of space, disable receive interrupts
   1232  1.26   msaitoh 				 * until the queue has drained a bit.
   1233  1.26   msaitoh 				 */
   1234  1.26   msaitoh 			if (!cc) {
   1235  1.26   msaitoh 				SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED);
   1236  1.26   msaitoh 				SHREG_SCSCR &= ~SCSCR_RIE;
   1237  1.26   msaitoh 			}
   1238  1.26   msaitoh 		} else {
   1239  1.26   msaitoh 			if (SHREG_SCSSR & SCSSR_RDRF) {
   1240  1.26   msaitoh 				SHREG_SCSCR &= ~(SCSCR_TIE | SCSCR_RIE);
   1241  1.26   msaitoh 				delay(10);
   1242  1.26   msaitoh 				SHREG_SCSCR |= SCSCR_TIE | SCSCR_RIE;
   1243  1.26   msaitoh 				continue;
   1244  1.26   msaitoh 			}
   1245   1.6   msaitoh 		}
   1246  1.26   msaitoh 	} while (SHREG_SCSSR & SCSSR_RDRF);
   1247  1.25       uch 
   1248   1.1    itojun #if 0
   1249   1.6   msaitoh 	msr = bus_space_read_1(iot, ioh, sci_msr);
   1250   1.6   msaitoh 	delta = msr ^ sc->sc_msr;
   1251   1.6   msaitoh 	sc->sc_msr = msr;
   1252   1.6   msaitoh 	if (ISSET(delta, sc->sc_msr_mask)) {
   1253   1.6   msaitoh 		SET(sc->sc_msr_delta, delta);
   1254   1.1    itojun 
   1255   1.6   msaitoh 		/*
   1256   1.6   msaitoh 		 * Pulse-per-second clock signal on edge of DCD?
   1257   1.6   msaitoh 		 */
   1258   1.6   msaitoh 		if (ISSET(delta, sc->sc_ppsmask)) {
   1259   1.6   msaitoh 			struct timeval tv;
   1260   1.6   msaitoh 			if (ISSET(msr, sc->sc_ppsmask) ==
   1261   1.6   msaitoh 			    sc->sc_ppsassert) {
   1262   1.6   msaitoh 				/* XXX nanotime() */
   1263   1.6   msaitoh 				microtime(&tv);
   1264   1.6   msaitoh 				TIMEVAL_TO_TIMESPEC(&tv,
   1265   1.6   msaitoh 						    &sc->ppsinfo.assert_timestamp);
   1266   1.6   msaitoh 				if (sc->ppsparam.mode & PPS_OFFSETASSERT) {
   1267   1.6   msaitoh 					timespecadd(&sc->ppsinfo.assert_timestamp,
   1268   1.1    itojun 						    &sc->ppsparam.assert_offset,
   1269   1.1    itojun 						    &sc->ppsinfo.assert_timestamp);
   1270   1.6   msaitoh 					TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.assert_timestamp);
   1271   1.6   msaitoh 				}
   1272   1.1    itojun 
   1273   1.1    itojun #ifdef PPS_SYNC
   1274   1.6   msaitoh 				if (sc->ppsparam.mode & PPS_HARDPPSONASSERT)
   1275   1.6   msaitoh 					hardpps(&tv, tv.tv_usec);
   1276   1.1    itojun #endif
   1277   1.6   msaitoh 				sc->ppsinfo.assert_sequence++;
   1278   1.6   msaitoh 				sc->ppsinfo.current_mode =
   1279   1.6   msaitoh 					sc->ppsparam.mode;
   1280   1.6   msaitoh 
   1281   1.6   msaitoh 			} else if (ISSET(msr, sc->sc_ppsmask) ==
   1282   1.6   msaitoh 				   sc->sc_ppsclear) {
   1283   1.6   msaitoh 				/* XXX nanotime() */
   1284   1.6   msaitoh 				microtime(&tv);
   1285   1.6   msaitoh 				TIMEVAL_TO_TIMESPEC(&tv,
   1286   1.6   msaitoh 						    &sc->ppsinfo.clear_timestamp);
   1287   1.6   msaitoh 				if (sc->ppsparam.mode & PPS_OFFSETCLEAR) {
   1288   1.6   msaitoh 					timespecadd(&sc->ppsinfo.clear_timestamp,
   1289   1.1    itojun 						    &sc->ppsparam.clear_offset,
   1290   1.1    itojun 						    &sc->ppsinfo.clear_timestamp);
   1291   1.6   msaitoh 					TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.clear_timestamp);
   1292   1.6   msaitoh 				}
   1293   1.1    itojun 
   1294   1.1    itojun #ifdef PPS_SYNC
   1295   1.6   msaitoh 				if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR)
   1296   1.6   msaitoh 					hardpps(&tv, tv.tv_usec);
   1297   1.1    itojun #endif
   1298   1.6   msaitoh 				sc->ppsinfo.clear_sequence++;
   1299   1.6   msaitoh 				sc->ppsinfo.current_mode =
   1300   1.6   msaitoh 					sc->ppsparam.mode;
   1301   1.1    itojun 			}
   1302   1.6   msaitoh 		}
   1303   1.1    itojun 
   1304   1.6   msaitoh 		/*
   1305   1.6   msaitoh 		 * Stop output immediately if we lose the output
   1306   1.6   msaitoh 		 * flow control signal or carrier detect.
   1307   1.6   msaitoh 		 */
   1308   1.6   msaitoh 		if (ISSET(~msr, sc->sc_msr_mask)) {
   1309   1.6   msaitoh 			sc->sc_tbc = 0;
   1310   1.6   msaitoh 			sc->sc_heldtbc = 0;
   1311   1.1    itojun #ifdef SCI_DEBUG
   1312   1.6   msaitoh 			if (sci_debug)
   1313   1.6   msaitoh 				scistatus(sc, "sciintr  ");
   1314   1.1    itojun #endif
   1315   1.6   msaitoh 		}
   1316   1.1    itojun 
   1317   1.6   msaitoh 		sc->sc_st_check = 1;
   1318   1.6   msaitoh 	}
   1319   1.1    itojun #endif
   1320   1.1    itojun 
   1321   1.1    itojun 	/*
   1322   1.1    itojun 	 * Done handling any receive interrupts. See if data can be
   1323   1.1    itojun 	 * transmitted as well. Schedule tx done event if no data left
   1324   1.1    itojun 	 * and tty was marked busy.
   1325   1.1    itojun 	 */
   1326   1.1    itojun 	if ((SHREG_SCSSR & SCSSR_TDRE) != 0) {
   1327   1.1    itojun 		/*
   1328   1.1    itojun 		 * If we've delayed a parameter change, do it now, and restart
   1329   1.1    itojun 		 * output.
   1330   1.1    itojun 		 */
   1331   1.1    itojun 		if (sc->sc_heldchange) {
   1332   1.1    itojun 			sc->sc_heldchange = 0;
   1333   1.1    itojun 			sc->sc_tbc = sc->sc_heldtbc;
   1334   1.1    itojun 			sc->sc_heldtbc = 0;
   1335   1.1    itojun 		}
   1336   1.1    itojun 
   1337   1.1    itojun 		/* Output the next chunk of the contiguous buffer, if any. */
   1338   1.1    itojun 		if (sc->sc_tbc > 0) {
   1339  1.11   msaitoh 			sci_putc(*(sc->sc_tba));
   1340   1.1    itojun 			sc->sc_tba++;
   1341   1.1    itojun 			sc->sc_tbc--;
   1342   1.1    itojun 		} else {
   1343   1.1    itojun 			/* Disable transmit completion interrupts if necessary. */
   1344   1.1    itojun #if 0
   1345   1.1    itojun 			if (ISSET(sc->sc_ier, IER_ETXRDY))
   1346   1.1    itojun #endif
   1347   1.1    itojun 				SHREG_SCSCR &= ~SCSCR_TIE;
   1348   1.1    itojun 
   1349   1.1    itojun 			if (sc->sc_tx_busy) {
   1350   1.1    itojun 				sc->sc_tx_busy = 0;
   1351   1.1    itojun 				sc->sc_tx_done = 1;
   1352   1.1    itojun 			}
   1353   1.1    itojun 		}
   1354   1.1    itojun 	}
   1355   1.1    itojun 
   1356   1.1    itojun 	/* Wake up the poller. */
   1357  1.12   thorpej #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
   1358   1.1    itojun 	softintr_schedule(sc->sc_si);
   1359   1.1    itojun #else
   1360   1.1    itojun #ifndef __NO_SOFT_SERIAL_INTERRUPT
   1361   1.1    itojun 	setsoftserial();
   1362   1.1    itojun #else
   1363   1.1    itojun 	if (!sci_softintr_scheduled) {
   1364   1.1    itojun 		sci_softintr_scheduled = 1;
   1365   1.7   thorpej 		callout_reset(&sci_soft_ch, 1, scisoft, 1);
   1366   1.1    itojun 	}
   1367   1.1    itojun #endif
   1368   1.1    itojun #endif
   1369   1.1    itojun 
   1370   1.1    itojun #if NRND > 0 && defined(RND_SCI)
   1371   1.1    itojun 	rnd_add_uint32(&sc->rnd_source, iir | lsr);
   1372   1.1    itojun #endif
   1373   1.1    itojun 
   1374   1.1    itojun 	return (1);
   1375   1.1    itojun }
   1376   1.1    itojun 
   1377   1.1    itojun void
   1378   1.1    itojun scicnprobe(cp)
   1379   1.1    itojun 	struct consdev *cp;
   1380   1.1    itojun {
   1381   1.1    itojun 	int maj;
   1382   1.1    itojun 
   1383   1.1    itojun 	/* locate the major number */
   1384  1.28   gehenna 	maj = cdevsw_lookup_major(&sci_cdevsw);
   1385   1.1    itojun 
   1386   1.1    itojun 	/* Initialize required fields. */
   1387   1.1    itojun 	cp->cn_dev = makedev(maj, 0);
   1388   1.4   msaitoh #ifdef SCICONSOLE
   1389   1.4   msaitoh 	cp->cn_pri = CN_REMOTE;
   1390   1.4   msaitoh #else
   1391   1.1    itojun 	cp->cn_pri = CN_NORMAL;
   1392   1.4   msaitoh #endif
   1393   1.1    itojun }
   1394   1.1    itojun 
   1395   1.1    itojun void
   1396  1.18       uch scicninit(struct consdev *cp)
   1397   1.1    itojun {
   1398   1.1    itojun 
   1399   1.6   msaitoh 	InitializeSci(scicn_speed);
   1400   1.8   msaitoh 	sciisconsole = 1;
   1401   1.1    itojun }
   1402   1.1    itojun 
   1403   1.1    itojun int
   1404  1.18       uch scicngetc(dev_t dev)
   1405   1.1    itojun {
   1406   1.1    itojun 	int c;
   1407   1.1    itojun 	int s;
   1408   1.1    itojun 
   1409   1.1    itojun 	s = splserial();
   1410   1.1    itojun 	c = sci_getc();
   1411   1.1    itojun 	splx(s);
   1412   1.1    itojun 
   1413   1.1    itojun 	return (c);
   1414   1.1    itojun }
   1415   1.1    itojun 
   1416   1.1    itojun void
   1417  1.18       uch scicnputc(dev_t dev, int c)
   1418   1.1    itojun {
   1419   1.1    itojun 	int s;
   1420   1.1    itojun 
   1421   1.1    itojun 	s = splserial();
   1422  1.11   msaitoh 	sci_putc((u_char)c);
   1423   1.1    itojun 	splx(s);
   1424   1.1    itojun }
   1425