sci.c revision 1.41.2.2 1 1.41.2.2 elad /* $NetBSD: sci.c,v 1.41.2.2 2006/03/08 00:43:13 elad Exp $ */
2 1.41.2.2 elad
3 1.41.2.2 elad /*-
4 1.41.2.2 elad * Copyright (C) 1999 T.Horiuchi and SAITOH Masanobu. All rights reserved.
5 1.41.2.2 elad *
6 1.41.2.2 elad * Redistribution and use in source and binary forms, with or without
7 1.41.2.2 elad * modification, are permitted provided that the following conditions
8 1.41.2.2 elad * are met:
9 1.41.2.2 elad * 1. Redistributions of source code must retain the above copyright
10 1.41.2.2 elad * notice, this list of conditions and the following disclaimer.
11 1.41.2.2 elad * 2. Redistributions in binary form must reproduce the above copyright
12 1.41.2.2 elad * notice, this list of conditions and the following disclaimer in the
13 1.41.2.2 elad * documentation and/or other materials provided with the distribution.
14 1.41.2.2 elad * 3. The name of the author may not be used to endorse or promote products
15 1.41.2.2 elad * derived from this software without specific prior written permission.
16 1.41.2.2 elad *
17 1.41.2.2 elad * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 1.41.2.2 elad * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 1.41.2.2 elad * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 1.41.2.2 elad * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 1.41.2.2 elad * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 1.41.2.2 elad * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 1.41.2.2 elad * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 1.41.2.2 elad * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 1.41.2.2 elad * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 1.41.2.2 elad * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 1.41.2.2 elad */
28 1.41.2.2 elad
29 1.41.2.2 elad /*-
30 1.41.2.2 elad * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
31 1.41.2.2 elad * All rights reserved.
32 1.41.2.2 elad *
33 1.41.2.2 elad * This code is derived from software contributed to The NetBSD Foundation
34 1.41.2.2 elad * by Charles M. Hannum.
35 1.41.2.2 elad *
36 1.41.2.2 elad * Redistribution and use in source and binary forms, with or without
37 1.41.2.2 elad * modification, are permitted provided that the following conditions
38 1.41.2.2 elad * are met:
39 1.41.2.2 elad * 1. Redistributions of source code must retain the above copyright
40 1.41.2.2 elad * notice, this list of conditions and the following disclaimer.
41 1.41.2.2 elad * 2. Redistributions in binary form must reproduce the above copyright
42 1.41.2.2 elad * notice, this list of conditions and the following disclaimer in the
43 1.41.2.2 elad * documentation and/or other materials provided with the distribution.
44 1.41.2.2 elad * 3. All advertising materials mentioning features or use of this software
45 1.41.2.2 elad * must display the following acknowledgement:
46 1.41.2.2 elad * This product includes software developed by the NetBSD
47 1.41.2.2 elad * Foundation, Inc. and its contributors.
48 1.41.2.2 elad * 4. Neither the name of The NetBSD Foundation nor the names of its
49 1.41.2.2 elad * contributors may be used to endorse or promote products derived
50 1.41.2.2 elad * from this software without specific prior written permission.
51 1.41.2.2 elad *
52 1.41.2.2 elad * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
53 1.41.2.2 elad * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
54 1.41.2.2 elad * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
55 1.41.2.2 elad * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
56 1.41.2.2 elad * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
57 1.41.2.2 elad * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
58 1.41.2.2 elad * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
59 1.41.2.2 elad * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
60 1.41.2.2 elad * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
61 1.41.2.2 elad * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
62 1.41.2.2 elad * POSSIBILITY OF SUCH DAMAGE.
63 1.41.2.2 elad */
64 1.41.2.2 elad
65 1.41.2.2 elad /*
66 1.41.2.2 elad * Copyright (c) 1991 The Regents of the University of California.
67 1.41.2.2 elad * All rights reserved.
68 1.41.2.2 elad *
69 1.41.2.2 elad * Redistribution and use in source and binary forms, with or without
70 1.41.2.2 elad * modification, are permitted provided that the following conditions
71 1.41.2.2 elad * are met:
72 1.41.2.2 elad * 1. Redistributions of source code must retain the above copyright
73 1.41.2.2 elad * notice, this list of conditions and the following disclaimer.
74 1.41.2.2 elad * 2. Redistributions in binary form must reproduce the above copyright
75 1.41.2.2 elad * notice, this list of conditions and the following disclaimer in the
76 1.41.2.2 elad * documentation and/or other materials provided with the distribution.
77 1.41.2.2 elad * 3. Neither the name of the University nor the names of its contributors
78 1.41.2.2 elad * may be used to endorse or promote products derived from this software
79 1.41.2.2 elad * without specific prior written permission.
80 1.41.2.2 elad *
81 1.41.2.2 elad * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
82 1.41.2.2 elad * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
83 1.41.2.2 elad * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
84 1.41.2.2 elad * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
85 1.41.2.2 elad * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
86 1.41.2.2 elad * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
87 1.41.2.2 elad * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
88 1.41.2.2 elad * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
89 1.41.2.2 elad * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
90 1.41.2.2 elad * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
91 1.41.2.2 elad * SUCH DAMAGE.
92 1.41.2.2 elad *
93 1.41.2.2 elad * @(#)com.c 7.5 (Berkeley) 5/16/91
94 1.41.2.2 elad */
95 1.41.2.2 elad
96 1.41.2.2 elad /*
97 1.41.2.2 elad * SH internal serial driver
98 1.41.2.2 elad *
99 1.41.2.2 elad * This code is derived from both z8530tty.c and com.c
100 1.41.2.2 elad */
101 1.41.2.2 elad
102 1.41.2.2 elad #include <sys/cdefs.h>
103 1.41.2.2 elad __KERNEL_RCSID(0, "$NetBSD: sci.c,v 1.41.2.2 2006/03/08 00:43:13 elad Exp $");
104 1.41.2.2 elad
105 1.41.2.2 elad #include "opt_kgdb.h"
106 1.41.2.2 elad #include "opt_sci.h"
107 1.41.2.2 elad
108 1.41.2.2 elad #include <sys/param.h>
109 1.41.2.2 elad #include <sys/systm.h>
110 1.41.2.2 elad #include <sys/tty.h>
111 1.41.2.2 elad #include <sys/proc.h>
112 1.41.2.2 elad #include <sys/conf.h>
113 1.41.2.2 elad #include <sys/file.h>
114 1.41.2.2 elad #include <sys/syslog.h>
115 1.41.2.2 elad #include <sys/kernel.h>
116 1.41.2.2 elad #include <sys/device.h>
117 1.41.2.2 elad #include <sys/malloc.h>
118 1.41.2.2 elad
119 1.41.2.2 elad #include <dev/cons.h>
120 1.41.2.2 elad
121 1.41.2.2 elad #include <sh3/clock.h>
122 1.41.2.2 elad #include <sh3/scireg.h>
123 1.41.2.2 elad #include <sh3/pfcreg.h>
124 1.41.2.2 elad #include <sh3/tmureg.h>
125 1.41.2.2 elad #include <sh3/exception.h>
126 1.41.2.2 elad #include <machine/intr.h>
127 1.41.2.2 elad
128 1.41.2.2 elad static void scistart(struct tty *);
129 1.41.2.2 elad static int sciparam(struct tty *, struct termios *);
130 1.41.2.2 elad
131 1.41.2.2 elad void scicnprobe(struct consdev *);
132 1.41.2.2 elad void scicninit(struct consdev *);
133 1.41.2.2 elad void scicnputc(dev_t, int);
134 1.41.2.2 elad int scicngetc(dev_t);
135 1.41.2.2 elad void scicnpoolc(dev_t, int);
136 1.41.2.2 elad int sciintr(void *);
137 1.41.2.2 elad
138 1.41.2.2 elad struct sci_softc {
139 1.41.2.2 elad struct device sc_dev; /* boilerplate */
140 1.41.2.2 elad struct tty *sc_tty;
141 1.41.2.2 elad void *sc_si;
142 1.41.2.2 elad struct callout sc_diag_ch;
143 1.41.2.2 elad
144 1.41.2.2 elad #if 0
145 1.41.2.2 elad bus_space_tag_t sc_iot; /* ISA i/o space identifier */
146 1.41.2.2 elad bus_space_handle_t sc_ioh; /* ISA io handle */
147 1.41.2.2 elad
148 1.41.2.2 elad int sc_drq;
149 1.41.2.2 elad
150 1.41.2.2 elad int sc_frequency;
151 1.41.2.2 elad #endif
152 1.41.2.2 elad
153 1.41.2.2 elad u_int sc_overflows,
154 1.41.2.2 elad sc_floods,
155 1.41.2.2 elad sc_errors; /* number of retries so far */
156 1.41.2.2 elad u_char sc_status[7]; /* copy of registers */
157 1.41.2.2 elad
158 1.41.2.2 elad int sc_hwflags;
159 1.41.2.2 elad int sc_swflags;
160 1.41.2.2 elad u_int sc_fifolen; /* XXX always 0? */
161 1.41.2.2 elad
162 1.41.2.2 elad u_int sc_r_hiwat,
163 1.41.2.2 elad sc_r_lowat;
164 1.41.2.2 elad u_char *volatile sc_rbget,
165 1.41.2.2 elad *volatile sc_rbput;
166 1.41.2.2 elad volatile u_int sc_rbavail;
167 1.41.2.2 elad u_char *sc_rbuf,
168 1.41.2.2 elad *sc_ebuf;
169 1.41.2.2 elad
170 1.41.2.2 elad u_char *sc_tba; /* transmit buffer address */
171 1.41.2.2 elad u_int sc_tbc, /* transmit byte count */
172 1.41.2.2 elad sc_heldtbc;
173 1.41.2.2 elad
174 1.41.2.2 elad volatile u_char sc_rx_flags, /* receiver blocked */
175 1.41.2.2 elad #define RX_TTY_BLOCKED 0x01
176 1.41.2.2 elad #define RX_TTY_OVERFLOWED 0x02
177 1.41.2.2 elad #define RX_IBUF_BLOCKED 0x04
178 1.41.2.2 elad #define RX_IBUF_OVERFLOWED 0x08
179 1.41.2.2 elad #define RX_ANY_BLOCK 0x0f
180 1.41.2.2 elad sc_tx_busy, /* working on an output chunk */
181 1.41.2.2 elad sc_tx_done, /* done with one output chunk */
182 1.41.2.2 elad sc_tx_stopped, /* H/W level stop (lost CTS) */
183 1.41.2.2 elad sc_st_check, /* got a status interrupt */
184 1.41.2.2 elad sc_rx_ready;
185 1.41.2.2 elad
186 1.41.2.2 elad volatile u_char sc_heldchange;
187 1.41.2.2 elad };
188 1.41.2.2 elad
189 1.41.2.2 elad /* controller driver configuration */
190 1.41.2.2 elad static int sci_match(struct device *, struct cfdata *, void *);
191 1.41.2.2 elad static void sci_attach(struct device *, struct device *, void *);
192 1.41.2.2 elad
193 1.41.2.2 elad void sci_break(struct sci_softc *, int);
194 1.41.2.2 elad void sci_iflush(struct sci_softc *);
195 1.41.2.2 elad
196 1.41.2.2 elad #define integrate static inline
197 1.41.2.2 elad #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
198 1.41.2.2 elad void scisoft(void *);
199 1.41.2.2 elad #else
200 1.41.2.2 elad #ifndef __NO_SOFT_SERIAL_INTERRUPT
201 1.41.2.2 elad void scisoft(void);
202 1.41.2.2 elad #else
203 1.41.2.2 elad void scisoft(void *);
204 1.41.2.2 elad #endif
205 1.41.2.2 elad #endif
206 1.41.2.2 elad integrate void sci_rxsoft(struct sci_softc *, struct tty *);
207 1.41.2.2 elad integrate void sci_txsoft(struct sci_softc *, struct tty *);
208 1.41.2.2 elad integrate void sci_stsoft(struct sci_softc *, struct tty *);
209 1.41.2.2 elad integrate void sci_schedrx(struct sci_softc *);
210 1.41.2.2 elad void scidiag(void *);
211 1.41.2.2 elad
212 1.41.2.2 elad #define SCIUNIT_MASK 0x7ffff
213 1.41.2.2 elad #define SCIDIALOUT_MASK 0x80000
214 1.41.2.2 elad
215 1.41.2.2 elad #define SCIUNIT(x) (minor(x) & SCIUNIT_MASK)
216 1.41.2.2 elad #define SCIDIALOUT(x) (minor(x) & SCIDIALOUT_MASK)
217 1.41.2.2 elad
218 1.41.2.2 elad /* Hardware flag masks */
219 1.41.2.2 elad #define SCI_HW_NOIEN 0x01
220 1.41.2.2 elad #define SCI_HW_FIFO 0x02
221 1.41.2.2 elad #define SCI_HW_FLOW 0x08
222 1.41.2.2 elad #define SCI_HW_DEV_OK 0x20
223 1.41.2.2 elad #define SCI_HW_CONSOLE 0x40
224 1.41.2.2 elad #define SCI_HW_KGDB 0x80
225 1.41.2.2 elad
226 1.41.2.2 elad /* Buffer size for character buffer */
227 1.41.2.2 elad #define SCI_RING_SIZE 2048
228 1.41.2.2 elad
229 1.41.2.2 elad /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */
230 1.41.2.2 elad u_int sci_rbuf_hiwat = (SCI_RING_SIZE * 1) / 4;
231 1.41.2.2 elad u_int sci_rbuf_lowat = (SCI_RING_SIZE * 3) / 4;
232 1.41.2.2 elad
233 1.41.2.2 elad #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
234 1.41.2.2 elad int sciconscflag = CONMODE;
235 1.41.2.2 elad int sciisconsole = 0;
236 1.41.2.2 elad
237 1.41.2.2 elad #ifdef SCICN_SPEED
238 1.41.2.2 elad int scicn_speed = SCICN_SPEED;
239 1.41.2.2 elad #else
240 1.41.2.2 elad int scicn_speed = 9600;
241 1.41.2.2 elad #endif
242 1.41.2.2 elad
243 1.41.2.2 elad #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */
244 1.41.2.2 elad
245 1.41.2.2 elad #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS
246 1.41.2.2 elad #ifdef __NO_SOFT_SERIAL_INTERRUPT
247 1.41.2.2 elad volatile int sci_softintr_scheduled;
248 1.41.2.2 elad struct callout sci_soft_ch = CALLOUT_INITIALIZER;
249 1.41.2.2 elad #endif
250 1.41.2.2 elad #endif
251 1.41.2.2 elad
252 1.41.2.2 elad u_int sci_rbuf_size = SCI_RING_SIZE;
253 1.41.2.2 elad
254 1.41.2.2 elad CFATTACH_DECL(sci, sizeof(struct sci_softc),
255 1.41.2.2 elad sci_match, sci_attach, NULL, NULL);
256 1.41.2.2 elad
257 1.41.2.2 elad extern struct cfdriver sci_cd;
258 1.41.2.2 elad
259 1.41.2.2 elad static int sci_attached;
260 1.41.2.2 elad
261 1.41.2.2 elad dev_type_open(sciopen);
262 1.41.2.2 elad dev_type_close(sciclose);
263 1.41.2.2 elad dev_type_read(sciread);
264 1.41.2.2 elad dev_type_write(sciwrite);
265 1.41.2.2 elad dev_type_ioctl(sciioctl);
266 1.41.2.2 elad dev_type_stop(scistop);
267 1.41.2.2 elad dev_type_tty(scitty);
268 1.41.2.2 elad dev_type_poll(scipoll);
269 1.41.2.2 elad
270 1.41.2.2 elad const struct cdevsw sci_cdevsw = {
271 1.41.2.2 elad sciopen, sciclose, sciread, sciwrite, sciioctl,
272 1.41.2.2 elad scistop, scitty, scipoll, nommap, ttykqfilter, D_TTY
273 1.41.2.2 elad };
274 1.41.2.2 elad
275 1.41.2.2 elad void InitializeSci (unsigned int);
276 1.41.2.2 elad
277 1.41.2.2 elad /*
278 1.41.2.2 elad * following functions are debugging prupose only
279 1.41.2.2 elad */
280 1.41.2.2 elad #define CR 0x0D
281 1.41.2.2 elad #define I2C_ADRS (*(volatile unsigned int *)0xa8000000)
282 1.41.2.2 elad #define USART_ON (unsigned int)~0x08
283 1.41.2.2 elad
284 1.41.2.2 elad void sci_putc(unsigned char);
285 1.41.2.2 elad unsigned char sci_getc(void);
286 1.41.2.2 elad int SciErrCheck(void);
287 1.41.2.2 elad
288 1.41.2.2 elad /*
289 1.41.2.2 elad * InitializeSci
290 1.41.2.2 elad * : unsigned int bps;
291 1.41.2.2 elad * : SCI(Serial Communication Interface)
292 1.41.2.2 elad */
293 1.41.2.2 elad
294 1.41.2.2 elad void
295 1.41.2.2 elad InitializeSci(unsigned int bps)
296 1.41.2.2 elad {
297 1.41.2.2 elad
298 1.41.2.2 elad /* Initialize SCR */
299 1.41.2.2 elad SHREG_SCSCR = 0x00;
300 1.41.2.2 elad
301 1.41.2.2 elad /* Serial Mode Register */
302 1.41.2.2 elad SHREG_SCSMR = 0x00; /* Async,8bit,NonParity,Even,1Stop,NoMulti */
303 1.41.2.2 elad
304 1.41.2.2 elad /* Bit Rate Register */
305 1.41.2.2 elad SHREG_SCBRR = divrnd(sh_clock_get_pclock(), 32 * bps) - 1;
306 1.41.2.2 elad
307 1.41.2.2 elad /*
308 1.41.2.2 elad * wait 1mSec, because Send/Recv must begin 1 bit period after
309 1.41.2.2 elad * BRR is set.
310 1.41.2.2 elad */
311 1.41.2.2 elad delay(1000);
312 1.41.2.2 elad
313 1.41.2.2 elad /* Send permission, Receive permission ON */
314 1.41.2.2 elad SHREG_SCSCR = SCSCR_TE | SCSCR_RE;
315 1.41.2.2 elad
316 1.41.2.2 elad /* Serial Status Register */
317 1.41.2.2 elad SHREG_SCSSR &= SCSSR_TDRE; /* Clear Status */
318 1.41.2.2 elad
319 1.41.2.2 elad #if 0
320 1.41.2.2 elad I2C_ADRS &= ~0x08; /* enable RS-232C */
321 1.41.2.2 elad #endif
322 1.41.2.2 elad }
323 1.41.2.2 elad
324 1.41.2.2 elad
325 1.41.2.2 elad /*
326 1.41.2.2 elad * sci_putc
327 1.41.2.2 elad * : unsigned char c;
328 1.41.2.2 elad */
329 1.41.2.2 elad void
330 1.41.2.2 elad sci_putc(unsigned char c)
331 1.41.2.2 elad {
332 1.41.2.2 elad
333 1.41.2.2 elad /* wait for ready */
334 1.41.2.2 elad while ((SHREG_SCSSR & SCSSR_TDRE) == 0)
335 1.41.2.2 elad ;
336 1.41.2.2 elad
337 1.41.2.2 elad /* write send data to send register */
338 1.41.2.2 elad SHREG_SCTDR = c;
339 1.41.2.2 elad
340 1.41.2.2 elad /* clear ready flag */
341 1.41.2.2 elad SHREG_SCSSR &= ~SCSSR_TDRE;
342 1.41.2.2 elad }
343 1.41.2.2 elad
344 1.41.2.2 elad /*
345 1.41.2.2 elad * : SciErrCheck
346 1.41.2.2 elad * 0x20 = over run
347 1.41.2.2 elad * 0x10 = frame error
348 1.41.2.2 elad * 0x80 = parity error
349 1.41.2.2 elad */
350 1.41.2.2 elad int
351 1.41.2.2 elad SciErrCheck(void)
352 1.41.2.2 elad {
353 1.41.2.2 elad
354 1.41.2.2 elad return(SHREG_SCSSR & (SCSSR_ORER | SCSSR_FER | SCSSR_PER));
355 1.41.2.2 elad }
356 1.41.2.2 elad
357 1.41.2.2 elad /*
358 1.41.2.2 elad * sci_getc
359 1.41.2.2 elad */
360 1.41.2.2 elad unsigned char
361 1.41.2.2 elad sci_getc(void)
362 1.41.2.2 elad {
363 1.41.2.2 elad unsigned char c, err_c;
364 1.41.2.2 elad
365 1.41.2.2 elad while (((err_c = SHREG_SCSSR)
366 1.41.2.2 elad & (SCSSR_RDRF | SCSSR_ORER | SCSSR_FER | SCSSR_PER)) == 0)
367 1.41.2.2 elad ;
368 1.41.2.2 elad if ((err_c & (SCSSR_ORER | SCSSR_FER | SCSSR_PER)) != 0) {
369 1.41.2.2 elad SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_FER | SCSSR_PER);
370 1.41.2.2 elad return(err_c |= 0x80);
371 1.41.2.2 elad }
372 1.41.2.2 elad
373 1.41.2.2 elad c = SHREG_SCRDR;
374 1.41.2.2 elad
375 1.41.2.2 elad SHREG_SCSSR &= ~SCSSR_RDRF;
376 1.41.2.2 elad
377 1.41.2.2 elad return(c);
378 1.41.2.2 elad }
379 1.41.2.2 elad
380 1.41.2.2 elad static int
381 1.41.2.2 elad sci_match(struct device *parent, struct cfdata *cfp, void *aux)
382 1.41.2.2 elad {
383 1.41.2.2 elad
384 1.41.2.2 elad if (strcmp(cfp->cf_name, "sci") || sci_attached)
385 1.41.2.2 elad return 0;
386 1.41.2.2 elad
387 1.41.2.2 elad return 1;
388 1.41.2.2 elad }
389 1.41.2.2 elad
390 1.41.2.2 elad static void
391 1.41.2.2 elad sci_attach(struct device *parent, struct device *self, void *aux)
392 1.41.2.2 elad {
393 1.41.2.2 elad struct sci_softc *sc = (struct sci_softc *)self;
394 1.41.2.2 elad struct tty *tp;
395 1.41.2.2 elad
396 1.41.2.2 elad sci_attached = 1;
397 1.41.2.2 elad
398 1.41.2.2 elad sc->sc_hwflags = 0; /* XXX */
399 1.41.2.2 elad sc->sc_swflags = 0; /* XXX */
400 1.41.2.2 elad sc->sc_fifolen = 0; /* XXX */
401 1.41.2.2 elad
402 1.41.2.2 elad if (sciisconsole) {
403 1.41.2.2 elad SET(sc->sc_hwflags, SCI_HW_CONSOLE);
404 1.41.2.2 elad SET(sc->sc_swflags, TIOCFLAG_SOFTCAR);
405 1.41.2.2 elad printf("\n%s: console\n", sc->sc_dev.dv_xname);
406 1.41.2.2 elad } else {
407 1.41.2.2 elad InitializeSci(9600);
408 1.41.2.2 elad printf("\n");
409 1.41.2.2 elad }
410 1.41.2.2 elad
411 1.41.2.2 elad callout_init(&sc->sc_diag_ch);
412 1.41.2.2 elad
413 1.41.2.2 elad intc_intr_establish(SH_INTEVT_SCI_ERI, IST_LEVEL, IPL_SERIAL, sciintr,
414 1.41.2.2 elad sc);
415 1.41.2.2 elad intc_intr_establish(SH_INTEVT_SCI_RXI, IST_LEVEL, IPL_SERIAL, sciintr,
416 1.41.2.2 elad sc);
417 1.41.2.2 elad intc_intr_establish(SH_INTEVT_SCI_TXI, IST_LEVEL, IPL_SERIAL, sciintr,
418 1.41.2.2 elad sc);
419 1.41.2.2 elad intc_intr_establish(SH_INTEVT_SCI_TEI, IST_LEVEL, IPL_SERIAL, sciintr,
420 1.41.2.2 elad sc);
421 1.41.2.2 elad
422 1.41.2.2 elad #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
423 1.41.2.2 elad sc->sc_si = softintr_establish(IPL_SOFTSERIAL, scisoft, sc);
424 1.41.2.2 elad #endif
425 1.41.2.2 elad SET(sc->sc_hwflags, SCI_HW_DEV_OK);
426 1.41.2.2 elad
427 1.41.2.2 elad tp = ttymalloc();
428 1.41.2.2 elad tp->t_oproc = scistart;
429 1.41.2.2 elad tp->t_param = sciparam;
430 1.41.2.2 elad tp->t_hwiflow = NULL;
431 1.41.2.2 elad
432 1.41.2.2 elad sc->sc_tty = tp;
433 1.41.2.2 elad sc->sc_rbuf = malloc(sci_rbuf_size << 1, M_DEVBUF, M_NOWAIT);
434 1.41.2.2 elad if (sc->sc_rbuf == NULL) {
435 1.41.2.2 elad printf("%s: unable to allocate ring buffer\n",
436 1.41.2.2 elad sc->sc_dev.dv_xname);
437 1.41.2.2 elad return;
438 1.41.2.2 elad }
439 1.41.2.2 elad sc->sc_ebuf = sc->sc_rbuf + (sci_rbuf_size << 1);
440 1.41.2.2 elad
441 1.41.2.2 elad tty_attach(tp);
442 1.41.2.2 elad }
443 1.41.2.2 elad
444 1.41.2.2 elad /*
445 1.41.2.2 elad * Start or restart transmission.
446 1.41.2.2 elad */
447 1.41.2.2 elad static void
448 1.41.2.2 elad scistart(struct tty *tp)
449 1.41.2.2 elad {
450 1.41.2.2 elad struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(tp->t_dev)];
451 1.41.2.2 elad int s;
452 1.41.2.2 elad
453 1.41.2.2 elad s = spltty();
454 1.41.2.2 elad if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP))
455 1.41.2.2 elad goto out;
456 1.41.2.2 elad if (sc->sc_tx_stopped)
457 1.41.2.2 elad goto out;
458 1.41.2.2 elad
459 1.41.2.2 elad if (tp->t_outq.c_cc <= tp->t_lowat) {
460 1.41.2.2 elad if (ISSET(tp->t_state, TS_ASLEEP)) {
461 1.41.2.2 elad CLR(tp->t_state, TS_ASLEEP);
462 1.41.2.2 elad wakeup(&tp->t_outq);
463 1.41.2.2 elad }
464 1.41.2.2 elad selwakeup(&tp->t_wsel);
465 1.41.2.2 elad if (tp->t_outq.c_cc == 0)
466 1.41.2.2 elad goto out;
467 1.41.2.2 elad }
468 1.41.2.2 elad
469 1.41.2.2 elad /* Grab the first contiguous region of buffer space. */
470 1.41.2.2 elad {
471 1.41.2.2 elad u_char *tba;
472 1.41.2.2 elad int tbc;
473 1.41.2.2 elad
474 1.41.2.2 elad tba = tp->t_outq.c_cf;
475 1.41.2.2 elad tbc = ndqb(&tp->t_outq, 0);
476 1.41.2.2 elad
477 1.41.2.2 elad (void)splserial();
478 1.41.2.2 elad
479 1.41.2.2 elad sc->sc_tba = tba;
480 1.41.2.2 elad sc->sc_tbc = tbc;
481 1.41.2.2 elad }
482 1.41.2.2 elad
483 1.41.2.2 elad SET(tp->t_state, TS_BUSY);
484 1.41.2.2 elad sc->sc_tx_busy = 1;
485 1.41.2.2 elad
486 1.41.2.2 elad /* Enable transmit completion interrupts if necessary. */
487 1.41.2.2 elad SHREG_SCSCR |= SCSCR_TIE | SCSCR_RIE;
488 1.41.2.2 elad
489 1.41.2.2 elad /* Output the first byte of the contiguous buffer. */
490 1.41.2.2 elad {
491 1.41.2.2 elad if (sc->sc_tbc > 0) {
492 1.41.2.2 elad sci_putc(*(sc->sc_tba));
493 1.41.2.2 elad sc->sc_tba++;
494 1.41.2.2 elad sc->sc_tbc--;
495 1.41.2.2 elad }
496 1.41.2.2 elad }
497 1.41.2.2 elad out:
498 1.41.2.2 elad splx(s);
499 1.41.2.2 elad return;
500 1.41.2.2 elad }
501 1.41.2.2 elad
502 1.41.2.2 elad /*
503 1.41.2.2 elad * Set SCI tty parameters from termios.
504 1.41.2.2 elad * XXX - Should just copy the whole termios after
505 1.41.2.2 elad * making sure all the changes could be done.
506 1.41.2.2 elad */
507 1.41.2.2 elad static int
508 1.41.2.2 elad sciparam(struct tty *tp, struct termios *t)
509 1.41.2.2 elad {
510 1.41.2.2 elad struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(tp->t_dev)];
511 1.41.2.2 elad int ospeed = t->c_ospeed;
512 1.41.2.2 elad int s;
513 1.41.2.2 elad
514 1.41.2.2 elad if (!device_is_active(&sc->sc_dev))
515 1.41.2.2 elad return (EIO);
516 1.41.2.2 elad
517 1.41.2.2 elad /* Check requested parameters. */
518 1.41.2.2 elad if (ospeed < 0)
519 1.41.2.2 elad return (EINVAL);
520 1.41.2.2 elad if (t->c_ispeed && t->c_ispeed != t->c_ospeed)
521 1.41.2.2 elad return (EINVAL);
522 1.41.2.2 elad
523 1.41.2.2 elad /*
524 1.41.2.2 elad * For the console, always force CLOCAL and !HUPCL, so that the port
525 1.41.2.2 elad * is always active.
526 1.41.2.2 elad */
527 1.41.2.2 elad if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) ||
528 1.41.2.2 elad ISSET(sc->sc_hwflags, SCI_HW_CONSOLE)) {
529 1.41.2.2 elad SET(t->c_cflag, CLOCAL);
530 1.41.2.2 elad CLR(t->c_cflag, HUPCL);
531 1.41.2.2 elad }
532 1.41.2.2 elad
533 1.41.2.2 elad /*
534 1.41.2.2 elad * If there were no changes, don't do anything. This avoids dropping
535 1.41.2.2 elad * input and improves performance when all we did was frob things like
536 1.41.2.2 elad * VMIN and VTIME.
537 1.41.2.2 elad */
538 1.41.2.2 elad if (tp->t_ospeed == t->c_ospeed &&
539 1.41.2.2 elad tp->t_cflag == t->c_cflag)
540 1.41.2.2 elad return (0);
541 1.41.2.2 elad
542 1.41.2.2 elad #if 0
543 1.41.2.2 elad /* XXX (msaitoh) */
544 1.41.2.2 elad lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag);
545 1.41.2.2 elad #endif
546 1.41.2.2 elad
547 1.41.2.2 elad s = splserial();
548 1.41.2.2 elad
549 1.41.2.2 elad /*
550 1.41.2.2 elad * Set the FIFO threshold based on the receive speed.
551 1.41.2.2 elad *
552 1.41.2.2 elad * * If it's a low speed, it's probably a mouse or some other
553 1.41.2.2 elad * interactive device, so set the threshold low.
554 1.41.2.2 elad * * If it's a high speed, trim the trigger level down to prevent
555 1.41.2.2 elad * overflows.
556 1.41.2.2 elad * * Otherwise set it a bit higher.
557 1.41.2.2 elad */
558 1.41.2.2 elad #if 0
559 1.41.2.2 elad /* XXX (msaitoh) */
560 1.41.2.2 elad if (ISSET(sc->sc_hwflags, SCI_HW_HAYESP))
561 1.41.2.2 elad sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8;
562 1.41.2.2 elad else if (ISSET(sc->sc_hwflags, SCI_HW_FIFO))
563 1.41.2.2 elad sc->sc_fifo = FIFO_ENABLE |
564 1.41.2.2 elad (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 :
565 1.41.2.2 elad t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4);
566 1.41.2.2 elad else
567 1.41.2.2 elad sc->sc_fifo = 0;
568 1.41.2.2 elad #endif
569 1.41.2.2 elad
570 1.41.2.2 elad /* And copy to tty. */
571 1.41.2.2 elad tp->t_ispeed = 0;
572 1.41.2.2 elad tp->t_ospeed = t->c_ospeed;
573 1.41.2.2 elad tp->t_cflag = t->c_cflag;
574 1.41.2.2 elad
575 1.41.2.2 elad if (!sc->sc_heldchange) {
576 1.41.2.2 elad if (sc->sc_tx_busy) {
577 1.41.2.2 elad sc->sc_heldtbc = sc->sc_tbc;
578 1.41.2.2 elad sc->sc_tbc = 0;
579 1.41.2.2 elad sc->sc_heldchange = 1;
580 1.41.2.2 elad }
581 1.41.2.2 elad #if 0
582 1.41.2.2 elad /* XXX (msaitoh) */
583 1.41.2.2 elad else
584 1.41.2.2 elad sci_loadchannelregs(sc);
585 1.41.2.2 elad #endif
586 1.41.2.2 elad }
587 1.41.2.2 elad
588 1.41.2.2 elad if (!ISSET(t->c_cflag, CHWFLOW)) {
589 1.41.2.2 elad /* Disable the high water mark. */
590 1.41.2.2 elad sc->sc_r_hiwat = 0;
591 1.41.2.2 elad sc->sc_r_lowat = 0;
592 1.41.2.2 elad if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) {
593 1.41.2.2 elad CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
594 1.41.2.2 elad sci_schedrx(sc);
595 1.41.2.2 elad }
596 1.41.2.2 elad } else {
597 1.41.2.2 elad sc->sc_r_hiwat = sci_rbuf_hiwat;
598 1.41.2.2 elad sc->sc_r_lowat = sci_rbuf_lowat;
599 1.41.2.2 elad }
600 1.41.2.2 elad
601 1.41.2.2 elad splx(s);
602 1.41.2.2 elad
603 1.41.2.2 elad #ifdef SCI_DEBUG
604 1.41.2.2 elad if (sci_debug)
605 1.41.2.2 elad scistatus(sc, "sciparam ");
606 1.41.2.2 elad #endif
607 1.41.2.2 elad
608 1.41.2.2 elad if (!ISSET(t->c_cflag, CHWFLOW)) {
609 1.41.2.2 elad if (sc->sc_tx_stopped) {
610 1.41.2.2 elad sc->sc_tx_stopped = 0;
611 1.41.2.2 elad scistart(tp);
612 1.41.2.2 elad }
613 1.41.2.2 elad }
614 1.41.2.2 elad
615 1.41.2.2 elad return (0);
616 1.41.2.2 elad }
617 1.41.2.2 elad
618 1.41.2.2 elad void
619 1.41.2.2 elad sci_iflush(struct sci_softc *sc)
620 1.41.2.2 elad {
621 1.41.2.2 elad unsigned char err_c;
622 1.41.2.2 elad volatile unsigned char c;
623 1.41.2.2 elad
624 1.41.2.2 elad if (((err_c = SHREG_SCSSR)
625 1.41.2.2 elad & (SCSSR_RDRF | SCSSR_ORER | SCSSR_FER | SCSSR_PER)) != 0) {
626 1.41.2.2 elad
627 1.41.2.2 elad if ((err_c & (SCSSR_ORER | SCSSR_FER | SCSSR_PER)) != 0) {
628 1.41.2.2 elad SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_FER | SCSSR_PER);
629 1.41.2.2 elad return;
630 1.41.2.2 elad }
631 1.41.2.2 elad
632 1.41.2.2 elad c = SHREG_SCRDR;
633 1.41.2.2 elad
634 1.41.2.2 elad SHREG_SCSSR &= ~SCSSR_RDRF;
635 1.41.2.2 elad }
636 1.41.2.2 elad }
637 1.41.2.2 elad
638 1.41.2.2 elad int
639 1.41.2.2 elad sciopen(dev_t dev, int flag, int mode, struct lwp *l)
640 1.41.2.2 elad {
641 1.41.2.2 elad int unit = SCIUNIT(dev);
642 1.41.2.2 elad struct sci_softc *sc;
643 1.41.2.2 elad struct tty *tp;
644 1.41.2.2 elad int s, s2;
645 1.41.2.2 elad int error;
646 1.41.2.2 elad
647 1.41.2.2 elad if (unit >= sci_cd.cd_ndevs)
648 1.41.2.2 elad return (ENXIO);
649 1.41.2.2 elad sc = sci_cd.cd_devs[unit];
650 1.41.2.2 elad if (sc == 0 || !ISSET(sc->sc_hwflags, SCI_HW_DEV_OK) ||
651 1.41.2.2 elad sc->sc_rbuf == NULL)
652 1.41.2.2 elad return (ENXIO);
653 1.41.2.2 elad
654 1.41.2.2 elad if (!device_is_active(&sc->sc_dev))
655 1.41.2.2 elad return (ENXIO);
656 1.41.2.2 elad
657 1.41.2.2 elad #ifdef KGDB
658 1.41.2.2 elad /*
659 1.41.2.2 elad * If this is the kgdb port, no other use is permitted.
660 1.41.2.2 elad */
661 1.41.2.2 elad if (ISSET(sc->sc_hwflags, SCI_HW_KGDB))
662 1.41.2.2 elad return (EBUSY);
663 1.41.2.2 elad #endif
664 1.41.2.2 elad
665 1.41.2.2 elad tp = sc->sc_tty;
666 1.41.2.2 elad
667 1.41.2.2 elad if (ISSET(tp->t_state, TS_ISOPEN) &&
668 1.41.2.2 elad ISSET(tp->t_state, TS_XCLUDE) &&
669 1.41.2.2 elad generic_authorize(l->l_proc->p_cred, KAUTH_GENERIC_ISSUSER, &l->l_proc->p_acflag) != 0)
670 1.41.2.2 elad return (EBUSY);
671 1.41.2.2 elad
672 1.41.2.2 elad s = spltty();
673 1.41.2.2 elad
674 1.41.2.2 elad /*
675 1.41.2.2 elad * Do the following iff this is a first open.
676 1.41.2.2 elad */
677 1.41.2.2 elad if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
678 1.41.2.2 elad struct termios t;
679 1.41.2.2 elad
680 1.41.2.2 elad tp->t_dev = dev;
681 1.41.2.2 elad
682 1.41.2.2 elad s2 = splserial();
683 1.41.2.2 elad
684 1.41.2.2 elad /* Turn on interrupts. */
685 1.41.2.2 elad SHREG_SCSCR |= SCSCR_TIE | SCSCR_RIE;
686 1.41.2.2 elad
687 1.41.2.2 elad splx(s2);
688 1.41.2.2 elad
689 1.41.2.2 elad /*
690 1.41.2.2 elad * Initialize the termios status to the defaults. Add in the
691 1.41.2.2 elad * sticky bits from TIOCSFLAGS.
692 1.41.2.2 elad */
693 1.41.2.2 elad t.c_ispeed = 0;
694 1.41.2.2 elad if (ISSET(sc->sc_hwflags, SCI_HW_CONSOLE)) {
695 1.41.2.2 elad t.c_ospeed = scicn_speed;
696 1.41.2.2 elad t.c_cflag = sciconscflag;
697 1.41.2.2 elad } else {
698 1.41.2.2 elad t.c_ospeed = TTYDEF_SPEED;
699 1.41.2.2 elad t.c_cflag = TTYDEF_CFLAG;
700 1.41.2.2 elad }
701 1.41.2.2 elad if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL))
702 1.41.2.2 elad SET(t.c_cflag, CLOCAL);
703 1.41.2.2 elad if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS))
704 1.41.2.2 elad SET(t.c_cflag, CRTSCTS);
705 1.41.2.2 elad if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF))
706 1.41.2.2 elad SET(t.c_cflag, MDMBUF);
707 1.41.2.2 elad /* Make sure sciparam() will do something. */
708 1.41.2.2 elad tp->t_ospeed = 0;
709 1.41.2.2 elad (void) sciparam(tp, &t);
710 1.41.2.2 elad tp->t_iflag = TTYDEF_IFLAG;
711 1.41.2.2 elad tp->t_oflag = TTYDEF_OFLAG;
712 1.41.2.2 elad tp->t_lflag = TTYDEF_LFLAG;
713 1.41.2.2 elad ttychars(tp);
714 1.41.2.2 elad ttsetwater(tp);
715 1.41.2.2 elad
716 1.41.2.2 elad s2 = splserial();
717 1.41.2.2 elad
718 1.41.2.2 elad /* Clear the input ring, and unblock. */
719 1.41.2.2 elad sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf;
720 1.41.2.2 elad sc->sc_rbavail = sci_rbuf_size;
721 1.41.2.2 elad sci_iflush(sc);
722 1.41.2.2 elad CLR(sc->sc_rx_flags, RX_ANY_BLOCK);
723 1.41.2.2 elad #if 0
724 1.41.2.2 elad /* XXX (msaitoh) */
725 1.41.2.2 elad sci_hwiflow(sc);
726 1.41.2.2 elad #endif
727 1.41.2.2 elad
728 1.41.2.2 elad #ifdef SCI_DEBUG
729 1.41.2.2 elad if (sci_debug)
730 1.41.2.2 elad scistatus(sc, "sciopen ");
731 1.41.2.2 elad #endif
732 1.41.2.2 elad
733 1.41.2.2 elad splx(s2);
734 1.41.2.2 elad }
735 1.41.2.2 elad
736 1.41.2.2 elad splx(s);
737 1.41.2.2 elad
738 1.41.2.2 elad error = ttyopen(tp, SCIDIALOUT(dev), ISSET(flag, O_NONBLOCK));
739 1.41.2.2 elad if (error)
740 1.41.2.2 elad goto bad;
741 1.41.2.2 elad
742 1.41.2.2 elad error = (*tp->t_linesw->l_open)(dev, tp);
743 1.41.2.2 elad if (error)
744 1.41.2.2 elad goto bad;
745 1.41.2.2 elad
746 1.41.2.2 elad return (0);
747 1.41.2.2 elad
748 1.41.2.2 elad bad:
749 1.41.2.2 elad
750 1.41.2.2 elad return (error);
751 1.41.2.2 elad }
752 1.41.2.2 elad
753 1.41.2.2 elad int
754 1.41.2.2 elad sciclose(dev_t dev, int flag, int mode, struct lwp *l)
755 1.41.2.2 elad {
756 1.41.2.2 elad struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
757 1.41.2.2 elad struct tty *tp = sc->sc_tty;
758 1.41.2.2 elad
759 1.41.2.2 elad /* XXX This is for cons.c. */
760 1.41.2.2 elad if (!ISSET(tp->t_state, TS_ISOPEN))
761 1.41.2.2 elad return (0);
762 1.41.2.2 elad
763 1.41.2.2 elad (*tp->t_linesw->l_close)(tp, flag);
764 1.41.2.2 elad ttyclose(tp);
765 1.41.2.2 elad
766 1.41.2.2 elad if (!device_is_active(&sc->sc_dev))
767 1.41.2.2 elad return (0);
768 1.41.2.2 elad
769 1.41.2.2 elad return (0);
770 1.41.2.2 elad }
771 1.41.2.2 elad
772 1.41.2.2 elad int
773 1.41.2.2 elad sciread(dev_t dev, struct uio *uio, int flag)
774 1.41.2.2 elad {
775 1.41.2.2 elad struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
776 1.41.2.2 elad struct tty *tp = sc->sc_tty;
777 1.41.2.2 elad
778 1.41.2.2 elad return ((*tp->t_linesw->l_read)(tp, uio, flag));
779 1.41.2.2 elad }
780 1.41.2.2 elad
781 1.41.2.2 elad int
782 1.41.2.2 elad sciwrite(dev_t dev, struct uio *uio, int flag)
783 1.41.2.2 elad {
784 1.41.2.2 elad struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
785 1.41.2.2 elad struct tty *tp = sc->sc_tty;
786 1.41.2.2 elad
787 1.41.2.2 elad return ((*tp->t_linesw->l_write)(tp, uio, flag));
788 1.41.2.2 elad }
789 1.41.2.2 elad
790 1.41.2.2 elad int
791 1.41.2.2 elad scipoll(dev_t dev, int events, struct lwp *l)
792 1.41.2.2 elad {
793 1.41.2.2 elad struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
794 1.41.2.2 elad struct tty *tp = sc->sc_tty;
795 1.41.2.2 elad
796 1.41.2.2 elad return ((*tp->t_linesw->l_poll)(tp, events, l));
797 1.41.2.2 elad }
798 1.41.2.2 elad
799 1.41.2.2 elad struct tty *
800 1.41.2.2 elad scitty(dev_t dev)
801 1.41.2.2 elad {
802 1.41.2.2 elad struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
803 1.41.2.2 elad struct tty *tp = sc->sc_tty;
804 1.41.2.2 elad
805 1.41.2.2 elad return (tp);
806 1.41.2.2 elad }
807 1.41.2.2 elad
808 1.41.2.2 elad int
809 1.41.2.2 elad sciioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct lwp *l)
810 1.41.2.2 elad {
811 1.41.2.2 elad struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
812 1.41.2.2 elad struct tty *tp = sc->sc_tty;
813 1.41.2.2 elad int error;
814 1.41.2.2 elad int s;
815 1.41.2.2 elad
816 1.41.2.2 elad if (!device_is_active(&sc->sc_dev))
817 1.41.2.2 elad return (EIO);
818 1.41.2.2 elad
819 1.41.2.2 elad error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l);
820 1.41.2.2 elad if (error != EPASSTHROUGH)
821 1.41.2.2 elad return (error);
822 1.41.2.2 elad
823 1.41.2.2 elad error = ttioctl(tp, cmd, data, flag, l);
824 1.41.2.2 elad if (error != EPASSTHROUGH)
825 1.41.2.2 elad return (error);
826 1.41.2.2 elad
827 1.41.2.2 elad error = 0;
828 1.41.2.2 elad
829 1.41.2.2 elad s = splserial();
830 1.41.2.2 elad
831 1.41.2.2 elad switch (cmd) {
832 1.41.2.2 elad case TIOCSBRK:
833 1.41.2.2 elad sci_break(sc, 1);
834 1.41.2.2 elad break;
835 1.41.2.2 elad
836 1.41.2.2 elad case TIOCCBRK:
837 1.41.2.2 elad sci_break(sc, 0);
838 1.41.2.2 elad break;
839 1.41.2.2 elad
840 1.41.2.2 elad case TIOCGFLAGS:
841 1.41.2.2 elad *(int *)data = sc->sc_swflags;
842 1.41.2.2 elad break;
843 1.41.2.2 elad
844 1.41.2.2 elad case TIOCSFLAGS:
845 1.41.2.2 elad error = generic_authorize(l->l_proc->p_cred, KAUTH_GENERIC_ISSUSER, &l->l_proc->p_acflag);
846 1.41.2.2 elad if (error)
847 1.41.2.2 elad break;
848 1.41.2.2 elad sc->sc_swflags = *(int *)data;
849 1.41.2.2 elad break;
850 1.41.2.2 elad
851 1.41.2.2 elad default:
852 1.41.2.2 elad error = EPASSTHROUGH;
853 1.41.2.2 elad break;
854 1.41.2.2 elad }
855 1.41.2.2 elad
856 1.41.2.2 elad splx(s);
857 1.41.2.2 elad
858 1.41.2.2 elad return (error);
859 1.41.2.2 elad }
860 1.41.2.2 elad
861 1.41.2.2 elad integrate void
862 1.41.2.2 elad sci_schedrx(struct sci_softc *sc)
863 1.41.2.2 elad {
864 1.41.2.2 elad
865 1.41.2.2 elad sc->sc_rx_ready = 1;
866 1.41.2.2 elad
867 1.41.2.2 elad /* Wake up the poller. */
868 1.41.2.2 elad #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
869 1.41.2.2 elad softintr_schedule(sc->sc_si);
870 1.41.2.2 elad #else
871 1.41.2.2 elad #ifndef __NO_SOFT_SERIAL_INTERRUPT
872 1.41.2.2 elad setsoftserial();
873 1.41.2.2 elad #else
874 1.41.2.2 elad if (!sci_softintr_scheduled) {
875 1.41.2.2 elad sci_softintr_scheduled = 1;
876 1.41.2.2 elad callout_reset(&sci_soft_ch, 1, scisoft, NULL);
877 1.41.2.2 elad }
878 1.41.2.2 elad #endif
879 1.41.2.2 elad #endif
880 1.41.2.2 elad }
881 1.41.2.2 elad
882 1.41.2.2 elad void
883 1.41.2.2 elad sci_break(struct sci_softc *sc, int onoff)
884 1.41.2.2 elad {
885 1.41.2.2 elad
886 1.41.2.2 elad if (onoff)
887 1.41.2.2 elad SHREG_SCSSR &= ~SCSSR_TDRE;
888 1.41.2.2 elad else
889 1.41.2.2 elad SHREG_SCSSR |= SCSSR_TDRE;
890 1.41.2.2 elad
891 1.41.2.2 elad #if 0 /* XXX */
892 1.41.2.2 elad if (!sc->sc_heldchange) {
893 1.41.2.2 elad if (sc->sc_tx_busy) {
894 1.41.2.2 elad sc->sc_heldtbc = sc->sc_tbc;
895 1.41.2.2 elad sc->sc_tbc = 0;
896 1.41.2.2 elad sc->sc_heldchange = 1;
897 1.41.2.2 elad } else
898 1.41.2.2 elad sci_loadchannelregs(sc);
899 1.41.2.2 elad }
900 1.41.2.2 elad #endif
901 1.41.2.2 elad }
902 1.41.2.2 elad
903 1.41.2.2 elad /*
904 1.41.2.2 elad * Stop output, e.g., for ^S or output flush.
905 1.41.2.2 elad */
906 1.41.2.2 elad void
907 1.41.2.2 elad scistop(struct tty *tp, int flag)
908 1.41.2.2 elad {
909 1.41.2.2 elad struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(tp->t_dev)];
910 1.41.2.2 elad int s;
911 1.41.2.2 elad
912 1.41.2.2 elad s = splserial();
913 1.41.2.2 elad if (ISSET(tp->t_state, TS_BUSY)) {
914 1.41.2.2 elad /* Stop transmitting at the next chunk. */
915 1.41.2.2 elad sc->sc_tbc = 0;
916 1.41.2.2 elad sc->sc_heldtbc = 0;
917 1.41.2.2 elad if (!ISSET(tp->t_state, TS_TTSTOP))
918 1.41.2.2 elad SET(tp->t_state, TS_FLUSH);
919 1.41.2.2 elad }
920 1.41.2.2 elad splx(s);
921 1.41.2.2 elad }
922 1.41.2.2 elad
923 1.41.2.2 elad void
924 1.41.2.2 elad scidiag(void *arg)
925 1.41.2.2 elad {
926 1.41.2.2 elad struct sci_softc *sc = arg;
927 1.41.2.2 elad int overflows, floods;
928 1.41.2.2 elad int s;
929 1.41.2.2 elad
930 1.41.2.2 elad s = splserial();
931 1.41.2.2 elad overflows = sc->sc_overflows;
932 1.41.2.2 elad sc->sc_overflows = 0;
933 1.41.2.2 elad floods = sc->sc_floods;
934 1.41.2.2 elad sc->sc_floods = 0;
935 1.41.2.2 elad sc->sc_errors = 0;
936 1.41.2.2 elad splx(s);
937 1.41.2.2 elad
938 1.41.2.2 elad log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n",
939 1.41.2.2 elad sc->sc_dev.dv_xname,
940 1.41.2.2 elad overflows, overflows == 1 ? "" : "s",
941 1.41.2.2 elad floods, floods == 1 ? "" : "s");
942 1.41.2.2 elad }
943 1.41.2.2 elad
944 1.41.2.2 elad integrate void
945 1.41.2.2 elad sci_rxsoft(struct sci_softc *sc, struct tty *tp)
946 1.41.2.2 elad {
947 1.41.2.2 elad int (*rint)(int, struct tty *) = tp->t_linesw->l_rint;
948 1.41.2.2 elad u_char *get, *end;
949 1.41.2.2 elad u_int cc, scc;
950 1.41.2.2 elad u_char ssr;
951 1.41.2.2 elad int code;
952 1.41.2.2 elad int s;
953 1.41.2.2 elad
954 1.41.2.2 elad end = sc->sc_ebuf;
955 1.41.2.2 elad get = sc->sc_rbget;
956 1.41.2.2 elad scc = cc = sci_rbuf_size - sc->sc_rbavail;
957 1.41.2.2 elad
958 1.41.2.2 elad if (cc == sci_rbuf_size) {
959 1.41.2.2 elad sc->sc_floods++;
960 1.41.2.2 elad if (sc->sc_errors++ == 0)
961 1.41.2.2 elad callout_reset(&sc->sc_diag_ch, 60 * hz, scidiag, sc);
962 1.41.2.2 elad }
963 1.41.2.2 elad
964 1.41.2.2 elad while (cc) {
965 1.41.2.2 elad code = get[0];
966 1.41.2.2 elad ssr = get[1];
967 1.41.2.2 elad if (ISSET(ssr, SCSSR_FER | SCSSR_PER)) {
968 1.41.2.2 elad if (ISSET(ssr, SCSSR_FER))
969 1.41.2.2 elad SET(code, TTY_FE);
970 1.41.2.2 elad if (ISSET(ssr, SCSSR_PER))
971 1.41.2.2 elad SET(code, TTY_PE);
972 1.41.2.2 elad }
973 1.41.2.2 elad if ((*rint)(code, tp) == -1) {
974 1.41.2.2 elad /*
975 1.41.2.2 elad * The line discipline's buffer is out of space.
976 1.41.2.2 elad */
977 1.41.2.2 elad if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) {
978 1.41.2.2 elad /*
979 1.41.2.2 elad * We're either not using flow control, or the
980 1.41.2.2 elad * line discipline didn't tell us to block for
981 1.41.2.2 elad * some reason. Either way, we have no way to
982 1.41.2.2 elad * know when there's more space available, so
983 1.41.2.2 elad * just drop the rest of the data.
984 1.41.2.2 elad */
985 1.41.2.2 elad get += cc << 1;
986 1.41.2.2 elad if (get >= end)
987 1.41.2.2 elad get -= sci_rbuf_size << 1;
988 1.41.2.2 elad cc = 0;
989 1.41.2.2 elad } else {
990 1.41.2.2 elad /*
991 1.41.2.2 elad * Don't schedule any more receive processing
992 1.41.2.2 elad * until the line discipline tells us there's
993 1.41.2.2 elad * space available (through scihwiflow()).
994 1.41.2.2 elad * Leave the rest of the data in the input
995 1.41.2.2 elad * buffer.
996 1.41.2.2 elad */
997 1.41.2.2 elad SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
998 1.41.2.2 elad }
999 1.41.2.2 elad break;
1000 1.41.2.2 elad }
1001 1.41.2.2 elad get += 2;
1002 1.41.2.2 elad if (get >= end)
1003 1.41.2.2 elad get = sc->sc_rbuf;
1004 1.41.2.2 elad cc--;
1005 1.41.2.2 elad }
1006 1.41.2.2 elad
1007 1.41.2.2 elad if (cc != scc) {
1008 1.41.2.2 elad sc->sc_rbget = get;
1009 1.41.2.2 elad s = splserial();
1010 1.41.2.2 elad cc = sc->sc_rbavail += scc - cc;
1011 1.41.2.2 elad /* Buffers should be ok again, release possible block. */
1012 1.41.2.2 elad if (cc >= sc->sc_r_lowat) {
1013 1.41.2.2 elad if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) {
1014 1.41.2.2 elad CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED);
1015 1.41.2.2 elad SHREG_SCSCR |= SCSCR_RIE;
1016 1.41.2.2 elad }
1017 1.41.2.2 elad #if 0
1018 1.41.2.2 elad if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) {
1019 1.41.2.2 elad CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED);
1020 1.41.2.2 elad sci_hwiflow(sc);
1021 1.41.2.2 elad }
1022 1.41.2.2 elad #endif
1023 1.41.2.2 elad }
1024 1.41.2.2 elad splx(s);
1025 1.41.2.2 elad }
1026 1.41.2.2 elad }
1027 1.41.2.2 elad
1028 1.41.2.2 elad integrate void
1029 1.41.2.2 elad sci_txsoft(sc, tp)
1030 1.41.2.2 elad struct sci_softc *sc;
1031 1.41.2.2 elad struct tty *tp;
1032 1.41.2.2 elad {
1033 1.41.2.2 elad
1034 1.41.2.2 elad CLR(tp->t_state, TS_BUSY);
1035 1.41.2.2 elad if (ISSET(tp->t_state, TS_FLUSH))
1036 1.41.2.2 elad CLR(tp->t_state, TS_FLUSH);
1037 1.41.2.2 elad else
1038 1.41.2.2 elad ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf));
1039 1.41.2.2 elad (*tp->t_linesw->l_start)(tp);
1040 1.41.2.2 elad }
1041 1.41.2.2 elad
1042 1.41.2.2 elad integrate void
1043 1.41.2.2 elad sci_stsoft(struct sci_softc *sc, struct tty *tp)
1044 1.41.2.2 elad {
1045 1.41.2.2 elad #if 0
1046 1.41.2.2 elad /* XXX (msaitoh) */
1047 1.41.2.2 elad u_char msr, delta;
1048 1.41.2.2 elad int s;
1049 1.41.2.2 elad
1050 1.41.2.2 elad s = splserial();
1051 1.41.2.2 elad msr = sc->sc_msr;
1052 1.41.2.2 elad delta = sc->sc_msr_delta;
1053 1.41.2.2 elad sc->sc_msr_delta = 0;
1054 1.41.2.2 elad splx(s);
1055 1.41.2.2 elad
1056 1.41.2.2 elad if (ISSET(delta, sc->sc_msr_dcd)) {
1057 1.41.2.2 elad /*
1058 1.41.2.2 elad * Inform the tty layer that carrier detect changed.
1059 1.41.2.2 elad */
1060 1.41.2.2 elad (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD));
1061 1.41.2.2 elad }
1062 1.41.2.2 elad
1063 1.41.2.2 elad if (ISSET(delta, sc->sc_msr_cts)) {
1064 1.41.2.2 elad /* Block or unblock output according to flow control. */
1065 1.41.2.2 elad if (ISSET(msr, sc->sc_msr_cts)) {
1066 1.41.2.2 elad sc->sc_tx_stopped = 0;
1067 1.41.2.2 elad (*tp->t_linesw->l_start)(tp);
1068 1.41.2.2 elad } else {
1069 1.41.2.2 elad sc->sc_tx_stopped = 1;
1070 1.41.2.2 elad }
1071 1.41.2.2 elad }
1072 1.41.2.2 elad
1073 1.41.2.2 elad #ifdef SCI_DEBUG
1074 1.41.2.2 elad if (sci_debug)
1075 1.41.2.2 elad scistatus(sc, "sci_stsoft");
1076 1.41.2.2 elad #endif
1077 1.41.2.2 elad #endif
1078 1.41.2.2 elad }
1079 1.41.2.2 elad
1080 1.41.2.2 elad #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
1081 1.41.2.2 elad void
1082 1.41.2.2 elad scisoft(void *arg)
1083 1.41.2.2 elad {
1084 1.41.2.2 elad struct sci_softc *sc = arg;
1085 1.41.2.2 elad struct tty *tp;
1086 1.41.2.2 elad
1087 1.41.2.2 elad if (!device_is_active(&sc->sc_dev))
1088 1.41.2.2 elad return;
1089 1.41.2.2 elad
1090 1.41.2.2 elad {
1091 1.41.2.2 elad #else
1092 1.41.2.2 elad void
1093 1.41.2.2 elad #ifndef __NO_SOFT_SERIAL_INTERRUPT
1094 1.41.2.2 elad scisoft()
1095 1.41.2.2 elad #else
1096 1.41.2.2 elad scisoft(void *arg)
1097 1.41.2.2 elad #endif
1098 1.41.2.2 elad {
1099 1.41.2.2 elad struct sci_softc *sc;
1100 1.41.2.2 elad struct tty *tp;
1101 1.41.2.2 elad int unit;
1102 1.41.2.2 elad #ifdef __NO_SOFT_SERIAL_INTERRUPT
1103 1.41.2.2 elad int s;
1104 1.41.2.2 elad
1105 1.41.2.2 elad s = splsoftserial();
1106 1.41.2.2 elad sci_softintr_scheduled = 0;
1107 1.41.2.2 elad #endif
1108 1.41.2.2 elad
1109 1.41.2.2 elad for (unit = 0; unit < sci_cd.cd_ndevs; unit++) {
1110 1.41.2.2 elad sc = sci_cd.cd_devs[unit];
1111 1.41.2.2 elad if (sc == NULL || !ISSET(sc->sc_hwflags, SCI_HW_DEV_OK))
1112 1.41.2.2 elad continue;
1113 1.41.2.2 elad
1114 1.41.2.2 elad if (!device_is_active(&sc->sc_dev))
1115 1.41.2.2 elad continue;
1116 1.41.2.2 elad
1117 1.41.2.2 elad tp = sc->sc_tty;
1118 1.41.2.2 elad if (tp == NULL)
1119 1.41.2.2 elad continue;
1120 1.41.2.2 elad if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0)
1121 1.41.2.2 elad continue;
1122 1.41.2.2 elad #endif
1123 1.41.2.2 elad tp = sc->sc_tty;
1124 1.41.2.2 elad
1125 1.41.2.2 elad if (sc->sc_rx_ready) {
1126 1.41.2.2 elad sc->sc_rx_ready = 0;
1127 1.41.2.2 elad sci_rxsoft(sc, tp);
1128 1.41.2.2 elad }
1129 1.41.2.2 elad
1130 1.41.2.2 elad #if 0
1131 1.41.2.2 elad if (sc->sc_st_check) {
1132 1.41.2.2 elad sc->sc_st_check = 0;
1133 1.41.2.2 elad sci_stsoft(sc, tp);
1134 1.41.2.2 elad }
1135 1.41.2.2 elad #endif
1136 1.41.2.2 elad
1137 1.41.2.2 elad if (sc->sc_tx_done) {
1138 1.41.2.2 elad sc->sc_tx_done = 0;
1139 1.41.2.2 elad sci_txsoft(sc, tp);
1140 1.41.2.2 elad }
1141 1.41.2.2 elad }
1142 1.41.2.2 elad
1143 1.41.2.2 elad #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS
1144 1.41.2.2 elad #ifdef __NO_SOFT_SERIAL_INTERRUPT
1145 1.41.2.2 elad splx(s);
1146 1.41.2.2 elad #endif
1147 1.41.2.2 elad #endif
1148 1.41.2.2 elad }
1149 1.41.2.2 elad
1150 1.41.2.2 elad int
1151 1.41.2.2 elad sciintr(void *arg)
1152 1.41.2.2 elad {
1153 1.41.2.2 elad struct sci_softc *sc = arg;
1154 1.41.2.2 elad u_char *put, *end;
1155 1.41.2.2 elad u_int cc;
1156 1.41.2.2 elad u_short ssr;
1157 1.41.2.2 elad
1158 1.41.2.2 elad if (!device_is_active(&sc->sc_dev))
1159 1.41.2.2 elad return (0);
1160 1.41.2.2 elad
1161 1.41.2.2 elad end = sc->sc_ebuf;
1162 1.41.2.2 elad put = sc->sc_rbput;
1163 1.41.2.2 elad cc = sc->sc_rbavail;
1164 1.41.2.2 elad
1165 1.41.2.2 elad do {
1166 1.41.2.2 elad ssr = SHREG_SCSSR;
1167 1.41.2.2 elad if (ISSET(ssr, SCSSR_FER)) {
1168 1.41.2.2 elad SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_PER | SCSSR_FER);
1169 1.41.2.2 elad #if defined(DDB) || defined(KGDB)
1170 1.41.2.2 elad #ifdef SH4
1171 1.41.2.2 elad if ((SHREG_SCSPTR & SCSPTR_SPB0DT) != 0) {
1172 1.41.2.2 elad #else
1173 1.41.2.2 elad if ((SHREG_SCSPDR & SCSPDR_SCP0DT) != 0) {
1174 1.41.2.2 elad #endif
1175 1.41.2.2 elad #ifdef DDB
1176 1.41.2.2 elad if (ISSET(sc->sc_hwflags, SCI_HW_CONSOLE)) {
1177 1.41.2.2 elad console_debugger();
1178 1.41.2.2 elad }
1179 1.41.2.2 elad #endif
1180 1.41.2.2 elad #ifdef KGDB
1181 1.41.2.2 elad if (ISSET(sc->sc_hwflags, SCI_HW_KGDB)) {
1182 1.41.2.2 elad kgdb_connect(1);
1183 1.41.2.2 elad }
1184 1.41.2.2 elad #endif
1185 1.41.2.2 elad }
1186 1.41.2.2 elad #endif /* DDB || KGDB */
1187 1.41.2.2 elad }
1188 1.41.2.2 elad if ((SHREG_SCSSR & SCSSR_RDRF) != 0) {
1189 1.41.2.2 elad if (cc > 0) {
1190 1.41.2.2 elad put[0] = SHREG_SCRDR;
1191 1.41.2.2 elad put[1] = SHREG_SCSSR & 0x00ff;
1192 1.41.2.2 elad
1193 1.41.2.2 elad put += 2;
1194 1.41.2.2 elad if (put >= end)
1195 1.41.2.2 elad put = sc->sc_rbuf;
1196 1.41.2.2 elad cc--;
1197 1.41.2.2 elad }
1198 1.41.2.2 elad
1199 1.41.2.2 elad SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_FER | SCSSR_PER |
1200 1.41.2.2 elad SCSSR_RDRF);
1201 1.41.2.2 elad
1202 1.41.2.2 elad /*
1203 1.41.2.2 elad * Current string of incoming characters ended because
1204 1.41.2.2 elad * no more data was available or we ran out of space.
1205 1.41.2.2 elad * Schedule a receive event if any data was received.
1206 1.41.2.2 elad * If we're out of space, turn off receive interrupts.
1207 1.41.2.2 elad */
1208 1.41.2.2 elad sc->sc_rbput = put;
1209 1.41.2.2 elad sc->sc_rbavail = cc;
1210 1.41.2.2 elad if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED))
1211 1.41.2.2 elad sc->sc_rx_ready = 1;
1212 1.41.2.2 elad
1213 1.41.2.2 elad /*
1214 1.41.2.2 elad * See if we are in danger of overflowing a buffer. If
1215 1.41.2.2 elad * so, use hardware flow control to ease the pressure.
1216 1.41.2.2 elad */
1217 1.41.2.2 elad if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) &&
1218 1.41.2.2 elad cc < sc->sc_r_hiwat) {
1219 1.41.2.2 elad SET(sc->sc_rx_flags, RX_IBUF_BLOCKED);
1220 1.41.2.2 elad #if 0
1221 1.41.2.2 elad sci_hwiflow(sc);
1222 1.41.2.2 elad #endif
1223 1.41.2.2 elad }
1224 1.41.2.2 elad
1225 1.41.2.2 elad /*
1226 1.41.2.2 elad * If we're out of space, disable receive interrupts
1227 1.41.2.2 elad * until the queue has drained a bit.
1228 1.41.2.2 elad */
1229 1.41.2.2 elad if (!cc) {
1230 1.41.2.2 elad SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED);
1231 1.41.2.2 elad SHREG_SCSCR &= ~SCSCR_RIE;
1232 1.41.2.2 elad }
1233 1.41.2.2 elad } else {
1234 1.41.2.2 elad if (SHREG_SCSSR & SCSSR_RDRF) {
1235 1.41.2.2 elad SHREG_SCSCR &= ~(SCSCR_TIE | SCSCR_RIE);
1236 1.41.2.2 elad delay(10);
1237 1.41.2.2 elad SHREG_SCSCR |= SCSCR_TIE | SCSCR_RIE;
1238 1.41.2.2 elad continue;
1239 1.41.2.2 elad }
1240 1.41.2.2 elad }
1241 1.41.2.2 elad } while (SHREG_SCSSR & SCSSR_RDRF);
1242 1.41.2.2 elad
1243 1.41.2.2 elad #if 0
1244 1.41.2.2 elad msr = bus_space_read_1(iot, ioh, sci_msr);
1245 1.41.2.2 elad delta = msr ^ sc->sc_msr;
1246 1.41.2.2 elad sc->sc_msr = msr;
1247 1.41.2.2 elad if (ISSET(delta, sc->sc_msr_mask)) {
1248 1.41.2.2 elad SET(sc->sc_msr_delta, delta);
1249 1.41.2.2 elad
1250 1.41.2.2 elad /*
1251 1.41.2.2 elad * Pulse-per-second clock signal on edge of DCD?
1252 1.41.2.2 elad */
1253 1.41.2.2 elad if (ISSET(delta, sc->sc_ppsmask)) {
1254 1.41.2.2 elad struct timeval tv;
1255 1.41.2.2 elad if (ISSET(msr, sc->sc_ppsmask) ==
1256 1.41.2.2 elad sc->sc_ppsassert) {
1257 1.41.2.2 elad /* XXX nanotime() */
1258 1.41.2.2 elad microtime(&tv);
1259 1.41.2.2 elad TIMEVAL_TO_TIMESPEC(&tv,
1260 1.41.2.2 elad &sc->ppsinfo.assert_timestamp);
1261 1.41.2.2 elad if (sc->ppsparam.mode & PPS_OFFSETASSERT) {
1262 1.41.2.2 elad timespecadd(&sc->ppsinfo.assert_timestamp,
1263 1.41.2.2 elad &sc->ppsparam.assert_offset,
1264 1.41.2.2 elad &sc->ppsinfo.assert_timestamp);
1265 1.41.2.2 elad TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.assert_timestamp);
1266 1.41.2.2 elad }
1267 1.41.2.2 elad
1268 1.41.2.2 elad #ifdef PPS_SYNC
1269 1.41.2.2 elad if (sc->ppsparam.mode & PPS_HARDPPSONASSERT)
1270 1.41.2.2 elad hardpps(&tv, tv.tv_usec);
1271 1.41.2.2 elad #endif
1272 1.41.2.2 elad sc->ppsinfo.assert_sequence++;
1273 1.41.2.2 elad sc->ppsinfo.current_mode =
1274 1.41.2.2 elad sc->ppsparam.mode;
1275 1.41.2.2 elad
1276 1.41.2.2 elad } else if (ISSET(msr, sc->sc_ppsmask) ==
1277 1.41.2.2 elad sc->sc_ppsclear) {
1278 1.41.2.2 elad /* XXX nanotime() */
1279 1.41.2.2 elad microtime(&tv);
1280 1.41.2.2 elad TIMEVAL_TO_TIMESPEC(&tv,
1281 1.41.2.2 elad &sc->ppsinfo.clear_timestamp);
1282 1.41.2.2 elad if (sc->ppsparam.mode & PPS_OFFSETCLEAR) {
1283 1.41.2.2 elad timespecadd(&sc->ppsinfo.clear_timestamp,
1284 1.41.2.2 elad &sc->ppsparam.clear_offset,
1285 1.41.2.2 elad &sc->ppsinfo.clear_timestamp);
1286 1.41.2.2 elad TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.clear_timestamp);
1287 1.41.2.2 elad }
1288 1.41.2.2 elad
1289 1.41.2.2 elad #ifdef PPS_SYNC
1290 1.41.2.2 elad if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR)
1291 1.41.2.2 elad hardpps(&tv, tv.tv_usec);
1292 1.41.2.2 elad #endif
1293 1.41.2.2 elad sc->ppsinfo.clear_sequence++;
1294 1.41.2.2 elad sc->ppsinfo.current_mode =
1295 1.41.2.2 elad sc->ppsparam.mode;
1296 1.41.2.2 elad }
1297 1.41.2.2 elad }
1298 1.41.2.2 elad
1299 1.41.2.2 elad /*
1300 1.41.2.2 elad * Stop output immediately if we lose the output
1301 1.41.2.2 elad * flow control signal or carrier detect.
1302 1.41.2.2 elad */
1303 1.41.2.2 elad if (ISSET(~msr, sc->sc_msr_mask)) {
1304 1.41.2.2 elad sc->sc_tbc = 0;
1305 1.41.2.2 elad sc->sc_heldtbc = 0;
1306 1.41.2.2 elad #ifdef SCI_DEBUG
1307 1.41.2.2 elad if (sci_debug)
1308 1.41.2.2 elad scistatus(sc, "sciintr ");
1309 1.41.2.2 elad #endif
1310 1.41.2.2 elad }
1311 1.41.2.2 elad
1312 1.41.2.2 elad sc->sc_st_check = 1;
1313 1.41.2.2 elad }
1314 1.41.2.2 elad #endif
1315 1.41.2.2 elad
1316 1.41.2.2 elad /*
1317 1.41.2.2 elad * Done handling any receive interrupts. See if data can be
1318 1.41.2.2 elad * transmitted as well. Schedule tx done event if no data left
1319 1.41.2.2 elad * and tty was marked busy.
1320 1.41.2.2 elad */
1321 1.41.2.2 elad if ((SHREG_SCSSR & SCSSR_TDRE) != 0) {
1322 1.41.2.2 elad /*
1323 1.41.2.2 elad * If we've delayed a parameter change, do it now, and restart
1324 1.41.2.2 elad * output.
1325 1.41.2.2 elad */
1326 1.41.2.2 elad if (sc->sc_heldchange) {
1327 1.41.2.2 elad sc->sc_heldchange = 0;
1328 1.41.2.2 elad sc->sc_tbc = sc->sc_heldtbc;
1329 1.41.2.2 elad sc->sc_heldtbc = 0;
1330 1.41.2.2 elad }
1331 1.41.2.2 elad
1332 1.41.2.2 elad /* Output the next chunk of the contiguous buffer, if any. */
1333 1.41.2.2 elad if (sc->sc_tbc > 0) {
1334 1.41.2.2 elad sci_putc(*(sc->sc_tba));
1335 1.41.2.2 elad sc->sc_tba++;
1336 1.41.2.2 elad sc->sc_tbc--;
1337 1.41.2.2 elad } else {
1338 1.41.2.2 elad /* Disable transmit completion interrupts if necessary. */
1339 1.41.2.2 elad #if 0
1340 1.41.2.2 elad if (ISSET(sc->sc_ier, IER_ETXRDY))
1341 1.41.2.2 elad #endif
1342 1.41.2.2 elad SHREG_SCSCR &= ~SCSCR_TIE;
1343 1.41.2.2 elad
1344 1.41.2.2 elad if (sc->sc_tx_busy) {
1345 1.41.2.2 elad sc->sc_tx_busy = 0;
1346 1.41.2.2 elad sc->sc_tx_done = 1;
1347 1.41.2.2 elad }
1348 1.41.2.2 elad }
1349 1.41.2.2 elad }
1350 1.41.2.2 elad
1351 1.41.2.2 elad /* Wake up the poller. */
1352 1.41.2.2 elad #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
1353 1.41.2.2 elad softintr_schedule(sc->sc_si);
1354 1.41.2.2 elad #else
1355 1.41.2.2 elad #ifndef __NO_SOFT_SERIAL_INTERRUPT
1356 1.41.2.2 elad setsoftserial();
1357 1.41.2.2 elad #else
1358 1.41.2.2 elad if (!sci_softintr_scheduled) {
1359 1.41.2.2 elad sci_softintr_scheduled = 1;
1360 1.41.2.2 elad callout_reset(&sci_soft_ch, 1, scisoft, 1);
1361 1.41.2.2 elad }
1362 1.41.2.2 elad #endif
1363 1.41.2.2 elad #endif
1364 1.41.2.2 elad
1365 1.41.2.2 elad #if NRND > 0 && defined(RND_SCI)
1366 1.41.2.2 elad rnd_add_uint32(&sc->rnd_source, iir | lsr);
1367 1.41.2.2 elad #endif
1368 1.41.2.2 elad
1369 1.41.2.2 elad return (1);
1370 1.41.2.2 elad }
1371 1.41.2.2 elad
1372 1.41.2.2 elad void
1373 1.41.2.2 elad scicnprobe(cp)
1374 1.41.2.2 elad struct consdev *cp;
1375 1.41.2.2 elad {
1376 1.41.2.2 elad int maj;
1377 1.41.2.2 elad
1378 1.41.2.2 elad /* locate the major number */
1379 1.41.2.2 elad maj = cdevsw_lookup_major(&sci_cdevsw);
1380 1.41.2.2 elad
1381 1.41.2.2 elad /* Initialize required fields. */
1382 1.41.2.2 elad cp->cn_dev = makedev(maj, 0);
1383 1.41.2.2 elad #ifdef SCICONSOLE
1384 1.41.2.2 elad cp->cn_pri = CN_REMOTE;
1385 1.41.2.2 elad #else
1386 1.41.2.2 elad cp->cn_pri = CN_NORMAL;
1387 1.41.2.2 elad #endif
1388 1.41.2.2 elad }
1389 1.41.2.2 elad
1390 1.41.2.2 elad void
1391 1.41.2.2 elad scicninit(struct consdev *cp)
1392 1.41.2.2 elad {
1393 1.41.2.2 elad
1394 1.41.2.2 elad InitializeSci(scicn_speed);
1395 1.41.2.2 elad sciisconsole = 1;
1396 1.41.2.2 elad }
1397 1.41.2.2 elad
1398 1.41.2.2 elad int
1399 1.41.2.2 elad scicngetc(dev_t dev)
1400 1.41.2.2 elad {
1401 1.41.2.2 elad int c;
1402 1.41.2.2 elad int s;
1403 1.41.2.2 elad
1404 1.41.2.2 elad s = splserial();
1405 1.41.2.2 elad c = sci_getc();
1406 1.41.2.2 elad splx(s);
1407 1.41.2.2 elad
1408 1.41.2.2 elad return (c);
1409 1.41.2.2 elad }
1410 1.41.2.2 elad
1411 1.41.2.2 elad void
1412 1.41.2.2 elad scicnputc(dev_t dev, int c)
1413 1.41.2.2 elad {
1414 1.41.2.2 elad int s;
1415 1.41.2.2 elad
1416 1.41.2.2 elad s = splserial();
1417 1.41.2.2 elad sci_putc((u_char)c);
1418 1.41.2.2 elad splx(s);
1419 1.41.2.2 elad }
1420