sci.c revision 1.41.2.4 1 1.41.2.4 elad /* $NetBSD: sci.c,v 1.41.2.4 2006/05/13 10:26:28 elad Exp $ */
2 1.41.2.2 elad
3 1.41.2.2 elad /*-
4 1.41.2.2 elad * Copyright (C) 1999 T.Horiuchi and SAITOH Masanobu. All rights reserved.
5 1.41.2.2 elad *
6 1.41.2.2 elad * Redistribution and use in source and binary forms, with or without
7 1.41.2.2 elad * modification, are permitted provided that the following conditions
8 1.41.2.2 elad * are met:
9 1.41.2.2 elad * 1. Redistributions of source code must retain the above copyright
10 1.41.2.2 elad * notice, this list of conditions and the following disclaimer.
11 1.41.2.2 elad * 2. Redistributions in binary form must reproduce the above copyright
12 1.41.2.2 elad * notice, this list of conditions and the following disclaimer in the
13 1.41.2.2 elad * documentation and/or other materials provided with the distribution.
14 1.41.2.2 elad * 3. The name of the author may not be used to endorse or promote products
15 1.41.2.2 elad * derived from this software without specific prior written permission.
16 1.41.2.2 elad *
17 1.41.2.2 elad * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 1.41.2.2 elad * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 1.41.2.2 elad * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 1.41.2.2 elad * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 1.41.2.2 elad * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 1.41.2.2 elad * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 1.41.2.2 elad * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 1.41.2.2 elad * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 1.41.2.2 elad * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 1.41.2.2 elad * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 1.41.2.2 elad */
28 1.41.2.2 elad
29 1.41.2.2 elad /*-
30 1.41.2.2 elad * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
31 1.41.2.2 elad * All rights reserved.
32 1.41.2.2 elad *
33 1.41.2.2 elad * This code is derived from software contributed to The NetBSD Foundation
34 1.41.2.2 elad * by Charles M. Hannum.
35 1.41.2.2 elad *
36 1.41.2.2 elad * Redistribution and use in source and binary forms, with or without
37 1.41.2.2 elad * modification, are permitted provided that the following conditions
38 1.41.2.2 elad * are met:
39 1.41.2.2 elad * 1. Redistributions of source code must retain the above copyright
40 1.41.2.2 elad * notice, this list of conditions and the following disclaimer.
41 1.41.2.2 elad * 2. Redistributions in binary form must reproduce the above copyright
42 1.41.2.2 elad * notice, this list of conditions and the following disclaimer in the
43 1.41.2.2 elad * documentation and/or other materials provided with the distribution.
44 1.41.2.2 elad * 3. All advertising materials mentioning features or use of this software
45 1.41.2.2 elad * must display the following acknowledgement:
46 1.41.2.2 elad * This product includes software developed by the NetBSD
47 1.41.2.2 elad * Foundation, Inc. and its contributors.
48 1.41.2.2 elad * 4. Neither the name of The NetBSD Foundation nor the names of its
49 1.41.2.2 elad * contributors may be used to endorse or promote products derived
50 1.41.2.2 elad * from this software without specific prior written permission.
51 1.41.2.2 elad *
52 1.41.2.2 elad * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
53 1.41.2.2 elad * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
54 1.41.2.2 elad * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
55 1.41.2.2 elad * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
56 1.41.2.2 elad * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
57 1.41.2.2 elad * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
58 1.41.2.2 elad * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
59 1.41.2.2 elad * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
60 1.41.2.2 elad * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
61 1.41.2.2 elad * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
62 1.41.2.2 elad * POSSIBILITY OF SUCH DAMAGE.
63 1.41.2.2 elad */
64 1.41.2.2 elad
65 1.41.2.2 elad /*
66 1.41.2.2 elad * Copyright (c) 1991 The Regents of the University of California.
67 1.41.2.2 elad * All rights reserved.
68 1.41.2.2 elad *
69 1.41.2.2 elad * Redistribution and use in source and binary forms, with or without
70 1.41.2.2 elad * modification, are permitted provided that the following conditions
71 1.41.2.2 elad * are met:
72 1.41.2.2 elad * 1. Redistributions of source code must retain the above copyright
73 1.41.2.2 elad * notice, this list of conditions and the following disclaimer.
74 1.41.2.2 elad * 2. Redistributions in binary form must reproduce the above copyright
75 1.41.2.2 elad * notice, this list of conditions and the following disclaimer in the
76 1.41.2.2 elad * documentation and/or other materials provided with the distribution.
77 1.41.2.2 elad * 3. Neither the name of the University nor the names of its contributors
78 1.41.2.2 elad * may be used to endorse or promote products derived from this software
79 1.41.2.2 elad * without specific prior written permission.
80 1.41.2.2 elad *
81 1.41.2.2 elad * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
82 1.41.2.2 elad * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
83 1.41.2.2 elad * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
84 1.41.2.2 elad * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
85 1.41.2.2 elad * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
86 1.41.2.2 elad * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
87 1.41.2.2 elad * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
88 1.41.2.2 elad * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
89 1.41.2.2 elad * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
90 1.41.2.2 elad * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
91 1.41.2.2 elad * SUCH DAMAGE.
92 1.41.2.2 elad *
93 1.41.2.2 elad * @(#)com.c 7.5 (Berkeley) 5/16/91
94 1.41.2.2 elad */
95 1.41.2.2 elad
96 1.41.2.2 elad /*
97 1.41.2.2 elad * SH internal serial driver
98 1.41.2.2 elad *
99 1.41.2.2 elad * This code is derived from both z8530tty.c and com.c
100 1.41.2.2 elad */
101 1.41.2.2 elad
102 1.41.2.2 elad #include <sys/cdefs.h>
103 1.41.2.4 elad __KERNEL_RCSID(0, "$NetBSD: sci.c,v 1.41.2.4 2006/05/13 10:26:28 elad Exp $");
104 1.41.2.2 elad
105 1.41.2.2 elad #include "opt_kgdb.h"
106 1.41.2.2 elad #include "opt_sci.h"
107 1.41.2.2 elad
108 1.41.2.2 elad #include <sys/param.h>
109 1.41.2.2 elad #include <sys/systm.h>
110 1.41.2.2 elad #include <sys/tty.h>
111 1.41.2.2 elad #include <sys/proc.h>
112 1.41.2.2 elad #include <sys/conf.h>
113 1.41.2.2 elad #include <sys/file.h>
114 1.41.2.2 elad #include <sys/syslog.h>
115 1.41.2.2 elad #include <sys/kernel.h>
116 1.41.2.2 elad #include <sys/device.h>
117 1.41.2.2 elad #include <sys/malloc.h>
118 1.41.2.4 elad #include <sys/kauth.h>
119 1.41.2.2 elad
120 1.41.2.2 elad #include <dev/cons.h>
121 1.41.2.2 elad
122 1.41.2.2 elad #include <sh3/clock.h>
123 1.41.2.2 elad #include <sh3/scireg.h>
124 1.41.2.2 elad #include <sh3/pfcreg.h>
125 1.41.2.2 elad #include <sh3/tmureg.h>
126 1.41.2.2 elad #include <sh3/exception.h>
127 1.41.2.2 elad #include <machine/intr.h>
128 1.41.2.2 elad
129 1.41.2.2 elad static void scistart(struct tty *);
130 1.41.2.2 elad static int sciparam(struct tty *, struct termios *);
131 1.41.2.2 elad
132 1.41.2.2 elad void scicnprobe(struct consdev *);
133 1.41.2.2 elad void scicninit(struct consdev *);
134 1.41.2.2 elad void scicnputc(dev_t, int);
135 1.41.2.2 elad int scicngetc(dev_t);
136 1.41.2.2 elad void scicnpoolc(dev_t, int);
137 1.41.2.2 elad int sciintr(void *);
138 1.41.2.2 elad
139 1.41.2.2 elad struct sci_softc {
140 1.41.2.2 elad struct device sc_dev; /* boilerplate */
141 1.41.2.2 elad struct tty *sc_tty;
142 1.41.2.2 elad void *sc_si;
143 1.41.2.2 elad struct callout sc_diag_ch;
144 1.41.2.2 elad
145 1.41.2.2 elad #if 0
146 1.41.2.2 elad bus_space_tag_t sc_iot; /* ISA i/o space identifier */
147 1.41.2.2 elad bus_space_handle_t sc_ioh; /* ISA io handle */
148 1.41.2.2 elad
149 1.41.2.2 elad int sc_drq;
150 1.41.2.2 elad
151 1.41.2.2 elad int sc_frequency;
152 1.41.2.2 elad #endif
153 1.41.2.2 elad
154 1.41.2.2 elad u_int sc_overflows,
155 1.41.2.2 elad sc_floods,
156 1.41.2.2 elad sc_errors; /* number of retries so far */
157 1.41.2.2 elad u_char sc_status[7]; /* copy of registers */
158 1.41.2.2 elad
159 1.41.2.2 elad int sc_hwflags;
160 1.41.2.2 elad int sc_swflags;
161 1.41.2.2 elad u_int sc_fifolen; /* XXX always 0? */
162 1.41.2.2 elad
163 1.41.2.2 elad u_int sc_r_hiwat,
164 1.41.2.2 elad sc_r_lowat;
165 1.41.2.2 elad u_char *volatile sc_rbget,
166 1.41.2.2 elad *volatile sc_rbput;
167 1.41.2.2 elad volatile u_int sc_rbavail;
168 1.41.2.2 elad u_char *sc_rbuf,
169 1.41.2.2 elad *sc_ebuf;
170 1.41.2.2 elad
171 1.41.2.2 elad u_char *sc_tba; /* transmit buffer address */
172 1.41.2.2 elad u_int sc_tbc, /* transmit byte count */
173 1.41.2.2 elad sc_heldtbc;
174 1.41.2.2 elad
175 1.41.2.2 elad volatile u_char sc_rx_flags, /* receiver blocked */
176 1.41.2.2 elad #define RX_TTY_BLOCKED 0x01
177 1.41.2.2 elad #define RX_TTY_OVERFLOWED 0x02
178 1.41.2.2 elad #define RX_IBUF_BLOCKED 0x04
179 1.41.2.2 elad #define RX_IBUF_OVERFLOWED 0x08
180 1.41.2.2 elad #define RX_ANY_BLOCK 0x0f
181 1.41.2.2 elad sc_tx_busy, /* working on an output chunk */
182 1.41.2.2 elad sc_tx_done, /* done with one output chunk */
183 1.41.2.2 elad sc_tx_stopped, /* H/W level stop (lost CTS) */
184 1.41.2.2 elad sc_st_check, /* got a status interrupt */
185 1.41.2.2 elad sc_rx_ready;
186 1.41.2.2 elad
187 1.41.2.2 elad volatile u_char sc_heldchange;
188 1.41.2.2 elad };
189 1.41.2.2 elad
190 1.41.2.2 elad /* controller driver configuration */
191 1.41.2.2 elad static int sci_match(struct device *, struct cfdata *, void *);
192 1.41.2.2 elad static void sci_attach(struct device *, struct device *, void *);
193 1.41.2.2 elad
194 1.41.2.2 elad void sci_break(struct sci_softc *, int);
195 1.41.2.2 elad void sci_iflush(struct sci_softc *);
196 1.41.2.2 elad
197 1.41.2.2 elad #define integrate static inline
198 1.41.2.2 elad #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
199 1.41.2.2 elad void scisoft(void *);
200 1.41.2.2 elad #else
201 1.41.2.2 elad #ifndef __NO_SOFT_SERIAL_INTERRUPT
202 1.41.2.2 elad void scisoft(void);
203 1.41.2.2 elad #else
204 1.41.2.2 elad void scisoft(void *);
205 1.41.2.2 elad #endif
206 1.41.2.2 elad #endif
207 1.41.2.2 elad integrate void sci_rxsoft(struct sci_softc *, struct tty *);
208 1.41.2.2 elad integrate void sci_txsoft(struct sci_softc *, struct tty *);
209 1.41.2.2 elad integrate void sci_stsoft(struct sci_softc *, struct tty *);
210 1.41.2.2 elad integrate void sci_schedrx(struct sci_softc *);
211 1.41.2.2 elad void scidiag(void *);
212 1.41.2.2 elad
213 1.41.2.2 elad #define SCIUNIT_MASK 0x7ffff
214 1.41.2.2 elad #define SCIDIALOUT_MASK 0x80000
215 1.41.2.2 elad
216 1.41.2.2 elad #define SCIUNIT(x) (minor(x) & SCIUNIT_MASK)
217 1.41.2.2 elad #define SCIDIALOUT(x) (minor(x) & SCIDIALOUT_MASK)
218 1.41.2.2 elad
219 1.41.2.2 elad /* Hardware flag masks */
220 1.41.2.2 elad #define SCI_HW_NOIEN 0x01
221 1.41.2.2 elad #define SCI_HW_FIFO 0x02
222 1.41.2.2 elad #define SCI_HW_FLOW 0x08
223 1.41.2.2 elad #define SCI_HW_DEV_OK 0x20
224 1.41.2.2 elad #define SCI_HW_CONSOLE 0x40
225 1.41.2.2 elad #define SCI_HW_KGDB 0x80
226 1.41.2.2 elad
227 1.41.2.2 elad /* Buffer size for character buffer */
228 1.41.2.2 elad #define SCI_RING_SIZE 2048
229 1.41.2.2 elad
230 1.41.2.2 elad /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */
231 1.41.2.2 elad u_int sci_rbuf_hiwat = (SCI_RING_SIZE * 1) / 4;
232 1.41.2.2 elad u_int sci_rbuf_lowat = (SCI_RING_SIZE * 3) / 4;
233 1.41.2.2 elad
234 1.41.2.2 elad #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
235 1.41.2.2 elad int sciconscflag = CONMODE;
236 1.41.2.2 elad int sciisconsole = 0;
237 1.41.2.2 elad
238 1.41.2.2 elad #ifdef SCICN_SPEED
239 1.41.2.2 elad int scicn_speed = SCICN_SPEED;
240 1.41.2.2 elad #else
241 1.41.2.2 elad int scicn_speed = 9600;
242 1.41.2.2 elad #endif
243 1.41.2.2 elad
244 1.41.2.2 elad #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */
245 1.41.2.2 elad
246 1.41.2.2 elad #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS
247 1.41.2.2 elad #ifdef __NO_SOFT_SERIAL_INTERRUPT
248 1.41.2.2 elad volatile int sci_softintr_scheduled;
249 1.41.2.2 elad struct callout sci_soft_ch = CALLOUT_INITIALIZER;
250 1.41.2.2 elad #endif
251 1.41.2.2 elad #endif
252 1.41.2.2 elad
253 1.41.2.2 elad u_int sci_rbuf_size = SCI_RING_SIZE;
254 1.41.2.2 elad
255 1.41.2.2 elad CFATTACH_DECL(sci, sizeof(struct sci_softc),
256 1.41.2.2 elad sci_match, sci_attach, NULL, NULL);
257 1.41.2.2 elad
258 1.41.2.2 elad extern struct cfdriver sci_cd;
259 1.41.2.2 elad
260 1.41.2.2 elad static int sci_attached;
261 1.41.2.2 elad
262 1.41.2.2 elad dev_type_open(sciopen);
263 1.41.2.2 elad dev_type_close(sciclose);
264 1.41.2.2 elad dev_type_read(sciread);
265 1.41.2.2 elad dev_type_write(sciwrite);
266 1.41.2.2 elad dev_type_ioctl(sciioctl);
267 1.41.2.2 elad dev_type_stop(scistop);
268 1.41.2.2 elad dev_type_tty(scitty);
269 1.41.2.2 elad dev_type_poll(scipoll);
270 1.41.2.2 elad
271 1.41.2.2 elad const struct cdevsw sci_cdevsw = {
272 1.41.2.2 elad sciopen, sciclose, sciread, sciwrite, sciioctl,
273 1.41.2.2 elad scistop, scitty, scipoll, nommap, ttykqfilter, D_TTY
274 1.41.2.2 elad };
275 1.41.2.2 elad
276 1.41.2.2 elad void InitializeSci (unsigned int);
277 1.41.2.2 elad
278 1.41.2.2 elad /*
279 1.41.2.2 elad * following functions are debugging prupose only
280 1.41.2.2 elad */
281 1.41.2.2 elad #define CR 0x0D
282 1.41.2.2 elad #define I2C_ADRS (*(volatile unsigned int *)0xa8000000)
283 1.41.2.2 elad #define USART_ON (unsigned int)~0x08
284 1.41.2.2 elad
285 1.41.2.2 elad void sci_putc(unsigned char);
286 1.41.2.2 elad unsigned char sci_getc(void);
287 1.41.2.2 elad int SciErrCheck(void);
288 1.41.2.2 elad
289 1.41.2.2 elad /*
290 1.41.2.2 elad * InitializeSci
291 1.41.2.2 elad * : unsigned int bps;
292 1.41.2.2 elad * : SCI(Serial Communication Interface)
293 1.41.2.2 elad */
294 1.41.2.2 elad
295 1.41.2.2 elad void
296 1.41.2.2 elad InitializeSci(unsigned int bps)
297 1.41.2.2 elad {
298 1.41.2.2 elad
299 1.41.2.2 elad /* Initialize SCR */
300 1.41.2.2 elad SHREG_SCSCR = 0x00;
301 1.41.2.2 elad
302 1.41.2.2 elad /* Serial Mode Register */
303 1.41.2.2 elad SHREG_SCSMR = 0x00; /* Async,8bit,NonParity,Even,1Stop,NoMulti */
304 1.41.2.2 elad
305 1.41.2.2 elad /* Bit Rate Register */
306 1.41.2.2 elad SHREG_SCBRR = divrnd(sh_clock_get_pclock(), 32 * bps) - 1;
307 1.41.2.2 elad
308 1.41.2.2 elad /*
309 1.41.2.2 elad * wait 1mSec, because Send/Recv must begin 1 bit period after
310 1.41.2.2 elad * BRR is set.
311 1.41.2.2 elad */
312 1.41.2.2 elad delay(1000);
313 1.41.2.2 elad
314 1.41.2.2 elad /* Send permission, Receive permission ON */
315 1.41.2.2 elad SHREG_SCSCR = SCSCR_TE | SCSCR_RE;
316 1.41.2.2 elad
317 1.41.2.2 elad /* Serial Status Register */
318 1.41.2.2 elad SHREG_SCSSR &= SCSSR_TDRE; /* Clear Status */
319 1.41.2.2 elad
320 1.41.2.2 elad #if 0
321 1.41.2.2 elad I2C_ADRS &= ~0x08; /* enable RS-232C */
322 1.41.2.2 elad #endif
323 1.41.2.2 elad }
324 1.41.2.2 elad
325 1.41.2.2 elad
326 1.41.2.2 elad /*
327 1.41.2.2 elad * sci_putc
328 1.41.2.2 elad * : unsigned char c;
329 1.41.2.2 elad */
330 1.41.2.2 elad void
331 1.41.2.2 elad sci_putc(unsigned char c)
332 1.41.2.2 elad {
333 1.41.2.2 elad
334 1.41.2.2 elad /* wait for ready */
335 1.41.2.2 elad while ((SHREG_SCSSR & SCSSR_TDRE) == 0)
336 1.41.2.2 elad ;
337 1.41.2.2 elad
338 1.41.2.2 elad /* write send data to send register */
339 1.41.2.2 elad SHREG_SCTDR = c;
340 1.41.2.2 elad
341 1.41.2.2 elad /* clear ready flag */
342 1.41.2.2 elad SHREG_SCSSR &= ~SCSSR_TDRE;
343 1.41.2.2 elad }
344 1.41.2.2 elad
345 1.41.2.2 elad /*
346 1.41.2.2 elad * : SciErrCheck
347 1.41.2.2 elad * 0x20 = over run
348 1.41.2.2 elad * 0x10 = frame error
349 1.41.2.2 elad * 0x80 = parity error
350 1.41.2.2 elad */
351 1.41.2.2 elad int
352 1.41.2.2 elad SciErrCheck(void)
353 1.41.2.2 elad {
354 1.41.2.2 elad
355 1.41.2.2 elad return(SHREG_SCSSR & (SCSSR_ORER | SCSSR_FER | SCSSR_PER));
356 1.41.2.2 elad }
357 1.41.2.2 elad
358 1.41.2.2 elad /*
359 1.41.2.2 elad * sci_getc
360 1.41.2.2 elad */
361 1.41.2.2 elad unsigned char
362 1.41.2.2 elad sci_getc(void)
363 1.41.2.2 elad {
364 1.41.2.2 elad unsigned char c, err_c;
365 1.41.2.2 elad
366 1.41.2.2 elad while (((err_c = SHREG_SCSSR)
367 1.41.2.2 elad & (SCSSR_RDRF | SCSSR_ORER | SCSSR_FER | SCSSR_PER)) == 0)
368 1.41.2.2 elad ;
369 1.41.2.2 elad if ((err_c & (SCSSR_ORER | SCSSR_FER | SCSSR_PER)) != 0) {
370 1.41.2.2 elad SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_FER | SCSSR_PER);
371 1.41.2.2 elad return(err_c |= 0x80);
372 1.41.2.2 elad }
373 1.41.2.2 elad
374 1.41.2.2 elad c = SHREG_SCRDR;
375 1.41.2.2 elad
376 1.41.2.2 elad SHREG_SCSSR &= ~SCSSR_RDRF;
377 1.41.2.2 elad
378 1.41.2.2 elad return(c);
379 1.41.2.2 elad }
380 1.41.2.2 elad
381 1.41.2.2 elad static int
382 1.41.2.2 elad sci_match(struct device *parent, struct cfdata *cfp, void *aux)
383 1.41.2.2 elad {
384 1.41.2.2 elad
385 1.41.2.2 elad if (strcmp(cfp->cf_name, "sci") || sci_attached)
386 1.41.2.2 elad return 0;
387 1.41.2.2 elad
388 1.41.2.2 elad return 1;
389 1.41.2.2 elad }
390 1.41.2.2 elad
391 1.41.2.2 elad static void
392 1.41.2.2 elad sci_attach(struct device *parent, struct device *self, void *aux)
393 1.41.2.2 elad {
394 1.41.2.2 elad struct sci_softc *sc = (struct sci_softc *)self;
395 1.41.2.2 elad struct tty *tp;
396 1.41.2.2 elad
397 1.41.2.2 elad sci_attached = 1;
398 1.41.2.2 elad
399 1.41.2.2 elad sc->sc_hwflags = 0; /* XXX */
400 1.41.2.2 elad sc->sc_swflags = 0; /* XXX */
401 1.41.2.2 elad sc->sc_fifolen = 0; /* XXX */
402 1.41.2.2 elad
403 1.41.2.2 elad if (sciisconsole) {
404 1.41.2.2 elad SET(sc->sc_hwflags, SCI_HW_CONSOLE);
405 1.41.2.2 elad SET(sc->sc_swflags, TIOCFLAG_SOFTCAR);
406 1.41.2.2 elad printf("\n%s: console\n", sc->sc_dev.dv_xname);
407 1.41.2.2 elad } else {
408 1.41.2.2 elad InitializeSci(9600);
409 1.41.2.2 elad printf("\n");
410 1.41.2.2 elad }
411 1.41.2.2 elad
412 1.41.2.2 elad callout_init(&sc->sc_diag_ch);
413 1.41.2.2 elad
414 1.41.2.2 elad intc_intr_establish(SH_INTEVT_SCI_ERI, IST_LEVEL, IPL_SERIAL, sciintr,
415 1.41.2.2 elad sc);
416 1.41.2.2 elad intc_intr_establish(SH_INTEVT_SCI_RXI, IST_LEVEL, IPL_SERIAL, sciintr,
417 1.41.2.2 elad sc);
418 1.41.2.2 elad intc_intr_establish(SH_INTEVT_SCI_TXI, IST_LEVEL, IPL_SERIAL, sciintr,
419 1.41.2.2 elad sc);
420 1.41.2.2 elad intc_intr_establish(SH_INTEVT_SCI_TEI, IST_LEVEL, IPL_SERIAL, sciintr,
421 1.41.2.2 elad sc);
422 1.41.2.2 elad
423 1.41.2.2 elad #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
424 1.41.2.2 elad sc->sc_si = softintr_establish(IPL_SOFTSERIAL, scisoft, sc);
425 1.41.2.2 elad #endif
426 1.41.2.2 elad SET(sc->sc_hwflags, SCI_HW_DEV_OK);
427 1.41.2.2 elad
428 1.41.2.2 elad tp = ttymalloc();
429 1.41.2.2 elad tp->t_oproc = scistart;
430 1.41.2.2 elad tp->t_param = sciparam;
431 1.41.2.2 elad tp->t_hwiflow = NULL;
432 1.41.2.2 elad
433 1.41.2.2 elad sc->sc_tty = tp;
434 1.41.2.2 elad sc->sc_rbuf = malloc(sci_rbuf_size << 1, M_DEVBUF, M_NOWAIT);
435 1.41.2.2 elad if (sc->sc_rbuf == NULL) {
436 1.41.2.2 elad printf("%s: unable to allocate ring buffer\n",
437 1.41.2.2 elad sc->sc_dev.dv_xname);
438 1.41.2.2 elad return;
439 1.41.2.2 elad }
440 1.41.2.2 elad sc->sc_ebuf = sc->sc_rbuf + (sci_rbuf_size << 1);
441 1.41.2.2 elad
442 1.41.2.2 elad tty_attach(tp);
443 1.41.2.2 elad }
444 1.41.2.2 elad
445 1.41.2.2 elad /*
446 1.41.2.2 elad * Start or restart transmission.
447 1.41.2.2 elad */
448 1.41.2.2 elad static void
449 1.41.2.2 elad scistart(struct tty *tp)
450 1.41.2.2 elad {
451 1.41.2.2 elad struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(tp->t_dev)];
452 1.41.2.2 elad int s;
453 1.41.2.2 elad
454 1.41.2.2 elad s = spltty();
455 1.41.2.2 elad if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP))
456 1.41.2.2 elad goto out;
457 1.41.2.2 elad if (sc->sc_tx_stopped)
458 1.41.2.2 elad goto out;
459 1.41.2.2 elad
460 1.41.2.2 elad if (tp->t_outq.c_cc <= tp->t_lowat) {
461 1.41.2.2 elad if (ISSET(tp->t_state, TS_ASLEEP)) {
462 1.41.2.2 elad CLR(tp->t_state, TS_ASLEEP);
463 1.41.2.2 elad wakeup(&tp->t_outq);
464 1.41.2.2 elad }
465 1.41.2.2 elad selwakeup(&tp->t_wsel);
466 1.41.2.2 elad if (tp->t_outq.c_cc == 0)
467 1.41.2.2 elad goto out;
468 1.41.2.2 elad }
469 1.41.2.2 elad
470 1.41.2.2 elad /* Grab the first contiguous region of buffer space. */
471 1.41.2.2 elad {
472 1.41.2.2 elad u_char *tba;
473 1.41.2.2 elad int tbc;
474 1.41.2.2 elad
475 1.41.2.2 elad tba = tp->t_outq.c_cf;
476 1.41.2.2 elad tbc = ndqb(&tp->t_outq, 0);
477 1.41.2.2 elad
478 1.41.2.2 elad (void)splserial();
479 1.41.2.2 elad
480 1.41.2.2 elad sc->sc_tba = tba;
481 1.41.2.2 elad sc->sc_tbc = tbc;
482 1.41.2.2 elad }
483 1.41.2.2 elad
484 1.41.2.2 elad SET(tp->t_state, TS_BUSY);
485 1.41.2.2 elad sc->sc_tx_busy = 1;
486 1.41.2.2 elad
487 1.41.2.2 elad /* Enable transmit completion interrupts if necessary. */
488 1.41.2.2 elad SHREG_SCSCR |= SCSCR_TIE | SCSCR_RIE;
489 1.41.2.2 elad
490 1.41.2.2 elad /* Output the first byte of the contiguous buffer. */
491 1.41.2.2 elad {
492 1.41.2.2 elad if (sc->sc_tbc > 0) {
493 1.41.2.2 elad sci_putc(*(sc->sc_tba));
494 1.41.2.2 elad sc->sc_tba++;
495 1.41.2.2 elad sc->sc_tbc--;
496 1.41.2.2 elad }
497 1.41.2.2 elad }
498 1.41.2.2 elad out:
499 1.41.2.2 elad splx(s);
500 1.41.2.2 elad return;
501 1.41.2.2 elad }
502 1.41.2.2 elad
503 1.41.2.2 elad /*
504 1.41.2.2 elad * Set SCI tty parameters from termios.
505 1.41.2.2 elad * XXX - Should just copy the whole termios after
506 1.41.2.2 elad * making sure all the changes could be done.
507 1.41.2.2 elad */
508 1.41.2.2 elad static int
509 1.41.2.2 elad sciparam(struct tty *tp, struct termios *t)
510 1.41.2.2 elad {
511 1.41.2.2 elad struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(tp->t_dev)];
512 1.41.2.2 elad int ospeed = t->c_ospeed;
513 1.41.2.2 elad int s;
514 1.41.2.2 elad
515 1.41.2.2 elad if (!device_is_active(&sc->sc_dev))
516 1.41.2.2 elad return (EIO);
517 1.41.2.2 elad
518 1.41.2.2 elad /* Check requested parameters. */
519 1.41.2.2 elad if (ospeed < 0)
520 1.41.2.2 elad return (EINVAL);
521 1.41.2.2 elad if (t->c_ispeed && t->c_ispeed != t->c_ospeed)
522 1.41.2.2 elad return (EINVAL);
523 1.41.2.2 elad
524 1.41.2.2 elad /*
525 1.41.2.2 elad * For the console, always force CLOCAL and !HUPCL, so that the port
526 1.41.2.2 elad * is always active.
527 1.41.2.2 elad */
528 1.41.2.2 elad if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) ||
529 1.41.2.2 elad ISSET(sc->sc_hwflags, SCI_HW_CONSOLE)) {
530 1.41.2.2 elad SET(t->c_cflag, CLOCAL);
531 1.41.2.2 elad CLR(t->c_cflag, HUPCL);
532 1.41.2.2 elad }
533 1.41.2.2 elad
534 1.41.2.2 elad /*
535 1.41.2.2 elad * If there were no changes, don't do anything. This avoids dropping
536 1.41.2.2 elad * input and improves performance when all we did was frob things like
537 1.41.2.2 elad * VMIN and VTIME.
538 1.41.2.2 elad */
539 1.41.2.2 elad if (tp->t_ospeed == t->c_ospeed &&
540 1.41.2.2 elad tp->t_cflag == t->c_cflag)
541 1.41.2.2 elad return (0);
542 1.41.2.2 elad
543 1.41.2.2 elad #if 0
544 1.41.2.2 elad /* XXX (msaitoh) */
545 1.41.2.2 elad lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag);
546 1.41.2.2 elad #endif
547 1.41.2.2 elad
548 1.41.2.2 elad s = splserial();
549 1.41.2.2 elad
550 1.41.2.2 elad /*
551 1.41.2.2 elad * Set the FIFO threshold based on the receive speed.
552 1.41.2.2 elad *
553 1.41.2.2 elad * * If it's a low speed, it's probably a mouse or some other
554 1.41.2.2 elad * interactive device, so set the threshold low.
555 1.41.2.2 elad * * If it's a high speed, trim the trigger level down to prevent
556 1.41.2.2 elad * overflows.
557 1.41.2.2 elad * * Otherwise set it a bit higher.
558 1.41.2.2 elad */
559 1.41.2.2 elad #if 0
560 1.41.2.2 elad /* XXX (msaitoh) */
561 1.41.2.2 elad if (ISSET(sc->sc_hwflags, SCI_HW_HAYESP))
562 1.41.2.2 elad sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8;
563 1.41.2.2 elad else if (ISSET(sc->sc_hwflags, SCI_HW_FIFO))
564 1.41.2.2 elad sc->sc_fifo = FIFO_ENABLE |
565 1.41.2.2 elad (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 :
566 1.41.2.2 elad t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4);
567 1.41.2.2 elad else
568 1.41.2.2 elad sc->sc_fifo = 0;
569 1.41.2.2 elad #endif
570 1.41.2.2 elad
571 1.41.2.2 elad /* And copy to tty. */
572 1.41.2.2 elad tp->t_ispeed = 0;
573 1.41.2.2 elad tp->t_ospeed = t->c_ospeed;
574 1.41.2.2 elad tp->t_cflag = t->c_cflag;
575 1.41.2.2 elad
576 1.41.2.2 elad if (!sc->sc_heldchange) {
577 1.41.2.2 elad if (sc->sc_tx_busy) {
578 1.41.2.2 elad sc->sc_heldtbc = sc->sc_tbc;
579 1.41.2.2 elad sc->sc_tbc = 0;
580 1.41.2.2 elad sc->sc_heldchange = 1;
581 1.41.2.2 elad }
582 1.41.2.2 elad #if 0
583 1.41.2.2 elad /* XXX (msaitoh) */
584 1.41.2.2 elad else
585 1.41.2.2 elad sci_loadchannelregs(sc);
586 1.41.2.2 elad #endif
587 1.41.2.2 elad }
588 1.41.2.2 elad
589 1.41.2.2 elad if (!ISSET(t->c_cflag, CHWFLOW)) {
590 1.41.2.2 elad /* Disable the high water mark. */
591 1.41.2.2 elad sc->sc_r_hiwat = 0;
592 1.41.2.2 elad sc->sc_r_lowat = 0;
593 1.41.2.2 elad if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) {
594 1.41.2.2 elad CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
595 1.41.2.2 elad sci_schedrx(sc);
596 1.41.2.2 elad }
597 1.41.2.2 elad } else {
598 1.41.2.2 elad sc->sc_r_hiwat = sci_rbuf_hiwat;
599 1.41.2.2 elad sc->sc_r_lowat = sci_rbuf_lowat;
600 1.41.2.2 elad }
601 1.41.2.2 elad
602 1.41.2.2 elad splx(s);
603 1.41.2.2 elad
604 1.41.2.2 elad #ifdef SCI_DEBUG
605 1.41.2.2 elad if (sci_debug)
606 1.41.2.2 elad scistatus(sc, "sciparam ");
607 1.41.2.2 elad #endif
608 1.41.2.2 elad
609 1.41.2.2 elad if (!ISSET(t->c_cflag, CHWFLOW)) {
610 1.41.2.2 elad if (sc->sc_tx_stopped) {
611 1.41.2.2 elad sc->sc_tx_stopped = 0;
612 1.41.2.2 elad scistart(tp);
613 1.41.2.2 elad }
614 1.41.2.2 elad }
615 1.41.2.2 elad
616 1.41.2.2 elad return (0);
617 1.41.2.2 elad }
618 1.41.2.2 elad
619 1.41.2.2 elad void
620 1.41.2.2 elad sci_iflush(struct sci_softc *sc)
621 1.41.2.2 elad {
622 1.41.2.2 elad unsigned char err_c;
623 1.41.2.2 elad volatile unsigned char c;
624 1.41.2.2 elad
625 1.41.2.2 elad if (((err_c = SHREG_SCSSR)
626 1.41.2.2 elad & (SCSSR_RDRF | SCSSR_ORER | SCSSR_FER | SCSSR_PER)) != 0) {
627 1.41.2.2 elad
628 1.41.2.2 elad if ((err_c & (SCSSR_ORER | SCSSR_FER | SCSSR_PER)) != 0) {
629 1.41.2.2 elad SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_FER | SCSSR_PER);
630 1.41.2.2 elad return;
631 1.41.2.2 elad }
632 1.41.2.2 elad
633 1.41.2.2 elad c = SHREG_SCRDR;
634 1.41.2.2 elad
635 1.41.2.2 elad SHREG_SCSSR &= ~SCSSR_RDRF;
636 1.41.2.2 elad }
637 1.41.2.2 elad }
638 1.41.2.2 elad
639 1.41.2.2 elad int
640 1.41.2.2 elad sciopen(dev_t dev, int flag, int mode, struct lwp *l)
641 1.41.2.2 elad {
642 1.41.2.2 elad int unit = SCIUNIT(dev);
643 1.41.2.2 elad struct sci_softc *sc;
644 1.41.2.2 elad struct tty *tp;
645 1.41.2.2 elad int s, s2;
646 1.41.2.2 elad int error;
647 1.41.2.2 elad
648 1.41.2.2 elad if (unit >= sci_cd.cd_ndevs)
649 1.41.2.2 elad return (ENXIO);
650 1.41.2.2 elad sc = sci_cd.cd_devs[unit];
651 1.41.2.2 elad if (sc == 0 || !ISSET(sc->sc_hwflags, SCI_HW_DEV_OK) ||
652 1.41.2.2 elad sc->sc_rbuf == NULL)
653 1.41.2.2 elad return (ENXIO);
654 1.41.2.2 elad
655 1.41.2.2 elad if (!device_is_active(&sc->sc_dev))
656 1.41.2.2 elad return (ENXIO);
657 1.41.2.2 elad
658 1.41.2.2 elad #ifdef KGDB
659 1.41.2.2 elad /*
660 1.41.2.2 elad * If this is the kgdb port, no other use is permitted.
661 1.41.2.2 elad */
662 1.41.2.2 elad if (ISSET(sc->sc_hwflags, SCI_HW_KGDB))
663 1.41.2.2 elad return (EBUSY);
664 1.41.2.2 elad #endif
665 1.41.2.2 elad
666 1.41.2.2 elad tp = sc->sc_tty;
667 1.41.2.2 elad
668 1.41.2.2 elad if (ISSET(tp->t_state, TS_ISOPEN) &&
669 1.41.2.2 elad ISSET(tp->t_state, TS_XCLUDE) &&
670 1.41.2.3 elad kauth_authorize_generic(l->l_proc->p_cred, KAUTH_GENERIC_ISSUSER, &l->l_proc->p_acflag) != 0)
671 1.41.2.2 elad return (EBUSY);
672 1.41.2.2 elad
673 1.41.2.2 elad s = spltty();
674 1.41.2.2 elad
675 1.41.2.2 elad /*
676 1.41.2.2 elad * Do the following iff this is a first open.
677 1.41.2.2 elad */
678 1.41.2.2 elad if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
679 1.41.2.2 elad struct termios t;
680 1.41.2.2 elad
681 1.41.2.2 elad tp->t_dev = dev;
682 1.41.2.2 elad
683 1.41.2.2 elad s2 = splserial();
684 1.41.2.2 elad
685 1.41.2.2 elad /* Turn on interrupts. */
686 1.41.2.2 elad SHREG_SCSCR |= SCSCR_TIE | SCSCR_RIE;
687 1.41.2.2 elad
688 1.41.2.2 elad splx(s2);
689 1.41.2.2 elad
690 1.41.2.2 elad /*
691 1.41.2.2 elad * Initialize the termios status to the defaults. Add in the
692 1.41.2.2 elad * sticky bits from TIOCSFLAGS.
693 1.41.2.2 elad */
694 1.41.2.2 elad t.c_ispeed = 0;
695 1.41.2.2 elad if (ISSET(sc->sc_hwflags, SCI_HW_CONSOLE)) {
696 1.41.2.2 elad t.c_ospeed = scicn_speed;
697 1.41.2.2 elad t.c_cflag = sciconscflag;
698 1.41.2.2 elad } else {
699 1.41.2.2 elad t.c_ospeed = TTYDEF_SPEED;
700 1.41.2.2 elad t.c_cflag = TTYDEF_CFLAG;
701 1.41.2.2 elad }
702 1.41.2.2 elad if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL))
703 1.41.2.2 elad SET(t.c_cflag, CLOCAL);
704 1.41.2.2 elad if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS))
705 1.41.2.2 elad SET(t.c_cflag, CRTSCTS);
706 1.41.2.2 elad if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF))
707 1.41.2.2 elad SET(t.c_cflag, MDMBUF);
708 1.41.2.2 elad /* Make sure sciparam() will do something. */
709 1.41.2.2 elad tp->t_ospeed = 0;
710 1.41.2.2 elad (void) sciparam(tp, &t);
711 1.41.2.2 elad tp->t_iflag = TTYDEF_IFLAG;
712 1.41.2.2 elad tp->t_oflag = TTYDEF_OFLAG;
713 1.41.2.2 elad tp->t_lflag = TTYDEF_LFLAG;
714 1.41.2.2 elad ttychars(tp);
715 1.41.2.2 elad ttsetwater(tp);
716 1.41.2.2 elad
717 1.41.2.2 elad s2 = splserial();
718 1.41.2.2 elad
719 1.41.2.2 elad /* Clear the input ring, and unblock. */
720 1.41.2.2 elad sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf;
721 1.41.2.2 elad sc->sc_rbavail = sci_rbuf_size;
722 1.41.2.2 elad sci_iflush(sc);
723 1.41.2.2 elad CLR(sc->sc_rx_flags, RX_ANY_BLOCK);
724 1.41.2.2 elad #if 0
725 1.41.2.2 elad /* XXX (msaitoh) */
726 1.41.2.2 elad sci_hwiflow(sc);
727 1.41.2.2 elad #endif
728 1.41.2.2 elad
729 1.41.2.2 elad #ifdef SCI_DEBUG
730 1.41.2.2 elad if (sci_debug)
731 1.41.2.2 elad scistatus(sc, "sciopen ");
732 1.41.2.2 elad #endif
733 1.41.2.2 elad
734 1.41.2.2 elad splx(s2);
735 1.41.2.2 elad }
736 1.41.2.2 elad
737 1.41.2.2 elad splx(s);
738 1.41.2.2 elad
739 1.41.2.2 elad error = ttyopen(tp, SCIDIALOUT(dev), ISSET(flag, O_NONBLOCK));
740 1.41.2.2 elad if (error)
741 1.41.2.2 elad goto bad;
742 1.41.2.2 elad
743 1.41.2.2 elad error = (*tp->t_linesw->l_open)(dev, tp);
744 1.41.2.2 elad if (error)
745 1.41.2.2 elad goto bad;
746 1.41.2.2 elad
747 1.41.2.2 elad return (0);
748 1.41.2.2 elad
749 1.41.2.2 elad bad:
750 1.41.2.2 elad
751 1.41.2.2 elad return (error);
752 1.41.2.2 elad }
753 1.41.2.2 elad
754 1.41.2.2 elad int
755 1.41.2.2 elad sciclose(dev_t dev, int flag, int mode, struct lwp *l)
756 1.41.2.2 elad {
757 1.41.2.2 elad struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
758 1.41.2.2 elad struct tty *tp = sc->sc_tty;
759 1.41.2.2 elad
760 1.41.2.2 elad /* XXX This is for cons.c. */
761 1.41.2.2 elad if (!ISSET(tp->t_state, TS_ISOPEN))
762 1.41.2.2 elad return (0);
763 1.41.2.2 elad
764 1.41.2.2 elad (*tp->t_linesw->l_close)(tp, flag);
765 1.41.2.2 elad ttyclose(tp);
766 1.41.2.2 elad
767 1.41.2.2 elad if (!device_is_active(&sc->sc_dev))
768 1.41.2.2 elad return (0);
769 1.41.2.2 elad
770 1.41.2.2 elad return (0);
771 1.41.2.2 elad }
772 1.41.2.2 elad
773 1.41.2.2 elad int
774 1.41.2.2 elad sciread(dev_t dev, struct uio *uio, int flag)
775 1.41.2.2 elad {
776 1.41.2.2 elad struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
777 1.41.2.2 elad struct tty *tp = sc->sc_tty;
778 1.41.2.2 elad
779 1.41.2.2 elad return ((*tp->t_linesw->l_read)(tp, uio, flag));
780 1.41.2.2 elad }
781 1.41.2.2 elad
782 1.41.2.2 elad int
783 1.41.2.2 elad sciwrite(dev_t dev, struct uio *uio, int flag)
784 1.41.2.2 elad {
785 1.41.2.2 elad struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
786 1.41.2.2 elad struct tty *tp = sc->sc_tty;
787 1.41.2.2 elad
788 1.41.2.2 elad return ((*tp->t_linesw->l_write)(tp, uio, flag));
789 1.41.2.2 elad }
790 1.41.2.2 elad
791 1.41.2.2 elad int
792 1.41.2.2 elad scipoll(dev_t dev, int events, struct lwp *l)
793 1.41.2.2 elad {
794 1.41.2.2 elad struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
795 1.41.2.2 elad struct tty *tp = sc->sc_tty;
796 1.41.2.2 elad
797 1.41.2.2 elad return ((*tp->t_linesw->l_poll)(tp, events, l));
798 1.41.2.2 elad }
799 1.41.2.2 elad
800 1.41.2.2 elad struct tty *
801 1.41.2.2 elad scitty(dev_t dev)
802 1.41.2.2 elad {
803 1.41.2.2 elad struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
804 1.41.2.2 elad struct tty *tp = sc->sc_tty;
805 1.41.2.2 elad
806 1.41.2.2 elad return (tp);
807 1.41.2.2 elad }
808 1.41.2.2 elad
809 1.41.2.2 elad int
810 1.41.2.2 elad sciioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct lwp *l)
811 1.41.2.2 elad {
812 1.41.2.2 elad struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
813 1.41.2.2 elad struct tty *tp = sc->sc_tty;
814 1.41.2.2 elad int error;
815 1.41.2.2 elad int s;
816 1.41.2.2 elad
817 1.41.2.2 elad if (!device_is_active(&sc->sc_dev))
818 1.41.2.2 elad return (EIO);
819 1.41.2.2 elad
820 1.41.2.2 elad error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l);
821 1.41.2.2 elad if (error != EPASSTHROUGH)
822 1.41.2.2 elad return (error);
823 1.41.2.2 elad
824 1.41.2.2 elad error = ttioctl(tp, cmd, data, flag, l);
825 1.41.2.2 elad if (error != EPASSTHROUGH)
826 1.41.2.2 elad return (error);
827 1.41.2.2 elad
828 1.41.2.2 elad error = 0;
829 1.41.2.2 elad
830 1.41.2.2 elad s = splserial();
831 1.41.2.2 elad
832 1.41.2.2 elad switch (cmd) {
833 1.41.2.2 elad case TIOCSBRK:
834 1.41.2.2 elad sci_break(sc, 1);
835 1.41.2.2 elad break;
836 1.41.2.2 elad
837 1.41.2.2 elad case TIOCCBRK:
838 1.41.2.2 elad sci_break(sc, 0);
839 1.41.2.2 elad break;
840 1.41.2.2 elad
841 1.41.2.2 elad case TIOCGFLAGS:
842 1.41.2.2 elad *(int *)data = sc->sc_swflags;
843 1.41.2.2 elad break;
844 1.41.2.2 elad
845 1.41.2.2 elad case TIOCSFLAGS:
846 1.41.2.3 elad error = kauth_authorize_generic(l->l_proc->p_cred, KAUTH_GENERIC_ISSUSER, &l->l_proc->p_acflag);
847 1.41.2.2 elad if (error)
848 1.41.2.2 elad break;
849 1.41.2.2 elad sc->sc_swflags = *(int *)data;
850 1.41.2.2 elad break;
851 1.41.2.2 elad
852 1.41.2.2 elad default:
853 1.41.2.2 elad error = EPASSTHROUGH;
854 1.41.2.2 elad break;
855 1.41.2.2 elad }
856 1.41.2.2 elad
857 1.41.2.2 elad splx(s);
858 1.41.2.2 elad
859 1.41.2.2 elad return (error);
860 1.41.2.2 elad }
861 1.41.2.2 elad
862 1.41.2.2 elad integrate void
863 1.41.2.2 elad sci_schedrx(struct sci_softc *sc)
864 1.41.2.2 elad {
865 1.41.2.2 elad
866 1.41.2.2 elad sc->sc_rx_ready = 1;
867 1.41.2.2 elad
868 1.41.2.2 elad /* Wake up the poller. */
869 1.41.2.2 elad #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
870 1.41.2.2 elad softintr_schedule(sc->sc_si);
871 1.41.2.2 elad #else
872 1.41.2.2 elad #ifndef __NO_SOFT_SERIAL_INTERRUPT
873 1.41.2.2 elad setsoftserial();
874 1.41.2.2 elad #else
875 1.41.2.2 elad if (!sci_softintr_scheduled) {
876 1.41.2.2 elad sci_softintr_scheduled = 1;
877 1.41.2.2 elad callout_reset(&sci_soft_ch, 1, scisoft, NULL);
878 1.41.2.2 elad }
879 1.41.2.2 elad #endif
880 1.41.2.2 elad #endif
881 1.41.2.2 elad }
882 1.41.2.2 elad
883 1.41.2.2 elad void
884 1.41.2.2 elad sci_break(struct sci_softc *sc, int onoff)
885 1.41.2.2 elad {
886 1.41.2.2 elad
887 1.41.2.2 elad if (onoff)
888 1.41.2.2 elad SHREG_SCSSR &= ~SCSSR_TDRE;
889 1.41.2.2 elad else
890 1.41.2.2 elad SHREG_SCSSR |= SCSSR_TDRE;
891 1.41.2.2 elad
892 1.41.2.2 elad #if 0 /* XXX */
893 1.41.2.2 elad if (!sc->sc_heldchange) {
894 1.41.2.2 elad if (sc->sc_tx_busy) {
895 1.41.2.2 elad sc->sc_heldtbc = sc->sc_tbc;
896 1.41.2.2 elad sc->sc_tbc = 0;
897 1.41.2.2 elad sc->sc_heldchange = 1;
898 1.41.2.2 elad } else
899 1.41.2.2 elad sci_loadchannelregs(sc);
900 1.41.2.2 elad }
901 1.41.2.2 elad #endif
902 1.41.2.2 elad }
903 1.41.2.2 elad
904 1.41.2.2 elad /*
905 1.41.2.2 elad * Stop output, e.g., for ^S or output flush.
906 1.41.2.2 elad */
907 1.41.2.2 elad void
908 1.41.2.2 elad scistop(struct tty *tp, int flag)
909 1.41.2.2 elad {
910 1.41.2.2 elad struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(tp->t_dev)];
911 1.41.2.2 elad int s;
912 1.41.2.2 elad
913 1.41.2.2 elad s = splserial();
914 1.41.2.2 elad if (ISSET(tp->t_state, TS_BUSY)) {
915 1.41.2.2 elad /* Stop transmitting at the next chunk. */
916 1.41.2.2 elad sc->sc_tbc = 0;
917 1.41.2.2 elad sc->sc_heldtbc = 0;
918 1.41.2.2 elad if (!ISSET(tp->t_state, TS_TTSTOP))
919 1.41.2.2 elad SET(tp->t_state, TS_FLUSH);
920 1.41.2.2 elad }
921 1.41.2.2 elad splx(s);
922 1.41.2.2 elad }
923 1.41.2.2 elad
924 1.41.2.2 elad void
925 1.41.2.2 elad scidiag(void *arg)
926 1.41.2.2 elad {
927 1.41.2.2 elad struct sci_softc *sc = arg;
928 1.41.2.2 elad int overflows, floods;
929 1.41.2.2 elad int s;
930 1.41.2.2 elad
931 1.41.2.2 elad s = splserial();
932 1.41.2.2 elad overflows = sc->sc_overflows;
933 1.41.2.2 elad sc->sc_overflows = 0;
934 1.41.2.2 elad floods = sc->sc_floods;
935 1.41.2.2 elad sc->sc_floods = 0;
936 1.41.2.2 elad sc->sc_errors = 0;
937 1.41.2.2 elad splx(s);
938 1.41.2.2 elad
939 1.41.2.2 elad log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n",
940 1.41.2.2 elad sc->sc_dev.dv_xname,
941 1.41.2.2 elad overflows, overflows == 1 ? "" : "s",
942 1.41.2.2 elad floods, floods == 1 ? "" : "s");
943 1.41.2.2 elad }
944 1.41.2.2 elad
945 1.41.2.2 elad integrate void
946 1.41.2.2 elad sci_rxsoft(struct sci_softc *sc, struct tty *tp)
947 1.41.2.2 elad {
948 1.41.2.2 elad int (*rint)(int, struct tty *) = tp->t_linesw->l_rint;
949 1.41.2.2 elad u_char *get, *end;
950 1.41.2.2 elad u_int cc, scc;
951 1.41.2.2 elad u_char ssr;
952 1.41.2.2 elad int code;
953 1.41.2.2 elad int s;
954 1.41.2.2 elad
955 1.41.2.2 elad end = sc->sc_ebuf;
956 1.41.2.2 elad get = sc->sc_rbget;
957 1.41.2.2 elad scc = cc = sci_rbuf_size - sc->sc_rbavail;
958 1.41.2.2 elad
959 1.41.2.2 elad if (cc == sci_rbuf_size) {
960 1.41.2.2 elad sc->sc_floods++;
961 1.41.2.2 elad if (sc->sc_errors++ == 0)
962 1.41.2.2 elad callout_reset(&sc->sc_diag_ch, 60 * hz, scidiag, sc);
963 1.41.2.2 elad }
964 1.41.2.2 elad
965 1.41.2.2 elad while (cc) {
966 1.41.2.2 elad code = get[0];
967 1.41.2.2 elad ssr = get[1];
968 1.41.2.2 elad if (ISSET(ssr, SCSSR_FER | SCSSR_PER)) {
969 1.41.2.2 elad if (ISSET(ssr, SCSSR_FER))
970 1.41.2.2 elad SET(code, TTY_FE);
971 1.41.2.2 elad if (ISSET(ssr, SCSSR_PER))
972 1.41.2.2 elad SET(code, TTY_PE);
973 1.41.2.2 elad }
974 1.41.2.2 elad if ((*rint)(code, tp) == -1) {
975 1.41.2.2 elad /*
976 1.41.2.2 elad * The line discipline's buffer is out of space.
977 1.41.2.2 elad */
978 1.41.2.2 elad if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) {
979 1.41.2.2 elad /*
980 1.41.2.2 elad * We're either not using flow control, or the
981 1.41.2.2 elad * line discipline didn't tell us to block for
982 1.41.2.2 elad * some reason. Either way, we have no way to
983 1.41.2.2 elad * know when there's more space available, so
984 1.41.2.2 elad * just drop the rest of the data.
985 1.41.2.2 elad */
986 1.41.2.2 elad get += cc << 1;
987 1.41.2.2 elad if (get >= end)
988 1.41.2.2 elad get -= sci_rbuf_size << 1;
989 1.41.2.2 elad cc = 0;
990 1.41.2.2 elad } else {
991 1.41.2.2 elad /*
992 1.41.2.2 elad * Don't schedule any more receive processing
993 1.41.2.2 elad * until the line discipline tells us there's
994 1.41.2.2 elad * space available (through scihwiflow()).
995 1.41.2.2 elad * Leave the rest of the data in the input
996 1.41.2.2 elad * buffer.
997 1.41.2.2 elad */
998 1.41.2.2 elad SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
999 1.41.2.2 elad }
1000 1.41.2.2 elad break;
1001 1.41.2.2 elad }
1002 1.41.2.2 elad get += 2;
1003 1.41.2.2 elad if (get >= end)
1004 1.41.2.2 elad get = sc->sc_rbuf;
1005 1.41.2.2 elad cc--;
1006 1.41.2.2 elad }
1007 1.41.2.2 elad
1008 1.41.2.2 elad if (cc != scc) {
1009 1.41.2.2 elad sc->sc_rbget = get;
1010 1.41.2.2 elad s = splserial();
1011 1.41.2.2 elad cc = sc->sc_rbavail += scc - cc;
1012 1.41.2.2 elad /* Buffers should be ok again, release possible block. */
1013 1.41.2.2 elad if (cc >= sc->sc_r_lowat) {
1014 1.41.2.2 elad if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) {
1015 1.41.2.2 elad CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED);
1016 1.41.2.2 elad SHREG_SCSCR |= SCSCR_RIE;
1017 1.41.2.2 elad }
1018 1.41.2.2 elad #if 0
1019 1.41.2.2 elad if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) {
1020 1.41.2.2 elad CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED);
1021 1.41.2.2 elad sci_hwiflow(sc);
1022 1.41.2.2 elad }
1023 1.41.2.2 elad #endif
1024 1.41.2.2 elad }
1025 1.41.2.2 elad splx(s);
1026 1.41.2.2 elad }
1027 1.41.2.2 elad }
1028 1.41.2.2 elad
1029 1.41.2.2 elad integrate void
1030 1.41.2.2 elad sci_txsoft(sc, tp)
1031 1.41.2.2 elad struct sci_softc *sc;
1032 1.41.2.2 elad struct tty *tp;
1033 1.41.2.2 elad {
1034 1.41.2.2 elad
1035 1.41.2.2 elad CLR(tp->t_state, TS_BUSY);
1036 1.41.2.2 elad if (ISSET(tp->t_state, TS_FLUSH))
1037 1.41.2.2 elad CLR(tp->t_state, TS_FLUSH);
1038 1.41.2.2 elad else
1039 1.41.2.2 elad ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf));
1040 1.41.2.2 elad (*tp->t_linesw->l_start)(tp);
1041 1.41.2.2 elad }
1042 1.41.2.2 elad
1043 1.41.2.2 elad integrate void
1044 1.41.2.2 elad sci_stsoft(struct sci_softc *sc, struct tty *tp)
1045 1.41.2.2 elad {
1046 1.41.2.2 elad #if 0
1047 1.41.2.2 elad /* XXX (msaitoh) */
1048 1.41.2.2 elad u_char msr, delta;
1049 1.41.2.2 elad int s;
1050 1.41.2.2 elad
1051 1.41.2.2 elad s = splserial();
1052 1.41.2.2 elad msr = sc->sc_msr;
1053 1.41.2.2 elad delta = sc->sc_msr_delta;
1054 1.41.2.2 elad sc->sc_msr_delta = 0;
1055 1.41.2.2 elad splx(s);
1056 1.41.2.2 elad
1057 1.41.2.2 elad if (ISSET(delta, sc->sc_msr_dcd)) {
1058 1.41.2.2 elad /*
1059 1.41.2.2 elad * Inform the tty layer that carrier detect changed.
1060 1.41.2.2 elad */
1061 1.41.2.2 elad (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD));
1062 1.41.2.2 elad }
1063 1.41.2.2 elad
1064 1.41.2.2 elad if (ISSET(delta, sc->sc_msr_cts)) {
1065 1.41.2.2 elad /* Block or unblock output according to flow control. */
1066 1.41.2.2 elad if (ISSET(msr, sc->sc_msr_cts)) {
1067 1.41.2.2 elad sc->sc_tx_stopped = 0;
1068 1.41.2.2 elad (*tp->t_linesw->l_start)(tp);
1069 1.41.2.2 elad } else {
1070 1.41.2.2 elad sc->sc_tx_stopped = 1;
1071 1.41.2.2 elad }
1072 1.41.2.2 elad }
1073 1.41.2.2 elad
1074 1.41.2.2 elad #ifdef SCI_DEBUG
1075 1.41.2.2 elad if (sci_debug)
1076 1.41.2.2 elad scistatus(sc, "sci_stsoft");
1077 1.41.2.2 elad #endif
1078 1.41.2.2 elad #endif
1079 1.41.2.2 elad }
1080 1.41.2.2 elad
1081 1.41.2.2 elad #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
1082 1.41.2.2 elad void
1083 1.41.2.2 elad scisoft(void *arg)
1084 1.41.2.2 elad {
1085 1.41.2.2 elad struct sci_softc *sc = arg;
1086 1.41.2.2 elad struct tty *tp;
1087 1.41.2.2 elad
1088 1.41.2.2 elad if (!device_is_active(&sc->sc_dev))
1089 1.41.2.2 elad return;
1090 1.41.2.2 elad
1091 1.41.2.2 elad {
1092 1.41.2.2 elad #else
1093 1.41.2.2 elad void
1094 1.41.2.2 elad #ifndef __NO_SOFT_SERIAL_INTERRUPT
1095 1.41.2.2 elad scisoft()
1096 1.41.2.2 elad #else
1097 1.41.2.2 elad scisoft(void *arg)
1098 1.41.2.2 elad #endif
1099 1.41.2.2 elad {
1100 1.41.2.2 elad struct sci_softc *sc;
1101 1.41.2.2 elad struct tty *tp;
1102 1.41.2.2 elad int unit;
1103 1.41.2.2 elad #ifdef __NO_SOFT_SERIAL_INTERRUPT
1104 1.41.2.2 elad int s;
1105 1.41.2.2 elad
1106 1.41.2.2 elad s = splsoftserial();
1107 1.41.2.2 elad sci_softintr_scheduled = 0;
1108 1.41.2.2 elad #endif
1109 1.41.2.2 elad
1110 1.41.2.2 elad for (unit = 0; unit < sci_cd.cd_ndevs; unit++) {
1111 1.41.2.2 elad sc = sci_cd.cd_devs[unit];
1112 1.41.2.2 elad if (sc == NULL || !ISSET(sc->sc_hwflags, SCI_HW_DEV_OK))
1113 1.41.2.2 elad continue;
1114 1.41.2.2 elad
1115 1.41.2.2 elad if (!device_is_active(&sc->sc_dev))
1116 1.41.2.2 elad continue;
1117 1.41.2.2 elad
1118 1.41.2.2 elad tp = sc->sc_tty;
1119 1.41.2.2 elad if (tp == NULL)
1120 1.41.2.2 elad continue;
1121 1.41.2.2 elad if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0)
1122 1.41.2.2 elad continue;
1123 1.41.2.2 elad #endif
1124 1.41.2.2 elad tp = sc->sc_tty;
1125 1.41.2.2 elad
1126 1.41.2.2 elad if (sc->sc_rx_ready) {
1127 1.41.2.2 elad sc->sc_rx_ready = 0;
1128 1.41.2.2 elad sci_rxsoft(sc, tp);
1129 1.41.2.2 elad }
1130 1.41.2.2 elad
1131 1.41.2.2 elad #if 0
1132 1.41.2.2 elad if (sc->sc_st_check) {
1133 1.41.2.2 elad sc->sc_st_check = 0;
1134 1.41.2.2 elad sci_stsoft(sc, tp);
1135 1.41.2.2 elad }
1136 1.41.2.2 elad #endif
1137 1.41.2.2 elad
1138 1.41.2.2 elad if (sc->sc_tx_done) {
1139 1.41.2.2 elad sc->sc_tx_done = 0;
1140 1.41.2.2 elad sci_txsoft(sc, tp);
1141 1.41.2.2 elad }
1142 1.41.2.2 elad }
1143 1.41.2.2 elad
1144 1.41.2.2 elad #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS
1145 1.41.2.2 elad #ifdef __NO_SOFT_SERIAL_INTERRUPT
1146 1.41.2.2 elad splx(s);
1147 1.41.2.2 elad #endif
1148 1.41.2.2 elad #endif
1149 1.41.2.2 elad }
1150 1.41.2.2 elad
1151 1.41.2.2 elad int
1152 1.41.2.2 elad sciintr(void *arg)
1153 1.41.2.2 elad {
1154 1.41.2.2 elad struct sci_softc *sc = arg;
1155 1.41.2.2 elad u_char *put, *end;
1156 1.41.2.2 elad u_int cc;
1157 1.41.2.2 elad u_short ssr;
1158 1.41.2.2 elad
1159 1.41.2.2 elad if (!device_is_active(&sc->sc_dev))
1160 1.41.2.2 elad return (0);
1161 1.41.2.2 elad
1162 1.41.2.2 elad end = sc->sc_ebuf;
1163 1.41.2.2 elad put = sc->sc_rbput;
1164 1.41.2.2 elad cc = sc->sc_rbavail;
1165 1.41.2.2 elad
1166 1.41.2.2 elad do {
1167 1.41.2.2 elad ssr = SHREG_SCSSR;
1168 1.41.2.2 elad if (ISSET(ssr, SCSSR_FER)) {
1169 1.41.2.2 elad SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_PER | SCSSR_FER);
1170 1.41.2.2 elad #if defined(DDB) || defined(KGDB)
1171 1.41.2.2 elad #ifdef SH4
1172 1.41.2.2 elad if ((SHREG_SCSPTR & SCSPTR_SPB0DT) != 0) {
1173 1.41.2.2 elad #else
1174 1.41.2.2 elad if ((SHREG_SCSPDR & SCSPDR_SCP0DT) != 0) {
1175 1.41.2.2 elad #endif
1176 1.41.2.2 elad #ifdef DDB
1177 1.41.2.2 elad if (ISSET(sc->sc_hwflags, SCI_HW_CONSOLE)) {
1178 1.41.2.2 elad console_debugger();
1179 1.41.2.2 elad }
1180 1.41.2.2 elad #endif
1181 1.41.2.2 elad #ifdef KGDB
1182 1.41.2.2 elad if (ISSET(sc->sc_hwflags, SCI_HW_KGDB)) {
1183 1.41.2.2 elad kgdb_connect(1);
1184 1.41.2.2 elad }
1185 1.41.2.2 elad #endif
1186 1.41.2.2 elad }
1187 1.41.2.2 elad #endif /* DDB || KGDB */
1188 1.41.2.2 elad }
1189 1.41.2.2 elad if ((SHREG_SCSSR & SCSSR_RDRF) != 0) {
1190 1.41.2.2 elad if (cc > 0) {
1191 1.41.2.2 elad put[0] = SHREG_SCRDR;
1192 1.41.2.2 elad put[1] = SHREG_SCSSR & 0x00ff;
1193 1.41.2.2 elad
1194 1.41.2.2 elad put += 2;
1195 1.41.2.2 elad if (put >= end)
1196 1.41.2.2 elad put = sc->sc_rbuf;
1197 1.41.2.2 elad cc--;
1198 1.41.2.2 elad }
1199 1.41.2.2 elad
1200 1.41.2.2 elad SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_FER | SCSSR_PER |
1201 1.41.2.2 elad SCSSR_RDRF);
1202 1.41.2.2 elad
1203 1.41.2.2 elad /*
1204 1.41.2.2 elad * Current string of incoming characters ended because
1205 1.41.2.2 elad * no more data was available or we ran out of space.
1206 1.41.2.2 elad * Schedule a receive event if any data was received.
1207 1.41.2.2 elad * If we're out of space, turn off receive interrupts.
1208 1.41.2.2 elad */
1209 1.41.2.2 elad sc->sc_rbput = put;
1210 1.41.2.2 elad sc->sc_rbavail = cc;
1211 1.41.2.2 elad if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED))
1212 1.41.2.2 elad sc->sc_rx_ready = 1;
1213 1.41.2.2 elad
1214 1.41.2.2 elad /*
1215 1.41.2.2 elad * See if we are in danger of overflowing a buffer. If
1216 1.41.2.2 elad * so, use hardware flow control to ease the pressure.
1217 1.41.2.2 elad */
1218 1.41.2.2 elad if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) &&
1219 1.41.2.2 elad cc < sc->sc_r_hiwat) {
1220 1.41.2.2 elad SET(sc->sc_rx_flags, RX_IBUF_BLOCKED);
1221 1.41.2.2 elad #if 0
1222 1.41.2.2 elad sci_hwiflow(sc);
1223 1.41.2.2 elad #endif
1224 1.41.2.2 elad }
1225 1.41.2.2 elad
1226 1.41.2.2 elad /*
1227 1.41.2.2 elad * If we're out of space, disable receive interrupts
1228 1.41.2.2 elad * until the queue has drained a bit.
1229 1.41.2.2 elad */
1230 1.41.2.2 elad if (!cc) {
1231 1.41.2.2 elad SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED);
1232 1.41.2.2 elad SHREG_SCSCR &= ~SCSCR_RIE;
1233 1.41.2.2 elad }
1234 1.41.2.2 elad } else {
1235 1.41.2.2 elad if (SHREG_SCSSR & SCSSR_RDRF) {
1236 1.41.2.2 elad SHREG_SCSCR &= ~(SCSCR_TIE | SCSCR_RIE);
1237 1.41.2.2 elad delay(10);
1238 1.41.2.2 elad SHREG_SCSCR |= SCSCR_TIE | SCSCR_RIE;
1239 1.41.2.2 elad continue;
1240 1.41.2.2 elad }
1241 1.41.2.2 elad }
1242 1.41.2.2 elad } while (SHREG_SCSSR & SCSSR_RDRF);
1243 1.41.2.2 elad
1244 1.41.2.2 elad #if 0
1245 1.41.2.2 elad msr = bus_space_read_1(iot, ioh, sci_msr);
1246 1.41.2.2 elad delta = msr ^ sc->sc_msr;
1247 1.41.2.2 elad sc->sc_msr = msr;
1248 1.41.2.2 elad if (ISSET(delta, sc->sc_msr_mask)) {
1249 1.41.2.2 elad SET(sc->sc_msr_delta, delta);
1250 1.41.2.2 elad
1251 1.41.2.2 elad /*
1252 1.41.2.2 elad * Pulse-per-second clock signal on edge of DCD?
1253 1.41.2.2 elad */
1254 1.41.2.2 elad if (ISSET(delta, sc->sc_ppsmask)) {
1255 1.41.2.2 elad struct timeval tv;
1256 1.41.2.2 elad if (ISSET(msr, sc->sc_ppsmask) ==
1257 1.41.2.2 elad sc->sc_ppsassert) {
1258 1.41.2.2 elad /* XXX nanotime() */
1259 1.41.2.2 elad microtime(&tv);
1260 1.41.2.2 elad TIMEVAL_TO_TIMESPEC(&tv,
1261 1.41.2.2 elad &sc->ppsinfo.assert_timestamp);
1262 1.41.2.2 elad if (sc->ppsparam.mode & PPS_OFFSETASSERT) {
1263 1.41.2.2 elad timespecadd(&sc->ppsinfo.assert_timestamp,
1264 1.41.2.2 elad &sc->ppsparam.assert_offset,
1265 1.41.2.2 elad &sc->ppsinfo.assert_timestamp);
1266 1.41.2.2 elad TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.assert_timestamp);
1267 1.41.2.2 elad }
1268 1.41.2.2 elad
1269 1.41.2.2 elad #ifdef PPS_SYNC
1270 1.41.2.2 elad if (sc->ppsparam.mode & PPS_HARDPPSONASSERT)
1271 1.41.2.2 elad hardpps(&tv, tv.tv_usec);
1272 1.41.2.2 elad #endif
1273 1.41.2.2 elad sc->ppsinfo.assert_sequence++;
1274 1.41.2.2 elad sc->ppsinfo.current_mode =
1275 1.41.2.2 elad sc->ppsparam.mode;
1276 1.41.2.2 elad
1277 1.41.2.2 elad } else if (ISSET(msr, sc->sc_ppsmask) ==
1278 1.41.2.2 elad sc->sc_ppsclear) {
1279 1.41.2.2 elad /* XXX nanotime() */
1280 1.41.2.2 elad microtime(&tv);
1281 1.41.2.2 elad TIMEVAL_TO_TIMESPEC(&tv,
1282 1.41.2.2 elad &sc->ppsinfo.clear_timestamp);
1283 1.41.2.2 elad if (sc->ppsparam.mode & PPS_OFFSETCLEAR) {
1284 1.41.2.2 elad timespecadd(&sc->ppsinfo.clear_timestamp,
1285 1.41.2.2 elad &sc->ppsparam.clear_offset,
1286 1.41.2.2 elad &sc->ppsinfo.clear_timestamp);
1287 1.41.2.2 elad TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.clear_timestamp);
1288 1.41.2.2 elad }
1289 1.41.2.2 elad
1290 1.41.2.2 elad #ifdef PPS_SYNC
1291 1.41.2.2 elad if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR)
1292 1.41.2.2 elad hardpps(&tv, tv.tv_usec);
1293 1.41.2.2 elad #endif
1294 1.41.2.2 elad sc->ppsinfo.clear_sequence++;
1295 1.41.2.2 elad sc->ppsinfo.current_mode =
1296 1.41.2.2 elad sc->ppsparam.mode;
1297 1.41.2.2 elad }
1298 1.41.2.2 elad }
1299 1.41.2.2 elad
1300 1.41.2.2 elad /*
1301 1.41.2.2 elad * Stop output immediately if we lose the output
1302 1.41.2.2 elad * flow control signal or carrier detect.
1303 1.41.2.2 elad */
1304 1.41.2.2 elad if (ISSET(~msr, sc->sc_msr_mask)) {
1305 1.41.2.2 elad sc->sc_tbc = 0;
1306 1.41.2.2 elad sc->sc_heldtbc = 0;
1307 1.41.2.2 elad #ifdef SCI_DEBUG
1308 1.41.2.2 elad if (sci_debug)
1309 1.41.2.2 elad scistatus(sc, "sciintr ");
1310 1.41.2.2 elad #endif
1311 1.41.2.2 elad }
1312 1.41.2.2 elad
1313 1.41.2.2 elad sc->sc_st_check = 1;
1314 1.41.2.2 elad }
1315 1.41.2.2 elad #endif
1316 1.41.2.2 elad
1317 1.41.2.2 elad /*
1318 1.41.2.2 elad * Done handling any receive interrupts. See if data can be
1319 1.41.2.2 elad * transmitted as well. Schedule tx done event if no data left
1320 1.41.2.2 elad * and tty was marked busy.
1321 1.41.2.2 elad */
1322 1.41.2.2 elad if ((SHREG_SCSSR & SCSSR_TDRE) != 0) {
1323 1.41.2.2 elad /*
1324 1.41.2.2 elad * If we've delayed a parameter change, do it now, and restart
1325 1.41.2.2 elad * output.
1326 1.41.2.2 elad */
1327 1.41.2.2 elad if (sc->sc_heldchange) {
1328 1.41.2.2 elad sc->sc_heldchange = 0;
1329 1.41.2.2 elad sc->sc_tbc = sc->sc_heldtbc;
1330 1.41.2.2 elad sc->sc_heldtbc = 0;
1331 1.41.2.2 elad }
1332 1.41.2.2 elad
1333 1.41.2.2 elad /* Output the next chunk of the contiguous buffer, if any. */
1334 1.41.2.2 elad if (sc->sc_tbc > 0) {
1335 1.41.2.2 elad sci_putc(*(sc->sc_tba));
1336 1.41.2.2 elad sc->sc_tba++;
1337 1.41.2.2 elad sc->sc_tbc--;
1338 1.41.2.2 elad } else {
1339 1.41.2.2 elad /* Disable transmit completion interrupts if necessary. */
1340 1.41.2.2 elad #if 0
1341 1.41.2.2 elad if (ISSET(sc->sc_ier, IER_ETXRDY))
1342 1.41.2.2 elad #endif
1343 1.41.2.2 elad SHREG_SCSCR &= ~SCSCR_TIE;
1344 1.41.2.2 elad
1345 1.41.2.2 elad if (sc->sc_tx_busy) {
1346 1.41.2.2 elad sc->sc_tx_busy = 0;
1347 1.41.2.2 elad sc->sc_tx_done = 1;
1348 1.41.2.2 elad }
1349 1.41.2.2 elad }
1350 1.41.2.2 elad }
1351 1.41.2.2 elad
1352 1.41.2.2 elad /* Wake up the poller. */
1353 1.41.2.2 elad #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
1354 1.41.2.2 elad softintr_schedule(sc->sc_si);
1355 1.41.2.2 elad #else
1356 1.41.2.2 elad #ifndef __NO_SOFT_SERIAL_INTERRUPT
1357 1.41.2.2 elad setsoftserial();
1358 1.41.2.2 elad #else
1359 1.41.2.2 elad if (!sci_softintr_scheduled) {
1360 1.41.2.2 elad sci_softintr_scheduled = 1;
1361 1.41.2.2 elad callout_reset(&sci_soft_ch, 1, scisoft, 1);
1362 1.41.2.2 elad }
1363 1.41.2.2 elad #endif
1364 1.41.2.2 elad #endif
1365 1.41.2.2 elad
1366 1.41.2.2 elad #if NRND > 0 && defined(RND_SCI)
1367 1.41.2.2 elad rnd_add_uint32(&sc->rnd_source, iir | lsr);
1368 1.41.2.2 elad #endif
1369 1.41.2.2 elad
1370 1.41.2.2 elad return (1);
1371 1.41.2.2 elad }
1372 1.41.2.2 elad
1373 1.41.2.2 elad void
1374 1.41.2.2 elad scicnprobe(cp)
1375 1.41.2.2 elad struct consdev *cp;
1376 1.41.2.2 elad {
1377 1.41.2.2 elad int maj;
1378 1.41.2.2 elad
1379 1.41.2.2 elad /* locate the major number */
1380 1.41.2.2 elad maj = cdevsw_lookup_major(&sci_cdevsw);
1381 1.41.2.2 elad
1382 1.41.2.2 elad /* Initialize required fields. */
1383 1.41.2.2 elad cp->cn_dev = makedev(maj, 0);
1384 1.41.2.2 elad #ifdef SCICONSOLE
1385 1.41.2.2 elad cp->cn_pri = CN_REMOTE;
1386 1.41.2.2 elad #else
1387 1.41.2.2 elad cp->cn_pri = CN_NORMAL;
1388 1.41.2.2 elad #endif
1389 1.41.2.2 elad }
1390 1.41.2.2 elad
1391 1.41.2.2 elad void
1392 1.41.2.2 elad scicninit(struct consdev *cp)
1393 1.41.2.2 elad {
1394 1.41.2.2 elad
1395 1.41.2.2 elad InitializeSci(scicn_speed);
1396 1.41.2.2 elad sciisconsole = 1;
1397 1.41.2.2 elad }
1398 1.41.2.2 elad
1399 1.41.2.2 elad int
1400 1.41.2.2 elad scicngetc(dev_t dev)
1401 1.41.2.2 elad {
1402 1.41.2.2 elad int c;
1403 1.41.2.2 elad int s;
1404 1.41.2.2 elad
1405 1.41.2.2 elad s = splserial();
1406 1.41.2.2 elad c = sci_getc();
1407 1.41.2.2 elad splx(s);
1408 1.41.2.2 elad
1409 1.41.2.2 elad return (c);
1410 1.41.2.2 elad }
1411 1.41.2.2 elad
1412 1.41.2.2 elad void
1413 1.41.2.2 elad scicnputc(dev_t dev, int c)
1414 1.41.2.2 elad {
1415 1.41.2.2 elad int s;
1416 1.41.2.2 elad
1417 1.41.2.2 elad s = splserial();
1418 1.41.2.2 elad sci_putc((u_char)c);
1419 1.41.2.2 elad splx(s);
1420 1.41.2.2 elad }
1421