sci.c revision 1.44 1 1.44 elad /* $NetBSD: sci.c,v 1.44 2006/10/01 18:56:22 elad Exp $ */
2 1.1 itojun
3 1.1 itojun /*-
4 1.1 itojun * Copyright (C) 1999 T.Horiuchi and SAITOH Masanobu. All rights reserved.
5 1.1 itojun *
6 1.1 itojun * Redistribution and use in source and binary forms, with or without
7 1.1 itojun * modification, are permitted provided that the following conditions
8 1.1 itojun * are met:
9 1.1 itojun * 1. Redistributions of source code must retain the above copyright
10 1.1 itojun * notice, this list of conditions and the following disclaimer.
11 1.1 itojun * 2. Redistributions in binary form must reproduce the above copyright
12 1.1 itojun * notice, this list of conditions and the following disclaimer in the
13 1.1 itojun * documentation and/or other materials provided with the distribution.
14 1.1 itojun * 3. The name of the author may not be used to endorse or promote products
15 1.1 itojun * derived from this software without specific prior written permission.
16 1.1 itojun *
17 1.1 itojun * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 1.1 itojun * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 1.1 itojun * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 1.1 itojun * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 1.1 itojun * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 1.1 itojun * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 1.1 itojun * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 1.1 itojun * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 1.1 itojun * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 1.1 itojun * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 1.1 itojun */
28 1.1 itojun
29 1.2 msaitoh /*-
30 1.2 msaitoh * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
31 1.2 msaitoh * All rights reserved.
32 1.2 msaitoh *
33 1.2 msaitoh * This code is derived from software contributed to The NetBSD Foundation
34 1.2 msaitoh * by Charles M. Hannum.
35 1.2 msaitoh *
36 1.2 msaitoh * Redistribution and use in source and binary forms, with or without
37 1.2 msaitoh * modification, are permitted provided that the following conditions
38 1.2 msaitoh * are met:
39 1.2 msaitoh * 1. Redistributions of source code must retain the above copyright
40 1.2 msaitoh * notice, this list of conditions and the following disclaimer.
41 1.2 msaitoh * 2. Redistributions in binary form must reproduce the above copyright
42 1.2 msaitoh * notice, this list of conditions and the following disclaimer in the
43 1.2 msaitoh * documentation and/or other materials provided with the distribution.
44 1.2 msaitoh * 3. All advertising materials mentioning features or use of this software
45 1.2 msaitoh * must display the following acknowledgement:
46 1.2 msaitoh * This product includes software developed by the NetBSD
47 1.2 msaitoh * Foundation, Inc. and its contributors.
48 1.2 msaitoh * 4. Neither the name of The NetBSD Foundation nor the names of its
49 1.2 msaitoh * contributors may be used to endorse or promote products derived
50 1.2 msaitoh * from this software without specific prior written permission.
51 1.2 msaitoh *
52 1.2 msaitoh * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
53 1.2 msaitoh * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
54 1.2 msaitoh * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
55 1.2 msaitoh * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
56 1.2 msaitoh * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
57 1.2 msaitoh * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
58 1.2 msaitoh * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
59 1.2 msaitoh * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
60 1.2 msaitoh * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
61 1.2 msaitoh * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
62 1.2 msaitoh * POSSIBILITY OF SUCH DAMAGE.
63 1.2 msaitoh */
64 1.2 msaitoh
65 1.2 msaitoh /*
66 1.2 msaitoh * Copyright (c) 1991 The Regents of the University of California.
67 1.2 msaitoh * All rights reserved.
68 1.2 msaitoh *
69 1.2 msaitoh * Redistribution and use in source and binary forms, with or without
70 1.2 msaitoh * modification, are permitted provided that the following conditions
71 1.2 msaitoh * are met:
72 1.2 msaitoh * 1. Redistributions of source code must retain the above copyright
73 1.2 msaitoh * notice, this list of conditions and the following disclaimer.
74 1.2 msaitoh * 2. Redistributions in binary form must reproduce the above copyright
75 1.2 msaitoh * notice, this list of conditions and the following disclaimer in the
76 1.2 msaitoh * documentation and/or other materials provided with the distribution.
77 1.35 agc * 3. Neither the name of the University nor the names of its contributors
78 1.2 msaitoh * may be used to endorse or promote products derived from this software
79 1.2 msaitoh * without specific prior written permission.
80 1.2 msaitoh *
81 1.2 msaitoh * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
82 1.2 msaitoh * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
83 1.2 msaitoh * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
84 1.2 msaitoh * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
85 1.2 msaitoh * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
86 1.2 msaitoh * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
87 1.2 msaitoh * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
88 1.2 msaitoh * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
89 1.2 msaitoh * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
90 1.2 msaitoh * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
91 1.2 msaitoh * SUCH DAMAGE.
92 1.2 msaitoh *
93 1.2 msaitoh * @(#)com.c 7.5 (Berkeley) 5/16/91
94 1.2 msaitoh */
95 1.2 msaitoh
96 1.2 msaitoh /*
97 1.2 msaitoh * SH internal serial driver
98 1.2 msaitoh *
99 1.2 msaitoh * This code is derived from both z8530tty.c and com.c
100 1.2 msaitoh */
101 1.34 lukem
102 1.34 lukem #include <sys/cdefs.h>
103 1.44 elad __KERNEL_RCSID(0, "$NetBSD: sci.c,v 1.44 2006/10/01 18:56:22 elad Exp $");
104 1.2 msaitoh
105 1.14 lukem #include "opt_kgdb.h"
106 1.1 itojun #include "opt_sci.h"
107 1.1 itojun
108 1.1 itojun #include <sys/param.h>
109 1.1 itojun #include <sys/systm.h>
110 1.1 itojun #include <sys/tty.h>
111 1.1 itojun #include <sys/proc.h>
112 1.1 itojun #include <sys/conf.h>
113 1.1 itojun #include <sys/file.h>
114 1.1 itojun #include <sys/syslog.h>
115 1.1 itojun #include <sys/kernel.h>
116 1.1 itojun #include <sys/device.h>
117 1.1 itojun #include <sys/malloc.h>
118 1.42 elad #include <sys/kauth.h>
119 1.1 itojun
120 1.1 itojun #include <dev/cons.h>
121 1.1 itojun
122 1.19 uch #include <sh3/clock.h>
123 1.1 itojun #include <sh3/scireg.h>
124 1.22 uch #include <sh3/pfcreg.h>
125 1.1 itojun #include <sh3/tmureg.h>
126 1.22 uch #include <sh3/exception.h>
127 1.22 uch #include <machine/intr.h>
128 1.1 itojun
129 1.18 uch static void scistart(struct tty *);
130 1.18 uch static int sciparam(struct tty *, struct termios *);
131 1.1 itojun
132 1.18 uch void scicnprobe(struct consdev *);
133 1.18 uch void scicninit(struct consdev *);
134 1.18 uch void scicnputc(dev_t, int);
135 1.18 uch int scicngetc(dev_t);
136 1.18 uch void scicnpoolc(dev_t, int);
137 1.18 uch int sciintr(void *);
138 1.1 itojun
139 1.1 itojun struct sci_softc {
140 1.1 itojun struct device sc_dev; /* boilerplate */
141 1.1 itojun struct tty *sc_tty;
142 1.22 uch void *sc_si;
143 1.7 thorpej struct callout sc_diag_ch;
144 1.7 thorpej
145 1.1 itojun #if 0
146 1.1 itojun bus_space_tag_t sc_iot; /* ISA i/o space identifier */
147 1.1 itojun bus_space_handle_t sc_ioh; /* ISA io handle */
148 1.1 itojun
149 1.1 itojun int sc_drq;
150 1.1 itojun
151 1.1 itojun int sc_frequency;
152 1.1 itojun #endif
153 1.1 itojun
154 1.1 itojun u_int sc_overflows,
155 1.1 itojun sc_floods,
156 1.1 itojun sc_errors; /* number of retries so far */
157 1.1 itojun u_char sc_status[7]; /* copy of registers */
158 1.1 itojun
159 1.1 itojun int sc_hwflags;
160 1.1 itojun int sc_swflags;
161 1.1 itojun u_int sc_fifolen; /* XXX always 0? */
162 1.1 itojun
163 1.1 itojun u_int sc_r_hiwat,
164 1.1 itojun sc_r_lowat;
165 1.1 itojun u_char *volatile sc_rbget,
166 1.1 itojun *volatile sc_rbput;
167 1.1 itojun volatile u_int sc_rbavail;
168 1.1 itojun u_char *sc_rbuf,
169 1.1 itojun *sc_ebuf;
170 1.1 itojun
171 1.1 itojun u_char *sc_tba; /* transmit buffer address */
172 1.1 itojun u_int sc_tbc, /* transmit byte count */
173 1.1 itojun sc_heldtbc;
174 1.1 itojun
175 1.2 msaitoh volatile u_char sc_rx_flags, /* receiver blocked */
176 1.1 itojun #define RX_TTY_BLOCKED 0x01
177 1.1 itojun #define RX_TTY_OVERFLOWED 0x02
178 1.1 itojun #define RX_IBUF_BLOCKED 0x04
179 1.1 itojun #define RX_IBUF_OVERFLOWED 0x08
180 1.1 itojun #define RX_ANY_BLOCK 0x0f
181 1.3 msaitoh sc_tx_busy, /* working on an output chunk */
182 1.3 msaitoh sc_tx_done, /* done with one output chunk */
183 1.2 msaitoh sc_tx_stopped, /* H/W level stop (lost CTS) */
184 1.2 msaitoh sc_st_check, /* got a status interrupt */
185 1.1 itojun sc_rx_ready;
186 1.1 itojun
187 1.1 itojun volatile u_char sc_heldchange;
188 1.1 itojun };
189 1.1 itojun
190 1.1 itojun /* controller driver configuration */
191 1.18 uch static int sci_match(struct device *, struct cfdata *, void *);
192 1.18 uch static void sci_attach(struct device *, struct device *, void *);
193 1.1 itojun
194 1.18 uch void sci_break(struct sci_softc *, int);
195 1.18 uch void sci_iflush(struct sci_softc *);
196 1.1 itojun
197 1.1 itojun #define integrate static inline
198 1.12 thorpej #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
199 1.18 uch void scisoft(void *);
200 1.1 itojun #else
201 1.1 itojun #ifndef __NO_SOFT_SERIAL_INTERRUPT
202 1.18 uch void scisoft(void);
203 1.1 itojun #else
204 1.18 uch void scisoft(void *);
205 1.1 itojun #endif
206 1.1 itojun #endif
207 1.18 uch integrate void sci_rxsoft(struct sci_softc *, struct tty *);
208 1.18 uch integrate void sci_txsoft(struct sci_softc *, struct tty *);
209 1.18 uch integrate void sci_stsoft(struct sci_softc *, struct tty *);
210 1.18 uch integrate void sci_schedrx(struct sci_softc *);
211 1.18 uch void scidiag(void *);
212 1.1 itojun
213 1.1 itojun #define SCIUNIT_MASK 0x7ffff
214 1.1 itojun #define SCIDIALOUT_MASK 0x80000
215 1.1 itojun
216 1.1 itojun #define SCIUNIT(x) (minor(x) & SCIUNIT_MASK)
217 1.1 itojun #define SCIDIALOUT(x) (minor(x) & SCIDIALOUT_MASK)
218 1.1 itojun
219 1.1 itojun /* Hardware flag masks */
220 1.1 itojun #define SCI_HW_NOIEN 0x01
221 1.1 itojun #define SCI_HW_FIFO 0x02
222 1.1 itojun #define SCI_HW_FLOW 0x08
223 1.1 itojun #define SCI_HW_DEV_OK 0x20
224 1.1 itojun #define SCI_HW_CONSOLE 0x40
225 1.1 itojun #define SCI_HW_KGDB 0x80
226 1.1 itojun
227 1.1 itojun /* Buffer size for character buffer */
228 1.1 itojun #define SCI_RING_SIZE 2048
229 1.1 itojun
230 1.1 itojun /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */
231 1.1 itojun u_int sci_rbuf_hiwat = (SCI_RING_SIZE * 1) / 4;
232 1.1 itojun u_int sci_rbuf_lowat = (SCI_RING_SIZE * 3) / 4;
233 1.1 itojun
234 1.25 uch #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
235 1.1 itojun int sciconscflag = CONMODE;
236 1.8 msaitoh int sciisconsole = 0;
237 1.1 itojun
238 1.6 msaitoh #ifdef SCICN_SPEED
239 1.6 msaitoh int scicn_speed = SCICN_SPEED;
240 1.6 msaitoh #else
241 1.6 msaitoh int scicn_speed = 9600;
242 1.6 msaitoh #endif
243 1.6 msaitoh
244 1.1 itojun #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */
245 1.1 itojun
246 1.12 thorpej #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS
247 1.1 itojun #ifdef __NO_SOFT_SERIAL_INTERRUPT
248 1.1 itojun volatile int sci_softintr_scheduled;
249 1.7 thorpej struct callout sci_soft_ch = CALLOUT_INITIALIZER;
250 1.1 itojun #endif
251 1.1 itojun #endif
252 1.1 itojun
253 1.1 itojun u_int sci_rbuf_size = SCI_RING_SIZE;
254 1.1 itojun
255 1.31 thorpej CFATTACH_DECL(sci, sizeof(struct sci_softc),
256 1.32 thorpej sci_match, sci_attach, NULL, NULL);
257 1.1 itojun
258 1.1 itojun extern struct cfdriver sci_cd;
259 1.1 itojun
260 1.36 chs static int sci_attached;
261 1.36 chs
262 1.28 gehenna dev_type_open(sciopen);
263 1.28 gehenna dev_type_close(sciclose);
264 1.28 gehenna dev_type_read(sciread);
265 1.28 gehenna dev_type_write(sciwrite);
266 1.28 gehenna dev_type_ioctl(sciioctl);
267 1.28 gehenna dev_type_stop(scistop);
268 1.28 gehenna dev_type_tty(scitty);
269 1.28 gehenna dev_type_poll(scipoll);
270 1.28 gehenna
271 1.28 gehenna const struct cdevsw sci_cdevsw = {
272 1.28 gehenna sciopen, sciclose, sciread, sciwrite, sciioctl,
273 1.33 jdolecek scistop, scitty, scipoll, nommap, ttykqfilter, D_TTY
274 1.28 gehenna };
275 1.1 itojun
276 1.18 uch void InitializeSci (unsigned int);
277 1.1 itojun
278 1.1 itojun /*
279 1.1 itojun * following functions are debugging prupose only
280 1.1 itojun */
281 1.25 uch #define CR 0x0D
282 1.25 uch #define I2C_ADRS (*(volatile unsigned int *)0xa8000000)
283 1.25 uch #define USART_ON (unsigned int)~0x08
284 1.1 itojun
285 1.18 uch void sci_putc(unsigned char);
286 1.18 uch unsigned char sci_getc(void);
287 1.18 uch int SciErrCheck(void);
288 1.1 itojun
289 1.1 itojun /*
290 1.1 itojun * InitializeSci
291 1.1 itojun * : unsigned int bps;
292 1.1 itojun * : SCI(Serial Communication Interface)
293 1.1 itojun */
294 1.1 itojun
295 1.1 itojun void
296 1.18 uch InitializeSci(unsigned int bps)
297 1.1 itojun {
298 1.1 itojun
299 1.1 itojun /* Initialize SCR */
300 1.3 msaitoh SHREG_SCSCR = 0x00;
301 1.1 itojun
302 1.3 msaitoh /* Serial Mode Register */
303 1.3 msaitoh SHREG_SCSMR = 0x00; /* Async,8bit,NonParity,Even,1Stop,NoMulti */
304 1.1 itojun
305 1.3 msaitoh /* Bit Rate Register */
306 1.20 uch SHREG_SCBRR = divrnd(sh_clock_get_pclock(), 32 * bps) - 1;
307 1.1 itojun
308 1.3 msaitoh /*
309 1.3 msaitoh * wait 1mSec, because Send/Recv must begin 1 bit period after
310 1.3 msaitoh * BRR is set.
311 1.3 msaitoh */
312 1.19 uch delay(1000);
313 1.1 itojun
314 1.15 wiz /* Send permission, Receive permission ON */
315 1.3 msaitoh SHREG_SCSCR = SCSCR_TE | SCSCR_RE;
316 1.1 itojun
317 1.6 msaitoh /* Serial Status Register */
318 1.1 itojun SHREG_SCSSR &= SCSSR_TDRE; /* Clear Status */
319 1.1 itojun
320 1.1 itojun #if 0
321 1.1 itojun I2C_ADRS &= ~0x08; /* enable RS-232C */
322 1.1 itojun #endif
323 1.1 itojun }
324 1.1 itojun
325 1.1 itojun
326 1.1 itojun /*
327 1.11 msaitoh * sci_putc
328 1.1 itojun * : unsigned char c;
329 1.1 itojun */
330 1.1 itojun void
331 1.18 uch sci_putc(unsigned char c)
332 1.1 itojun {
333 1.11 msaitoh
334 1.1 itojun /* wait for ready */
335 1.37 matt while ((SHREG_SCSSR & SCSSR_TDRE) == 0)
336 1.1 itojun ;
337 1.1 itojun
338 1.1 itojun /* write send data to send register */
339 1.1 itojun SHREG_SCTDR = c;
340 1.1 itojun
341 1.1 itojun /* clear ready flag */
342 1.1 itojun SHREG_SCSSR &= ~SCSSR_TDRE;
343 1.1 itojun }
344 1.1 itojun
345 1.1 itojun /*
346 1.1 itojun * : SciErrCheck
347 1.1 itojun * 0x20 = over run
348 1.1 itojun * 0x10 = frame error
349 1.1 itojun * 0x80 = parity error
350 1.1 itojun */
351 1.1 itojun int
352 1.1 itojun SciErrCheck(void)
353 1.1 itojun {
354 1.1 itojun
355 1.1 itojun return(SHREG_SCSSR & (SCSSR_ORER | SCSSR_FER | SCSSR_PER));
356 1.1 itojun }
357 1.1 itojun
358 1.1 itojun /*
359 1.11 msaitoh * sci_getc
360 1.1 itojun */
361 1.1 itojun unsigned char
362 1.11 msaitoh sci_getc(void)
363 1.1 itojun {
364 1.1 itojun unsigned char c, err_c;
365 1.1 itojun
366 1.1 itojun while (((err_c = SHREG_SCSSR)
367 1.1 itojun & (SCSSR_RDRF | SCSSR_ORER | SCSSR_FER | SCSSR_PER)) == 0)
368 1.1 itojun ;
369 1.9 msaitoh if ((err_c & (SCSSR_ORER | SCSSR_FER | SCSSR_PER)) != 0) {
370 1.9 msaitoh SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_FER | SCSSR_PER);
371 1.1 itojun return(err_c |= 0x80);
372 1.9 msaitoh }
373 1.1 itojun
374 1.1 itojun c = SHREG_SCRDR;
375 1.1 itojun
376 1.1 itojun SHREG_SCSSR &= ~SCSSR_RDRF;
377 1.1 itojun
378 1.1 itojun return(c);
379 1.1 itojun }
380 1.1 itojun
381 1.1 itojun static int
382 1.18 uch sci_match(struct device *parent, struct cfdata *cfp, void *aux)
383 1.1 itojun {
384 1.1 itojun
385 1.36 chs if (strcmp(cfp->cf_name, "sci") || sci_attached)
386 1.1 itojun return 0;
387 1.1 itojun
388 1.1 itojun return 1;
389 1.1 itojun }
390 1.1 itojun
391 1.1 itojun static void
392 1.18 uch sci_attach(struct device *parent, struct device *self, void *aux)
393 1.1 itojun {
394 1.1 itojun struct sci_softc *sc = (struct sci_softc *)self;
395 1.1 itojun struct tty *tp;
396 1.1 itojun
397 1.36 chs sci_attached = 1;
398 1.36 chs
399 1.1 itojun sc->sc_hwflags = 0; /* XXX */
400 1.1 itojun sc->sc_swflags = 0; /* XXX */
401 1.1 itojun sc->sc_fifolen = 0; /* XXX */
402 1.1 itojun
403 1.8 msaitoh if (sciisconsole) {
404 1.8 msaitoh SET(sc->sc_hwflags, SCI_HW_CONSOLE);
405 1.8 msaitoh SET(sc->sc_swflags, TIOCFLAG_SOFTCAR);
406 1.8 msaitoh printf("\n%s: console\n", sc->sc_dev.dv_xname);
407 1.8 msaitoh } else {
408 1.8 msaitoh InitializeSci(9600);
409 1.8 msaitoh printf("\n");
410 1.8 msaitoh }
411 1.1 itojun
412 1.7 thorpej callout_init(&sc->sc_diag_ch);
413 1.7 thorpej
414 1.22 uch intc_intr_establish(SH_INTEVT_SCI_ERI, IST_LEVEL, IPL_SERIAL, sciintr,
415 1.22 uch sc);
416 1.22 uch intc_intr_establish(SH_INTEVT_SCI_RXI, IST_LEVEL, IPL_SERIAL, sciintr,
417 1.22 uch sc);
418 1.22 uch intc_intr_establish(SH_INTEVT_SCI_TXI, IST_LEVEL, IPL_SERIAL, sciintr,
419 1.22 uch sc);
420 1.22 uch intc_intr_establish(SH_INTEVT_SCI_TEI, IST_LEVEL, IPL_SERIAL, sciintr,
421 1.22 uch sc);
422 1.1 itojun
423 1.24 msaitoh #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
424 1.24 msaitoh sc->sc_si = softintr_establish(IPL_SOFTSERIAL, scisoft, sc);
425 1.24 msaitoh #endif
426 1.8 msaitoh SET(sc->sc_hwflags, SCI_HW_DEV_OK);
427 1.1 itojun
428 1.1 itojun tp = ttymalloc();
429 1.1 itojun tp->t_oproc = scistart;
430 1.1 itojun tp->t_param = sciparam;
431 1.1 itojun tp->t_hwiflow = NULL;
432 1.1 itojun
433 1.1 itojun sc->sc_tty = tp;
434 1.1 itojun sc->sc_rbuf = malloc(sci_rbuf_size << 1, M_DEVBUF, M_NOWAIT);
435 1.1 itojun if (sc->sc_rbuf == NULL) {
436 1.1 itojun printf("%s: unable to allocate ring buffer\n",
437 1.1 itojun sc->sc_dev.dv_xname);
438 1.1 itojun return;
439 1.1 itojun }
440 1.1 itojun sc->sc_ebuf = sc->sc_rbuf + (sci_rbuf_size << 1);
441 1.1 itojun
442 1.1 itojun tty_attach(tp);
443 1.1 itojun }
444 1.1 itojun
445 1.1 itojun /*
446 1.1 itojun * Start or restart transmission.
447 1.1 itojun */
448 1.1 itojun static void
449 1.18 uch scistart(struct tty *tp)
450 1.1 itojun {
451 1.1 itojun struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(tp->t_dev)];
452 1.1 itojun int s;
453 1.1 itojun
454 1.1 itojun s = spltty();
455 1.1 itojun if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP))
456 1.1 itojun goto out;
457 1.1 itojun if (sc->sc_tx_stopped)
458 1.1 itojun goto out;
459 1.1 itojun
460 1.1 itojun if (tp->t_outq.c_cc <= tp->t_lowat) {
461 1.1 itojun if (ISSET(tp->t_state, TS_ASLEEP)) {
462 1.1 itojun CLR(tp->t_state, TS_ASLEEP);
463 1.1 itojun wakeup(&tp->t_outq);
464 1.1 itojun }
465 1.1 itojun selwakeup(&tp->t_wsel);
466 1.1 itojun if (tp->t_outq.c_cc == 0)
467 1.1 itojun goto out;
468 1.1 itojun }
469 1.1 itojun
470 1.1 itojun /* Grab the first contiguous region of buffer space. */
471 1.1 itojun {
472 1.1 itojun u_char *tba;
473 1.1 itojun int tbc;
474 1.1 itojun
475 1.1 itojun tba = tp->t_outq.c_cf;
476 1.1 itojun tbc = ndqb(&tp->t_outq, 0);
477 1.1 itojun
478 1.1 itojun (void)splserial();
479 1.1 itojun
480 1.1 itojun sc->sc_tba = tba;
481 1.1 itojun sc->sc_tbc = tbc;
482 1.1 itojun }
483 1.1 itojun
484 1.1 itojun SET(tp->t_state, TS_BUSY);
485 1.1 itojun sc->sc_tx_busy = 1;
486 1.1 itojun
487 1.1 itojun /* Enable transmit completion interrupts if necessary. */
488 1.1 itojun SHREG_SCSCR |= SCSCR_TIE | SCSCR_RIE;
489 1.1 itojun
490 1.1 itojun /* Output the first byte of the contiguous buffer. */
491 1.1 itojun {
492 1.1 itojun if (sc->sc_tbc > 0) {
493 1.11 msaitoh sci_putc(*(sc->sc_tba));
494 1.1 itojun sc->sc_tba++;
495 1.1 itojun sc->sc_tbc--;
496 1.1 itojun }
497 1.1 itojun }
498 1.1 itojun out:
499 1.1 itojun splx(s);
500 1.1 itojun return;
501 1.1 itojun }
502 1.1 itojun
503 1.1 itojun /*
504 1.1 itojun * Set SCI tty parameters from termios.
505 1.1 itojun * XXX - Should just copy the whole termios after
506 1.1 itojun * making sure all the changes could be done.
507 1.1 itojun */
508 1.1 itojun static int
509 1.18 uch sciparam(struct tty *tp, struct termios *t)
510 1.1 itojun {
511 1.1 itojun struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(tp->t_dev)];
512 1.1 itojun int ospeed = t->c_ospeed;
513 1.1 itojun int s;
514 1.1 itojun
515 1.40 thorpej if (!device_is_active(&sc->sc_dev))
516 1.1 itojun return (EIO);
517 1.1 itojun
518 1.1 itojun /* Check requested parameters. */
519 1.1 itojun if (ospeed < 0)
520 1.1 itojun return (EINVAL);
521 1.1 itojun if (t->c_ispeed && t->c_ispeed != t->c_ospeed)
522 1.1 itojun return (EINVAL);
523 1.1 itojun
524 1.1 itojun /*
525 1.1 itojun * For the console, always force CLOCAL and !HUPCL, so that the port
526 1.1 itojun * is always active.
527 1.1 itojun */
528 1.1 itojun if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) ||
529 1.1 itojun ISSET(sc->sc_hwflags, SCI_HW_CONSOLE)) {
530 1.1 itojun SET(t->c_cflag, CLOCAL);
531 1.1 itojun CLR(t->c_cflag, HUPCL);
532 1.1 itojun }
533 1.1 itojun
534 1.1 itojun /*
535 1.1 itojun * If there were no changes, don't do anything. This avoids dropping
536 1.1 itojun * input and improves performance when all we did was frob things like
537 1.1 itojun * VMIN and VTIME.
538 1.1 itojun */
539 1.1 itojun if (tp->t_ospeed == t->c_ospeed &&
540 1.1 itojun tp->t_cflag == t->c_cflag)
541 1.1 itojun return (0);
542 1.1 itojun
543 1.1 itojun #if 0
544 1.1 itojun /* XXX (msaitoh) */
545 1.1 itojun lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag);
546 1.1 itojun #endif
547 1.1 itojun
548 1.1 itojun s = splserial();
549 1.1 itojun
550 1.1 itojun /*
551 1.1 itojun * Set the FIFO threshold based on the receive speed.
552 1.1 itojun *
553 1.1 itojun * * If it's a low speed, it's probably a mouse or some other
554 1.1 itojun * interactive device, so set the threshold low.
555 1.1 itojun * * If it's a high speed, trim the trigger level down to prevent
556 1.1 itojun * overflows.
557 1.1 itojun * * Otherwise set it a bit higher.
558 1.1 itojun */
559 1.1 itojun #if 0
560 1.1 itojun /* XXX (msaitoh) */
561 1.1 itojun if (ISSET(sc->sc_hwflags, SCI_HW_HAYESP))
562 1.1 itojun sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8;
563 1.1 itojun else if (ISSET(sc->sc_hwflags, SCI_HW_FIFO))
564 1.1 itojun sc->sc_fifo = FIFO_ENABLE |
565 1.1 itojun (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 :
566 1.1 itojun t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4);
567 1.1 itojun else
568 1.1 itojun sc->sc_fifo = 0;
569 1.1 itojun #endif
570 1.1 itojun
571 1.1 itojun /* And copy to tty. */
572 1.1 itojun tp->t_ispeed = 0;
573 1.1 itojun tp->t_ospeed = t->c_ospeed;
574 1.1 itojun tp->t_cflag = t->c_cflag;
575 1.1 itojun
576 1.1 itojun if (!sc->sc_heldchange) {
577 1.1 itojun if (sc->sc_tx_busy) {
578 1.1 itojun sc->sc_heldtbc = sc->sc_tbc;
579 1.1 itojun sc->sc_tbc = 0;
580 1.1 itojun sc->sc_heldchange = 1;
581 1.1 itojun }
582 1.1 itojun #if 0
583 1.1 itojun /* XXX (msaitoh) */
584 1.1 itojun else
585 1.1 itojun sci_loadchannelregs(sc);
586 1.1 itojun #endif
587 1.1 itojun }
588 1.1 itojun
589 1.1 itojun if (!ISSET(t->c_cflag, CHWFLOW)) {
590 1.1 itojun /* Disable the high water mark. */
591 1.1 itojun sc->sc_r_hiwat = 0;
592 1.1 itojun sc->sc_r_lowat = 0;
593 1.1 itojun if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) {
594 1.1 itojun CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
595 1.1 itojun sci_schedrx(sc);
596 1.1 itojun }
597 1.1 itojun } else {
598 1.1 itojun sc->sc_r_hiwat = sci_rbuf_hiwat;
599 1.1 itojun sc->sc_r_lowat = sci_rbuf_lowat;
600 1.1 itojun }
601 1.1 itojun
602 1.1 itojun splx(s);
603 1.1 itojun
604 1.1 itojun #ifdef SCI_DEBUG
605 1.1 itojun if (sci_debug)
606 1.1 itojun scistatus(sc, "sciparam ");
607 1.1 itojun #endif
608 1.1 itojun
609 1.1 itojun if (!ISSET(t->c_cflag, CHWFLOW)) {
610 1.1 itojun if (sc->sc_tx_stopped) {
611 1.1 itojun sc->sc_tx_stopped = 0;
612 1.1 itojun scistart(tp);
613 1.1 itojun }
614 1.1 itojun }
615 1.1 itojun
616 1.1 itojun return (0);
617 1.1 itojun }
618 1.1 itojun
619 1.1 itojun void
620 1.18 uch sci_iflush(struct sci_softc *sc)
621 1.1 itojun {
622 1.1 itojun unsigned char err_c;
623 1.1 itojun volatile unsigned char c;
624 1.1 itojun
625 1.1 itojun if (((err_c = SHREG_SCSSR)
626 1.9 msaitoh & (SCSSR_RDRF | SCSSR_ORER | SCSSR_FER | SCSSR_PER)) != 0) {
627 1.1 itojun
628 1.9 msaitoh if ((err_c & (SCSSR_ORER | SCSSR_FER | SCSSR_PER)) != 0) {
629 1.9 msaitoh SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_FER | SCSSR_PER);
630 1.1 itojun return;
631 1.9 msaitoh }
632 1.1 itojun
633 1.1 itojun c = SHREG_SCRDR;
634 1.1 itojun
635 1.1 itojun SHREG_SCSSR &= ~SCSSR_RDRF;
636 1.1 itojun }
637 1.1 itojun }
638 1.1 itojun
639 1.1 itojun int
640 1.39 christos sciopen(dev_t dev, int flag, int mode, struct lwp *l)
641 1.1 itojun {
642 1.1 itojun int unit = SCIUNIT(dev);
643 1.1 itojun struct sci_softc *sc;
644 1.1 itojun struct tty *tp;
645 1.1 itojun int s, s2;
646 1.1 itojun int error;
647 1.1 itojun
648 1.1 itojun if (unit >= sci_cd.cd_ndevs)
649 1.1 itojun return (ENXIO);
650 1.1 itojun sc = sci_cd.cd_devs[unit];
651 1.1 itojun if (sc == 0 || !ISSET(sc->sc_hwflags, SCI_HW_DEV_OK) ||
652 1.1 itojun sc->sc_rbuf == NULL)
653 1.1 itojun return (ENXIO);
654 1.1 itojun
655 1.40 thorpej if (!device_is_active(&sc->sc_dev))
656 1.1 itojun return (ENXIO);
657 1.1 itojun
658 1.1 itojun #ifdef KGDB
659 1.1 itojun /*
660 1.1 itojun * If this is the kgdb port, no other use is permitted.
661 1.1 itojun */
662 1.1 itojun if (ISSET(sc->sc_hwflags, SCI_HW_KGDB))
663 1.1 itojun return (EBUSY);
664 1.1 itojun #endif
665 1.1 itojun
666 1.1 itojun tp = sc->sc_tty;
667 1.1 itojun
668 1.44 elad if (kauth_authorize_device_tty(l->l_cred, KAUTH_DEVICE_TTY_OPEN, tp))
669 1.1 itojun return (EBUSY);
670 1.1 itojun
671 1.1 itojun s = spltty();
672 1.1 itojun
673 1.1 itojun /*
674 1.1 itojun * Do the following iff this is a first open.
675 1.1 itojun */
676 1.1 itojun if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
677 1.1 itojun struct termios t;
678 1.1 itojun
679 1.1 itojun tp->t_dev = dev;
680 1.1 itojun
681 1.1 itojun s2 = splserial();
682 1.1 itojun
683 1.1 itojun /* Turn on interrupts. */
684 1.1 itojun SHREG_SCSCR |= SCSCR_TIE | SCSCR_RIE;
685 1.1 itojun
686 1.1 itojun splx(s2);
687 1.1 itojun
688 1.1 itojun /*
689 1.1 itojun * Initialize the termios status to the defaults. Add in the
690 1.1 itojun * sticky bits from TIOCSFLAGS.
691 1.1 itojun */
692 1.1 itojun t.c_ispeed = 0;
693 1.1 itojun if (ISSET(sc->sc_hwflags, SCI_HW_CONSOLE)) {
694 1.6 msaitoh t.c_ospeed = scicn_speed;
695 1.1 itojun t.c_cflag = sciconscflag;
696 1.1 itojun } else {
697 1.1 itojun t.c_ospeed = TTYDEF_SPEED;
698 1.1 itojun t.c_cflag = TTYDEF_CFLAG;
699 1.1 itojun }
700 1.1 itojun if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL))
701 1.1 itojun SET(t.c_cflag, CLOCAL);
702 1.1 itojun if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS))
703 1.1 itojun SET(t.c_cflag, CRTSCTS);
704 1.1 itojun if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF))
705 1.1 itojun SET(t.c_cflag, MDMBUF);
706 1.1 itojun /* Make sure sciparam() will do something. */
707 1.1 itojun tp->t_ospeed = 0;
708 1.1 itojun (void) sciparam(tp, &t);
709 1.1 itojun tp->t_iflag = TTYDEF_IFLAG;
710 1.1 itojun tp->t_oflag = TTYDEF_OFLAG;
711 1.1 itojun tp->t_lflag = TTYDEF_LFLAG;
712 1.1 itojun ttychars(tp);
713 1.1 itojun ttsetwater(tp);
714 1.1 itojun
715 1.1 itojun s2 = splserial();
716 1.1 itojun
717 1.1 itojun /* Clear the input ring, and unblock. */
718 1.1 itojun sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf;
719 1.1 itojun sc->sc_rbavail = sci_rbuf_size;
720 1.1 itojun sci_iflush(sc);
721 1.1 itojun CLR(sc->sc_rx_flags, RX_ANY_BLOCK);
722 1.1 itojun #if 0
723 1.1 itojun /* XXX (msaitoh) */
724 1.1 itojun sci_hwiflow(sc);
725 1.1 itojun #endif
726 1.1 itojun
727 1.1 itojun #ifdef SCI_DEBUG
728 1.1 itojun if (sci_debug)
729 1.1 itojun scistatus(sc, "sciopen ");
730 1.1 itojun #endif
731 1.1 itojun
732 1.1 itojun splx(s2);
733 1.1 itojun }
734 1.1 itojun
735 1.1 itojun splx(s);
736 1.1 itojun
737 1.1 itojun error = ttyopen(tp, SCIDIALOUT(dev), ISSET(flag, O_NONBLOCK));
738 1.1 itojun if (error)
739 1.1 itojun goto bad;
740 1.1 itojun
741 1.10 eeh error = (*tp->t_linesw->l_open)(dev, tp);
742 1.1 itojun if (error)
743 1.1 itojun goto bad;
744 1.1 itojun
745 1.1 itojun return (0);
746 1.1 itojun
747 1.1 itojun bad:
748 1.1 itojun
749 1.1 itojun return (error);
750 1.1 itojun }
751 1.1 itojun
752 1.1 itojun int
753 1.39 christos sciclose(dev_t dev, int flag, int mode, struct lwp *l)
754 1.1 itojun {
755 1.1 itojun struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
756 1.1 itojun struct tty *tp = sc->sc_tty;
757 1.1 itojun
758 1.1 itojun /* XXX This is for cons.c. */
759 1.1 itojun if (!ISSET(tp->t_state, TS_ISOPEN))
760 1.1 itojun return (0);
761 1.1 itojun
762 1.10 eeh (*tp->t_linesw->l_close)(tp, flag);
763 1.1 itojun ttyclose(tp);
764 1.1 itojun
765 1.40 thorpej if (!device_is_active(&sc->sc_dev))
766 1.1 itojun return (0);
767 1.1 itojun
768 1.1 itojun return (0);
769 1.1 itojun }
770 1.1 itojun
771 1.1 itojun int
772 1.18 uch sciread(dev_t dev, struct uio *uio, int flag)
773 1.1 itojun {
774 1.1 itojun struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
775 1.1 itojun struct tty *tp = sc->sc_tty;
776 1.1 itojun
777 1.10 eeh return ((*tp->t_linesw->l_read)(tp, uio, flag));
778 1.1 itojun }
779 1.1 itojun
780 1.1 itojun int
781 1.18 uch sciwrite(dev_t dev, struct uio *uio, int flag)
782 1.1 itojun {
783 1.1 itojun struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
784 1.1 itojun struct tty *tp = sc->sc_tty;
785 1.1 itojun
786 1.10 eeh return ((*tp->t_linesw->l_write)(tp, uio, flag));
787 1.13 scw }
788 1.13 scw
789 1.13 scw int
790 1.39 christos scipoll(dev_t dev, int events, struct lwp *l)
791 1.13 scw {
792 1.13 scw struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
793 1.13 scw struct tty *tp = sc->sc_tty;
794 1.25 uch
795 1.39 christos return ((*tp->t_linesw->l_poll)(tp, events, l));
796 1.1 itojun }
797 1.1 itojun
798 1.1 itojun struct tty *
799 1.18 uch scitty(dev_t dev)
800 1.1 itojun {
801 1.1 itojun struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
802 1.1 itojun struct tty *tp = sc->sc_tty;
803 1.1 itojun
804 1.1 itojun return (tp);
805 1.1 itojun }
806 1.1 itojun
807 1.1 itojun int
808 1.39 christos sciioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct lwp *l)
809 1.1 itojun {
810 1.1 itojun struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
811 1.1 itojun struct tty *tp = sc->sc_tty;
812 1.1 itojun int error;
813 1.1 itojun int s;
814 1.1 itojun
815 1.40 thorpej if (!device_is_active(&sc->sc_dev))
816 1.1 itojun return (EIO);
817 1.1 itojun
818 1.39 christos error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l);
819 1.21 atatat if (error != EPASSTHROUGH)
820 1.1 itojun return (error);
821 1.1 itojun
822 1.39 christos error = ttioctl(tp, cmd, data, flag, l);
823 1.21 atatat if (error != EPASSTHROUGH)
824 1.1 itojun return (error);
825 1.1 itojun
826 1.1 itojun error = 0;
827 1.1 itojun
828 1.1 itojun s = splserial();
829 1.1 itojun
830 1.1 itojun switch (cmd) {
831 1.1 itojun case TIOCSBRK:
832 1.5 msaitoh sci_break(sc, 1);
833 1.1 itojun break;
834 1.1 itojun
835 1.1 itojun case TIOCCBRK:
836 1.5 msaitoh sci_break(sc, 0);
837 1.1 itojun break;
838 1.5 msaitoh
839 1.1 itojun case TIOCGFLAGS:
840 1.1 itojun *(int *)data = sc->sc_swflags;
841 1.1 itojun break;
842 1.1 itojun
843 1.1 itojun case TIOCSFLAGS:
844 1.43 ad error = kauth_authorize_generic(l->l_cred,
845 1.43 ad KAUTH_GENERIC_ISSUSER, &l->l_acflag);
846 1.1 itojun if (error)
847 1.1 itojun break;
848 1.1 itojun sc->sc_swflags = *(int *)data;
849 1.1 itojun break;
850 1.1 itojun
851 1.1 itojun default:
852 1.21 atatat error = EPASSTHROUGH;
853 1.1 itojun break;
854 1.1 itojun }
855 1.1 itojun
856 1.1 itojun splx(s);
857 1.1 itojun
858 1.1 itojun return (error);
859 1.1 itojun }
860 1.1 itojun
861 1.1 itojun integrate void
862 1.18 uch sci_schedrx(struct sci_softc *sc)
863 1.1 itojun {
864 1.1 itojun
865 1.1 itojun sc->sc_rx_ready = 1;
866 1.1 itojun
867 1.1 itojun /* Wake up the poller. */
868 1.12 thorpej #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
869 1.1 itojun softintr_schedule(sc->sc_si);
870 1.1 itojun #else
871 1.1 itojun #ifndef __NO_SOFT_SERIAL_INTERRUPT
872 1.1 itojun setsoftserial();
873 1.1 itojun #else
874 1.1 itojun if (!sci_softintr_scheduled) {
875 1.1 itojun sci_softintr_scheduled = 1;
876 1.7 thorpej callout_reset(&sci_soft_ch, 1, scisoft, NULL);
877 1.1 itojun }
878 1.1 itojun #endif
879 1.5 msaitoh #endif
880 1.5 msaitoh }
881 1.5 msaitoh
882 1.5 msaitoh void
883 1.18 uch sci_break(struct sci_softc *sc, int onoff)
884 1.5 msaitoh {
885 1.5 msaitoh
886 1.5 msaitoh if (onoff)
887 1.6 msaitoh SHREG_SCSSR &= ~SCSSR_TDRE;
888 1.5 msaitoh else
889 1.6 msaitoh SHREG_SCSSR |= SCSSR_TDRE;
890 1.5 msaitoh
891 1.5 msaitoh #if 0 /* XXX */
892 1.5 msaitoh if (!sc->sc_heldchange) {
893 1.5 msaitoh if (sc->sc_tx_busy) {
894 1.5 msaitoh sc->sc_heldtbc = sc->sc_tbc;
895 1.5 msaitoh sc->sc_tbc = 0;
896 1.5 msaitoh sc->sc_heldchange = 1;
897 1.5 msaitoh } else
898 1.5 msaitoh sci_loadchannelregs(sc);
899 1.5 msaitoh }
900 1.1 itojun #endif
901 1.1 itojun }
902 1.1 itojun
903 1.1 itojun /*
904 1.1 itojun * Stop output, e.g., for ^S or output flush.
905 1.1 itojun */
906 1.1 itojun void
907 1.18 uch scistop(struct tty *tp, int flag)
908 1.1 itojun {
909 1.1 itojun struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(tp->t_dev)];
910 1.1 itojun int s;
911 1.1 itojun
912 1.1 itojun s = splserial();
913 1.1 itojun if (ISSET(tp->t_state, TS_BUSY)) {
914 1.1 itojun /* Stop transmitting at the next chunk. */
915 1.1 itojun sc->sc_tbc = 0;
916 1.1 itojun sc->sc_heldtbc = 0;
917 1.1 itojun if (!ISSET(tp->t_state, TS_TTSTOP))
918 1.1 itojun SET(tp->t_state, TS_FLUSH);
919 1.1 itojun }
920 1.1 itojun splx(s);
921 1.1 itojun }
922 1.1 itojun
923 1.1 itojun void
924 1.18 uch scidiag(void *arg)
925 1.1 itojun {
926 1.1 itojun struct sci_softc *sc = arg;
927 1.1 itojun int overflows, floods;
928 1.1 itojun int s;
929 1.1 itojun
930 1.1 itojun s = splserial();
931 1.1 itojun overflows = sc->sc_overflows;
932 1.1 itojun sc->sc_overflows = 0;
933 1.1 itojun floods = sc->sc_floods;
934 1.1 itojun sc->sc_floods = 0;
935 1.1 itojun sc->sc_errors = 0;
936 1.1 itojun splx(s);
937 1.1 itojun
938 1.1 itojun log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n",
939 1.1 itojun sc->sc_dev.dv_xname,
940 1.1 itojun overflows, overflows == 1 ? "" : "s",
941 1.1 itojun floods, floods == 1 ? "" : "s");
942 1.1 itojun }
943 1.1 itojun
944 1.1 itojun integrate void
945 1.18 uch sci_rxsoft(struct sci_softc *sc, struct tty *tp)
946 1.1 itojun {
947 1.41 uebayasi int (*rint)(int, struct tty *) = tp->t_linesw->l_rint;
948 1.1 itojun u_char *get, *end;
949 1.1 itojun u_int cc, scc;
950 1.1 itojun u_char ssr;
951 1.1 itojun int code;
952 1.1 itojun int s;
953 1.1 itojun
954 1.1 itojun end = sc->sc_ebuf;
955 1.1 itojun get = sc->sc_rbget;
956 1.1 itojun scc = cc = sci_rbuf_size - sc->sc_rbavail;
957 1.1 itojun
958 1.1 itojun if (cc == sci_rbuf_size) {
959 1.1 itojun sc->sc_floods++;
960 1.1 itojun if (sc->sc_errors++ == 0)
961 1.7 thorpej callout_reset(&sc->sc_diag_ch, 60 * hz, scidiag, sc);
962 1.1 itojun }
963 1.1 itojun
964 1.1 itojun while (cc) {
965 1.1 itojun code = get[0];
966 1.1 itojun ssr = get[1];
967 1.1 itojun if (ISSET(ssr, SCSSR_FER | SCSSR_PER)) {
968 1.1 itojun if (ISSET(ssr, SCSSR_FER))
969 1.1 itojun SET(code, TTY_FE);
970 1.1 itojun if (ISSET(ssr, SCSSR_PER))
971 1.1 itojun SET(code, TTY_PE);
972 1.1 itojun }
973 1.1 itojun if ((*rint)(code, tp) == -1) {
974 1.1 itojun /*
975 1.1 itojun * The line discipline's buffer is out of space.
976 1.1 itojun */
977 1.1 itojun if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) {
978 1.1 itojun /*
979 1.1 itojun * We're either not using flow control, or the
980 1.1 itojun * line discipline didn't tell us to block for
981 1.1 itojun * some reason. Either way, we have no way to
982 1.1 itojun * know when there's more space available, so
983 1.1 itojun * just drop the rest of the data.
984 1.1 itojun */
985 1.1 itojun get += cc << 1;
986 1.1 itojun if (get >= end)
987 1.1 itojun get -= sci_rbuf_size << 1;
988 1.1 itojun cc = 0;
989 1.1 itojun } else {
990 1.1 itojun /*
991 1.1 itojun * Don't schedule any more receive processing
992 1.1 itojun * until the line discipline tells us there's
993 1.1 itojun * space available (through scihwiflow()).
994 1.1 itojun * Leave the rest of the data in the input
995 1.1 itojun * buffer.
996 1.1 itojun */
997 1.1 itojun SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
998 1.1 itojun }
999 1.1 itojun break;
1000 1.1 itojun }
1001 1.1 itojun get += 2;
1002 1.1 itojun if (get >= end)
1003 1.1 itojun get = sc->sc_rbuf;
1004 1.1 itojun cc--;
1005 1.1 itojun }
1006 1.1 itojun
1007 1.1 itojun if (cc != scc) {
1008 1.1 itojun sc->sc_rbget = get;
1009 1.1 itojun s = splserial();
1010 1.1 itojun cc = sc->sc_rbavail += scc - cc;
1011 1.1 itojun /* Buffers should be ok again, release possible block. */
1012 1.1 itojun if (cc >= sc->sc_r_lowat) {
1013 1.1 itojun if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) {
1014 1.1 itojun CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED);
1015 1.1 itojun SHREG_SCSCR |= SCSCR_RIE;
1016 1.1 itojun }
1017 1.1 itojun #if 0
1018 1.1 itojun if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) {
1019 1.1 itojun CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED);
1020 1.1 itojun sci_hwiflow(sc);
1021 1.1 itojun }
1022 1.1 itojun #endif
1023 1.1 itojun }
1024 1.1 itojun splx(s);
1025 1.1 itojun }
1026 1.1 itojun }
1027 1.1 itojun
1028 1.1 itojun integrate void
1029 1.1 itojun sci_txsoft(sc, tp)
1030 1.1 itojun struct sci_softc *sc;
1031 1.1 itojun struct tty *tp;
1032 1.1 itojun {
1033 1.1 itojun
1034 1.1 itojun CLR(tp->t_state, TS_BUSY);
1035 1.1 itojun if (ISSET(tp->t_state, TS_FLUSH))
1036 1.1 itojun CLR(tp->t_state, TS_FLUSH);
1037 1.1 itojun else
1038 1.1 itojun ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf));
1039 1.10 eeh (*tp->t_linesw->l_start)(tp);
1040 1.1 itojun }
1041 1.1 itojun
1042 1.1 itojun integrate void
1043 1.18 uch sci_stsoft(struct sci_softc *sc, struct tty *tp)
1044 1.1 itojun {
1045 1.1 itojun #if 0
1046 1.1 itojun /* XXX (msaitoh) */
1047 1.1 itojun u_char msr, delta;
1048 1.1 itojun int s;
1049 1.1 itojun
1050 1.1 itojun s = splserial();
1051 1.1 itojun msr = sc->sc_msr;
1052 1.1 itojun delta = sc->sc_msr_delta;
1053 1.1 itojun sc->sc_msr_delta = 0;
1054 1.1 itojun splx(s);
1055 1.1 itojun
1056 1.1 itojun if (ISSET(delta, sc->sc_msr_dcd)) {
1057 1.1 itojun /*
1058 1.1 itojun * Inform the tty layer that carrier detect changed.
1059 1.1 itojun */
1060 1.10 eeh (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD));
1061 1.1 itojun }
1062 1.1 itojun
1063 1.1 itojun if (ISSET(delta, sc->sc_msr_cts)) {
1064 1.1 itojun /* Block or unblock output according to flow control. */
1065 1.1 itojun if (ISSET(msr, sc->sc_msr_cts)) {
1066 1.1 itojun sc->sc_tx_stopped = 0;
1067 1.10 eeh (*tp->t_linesw->l_start)(tp);
1068 1.1 itojun } else {
1069 1.1 itojun sc->sc_tx_stopped = 1;
1070 1.1 itojun }
1071 1.1 itojun }
1072 1.1 itojun
1073 1.1 itojun #ifdef SCI_DEBUG
1074 1.1 itojun if (sci_debug)
1075 1.1 itojun scistatus(sc, "sci_stsoft");
1076 1.1 itojun #endif
1077 1.1 itojun #endif
1078 1.1 itojun }
1079 1.1 itojun
1080 1.12 thorpej #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
1081 1.1 itojun void
1082 1.18 uch scisoft(void *arg)
1083 1.1 itojun {
1084 1.1 itojun struct sci_softc *sc = arg;
1085 1.1 itojun struct tty *tp;
1086 1.1 itojun
1087 1.40 thorpej if (!device_is_active(&sc->sc_dev))
1088 1.1 itojun return;
1089 1.1 itojun
1090 1.1 itojun {
1091 1.1 itojun #else
1092 1.1 itojun void
1093 1.1 itojun #ifndef __NO_SOFT_SERIAL_INTERRUPT
1094 1.1 itojun scisoft()
1095 1.1 itojun #else
1096 1.18 uch scisoft(void *arg)
1097 1.1 itojun #endif
1098 1.1 itojun {
1099 1.1 itojun struct sci_softc *sc;
1100 1.1 itojun struct tty *tp;
1101 1.1 itojun int unit;
1102 1.1 itojun #ifdef __NO_SOFT_SERIAL_INTERRUPT
1103 1.1 itojun int s;
1104 1.1 itojun
1105 1.1 itojun s = splsoftserial();
1106 1.1 itojun sci_softintr_scheduled = 0;
1107 1.1 itojun #endif
1108 1.1 itojun
1109 1.1 itojun for (unit = 0; unit < sci_cd.cd_ndevs; unit++) {
1110 1.1 itojun sc = sci_cd.cd_devs[unit];
1111 1.1 itojun if (sc == NULL || !ISSET(sc->sc_hwflags, SCI_HW_DEV_OK))
1112 1.1 itojun continue;
1113 1.1 itojun
1114 1.40 thorpej if (!device_is_active(&sc->sc_dev))
1115 1.1 itojun continue;
1116 1.1 itojun
1117 1.1 itojun tp = sc->sc_tty;
1118 1.1 itojun if (tp == NULL)
1119 1.1 itojun continue;
1120 1.1 itojun if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0)
1121 1.1 itojun continue;
1122 1.1 itojun #endif
1123 1.1 itojun tp = sc->sc_tty;
1124 1.1 itojun
1125 1.1 itojun if (sc->sc_rx_ready) {
1126 1.1 itojun sc->sc_rx_ready = 0;
1127 1.1 itojun sci_rxsoft(sc, tp);
1128 1.1 itojun }
1129 1.1 itojun
1130 1.1 itojun #if 0
1131 1.1 itojun if (sc->sc_st_check) {
1132 1.1 itojun sc->sc_st_check = 0;
1133 1.1 itojun sci_stsoft(sc, tp);
1134 1.1 itojun }
1135 1.1 itojun #endif
1136 1.1 itojun
1137 1.1 itojun if (sc->sc_tx_done) {
1138 1.1 itojun sc->sc_tx_done = 0;
1139 1.1 itojun sci_txsoft(sc, tp);
1140 1.1 itojun }
1141 1.1 itojun }
1142 1.1 itojun
1143 1.12 thorpej #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS
1144 1.1 itojun #ifdef __NO_SOFT_SERIAL_INTERRUPT
1145 1.1 itojun splx(s);
1146 1.1 itojun #endif
1147 1.1 itojun #endif
1148 1.1 itojun }
1149 1.1 itojun
1150 1.1 itojun int
1151 1.18 uch sciintr(void *arg)
1152 1.1 itojun {
1153 1.1 itojun struct sci_softc *sc = arg;
1154 1.1 itojun u_char *put, *end;
1155 1.1 itojun u_int cc;
1156 1.1 itojun u_short ssr;
1157 1.1 itojun
1158 1.40 thorpej if (!device_is_active(&sc->sc_dev))
1159 1.1 itojun return (0);
1160 1.1 itojun
1161 1.1 itojun end = sc->sc_ebuf;
1162 1.1 itojun put = sc->sc_rbput;
1163 1.1 itojun cc = sc->sc_rbavail;
1164 1.1 itojun
1165 1.26 msaitoh do {
1166 1.26 msaitoh ssr = SHREG_SCSSR;
1167 1.26 msaitoh if (ISSET(ssr, SCSSR_FER)) {
1168 1.26 msaitoh SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_PER | SCSSR_FER);
1169 1.1 itojun #if defined(DDB) || defined(KGDB)
1170 1.23 msaitoh #ifdef SH4
1171 1.26 msaitoh if ((SHREG_SCSPTR & SCSPTR_SPB0DT) != 0) {
1172 1.16 msaitoh #else
1173 1.26 msaitoh if ((SHREG_SCSPDR & SCSPDR_SCP0DT) != 0) {
1174 1.16 msaitoh #endif
1175 1.1 itojun #ifdef DDB
1176 1.26 msaitoh if (ISSET(sc->sc_hwflags, SCI_HW_CONSOLE)) {
1177 1.26 msaitoh console_debugger();
1178 1.26 msaitoh }
1179 1.1 itojun #endif
1180 1.1 itojun #ifdef KGDB
1181 1.26 msaitoh if (ISSET(sc->sc_hwflags, SCI_HW_KGDB)) {
1182 1.26 msaitoh kgdb_connect(1);
1183 1.26 msaitoh }
1184 1.26 msaitoh #endif
1185 1.16 msaitoh }
1186 1.26 msaitoh #endif /* DDB || KGDB */
1187 1.6 msaitoh }
1188 1.26 msaitoh if ((SHREG_SCSSR & SCSSR_RDRF) != 0) {
1189 1.26 msaitoh if (cc > 0) {
1190 1.26 msaitoh put[0] = SHREG_SCRDR;
1191 1.26 msaitoh put[1] = SHREG_SCSSR & 0x00ff;
1192 1.26 msaitoh
1193 1.26 msaitoh put += 2;
1194 1.26 msaitoh if (put >= end)
1195 1.26 msaitoh put = sc->sc_rbuf;
1196 1.26 msaitoh cc--;
1197 1.26 msaitoh }
1198 1.6 msaitoh
1199 1.9 msaitoh SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_FER | SCSSR_PER |
1200 1.26 msaitoh SCSSR_RDRF);
1201 1.6 msaitoh
1202 1.26 msaitoh /*
1203 1.26 msaitoh * Current string of incoming characters ended because
1204 1.26 msaitoh * no more data was available or we ran out of space.
1205 1.26 msaitoh * Schedule a receive event if any data was received.
1206 1.26 msaitoh * If we're out of space, turn off receive interrupts.
1207 1.26 msaitoh */
1208 1.26 msaitoh sc->sc_rbput = put;
1209 1.26 msaitoh sc->sc_rbavail = cc;
1210 1.26 msaitoh if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED))
1211 1.26 msaitoh sc->sc_rx_ready = 1;
1212 1.1 itojun
1213 1.26 msaitoh /*
1214 1.26 msaitoh * See if we are in danger of overflowing a buffer. If
1215 1.26 msaitoh * so, use hardware flow control to ease the pressure.
1216 1.26 msaitoh */
1217 1.26 msaitoh if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) &&
1218 1.26 msaitoh cc < sc->sc_r_hiwat) {
1219 1.26 msaitoh SET(sc->sc_rx_flags, RX_IBUF_BLOCKED);
1220 1.1 itojun #if 0
1221 1.26 msaitoh sci_hwiflow(sc);
1222 1.1 itojun #endif
1223 1.26 msaitoh }
1224 1.1 itojun
1225 1.26 msaitoh /*
1226 1.26 msaitoh * If we're out of space, disable receive interrupts
1227 1.26 msaitoh * until the queue has drained a bit.
1228 1.26 msaitoh */
1229 1.26 msaitoh if (!cc) {
1230 1.26 msaitoh SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED);
1231 1.26 msaitoh SHREG_SCSCR &= ~SCSCR_RIE;
1232 1.26 msaitoh }
1233 1.26 msaitoh } else {
1234 1.26 msaitoh if (SHREG_SCSSR & SCSSR_RDRF) {
1235 1.26 msaitoh SHREG_SCSCR &= ~(SCSCR_TIE | SCSCR_RIE);
1236 1.26 msaitoh delay(10);
1237 1.26 msaitoh SHREG_SCSCR |= SCSCR_TIE | SCSCR_RIE;
1238 1.26 msaitoh continue;
1239 1.26 msaitoh }
1240 1.6 msaitoh }
1241 1.26 msaitoh } while (SHREG_SCSSR & SCSSR_RDRF);
1242 1.25 uch
1243 1.1 itojun #if 0
1244 1.6 msaitoh msr = bus_space_read_1(iot, ioh, sci_msr);
1245 1.6 msaitoh delta = msr ^ sc->sc_msr;
1246 1.6 msaitoh sc->sc_msr = msr;
1247 1.6 msaitoh if (ISSET(delta, sc->sc_msr_mask)) {
1248 1.6 msaitoh SET(sc->sc_msr_delta, delta);
1249 1.1 itojun
1250 1.6 msaitoh /*
1251 1.6 msaitoh * Pulse-per-second clock signal on edge of DCD?
1252 1.6 msaitoh */
1253 1.6 msaitoh if (ISSET(delta, sc->sc_ppsmask)) {
1254 1.6 msaitoh struct timeval tv;
1255 1.6 msaitoh if (ISSET(msr, sc->sc_ppsmask) ==
1256 1.6 msaitoh sc->sc_ppsassert) {
1257 1.6 msaitoh /* XXX nanotime() */
1258 1.6 msaitoh microtime(&tv);
1259 1.6 msaitoh TIMEVAL_TO_TIMESPEC(&tv,
1260 1.6 msaitoh &sc->ppsinfo.assert_timestamp);
1261 1.6 msaitoh if (sc->ppsparam.mode & PPS_OFFSETASSERT) {
1262 1.6 msaitoh timespecadd(&sc->ppsinfo.assert_timestamp,
1263 1.1 itojun &sc->ppsparam.assert_offset,
1264 1.1 itojun &sc->ppsinfo.assert_timestamp);
1265 1.6 msaitoh TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.assert_timestamp);
1266 1.6 msaitoh }
1267 1.1 itojun
1268 1.1 itojun #ifdef PPS_SYNC
1269 1.6 msaitoh if (sc->ppsparam.mode & PPS_HARDPPSONASSERT)
1270 1.6 msaitoh hardpps(&tv, tv.tv_usec);
1271 1.1 itojun #endif
1272 1.6 msaitoh sc->ppsinfo.assert_sequence++;
1273 1.6 msaitoh sc->ppsinfo.current_mode =
1274 1.6 msaitoh sc->ppsparam.mode;
1275 1.6 msaitoh
1276 1.6 msaitoh } else if (ISSET(msr, sc->sc_ppsmask) ==
1277 1.6 msaitoh sc->sc_ppsclear) {
1278 1.6 msaitoh /* XXX nanotime() */
1279 1.6 msaitoh microtime(&tv);
1280 1.6 msaitoh TIMEVAL_TO_TIMESPEC(&tv,
1281 1.6 msaitoh &sc->ppsinfo.clear_timestamp);
1282 1.6 msaitoh if (sc->ppsparam.mode & PPS_OFFSETCLEAR) {
1283 1.6 msaitoh timespecadd(&sc->ppsinfo.clear_timestamp,
1284 1.1 itojun &sc->ppsparam.clear_offset,
1285 1.1 itojun &sc->ppsinfo.clear_timestamp);
1286 1.6 msaitoh TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.clear_timestamp);
1287 1.6 msaitoh }
1288 1.1 itojun
1289 1.1 itojun #ifdef PPS_SYNC
1290 1.6 msaitoh if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR)
1291 1.6 msaitoh hardpps(&tv, tv.tv_usec);
1292 1.1 itojun #endif
1293 1.6 msaitoh sc->ppsinfo.clear_sequence++;
1294 1.6 msaitoh sc->ppsinfo.current_mode =
1295 1.6 msaitoh sc->ppsparam.mode;
1296 1.1 itojun }
1297 1.6 msaitoh }
1298 1.1 itojun
1299 1.6 msaitoh /*
1300 1.6 msaitoh * Stop output immediately if we lose the output
1301 1.6 msaitoh * flow control signal or carrier detect.
1302 1.6 msaitoh */
1303 1.6 msaitoh if (ISSET(~msr, sc->sc_msr_mask)) {
1304 1.6 msaitoh sc->sc_tbc = 0;
1305 1.6 msaitoh sc->sc_heldtbc = 0;
1306 1.1 itojun #ifdef SCI_DEBUG
1307 1.6 msaitoh if (sci_debug)
1308 1.6 msaitoh scistatus(sc, "sciintr ");
1309 1.1 itojun #endif
1310 1.6 msaitoh }
1311 1.1 itojun
1312 1.6 msaitoh sc->sc_st_check = 1;
1313 1.6 msaitoh }
1314 1.1 itojun #endif
1315 1.1 itojun
1316 1.1 itojun /*
1317 1.1 itojun * Done handling any receive interrupts. See if data can be
1318 1.1 itojun * transmitted as well. Schedule tx done event if no data left
1319 1.1 itojun * and tty was marked busy.
1320 1.1 itojun */
1321 1.1 itojun if ((SHREG_SCSSR & SCSSR_TDRE) != 0) {
1322 1.1 itojun /*
1323 1.1 itojun * If we've delayed a parameter change, do it now, and restart
1324 1.1 itojun * output.
1325 1.1 itojun */
1326 1.1 itojun if (sc->sc_heldchange) {
1327 1.1 itojun sc->sc_heldchange = 0;
1328 1.1 itojun sc->sc_tbc = sc->sc_heldtbc;
1329 1.1 itojun sc->sc_heldtbc = 0;
1330 1.1 itojun }
1331 1.1 itojun
1332 1.1 itojun /* Output the next chunk of the contiguous buffer, if any. */
1333 1.1 itojun if (sc->sc_tbc > 0) {
1334 1.11 msaitoh sci_putc(*(sc->sc_tba));
1335 1.1 itojun sc->sc_tba++;
1336 1.1 itojun sc->sc_tbc--;
1337 1.1 itojun } else {
1338 1.1 itojun /* Disable transmit completion interrupts if necessary. */
1339 1.1 itojun #if 0
1340 1.1 itojun if (ISSET(sc->sc_ier, IER_ETXRDY))
1341 1.1 itojun #endif
1342 1.1 itojun SHREG_SCSCR &= ~SCSCR_TIE;
1343 1.1 itojun
1344 1.1 itojun if (sc->sc_tx_busy) {
1345 1.1 itojun sc->sc_tx_busy = 0;
1346 1.1 itojun sc->sc_tx_done = 1;
1347 1.1 itojun }
1348 1.1 itojun }
1349 1.1 itojun }
1350 1.1 itojun
1351 1.1 itojun /* Wake up the poller. */
1352 1.12 thorpej #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
1353 1.1 itojun softintr_schedule(sc->sc_si);
1354 1.1 itojun #else
1355 1.1 itojun #ifndef __NO_SOFT_SERIAL_INTERRUPT
1356 1.1 itojun setsoftserial();
1357 1.1 itojun #else
1358 1.1 itojun if (!sci_softintr_scheduled) {
1359 1.1 itojun sci_softintr_scheduled = 1;
1360 1.7 thorpej callout_reset(&sci_soft_ch, 1, scisoft, 1);
1361 1.1 itojun }
1362 1.1 itojun #endif
1363 1.1 itojun #endif
1364 1.1 itojun
1365 1.1 itojun #if NRND > 0 && defined(RND_SCI)
1366 1.1 itojun rnd_add_uint32(&sc->rnd_source, iir | lsr);
1367 1.1 itojun #endif
1368 1.1 itojun
1369 1.1 itojun return (1);
1370 1.1 itojun }
1371 1.1 itojun
1372 1.1 itojun void
1373 1.1 itojun scicnprobe(cp)
1374 1.1 itojun struct consdev *cp;
1375 1.1 itojun {
1376 1.1 itojun int maj;
1377 1.1 itojun
1378 1.1 itojun /* locate the major number */
1379 1.28 gehenna maj = cdevsw_lookup_major(&sci_cdevsw);
1380 1.1 itojun
1381 1.1 itojun /* Initialize required fields. */
1382 1.1 itojun cp->cn_dev = makedev(maj, 0);
1383 1.4 msaitoh #ifdef SCICONSOLE
1384 1.4 msaitoh cp->cn_pri = CN_REMOTE;
1385 1.4 msaitoh #else
1386 1.1 itojun cp->cn_pri = CN_NORMAL;
1387 1.4 msaitoh #endif
1388 1.1 itojun }
1389 1.1 itojun
1390 1.1 itojun void
1391 1.18 uch scicninit(struct consdev *cp)
1392 1.1 itojun {
1393 1.1 itojun
1394 1.6 msaitoh InitializeSci(scicn_speed);
1395 1.8 msaitoh sciisconsole = 1;
1396 1.1 itojun }
1397 1.1 itojun
1398 1.1 itojun int
1399 1.18 uch scicngetc(dev_t dev)
1400 1.1 itojun {
1401 1.1 itojun int c;
1402 1.1 itojun int s;
1403 1.1 itojun
1404 1.1 itojun s = splserial();
1405 1.1 itojun c = sci_getc();
1406 1.1 itojun splx(s);
1407 1.1 itojun
1408 1.1 itojun return (c);
1409 1.1 itojun }
1410 1.1 itojun
1411 1.1 itojun void
1412 1.18 uch scicnputc(dev_t dev, int c)
1413 1.1 itojun {
1414 1.1 itojun int s;
1415 1.1 itojun
1416 1.1 itojun s = splserial();
1417 1.11 msaitoh sci_putc((u_char)c);
1418 1.1 itojun splx(s);
1419 1.1 itojun }
1420