sci.c revision 1.1 1 /* $NetBSD: sci.c,v 1.1 1999/09/13 10:31:12 itojun Exp $ */
2
3 /*-
4 * Copyright (C) 1999 T.Horiuchi and SAITOH Masanobu. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 #include "opt_pclock.h"
30 #include "opt_sci.h"
31
32 #include <sys/param.h>
33 #include <sys/systm.h>
34 #include <sys/tty.h>
35 #include <sys/proc.h>
36 #include <sys/conf.h>
37 #include <sys/file.h>
38 #include <sys/syslog.h>
39 #include <sys/kernel.h>
40 #include <sys/device.h>
41 #include <sys/malloc.h>
42
43 #include <dev/cons.h>
44
45 #include <machine/cpu.h>
46 #include <sh3/scireg.h>
47 #include <sh3/tmureg.h>
48
49 #include <machine/shbvar.h>
50
51 static void scistart __P((struct tty *));
52 static int sciparam __P((struct tty *, struct termios *));
53
54 void scicnprobe __P((struct consdev *));
55 void scicninit __P((struct consdev *));
56 void scicnputc __P((dev_t, int));
57 int scicngetc __P((dev_t));
58 void scicnpoolc __P((dev_t, int));
59 int sciintr __P((void *));
60
61 struct sci_softc {
62 struct device sc_dev; /* boilerplate */
63 struct tty *sc_tty;
64 void *sc_ih;
65
66 #if 0
67 bus_space_tag_t sc_iot; /* ISA i/o space identifier */
68 bus_space_handle_t sc_ioh; /* ISA io handle */
69
70 int sc_drq;
71
72 int sc_frequency;
73 #endif
74
75 u_int sc_overflows,
76 sc_floods,
77 sc_errors; /* number of retries so far */
78 u_char sc_status[7]; /* copy of registers */
79
80 int sc_hwflags;
81 int sc_swflags;
82 u_int sc_fifolen; /* XXX always 0? */
83
84 u_int sc_r_hiwat,
85 sc_r_lowat;
86 u_char *volatile sc_rbget,
87 *volatile sc_rbput;
88 volatile u_int sc_rbavail;
89 u_char *sc_rbuf,
90 *sc_ebuf;
91
92 u_char *sc_tba; /* transmit buffer address */
93 u_int sc_tbc, /* transmit byte count */
94 sc_heldtbc;
95
96 volatile u_char sc_rx_flags,
97 #define RX_TTY_BLOCKED 0x01
98 #define RX_TTY_OVERFLOWED 0x02
99 #define RX_IBUF_BLOCKED 0x04
100 #define RX_IBUF_OVERFLOWED 0x08
101 #define RX_ANY_BLOCK 0x0f
102 sc_tx_busy,
103 sc_tx_done,
104 sc_tx_stopped,
105 sc_st_check,
106 sc_rx_ready;
107
108 volatile u_char sc_heldchange;
109 };
110
111 /* controller driver configuration */
112 static int sci_match __P((struct device *, struct cfdata *, void *));
113 static void sci_attach __P((struct device *, struct device *, void *));
114
115 void sci_iflush __P((struct sci_softc *));
116
117 #define integrate static inline
118 #ifdef __GENERIC_SOFT_INTERRUPTS
119 void scisoft __P((void *));
120 #else
121 #ifndef __NO_SOFT_SERIAL_INTERRUPT
122 void scisoft __P((void));
123 #else
124 void scisoft __P((void *));
125 #endif
126 #endif
127 integrate void sci_rxsoft __P((struct sci_softc *, struct tty *));
128 integrate void sci_txsoft __P((struct sci_softc *, struct tty *));
129 integrate void sci_stsoft __P((struct sci_softc *, struct tty *));
130 integrate void sci_schedrx __P((struct sci_softc *));
131 void scidiag __P((void *));
132
133 #define SCIUNIT_MASK 0x7ffff
134 #define SCIDIALOUT_MASK 0x80000
135
136 #define SCIUNIT(x) (minor(x) & SCIUNIT_MASK)
137 #define SCIDIALOUT(x) (minor(x) & SCIDIALOUT_MASK)
138
139 /* Macros to clear/set/test flags. */
140 #define SET(t, f) (t) |= (f)
141 #define CLR(t, f) (t) &= ~(f)
142 #define ISSET(t, f) ((t) & (f))
143
144 /* Hardware flag masks */
145 #define SCI_HW_NOIEN 0x01
146 #define SCI_HW_FIFO 0x02
147 #define SCI_HW_FLOW 0x08
148 #define SCI_HW_DEV_OK 0x20
149 #define SCI_HW_CONSOLE 0x40
150 #define SCI_HW_KGDB 0x80
151
152 /* Buffer size for character buffer */
153 #define SCI_RING_SIZE 2048
154
155 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */
156 u_int sci_rbuf_hiwat = (SCI_RING_SIZE * 1) / 4;
157 u_int sci_rbuf_lowat = (SCI_RING_SIZE * 3) / 4;
158
159 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
160 int sciconscflag = CONMODE;
161
162 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */
163
164 #ifndef __GENERIC_SOFT_INTERRUPTS
165 #ifdef __NO_SOFT_SERIAL_INTERRUPT
166 volatile int sci_softintr_scheduled;
167 #endif
168 #endif
169
170 u_int sci_rbuf_size = SCI_RING_SIZE;
171
172 struct cfattach sci_ca = {
173 sizeof(struct sci_softc), sci_match, sci_attach
174 };
175
176 extern struct cfdriver sci_cd;
177
178 cdev_decl(sci);
179
180 void InitializeSci __P((unsigned int));
181
182 /*
183 * following functions are debugging prupose only
184 */
185 #define CR 0x0D
186 #define I2C_ADRS (*(volatile unsigned int *)0xa8000000)
187 #define USART_ON (unsigned int)~0x08
188
189 static void WaitFor __P((int));
190 void PutcSci __P((unsigned char));
191 void PutStrSci __P((unsigned char *));
192 int SciErrCheck __P((void));
193 unsigned char GetcSci __P((void));
194 int GetStrSci __P((unsigned char *, int));
195
196 /*
197 * WaitFor
198 * : int mSec;
199 */
200 static void
201 WaitFor(mSec)
202 int mSec;
203 {
204
205 /* using clock = Internal RTC */
206 SHREG_TMU.TOCR.BYTE = 0x01;
207
208 /* Disable Under Flow interrupt, rising edge, 1/4 */
209 SHREG_TMU.TCR0.WORD = 0x0000;
210
211 /* Set counter value (count down with 4 KHz) */
212 SHREG_TMU.TCNT0 = mSec * 4;
213
214 /* start Channel0 */
215 SHREG_TMU.TSTR.BYTE |= TSTR_STR0;
216
217 /* wait for under flag ON of channel0 */
218 while ((SHREG_TMU.TCR0.WORD & 0x0100) == 0)
219 ;
220
221 /* stop channel0 */
222 SHREG_TMU.TSTR.BYTE &= ~TSTR_STR0;
223 }
224
225 /*
226 * InitializeSci
227 * : unsigned int bps;
228 * : SCI(Serial Communication Interface)
229 */
230
231 void
232 InitializeSci(bps)
233 unsigned int bps;
234 {
235 SH3SCSCR scr;
236 SH3SCSMR smr;
237
238 /* Initialize SCR */
239 scr.BYTE = 0;
240 SHREG_SCSCR = scr.BYTE;
241
242 /*Serial Mode Register */
243 smr.BYTE = 0; /*Async,8bit,NonParity,Even,1Stop,NoMulti */
244 SHREG_SCSMR = smr.BYTE;
245
246 /*Bit Rate Register */
247 SHREG_SCBRR = divrnd(PCLOCK, 32 * bps) -1;
248
249 /*wait 1mSec, because Send/Recv must begin 1 bit period after BRR is set. */
250 WaitFor(1);
251
252 /* Send permission, Recieve permission ON */
253 scr.BIT.TE =1;
254 scr.BIT.RE =1;
255 SHREG_SCSCR = scr.BYTE;
256
257 /*Serial Status Register */
258 SHREG_SCSSR &= SCSSR_TDRE; /* Clear Status */
259
260 #if 0
261 I2C_ADRS &= ~0x08; /* enable RS-232C */
262 #endif
263 }
264
265
266 /*
267 * PutcSci
268 * : unsigned char c;
269 */
270 void
271 PutcSci(c)
272 unsigned char c;
273 {
274
275 /* wait for ready */
276 while ((SHREG_SCSSR & SCSSR_TDRE) == NULL)
277 ;
278
279 /* write send data to send register */
280 SHREG_SCTDR = c;
281
282 /* clear ready flag */
283 SHREG_SCSSR &= ~SCSSR_TDRE;
284
285 if (c == '\n'){
286 while ((SHREG_SCSSR & SCSSR_TDRE) == NULL)
287 ;
288
289 SHREG_SCTDR = '\r';
290
291 SHREG_SCSSR &= ~SCSSR_TDRE;
292 }
293 }
294
295 /*
296 * PutStrSci
297 * : unsigned char *s;
298 */
299 void
300 PutStrSci(s)
301 unsigned char *s;
302 {
303 #if 0
304 static int SciInit = 0;
305 if (SciInit == 0) {
306 InitializeSci(SCICN_SPEED);
307 SciInit = 1;
308 }
309 #endif
310
311 while (*s)
312 PutcSci(*s++);
313 }
314
315 /*
316 * : SciErrCheck
317 * 0x20 = over run
318 * 0x10 = frame error
319 * 0x80 = parity error
320 */
321 int
322 SciErrCheck(void)
323 {
324
325 return(SHREG_SCSSR & (SCSSR_ORER | SCSSR_FER | SCSSR_PER));
326 }
327
328 /*
329 * GetcSci
330 */
331 unsigned char
332 GetcSci(void)
333 {
334 unsigned char c, err_c;
335
336 while (((err_c = SHREG_SCSSR)
337 & (SCSSR_RDRF | SCSSR_ORER | SCSSR_FER | SCSSR_PER)) == 0)
338 ;
339 if ((err_c & (SCSSR_ORER | SCSSR_FER | SCSSR_PER)) != 0)
340 return(err_c |= 0x80);
341
342 c = SHREG_SCRDR;
343
344 SHREG_SCSSR &= ~SCSSR_RDRF;
345
346 return(c);
347 }
348
349 /*
350 * GetStrSci
351 * : unsigned char *s;
352 * : int size;
353 */
354 int
355 GetStrSci(s, size)
356 unsigned char *s;
357 int size;
358 {
359
360 for(; size ; size--){
361 *s = GetcSci();
362 if (*s & 0x80)
363 return -1;
364 if (*s == CR){
365 *s = 0;
366 break;
367 }
368 s++;
369 }
370 if (size == 0)
371 *s = 0;
372 return 0;
373 }
374
375 #if 0
376 #define SCI_MAX_UNITS 2
377 #else
378 #define SCI_MAX_UNITS 1
379 #endif
380
381
382 static int
383 sci_match(parent, cfp, aux)
384 struct device *parent;
385 struct cfdata *cfp;
386 void *aux;
387 {
388 #if 0
389 struct shb_attach_args *ia = aux;
390 #endif
391
392 if (strcmp(cfp->cf_driver->cd_name, "sci")
393 || cfp->cf_unit >= SCI_MAX_UNITS)
394 return 0;
395
396 return 1;
397 }
398
399 static void
400 sci_attach(parent, self, aux)
401 struct device *parent, *self;
402 void *aux;
403 {
404 struct sci_softc *sc = (struct sci_softc *)self;
405 struct tty *tp;
406 int irq;
407 struct shb_attach_args *ia = aux;
408
409 sc->sc_hwflags = 0; /* XXX */
410 sc->sc_swflags = 0; /* XXX */
411 sc->sc_fifolen = 0; /* XXX */
412
413 irq = ia->ia_irq;
414
415 SET(sc->sc_hwflags, SCI_HW_DEV_OK);
416 SET(sc->sc_hwflags, SCI_HW_CONSOLE);
417
418 #if 0
419 if (irq != IRQUNK) {
420 sc->sc_ih = shb_intr_establish(irq,
421 IST_EDGE, IPL_SERIAL, sciintr, sc);
422 }
423 #else
424 if (irq != IRQUNK) {
425 sc->sc_ih = shb_intr_establish(SCI_IRQ,
426 IST_EDGE, IPL_SERIAL, sciintr, sc);
427 }
428 #endif
429
430 printf("\n");
431
432 printf("%s: console\n", sc->sc_dev.dv_xname);
433
434 tp = ttymalloc();
435 tp->t_oproc = scistart;
436 tp->t_param = sciparam;
437 tp->t_hwiflow = NULL;
438
439 sc->sc_tty = tp;
440 sc->sc_rbuf = malloc(sci_rbuf_size << 1, M_DEVBUF, M_NOWAIT);
441 if (sc->sc_rbuf == NULL) {
442 printf("%s: unable to allocate ring buffer\n",
443 sc->sc_dev.dv_xname);
444 return;
445 }
446 sc->sc_ebuf = sc->sc_rbuf + (sci_rbuf_size << 1);
447
448 tty_attach(tp);
449 }
450
451 /*
452 * Start or restart transmission.
453 */
454 static void
455 scistart(tp)
456 struct tty *tp;
457 {
458 struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(tp->t_dev)];
459 int s;
460
461 s = spltty();
462 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP))
463 goto out;
464 if (sc->sc_tx_stopped)
465 goto out;
466
467 if (tp->t_outq.c_cc <= tp->t_lowat) {
468 if (ISSET(tp->t_state, TS_ASLEEP)) {
469 CLR(tp->t_state, TS_ASLEEP);
470 wakeup(&tp->t_outq);
471 }
472 selwakeup(&tp->t_wsel);
473 if (tp->t_outq.c_cc == 0)
474 goto out;
475 }
476
477 /* Grab the first contiguous region of buffer space. */
478 {
479 u_char *tba;
480 int tbc;
481
482 tba = tp->t_outq.c_cf;
483 tbc = ndqb(&tp->t_outq, 0);
484
485 (void)splserial();
486
487 sc->sc_tba = tba;
488 sc->sc_tbc = tbc;
489 }
490
491 SET(tp->t_state, TS_BUSY);
492 sc->sc_tx_busy = 1;
493
494 /* Enable transmit completion interrupts if necessary. */
495 SHREG_SCSCR |= SCSCR_TIE | SCSCR_RIE;
496
497 /* Output the first byte of the contiguous buffer. */
498 {
499 if (sc->sc_tbc > 0) {
500 PutcSci(*(sc->sc_tba));
501 sc->sc_tba++;
502 sc->sc_tbc--;
503 }
504 }
505 out:
506 splx(s);
507 return;
508 }
509
510 /*
511 * Set SCI tty parameters from termios.
512 * XXX - Should just copy the whole termios after
513 * making sure all the changes could be done.
514 */
515 static int
516 sciparam(tp, t)
517 struct tty *tp;
518 struct termios *t;
519 {
520 struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(tp->t_dev)];
521 int ospeed = t->c_ospeed;
522 int s;
523
524 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
525 return (EIO);
526
527 /* Check requested parameters. */
528 if (ospeed < 0)
529 return (EINVAL);
530 if (t->c_ispeed && t->c_ispeed != t->c_ospeed)
531 return (EINVAL);
532
533 /*
534 * For the console, always force CLOCAL and !HUPCL, so that the port
535 * is always active.
536 */
537 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) ||
538 ISSET(sc->sc_hwflags, SCI_HW_CONSOLE)) {
539 SET(t->c_cflag, CLOCAL);
540 CLR(t->c_cflag, HUPCL);
541 }
542
543 /*
544 * If there were no changes, don't do anything. This avoids dropping
545 * input and improves performance when all we did was frob things like
546 * VMIN and VTIME.
547 */
548 if (tp->t_ospeed == t->c_ospeed &&
549 tp->t_cflag == t->c_cflag)
550 return (0);
551
552 #if 0
553 /* XXX (msaitoh) */
554 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag);
555 #endif
556
557 s = splserial();
558
559 /*
560 * Set the FIFO threshold based on the receive speed.
561 *
562 * * If it's a low speed, it's probably a mouse or some other
563 * interactive device, so set the threshold low.
564 * * If it's a high speed, trim the trigger level down to prevent
565 * overflows.
566 * * Otherwise set it a bit higher.
567 */
568 #if 0
569 /* XXX (msaitoh) */
570 if (ISSET(sc->sc_hwflags, SCI_HW_HAYESP))
571 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8;
572 else if (ISSET(sc->sc_hwflags, SCI_HW_FIFO))
573 sc->sc_fifo = FIFO_ENABLE |
574 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 :
575 t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4);
576 else
577 sc->sc_fifo = 0;
578 #endif
579
580 /* And copy to tty. */
581 tp->t_ispeed = 0;
582 tp->t_ospeed = t->c_ospeed;
583 tp->t_cflag = t->c_cflag;
584
585 if (!sc->sc_heldchange) {
586 if (sc->sc_tx_busy) {
587 sc->sc_heldtbc = sc->sc_tbc;
588 sc->sc_tbc = 0;
589 sc->sc_heldchange = 1;
590 }
591 #if 0
592 /* XXX (msaitoh) */
593 else
594 sci_loadchannelregs(sc);
595 #endif
596 }
597
598 if (!ISSET(t->c_cflag, CHWFLOW)) {
599 /* Disable the high water mark. */
600 sc->sc_r_hiwat = 0;
601 sc->sc_r_lowat = 0;
602 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) {
603 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
604 sci_schedrx(sc);
605 }
606 } else {
607 sc->sc_r_hiwat = sci_rbuf_hiwat;
608 sc->sc_r_lowat = sci_rbuf_lowat;
609 }
610
611 splx(s);
612
613 #ifdef SCI_DEBUG
614 if (sci_debug)
615 scistatus(sc, "sciparam ");
616 #endif
617
618 if (!ISSET(t->c_cflag, CHWFLOW)) {
619 if (sc->sc_tx_stopped) {
620 sc->sc_tx_stopped = 0;
621 scistart(tp);
622 }
623 }
624
625 return (0);
626 }
627
628 void
629 sci_iflush(sc)
630 struct sci_softc *sc;
631 {
632 unsigned char err_c;
633 volatile unsigned char c;
634
635 if (((err_c = SHREG_SCSSR)
636 & (SCSSR_RDRF | SCSSR_ORER | SCSSR_FER | SCSSR_PER)) != 0) {
637
638 if ((err_c & (SCSSR_ORER | SCSSR_FER | SCSSR_PER)) != 0)
639 return;
640
641 c = SHREG_SCRDR;
642
643 SHREG_SCSSR &= ~SCSSR_RDRF;
644 }
645 }
646
647 int sci_getc __P((void));
648 void sci_putc __P((int));
649
650 int
651 sci_getc()
652 {
653
654 return (GetcSci());
655 }
656
657 void
658 sci_putc(int c)
659 {
660
661 PutcSci(c);
662 }
663
664 int
665 sciopen(dev, flag, mode, p)
666 dev_t dev;
667 int flag, mode;
668 struct proc *p;
669 {
670 int unit = SCIUNIT(dev);
671 struct sci_softc *sc;
672 struct tty *tp;
673 int s, s2;
674 int error;
675
676 if (unit >= sci_cd.cd_ndevs)
677 return (ENXIO);
678 sc = sci_cd.cd_devs[unit];
679 if (sc == 0 || !ISSET(sc->sc_hwflags, SCI_HW_DEV_OK) ||
680 sc->sc_rbuf == NULL)
681 return (ENXIO);
682
683 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
684 return (ENXIO);
685
686 #ifdef KGDB
687 /*
688 * If this is the kgdb port, no other use is permitted.
689 */
690 if (ISSET(sc->sc_hwflags, SCI_HW_KGDB))
691 return (EBUSY);
692 #endif
693
694 tp = sc->sc_tty;
695
696 if (ISSET(tp->t_state, TS_ISOPEN) &&
697 ISSET(tp->t_state, TS_XCLUDE) &&
698 p->p_ucred->cr_uid != 0)
699 return (EBUSY);
700
701 s = spltty();
702
703 /*
704 * Do the following iff this is a first open.
705 */
706 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
707 struct termios t;
708
709 tp->t_dev = dev;
710
711 s2 = splserial();
712
713 /* Turn on interrupts. */
714 SHREG_SCSCR |= SCSCR_TIE | SCSCR_RIE;
715
716 splx(s2);
717
718 /*
719 * Initialize the termios status to the defaults. Add in the
720 * sticky bits from TIOCSFLAGS.
721 */
722 t.c_ispeed = 0;
723 if (ISSET(sc->sc_hwflags, SCI_HW_CONSOLE)) {
724 t.c_ospeed = SCICN_SPEED;
725 t.c_cflag = sciconscflag;
726 } else {
727 t.c_ospeed = TTYDEF_SPEED;
728 t.c_cflag = TTYDEF_CFLAG;
729 }
730 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL))
731 SET(t.c_cflag, CLOCAL);
732 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS))
733 SET(t.c_cflag, CRTSCTS);
734 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF))
735 SET(t.c_cflag, MDMBUF);
736 /* Make sure sciparam() will do something. */
737 tp->t_ospeed = 0;
738 (void) sciparam(tp, &t);
739 tp->t_iflag = TTYDEF_IFLAG;
740 tp->t_oflag = TTYDEF_OFLAG;
741 tp->t_lflag = TTYDEF_LFLAG;
742 ttychars(tp);
743 ttsetwater(tp);
744
745 s2 = splserial();
746
747 /* Clear the input ring, and unblock. */
748 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf;
749 sc->sc_rbavail = sci_rbuf_size;
750 sci_iflush(sc);
751 CLR(sc->sc_rx_flags, RX_ANY_BLOCK);
752 #if 0
753 /* XXX (msaitoh) */
754 sci_hwiflow(sc);
755 #endif
756
757 #ifdef SCI_DEBUG
758 if (sci_debug)
759 scistatus(sc, "sciopen ");
760 #endif
761
762 splx(s2);
763 }
764
765 splx(s);
766
767 error = ttyopen(tp, SCIDIALOUT(dev), ISSET(flag, O_NONBLOCK));
768 if (error)
769 goto bad;
770
771 error = (*linesw[tp->t_line].l_open)(dev, tp);
772 if (error)
773 goto bad;
774
775 return (0);
776
777 bad:
778
779 return (error);
780 }
781
782 int
783 sciclose(dev, flag, mode, p)
784 dev_t dev;
785 int flag, mode;
786 struct proc *p;
787 {
788 struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
789 struct tty *tp = sc->sc_tty;
790
791 /* XXX This is for cons.c. */
792 if (!ISSET(tp->t_state, TS_ISOPEN))
793 return (0);
794
795 (*linesw[tp->t_line].l_close)(tp, flag);
796 ttyclose(tp);
797
798 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
799 return (0);
800
801 return (0);
802 }
803
804 int
805 sciread(dev, uio, flag)
806 dev_t dev;
807 struct uio *uio;
808 int flag;
809 {
810 struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
811 struct tty *tp = sc->sc_tty;
812
813 return ((*linesw[tp->t_line].l_read)(tp, uio, flag));
814 }
815
816 int
817 sciwrite(dev, uio, flag)
818 dev_t dev;
819 struct uio *uio;
820 int flag;
821 {
822 struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
823 struct tty *tp = sc->sc_tty;
824
825 return ((*linesw[tp->t_line].l_write)(tp, uio, flag));
826 }
827
828 struct tty *
829 scitty(dev)
830 dev_t dev;
831 {
832 struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
833 struct tty *tp = sc->sc_tty;
834
835 return (tp);
836 }
837
838 int
839 sciioctl(dev, cmd, data, flag, p)
840 dev_t dev;
841 u_long cmd;
842 caddr_t data;
843 int flag;
844 struct proc *p;
845 {
846 struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
847 struct tty *tp = sc->sc_tty;
848 int error;
849 int s;
850
851 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
852 return (EIO);
853
854 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p);
855 if (error >= 0)
856 return (error);
857
858 error = ttioctl(tp, cmd, data, flag, p);
859 if (error >= 0)
860 return (error);
861
862 error = 0;
863
864 s = splserial();
865
866 switch (cmd) {
867 #if 0
868 case TIOCSBRK:
869 scif_break(sc, 1);
870 break;
871
872 case TIOCCBRK:
873 scif_break(sc, 0);
874 break;
875 #endif
876 case TIOCGFLAGS:
877 *(int *)data = sc->sc_swflags;
878 break;
879
880 case TIOCSFLAGS:
881 error = suser(p->p_ucred, &p->p_acflag);
882 if (error)
883 break;
884 sc->sc_swflags = *(int *)data;
885 break;
886
887 default:
888 error = ENOTTY;
889 break;
890 }
891
892 splx(s);
893
894 return (error);
895 }
896
897 integrate void
898 sci_schedrx(sc)
899 struct sci_softc *sc;
900 {
901
902 sc->sc_rx_ready = 1;
903
904 /* Wake up the poller. */
905 #ifdef __GENERIC_SOFT_INTERRUPTS
906 softintr_schedule(sc->sc_si);
907 #else
908 #ifndef __NO_SOFT_SERIAL_INTERRUPT
909 setsoftserial();
910 #else
911 if (!sci_softintr_scheduled) {
912 sci_softintr_scheduled = 1;
913 timeout(scisoft, NULL, 1);
914 }
915 #endif
916 #endif
917 }
918
919 /*
920 * Stop output, e.g., for ^S or output flush.
921 */
922 void
923 scistop(tp, flag)
924 struct tty *tp;
925 int flag;
926 {
927 struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(tp->t_dev)];
928 int s;
929
930 s = splserial();
931 if (ISSET(tp->t_state, TS_BUSY)) {
932 /* Stop transmitting at the next chunk. */
933 sc->sc_tbc = 0;
934 sc->sc_heldtbc = 0;
935 if (!ISSET(tp->t_state, TS_TTSTOP))
936 SET(tp->t_state, TS_FLUSH);
937 }
938 splx(s);
939 }
940
941 void
942 scidiag(arg)
943 void *arg;
944 {
945 struct sci_softc *sc = arg;
946 int overflows, floods;
947 int s;
948
949 s = splserial();
950 overflows = sc->sc_overflows;
951 sc->sc_overflows = 0;
952 floods = sc->sc_floods;
953 sc->sc_floods = 0;
954 sc->sc_errors = 0;
955 splx(s);
956
957 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n",
958 sc->sc_dev.dv_xname,
959 overflows, overflows == 1 ? "" : "s",
960 floods, floods == 1 ? "" : "s");
961 }
962
963 integrate void
964 sci_rxsoft(sc, tp)
965 struct sci_softc *sc;
966 struct tty *tp;
967 {
968 int (*rint) __P((int c, struct tty *tp)) = linesw[tp->t_line].l_rint;
969 u_char *get, *end;
970 u_int cc, scc;
971 u_char ssr;
972 int code;
973 int s;
974
975 end = sc->sc_ebuf;
976 get = sc->sc_rbget;
977 scc = cc = sci_rbuf_size - sc->sc_rbavail;
978
979 if (cc == sci_rbuf_size) {
980 sc->sc_floods++;
981 if (sc->sc_errors++ == 0)
982 timeout(scidiag, sc, 60 * hz);
983 }
984
985 while (cc) {
986 code = get[0];
987 ssr = get[1];
988 if (ISSET(ssr, SCSSR_FER | SCSSR_PER)) {
989 if (ISSET(ssr, SCSSR_FER))
990 SET(code, TTY_FE);
991 if (ISSET(ssr, SCSSR_PER))
992 SET(code, TTY_PE);
993 }
994 if ((*rint)(code, tp) == -1) {
995 /*
996 * The line discipline's buffer is out of space.
997 */
998 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) {
999 /*
1000 * We're either not using flow control, or the
1001 * line discipline didn't tell us to block for
1002 * some reason. Either way, we have no way to
1003 * know when there's more space available, so
1004 * just drop the rest of the data.
1005 */
1006 get += cc << 1;
1007 if (get >= end)
1008 get -= sci_rbuf_size << 1;
1009 cc = 0;
1010 } else {
1011 /*
1012 * Don't schedule any more receive processing
1013 * until the line discipline tells us there's
1014 * space available (through scihwiflow()).
1015 * Leave the rest of the data in the input
1016 * buffer.
1017 */
1018 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
1019 }
1020 break;
1021 }
1022 get += 2;
1023 if (get >= end)
1024 get = sc->sc_rbuf;
1025 cc--;
1026 }
1027
1028 if (cc != scc) {
1029 sc->sc_rbget = get;
1030 s = splserial();
1031 cc = sc->sc_rbavail += scc - cc;
1032 /* Buffers should be ok again, release possible block. */
1033 if (cc >= sc->sc_r_lowat) {
1034 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) {
1035 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED);
1036 SHREG_SCSCR |= SCSCR_RIE;
1037 }
1038 #if 0
1039 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) {
1040 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED);
1041 sci_hwiflow(sc);
1042 }
1043 #endif
1044 }
1045 splx(s);
1046 }
1047 }
1048
1049 integrate void
1050 sci_txsoft(sc, tp)
1051 struct sci_softc *sc;
1052 struct tty *tp;
1053 {
1054
1055 CLR(tp->t_state, TS_BUSY);
1056 if (ISSET(tp->t_state, TS_FLUSH))
1057 CLR(tp->t_state, TS_FLUSH);
1058 else
1059 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf));
1060 (*linesw[tp->t_line].l_start)(tp);
1061 }
1062
1063 integrate void
1064 sci_stsoft(sc, tp)
1065 struct sci_softc *sc;
1066 struct tty *tp;
1067 {
1068 #if 0
1069 /* XXX (msaitoh) */
1070 u_char msr, delta;
1071 int s;
1072
1073 s = splserial();
1074 msr = sc->sc_msr;
1075 delta = sc->sc_msr_delta;
1076 sc->sc_msr_delta = 0;
1077 splx(s);
1078
1079 if (ISSET(delta, sc->sc_msr_dcd)) {
1080 /*
1081 * Inform the tty layer that carrier detect changed.
1082 */
1083 (void) (*linesw[tp->t_line].l_modem)(tp, ISSET(msr, MSR_DCD));
1084 }
1085
1086 if (ISSET(delta, sc->sc_msr_cts)) {
1087 /* Block or unblock output according to flow control. */
1088 if (ISSET(msr, sc->sc_msr_cts)) {
1089 sc->sc_tx_stopped = 0;
1090 (*linesw[tp->t_line].l_start)(tp);
1091 } else {
1092 sc->sc_tx_stopped = 1;
1093 }
1094 }
1095
1096 #ifdef SCI_DEBUG
1097 if (sci_debug)
1098 scistatus(sc, "sci_stsoft");
1099 #endif
1100 #endif
1101 }
1102
1103 #ifdef __GENERIC_SOFT_INTERRUPTS
1104 void
1105 scisoft(arg)
1106 void *arg;
1107 {
1108 struct sci_softc *sc = arg;
1109 struct tty *tp;
1110
1111 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
1112 return;
1113
1114 {
1115 #else
1116 void
1117 #ifndef __NO_SOFT_SERIAL_INTERRUPT
1118 scisoft()
1119 #else
1120 scisoft(arg)
1121 void *arg;
1122 #endif
1123 {
1124 struct sci_softc *sc;
1125 struct tty *tp;
1126 int unit;
1127 #ifdef __NO_SOFT_SERIAL_INTERRUPT
1128 int s;
1129
1130 s = splsoftserial();
1131 sci_softintr_scheduled = 0;
1132 #endif
1133
1134 for (unit = 0; unit < sci_cd.cd_ndevs; unit++) {
1135 sc = sci_cd.cd_devs[unit];
1136 if (sc == NULL || !ISSET(sc->sc_hwflags, SCI_HW_DEV_OK))
1137 continue;
1138
1139 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
1140 continue;
1141
1142 tp = sc->sc_tty;
1143 if (tp == NULL)
1144 continue;
1145 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0)
1146 continue;
1147 #endif
1148 tp = sc->sc_tty;
1149
1150 if (sc->sc_rx_ready) {
1151 sc->sc_rx_ready = 0;
1152 sci_rxsoft(sc, tp);
1153 }
1154
1155 #if 0
1156 if (sc->sc_st_check) {
1157 sc->sc_st_check = 0;
1158 sci_stsoft(sc, tp);
1159 }
1160 #endif
1161
1162 if (sc->sc_tx_done) {
1163 sc->sc_tx_done = 0;
1164 sci_txsoft(sc, tp);
1165 }
1166 }
1167
1168 #ifndef __GENERIC_SOFT_INTERRUPTS
1169 #ifdef __NO_SOFT_SERIAL_INTERRUPT
1170 splx(s);
1171 #endif
1172 #endif
1173 }
1174
1175 int
1176 sciintr(arg)
1177 void *arg;
1178 {
1179 struct sci_softc *sc = arg;
1180 u_char *put, *end;
1181 u_int cc;
1182 u_short ssr;
1183
1184 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
1185 return (0);
1186
1187 end = sc->sc_ebuf;
1188 put = sc->sc_rbput;
1189 cc = sc->sc_rbavail;
1190
1191 do {
1192
1193 ssr = SHREG_SCSSR;
1194 #if defined(DDB) || defined(KGDB)
1195 if (ISSET(ssr, SCSSR_BRK)) {
1196 #ifdef DDB
1197 if (ISSET(sc->sc_hwflags, SCI_HW_CONSOLE)) {
1198 console_debugger();
1199 continue;
1200 }
1201 #endif
1202 #ifdef KGDB
1203 if (ISSET(sc->sc_hwflags, SCI_HW_KGDB)) {
1204 kgdb_connect(1);
1205 continue;
1206 }
1207 #endif
1208 }
1209 #endif /* DDB || KGDB */
1210 if ((SHREG_SCSSR & SCSSR_RDRF) != 0) {
1211 if (cc > 0){
1212 put[0] = SHREG_SCRDR;
1213 put[1] = SHREG_SCSSR & 0x00ff;
1214
1215 SHREG_SCSSR &= ~SCSSR_RDRF;
1216
1217 put += 2;
1218 if (put >= end)
1219 put = sc->sc_rbuf;
1220 cc--;
1221 }
1222
1223 /*
1224 * Current string of incoming characters ended because
1225 * no more data was available or we ran out of space.
1226 * Schedule a receive event if any data was received.
1227 * If we're out of space, turn off receive interrupts.
1228 */
1229 sc->sc_rbput = put;
1230 sc->sc_rbavail = cc;
1231 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED))
1232 sc->sc_rx_ready = 1;
1233
1234 /*
1235 * See if we are in danger of overflowing a buffer. If
1236 * so, use hardware flow control to ease the pressure.
1237 */
1238 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) &&
1239 cc < sc->sc_r_hiwat) {
1240 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED);
1241 #if 0
1242 sci_hwiflow(sc);
1243 #endif
1244 }
1245
1246 /*
1247 * If we're out of space, disable receive interrupts
1248 * until the queue has drained a bit.
1249 */
1250 if (!cc) {
1251 SHREG_SCSCR &= ~SCSCR_RIE;
1252 }
1253 } else {
1254 if (SHREG_SCSSR & SCSSR_RDRF) {
1255 SHREG_SCSCR &= ~(SCSCR_TIE | SCSCR_RIE);
1256 continue;
1257 }
1258 }
1259
1260 #if 0
1261 msr = bus_space_read_1(iot, ioh, sci_msr);
1262 delta = msr ^ sc->sc_msr;
1263 sc->sc_msr = msr;
1264 if (ISSET(delta, sc->sc_msr_mask)) {
1265 SET(sc->sc_msr_delta, delta);
1266
1267 /*
1268 * Pulse-per-second clock signal on edge of DCD?
1269 */
1270 if (ISSET(delta, sc->sc_ppsmask)) {
1271 struct timeval tv;
1272 if (ISSET(msr, sc->sc_ppsmask) ==
1273 sc->sc_ppsassert) {
1274 /* XXX nanotime() */
1275 microtime(&tv);
1276 TIMEVAL_TO_TIMESPEC(&tv,
1277 &sc->ppsinfo.assert_timestamp);
1278 if (sc->ppsparam.mode & PPS_OFFSETASSERT) {
1279 timespecadd(&sc->ppsinfo.assert_timestamp,
1280 &sc->ppsparam.assert_offset,
1281 &sc->ppsinfo.assert_timestamp);
1282 TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.assert_timestamp);
1283 }
1284
1285 #ifdef PPS_SYNC
1286 if (sc->ppsparam.mode & PPS_HARDPPSONASSERT)
1287 hardpps(&tv, tv.tv_usec);
1288 #endif
1289 sc->ppsinfo.assert_sequence++;
1290 sc->ppsinfo.current_mode =
1291 sc->ppsparam.mode;
1292
1293 } else if (ISSET(msr, sc->sc_ppsmask) ==
1294 sc->sc_ppsclear) {
1295 /* XXX nanotime() */
1296 microtime(&tv);
1297 TIMEVAL_TO_TIMESPEC(&tv,
1298 &sc->ppsinfo.clear_timestamp);
1299 if (sc->ppsparam.mode & PPS_OFFSETCLEAR) {
1300 timespecadd(&sc->ppsinfo.clear_timestamp,
1301 &sc->ppsparam.clear_offset,
1302 &sc->ppsinfo.clear_timestamp);
1303 TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.clear_timestamp);
1304 }
1305
1306 #ifdef PPS_SYNC
1307 if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR)
1308 hardpps(&tv, tv.tv_usec);
1309 #endif
1310 sc->ppsinfo.clear_sequence++;
1311 sc->ppsinfo.current_mode =
1312 sc->ppsparam.mode;
1313 }
1314 }
1315
1316 /*
1317 * Stop output immediately if we lose the output
1318 * flow control signal or carrier detect.
1319 */
1320 if (ISSET(~msr, sc->sc_msr_mask)) {
1321 sc->sc_tbc = 0;
1322 sc->sc_heldtbc = 0;
1323 #ifdef SCI_DEBUG
1324 if (sci_debug)
1325 scistatus(sc, "sciintr ");
1326 #endif
1327 }
1328
1329 sc->sc_st_check = 1;
1330 }
1331 #endif
1332 } while (SHREG_SCSSR & SCSSR_RDRF);
1333
1334 /*
1335 * Done handling any receive interrupts. See if data can be
1336 * transmitted as well. Schedule tx done event if no data left
1337 * and tty was marked busy.
1338 */
1339 if ((SHREG_SCSSR & SCSSR_TDRE) != 0) {
1340 /*
1341 * If we've delayed a parameter change, do it now, and restart
1342 * output.
1343 */
1344 if (sc->sc_heldchange) {
1345 sc->sc_heldchange = 0;
1346 sc->sc_tbc = sc->sc_heldtbc;
1347 sc->sc_heldtbc = 0;
1348 }
1349
1350 /* Output the next chunk of the contiguous buffer, if any. */
1351 if (sc->sc_tbc > 0) {
1352 PutcSci(*(sc->sc_tba));
1353 sc->sc_tba++;
1354 sc->sc_tbc--;
1355 } else {
1356 /* Disable transmit completion interrupts if necessary. */
1357 #if 0
1358 if (ISSET(sc->sc_ier, IER_ETXRDY))
1359 #endif
1360 SHREG_SCSCR &= ~SCSCR_TIE;
1361
1362 if (sc->sc_tx_busy) {
1363 sc->sc_tx_busy = 0;
1364 sc->sc_tx_done = 1;
1365 }
1366 }
1367 }
1368
1369 /* Wake up the poller. */
1370 #ifdef __GENERIC_SOFT_INTERRUPTS
1371 softintr_schedule(sc->sc_si);
1372 #else
1373 #ifndef __NO_SOFT_SERIAL_INTERRUPT
1374 setsoftserial();
1375 #else
1376 if (!sci_softintr_scheduled) {
1377 sci_softintr_scheduled = 1;
1378 timeout(scisoft, NULL, 1);
1379 }
1380 #endif
1381 #endif
1382
1383 #if NRND > 0 && defined(RND_SCI)
1384 rnd_add_uint32(&sc->rnd_source, iir | lsr);
1385 #endif
1386
1387 return (1);
1388 }
1389
1390 void
1391 scicnprobe(cp)
1392 struct consdev *cp;
1393 {
1394 int maj;
1395
1396 /* locate the major number */
1397 for (maj = 0; maj < nchrdev; maj++)
1398 if (cdevsw[maj].d_open == sciopen)
1399 break;
1400
1401 /* Initialize required fields. */
1402 cp->cn_dev = makedev(maj, 0);
1403 cp->cn_pri = CN_NORMAL;
1404 }
1405
1406 #define sci_gets GetStrSci
1407 #define sci_puts PutStrSci
1408
1409 void
1410 scicninit(cp)
1411 struct consdev *cp;
1412 {
1413
1414 InitializeSci(SCICN_SPEED);
1415
1416 #if 0
1417 sci_intr_init(); /* XXX msaitoh */
1418 #endif
1419
1420 sci_puts("sci initialized.\n\r");
1421 }
1422
1423 #define sci_getc GetcSci
1424 #define sci_putc PutcSci
1425
1426 int
1427 scicngetc(dev)
1428 dev_t dev;
1429 {
1430 int c;
1431 int s;
1432
1433 s = splserial();
1434 c = sci_getc();
1435 splx(s);
1436
1437 return (c);
1438 }
1439
1440 void
1441 scicnputc(dev, c)
1442 dev_t dev;
1443 int c;
1444 {
1445 int s;
1446
1447 s = splserial();
1448 sci_putc(c);
1449 splx(s);
1450 }
1451