sci.c revision 1.13
1 /* $NetBSD: sci.c,v 1.13 2001/05/02 10:32:19 scw Exp $ */ 2 3 /*- 4 * Copyright (C) 1999 T.Horiuchi and SAITOH Masanobu. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 /*- 30 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. 31 * All rights reserved. 32 * 33 * This code is derived from software contributed to The NetBSD Foundation 34 * by Charles M. Hannum. 35 * 36 * Redistribution and use in source and binary forms, with or without 37 * modification, are permitted provided that the following conditions 38 * are met: 39 * 1. Redistributions of source code must retain the above copyright 40 * notice, this list of conditions and the following disclaimer. 41 * 2. Redistributions in binary form must reproduce the above copyright 42 * notice, this list of conditions and the following disclaimer in the 43 * documentation and/or other materials provided with the distribution. 44 * 3. All advertising materials mentioning features or use of this software 45 * must display the following acknowledgement: 46 * This product includes software developed by the NetBSD 47 * Foundation, Inc. and its contributors. 48 * 4. Neither the name of The NetBSD Foundation nor the names of its 49 * contributors may be used to endorse or promote products derived 50 * from this software without specific prior written permission. 51 * 52 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 53 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 54 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 55 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 56 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 57 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 58 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 59 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 60 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 61 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 62 * POSSIBILITY OF SUCH DAMAGE. 63 */ 64 65 /* 66 * Copyright (c) 1991 The Regents of the University of California. 67 * All rights reserved. 68 * 69 * Redistribution and use in source and binary forms, with or without 70 * modification, are permitted provided that the following conditions 71 * are met: 72 * 1. Redistributions of source code must retain the above copyright 73 * notice, this list of conditions and the following disclaimer. 74 * 2. Redistributions in binary form must reproduce the above copyright 75 * notice, this list of conditions and the following disclaimer in the 76 * documentation and/or other materials provided with the distribution. 77 * 3. All advertising materials mentioning features or use of this software 78 * must display the following acknowledgement: 79 * This product includes software developed by the University of 80 * California, Berkeley and its contributors. 81 * 4. Neither the name of the University nor the names of its contributors 82 * may be used to endorse or promote products derived from this software 83 * without specific prior written permission. 84 * 85 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 86 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 87 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 88 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 89 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 90 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 91 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 92 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 93 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 94 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 95 * SUCH DAMAGE. 96 * 97 * @(#)com.c 7.5 (Berkeley) 5/16/91 98 */ 99 100 /* 101 * SH internal serial driver 102 * 103 * This code is derived from both z8530tty.c and com.c 104 */ 105 106 #include "opt_pclock.h" 107 #include "opt_sci.h" 108 109 #include <sys/param.h> 110 #include <sys/systm.h> 111 #include <sys/tty.h> 112 #include <sys/proc.h> 113 #include <sys/conf.h> 114 #include <sys/file.h> 115 #include <sys/syslog.h> 116 #include <sys/kernel.h> 117 #include <sys/device.h> 118 #include <sys/malloc.h> 119 120 #include <dev/cons.h> 121 122 #include <machine/cpu.h> 123 #include <sh3/scireg.h> 124 #include <sh3/tmureg.h> 125 126 #include <machine/shbvar.h> 127 128 static void scistart __P((struct tty *)); 129 static int sciparam __P((struct tty *, struct termios *)); 130 131 void scicnprobe __P((struct consdev *)); 132 void scicninit __P((struct consdev *)); 133 void scicnputc __P((dev_t, int)); 134 int scicngetc __P((dev_t)); 135 void scicnpoolc __P((dev_t, int)); 136 int sciintr __P((void *)); 137 138 struct sci_softc { 139 struct device sc_dev; /* boilerplate */ 140 struct tty *sc_tty; 141 void *sc_ih; 142 143 struct callout sc_diag_ch; 144 145 #if 0 146 bus_space_tag_t sc_iot; /* ISA i/o space identifier */ 147 bus_space_handle_t sc_ioh; /* ISA io handle */ 148 149 int sc_drq; 150 151 int sc_frequency; 152 #endif 153 154 u_int sc_overflows, 155 sc_floods, 156 sc_errors; /* number of retries so far */ 157 u_char sc_status[7]; /* copy of registers */ 158 159 int sc_hwflags; 160 int sc_swflags; 161 u_int sc_fifolen; /* XXX always 0? */ 162 163 u_int sc_r_hiwat, 164 sc_r_lowat; 165 u_char *volatile sc_rbget, 166 *volatile sc_rbput; 167 volatile u_int sc_rbavail; 168 u_char *sc_rbuf, 169 *sc_ebuf; 170 171 u_char *sc_tba; /* transmit buffer address */ 172 u_int sc_tbc, /* transmit byte count */ 173 sc_heldtbc; 174 175 volatile u_char sc_rx_flags, /* receiver blocked */ 176 #define RX_TTY_BLOCKED 0x01 177 #define RX_TTY_OVERFLOWED 0x02 178 #define RX_IBUF_BLOCKED 0x04 179 #define RX_IBUF_OVERFLOWED 0x08 180 #define RX_ANY_BLOCK 0x0f 181 sc_tx_busy, /* working on an output chunk */ 182 sc_tx_done, /* done with one output chunk */ 183 sc_tx_stopped, /* H/W level stop (lost CTS) */ 184 sc_st_check, /* got a status interrupt */ 185 sc_rx_ready; 186 187 volatile u_char sc_heldchange; 188 }; 189 190 /* controller driver configuration */ 191 static int sci_match __P((struct device *, struct cfdata *, void *)); 192 static void sci_attach __P((struct device *, struct device *, void *)); 193 194 void sci_break __P((struct sci_softc *, int)); 195 void sci_iflush __P((struct sci_softc *)); 196 197 #define integrate static inline 198 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 199 void scisoft __P((void *)); 200 #else 201 #ifndef __NO_SOFT_SERIAL_INTERRUPT 202 void scisoft __P((void)); 203 #else 204 void scisoft __P((void *)); 205 #endif 206 #endif 207 integrate void sci_rxsoft __P((struct sci_softc *, struct tty *)); 208 integrate void sci_txsoft __P((struct sci_softc *, struct tty *)); 209 integrate void sci_stsoft __P((struct sci_softc *, struct tty *)); 210 integrate void sci_schedrx __P((struct sci_softc *)); 211 void scidiag __P((void *)); 212 213 #define SCIUNIT_MASK 0x7ffff 214 #define SCIDIALOUT_MASK 0x80000 215 216 #define SCIUNIT(x) (minor(x) & SCIUNIT_MASK) 217 #define SCIDIALOUT(x) (minor(x) & SCIDIALOUT_MASK) 218 219 /* Macros to clear/set/test flags. */ 220 #define SET(t, f) (t) |= (f) 221 #define CLR(t, f) (t) &= ~(f) 222 #define ISSET(t, f) ((t) & (f)) 223 224 /* Hardware flag masks */ 225 #define SCI_HW_NOIEN 0x01 226 #define SCI_HW_FIFO 0x02 227 #define SCI_HW_FLOW 0x08 228 #define SCI_HW_DEV_OK 0x20 229 #define SCI_HW_CONSOLE 0x40 230 #define SCI_HW_KGDB 0x80 231 232 /* Buffer size for character buffer */ 233 #define SCI_RING_SIZE 2048 234 235 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 236 u_int sci_rbuf_hiwat = (SCI_RING_SIZE * 1) / 4; 237 u_int sci_rbuf_lowat = (SCI_RING_SIZE * 3) / 4; 238 239 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 240 int sciconscflag = CONMODE; 241 int sciisconsole = 0; 242 243 #ifdef SCICN_SPEED 244 int scicn_speed = SCICN_SPEED; 245 #else 246 int scicn_speed = 9600; 247 #endif 248 249 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 250 251 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS 252 #ifdef __NO_SOFT_SERIAL_INTERRUPT 253 volatile int sci_softintr_scheduled; 254 struct callout sci_soft_ch = CALLOUT_INITIALIZER; 255 #endif 256 #endif 257 258 u_int sci_rbuf_size = SCI_RING_SIZE; 259 260 struct cfattach sci_ca = { 261 sizeof(struct sci_softc), sci_match, sci_attach 262 }; 263 264 extern struct cfdriver sci_cd; 265 266 cdev_decl(sci); 267 268 void InitializeSci __P((unsigned int)); 269 270 /* 271 * following functions are debugging prupose only 272 */ 273 #define CR 0x0D 274 #define I2C_ADRS (*(volatile unsigned int *)0xa8000000) 275 #define USART_ON (unsigned int)~0x08 276 277 static void WaitFor __P((int)); 278 void sci_putc __P((unsigned char)); 279 unsigned char sci_getc __P((void)); 280 int SciErrCheck __P((void)); 281 282 /* 283 * WaitFor 284 * : int mSec; 285 */ 286 static void 287 WaitFor(mSec) 288 int mSec; 289 { 290 291 /* Disable Under Flow interrupt, rising edge, 1/4 */ 292 SHREG_TCR2 = 0x0000; 293 294 /* Set counter value (count down with 4 KHz) */ 295 SHREG_TCNT2 = mSec * 4; 296 297 /* start Channel2 */ 298 SHREG_TSTR |= TSTR_STR2; 299 300 /* wait for under flag ON of channel2 */ 301 while ((SHREG_TCR2 & TCR_UNF) == 0) 302 ; 303 304 /* stop channel2 */ 305 SHREG_TSTR &= ~TSTR_STR2; 306 } 307 308 /* 309 * InitializeSci 310 * : unsigned int bps; 311 * : SCI(Serial Communication Interface) 312 */ 313 314 void 315 InitializeSci(bps) 316 unsigned int bps; 317 { 318 319 /* Initialize SCR */ 320 SHREG_SCSCR = 0x00; 321 322 /* Serial Mode Register */ 323 SHREG_SCSMR = 0x00; /* Async,8bit,NonParity,Even,1Stop,NoMulti */ 324 325 /* Bit Rate Register */ 326 SHREG_SCBRR = divrnd(PCLOCK, 32 * bps) - 1; 327 328 /* 329 * wait 1mSec, because Send/Recv must begin 1 bit period after 330 * BRR is set. 331 */ 332 WaitFor(1); 333 334 /* Send permission, Recieve permission ON */ 335 SHREG_SCSCR = SCSCR_TE | SCSCR_RE; 336 337 /* Serial Status Register */ 338 SHREG_SCSSR &= SCSSR_TDRE; /* Clear Status */ 339 340 #if 0 341 I2C_ADRS &= ~0x08; /* enable RS-232C */ 342 #endif 343 } 344 345 346 /* 347 * sci_putc 348 * : unsigned char c; 349 */ 350 void 351 sci_putc(c) 352 unsigned char c; 353 { 354 355 if (c == '\n') 356 sci_putc('\r'); 357 358 /* wait for ready */ 359 while ((SHREG_SCSSR & SCSSR_TDRE) == NULL) 360 ; 361 362 /* write send data to send register */ 363 SHREG_SCTDR = c; 364 365 /* clear ready flag */ 366 SHREG_SCSSR &= ~SCSSR_TDRE; 367 } 368 369 /* 370 * : SciErrCheck 371 * 0x20 = over run 372 * 0x10 = frame error 373 * 0x80 = parity error 374 */ 375 int 376 SciErrCheck(void) 377 { 378 379 return(SHREG_SCSSR & (SCSSR_ORER | SCSSR_FER | SCSSR_PER)); 380 } 381 382 /* 383 * sci_getc 384 */ 385 unsigned char 386 sci_getc(void) 387 { 388 unsigned char c, err_c; 389 390 while (((err_c = SHREG_SCSSR) 391 & (SCSSR_RDRF | SCSSR_ORER | SCSSR_FER | SCSSR_PER)) == 0) 392 ; 393 if ((err_c & (SCSSR_ORER | SCSSR_FER | SCSSR_PER)) != 0) { 394 SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_FER | SCSSR_PER); 395 return(err_c |= 0x80); 396 } 397 398 c = SHREG_SCRDR; 399 400 SHREG_SCSSR &= ~SCSSR_RDRF; 401 402 return(c); 403 } 404 405 #if 0 406 #define SCI_MAX_UNITS 2 407 #else 408 #define SCI_MAX_UNITS 1 409 #endif 410 411 412 static int 413 sci_match(parent, cfp, aux) 414 struct device *parent; 415 struct cfdata *cfp; 416 void *aux; 417 { 418 struct shb_attach_args *sa = aux; 419 420 if (strcmp(cfp->cf_driver->cd_name, "sci") 421 || cfp->cf_unit >= SCI_MAX_UNITS) 422 return 0; 423 424 sa->ia_iosize = 0x10; 425 return 1; 426 } 427 428 static void 429 sci_attach(parent, self, aux) 430 struct device *parent, *self; 431 void *aux; 432 { 433 struct sci_softc *sc = (struct sci_softc *)self; 434 struct tty *tp; 435 int irq; 436 struct shb_attach_args *ia = aux; 437 438 sc->sc_hwflags = 0; /* XXX */ 439 sc->sc_swflags = 0; /* XXX */ 440 sc->sc_fifolen = 0; /* XXX */ 441 442 irq = ia->ia_irq; 443 444 if (sciisconsole) { 445 SET(sc->sc_hwflags, SCI_HW_CONSOLE); 446 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 447 printf("\n%s: console\n", sc->sc_dev.dv_xname); 448 } else { 449 InitializeSci(9600); 450 printf("\n"); 451 } 452 453 callout_init(&sc->sc_diag_ch); 454 455 #if 0 456 if (irq != IRQUNK) { 457 sc->sc_ih = shb_intr_establish(irq, 458 IST_EDGE, IPL_SERIAL, sciintr, sc); 459 } 460 #else 461 if (irq != IRQUNK) { 462 sc->sc_ih = shb_intr_establish(SCI_IRQ, 463 IST_EDGE, IPL_SERIAL, sciintr, sc); 464 } 465 #endif 466 467 SET(sc->sc_hwflags, SCI_HW_DEV_OK); 468 469 tp = ttymalloc(); 470 tp->t_oproc = scistart; 471 tp->t_param = sciparam; 472 tp->t_hwiflow = NULL; 473 474 sc->sc_tty = tp; 475 sc->sc_rbuf = malloc(sci_rbuf_size << 1, M_DEVBUF, M_NOWAIT); 476 if (sc->sc_rbuf == NULL) { 477 printf("%s: unable to allocate ring buffer\n", 478 sc->sc_dev.dv_xname); 479 return; 480 } 481 sc->sc_ebuf = sc->sc_rbuf + (sci_rbuf_size << 1); 482 483 tty_attach(tp); 484 } 485 486 /* 487 * Start or restart transmission. 488 */ 489 static void 490 scistart(tp) 491 struct tty *tp; 492 { 493 struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(tp->t_dev)]; 494 int s; 495 496 s = spltty(); 497 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 498 goto out; 499 if (sc->sc_tx_stopped) 500 goto out; 501 502 if (tp->t_outq.c_cc <= tp->t_lowat) { 503 if (ISSET(tp->t_state, TS_ASLEEP)) { 504 CLR(tp->t_state, TS_ASLEEP); 505 wakeup(&tp->t_outq); 506 } 507 selwakeup(&tp->t_wsel); 508 if (tp->t_outq.c_cc == 0) 509 goto out; 510 } 511 512 /* Grab the first contiguous region of buffer space. */ 513 { 514 u_char *tba; 515 int tbc; 516 517 tba = tp->t_outq.c_cf; 518 tbc = ndqb(&tp->t_outq, 0); 519 520 (void)splserial(); 521 522 sc->sc_tba = tba; 523 sc->sc_tbc = tbc; 524 } 525 526 SET(tp->t_state, TS_BUSY); 527 sc->sc_tx_busy = 1; 528 529 /* Enable transmit completion interrupts if necessary. */ 530 SHREG_SCSCR |= SCSCR_TIE | SCSCR_RIE; 531 532 /* Output the first byte of the contiguous buffer. */ 533 { 534 if (sc->sc_tbc > 0) { 535 sci_putc(*(sc->sc_tba)); 536 sc->sc_tba++; 537 sc->sc_tbc--; 538 } 539 } 540 out: 541 splx(s); 542 return; 543 } 544 545 /* 546 * Set SCI tty parameters from termios. 547 * XXX - Should just copy the whole termios after 548 * making sure all the changes could be done. 549 */ 550 static int 551 sciparam(tp, t) 552 struct tty *tp; 553 struct termios *t; 554 { 555 struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(tp->t_dev)]; 556 int ospeed = t->c_ospeed; 557 int s; 558 559 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 560 return (EIO); 561 562 /* Check requested parameters. */ 563 if (ospeed < 0) 564 return (EINVAL); 565 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 566 return (EINVAL); 567 568 /* 569 * For the console, always force CLOCAL and !HUPCL, so that the port 570 * is always active. 571 */ 572 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 573 ISSET(sc->sc_hwflags, SCI_HW_CONSOLE)) { 574 SET(t->c_cflag, CLOCAL); 575 CLR(t->c_cflag, HUPCL); 576 } 577 578 /* 579 * If there were no changes, don't do anything. This avoids dropping 580 * input and improves performance when all we did was frob things like 581 * VMIN and VTIME. 582 */ 583 if (tp->t_ospeed == t->c_ospeed && 584 tp->t_cflag == t->c_cflag) 585 return (0); 586 587 #if 0 588 /* XXX (msaitoh) */ 589 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 590 #endif 591 592 s = splserial(); 593 594 /* 595 * Set the FIFO threshold based on the receive speed. 596 * 597 * * If it's a low speed, it's probably a mouse or some other 598 * interactive device, so set the threshold low. 599 * * If it's a high speed, trim the trigger level down to prevent 600 * overflows. 601 * * Otherwise set it a bit higher. 602 */ 603 #if 0 604 /* XXX (msaitoh) */ 605 if (ISSET(sc->sc_hwflags, SCI_HW_HAYESP)) 606 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 607 else if (ISSET(sc->sc_hwflags, SCI_HW_FIFO)) 608 sc->sc_fifo = FIFO_ENABLE | 609 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : 610 t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4); 611 else 612 sc->sc_fifo = 0; 613 #endif 614 615 /* And copy to tty. */ 616 tp->t_ispeed = 0; 617 tp->t_ospeed = t->c_ospeed; 618 tp->t_cflag = t->c_cflag; 619 620 if (!sc->sc_heldchange) { 621 if (sc->sc_tx_busy) { 622 sc->sc_heldtbc = sc->sc_tbc; 623 sc->sc_tbc = 0; 624 sc->sc_heldchange = 1; 625 } 626 #if 0 627 /* XXX (msaitoh) */ 628 else 629 sci_loadchannelregs(sc); 630 #endif 631 } 632 633 if (!ISSET(t->c_cflag, CHWFLOW)) { 634 /* Disable the high water mark. */ 635 sc->sc_r_hiwat = 0; 636 sc->sc_r_lowat = 0; 637 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 638 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 639 sci_schedrx(sc); 640 } 641 } else { 642 sc->sc_r_hiwat = sci_rbuf_hiwat; 643 sc->sc_r_lowat = sci_rbuf_lowat; 644 } 645 646 splx(s); 647 648 #ifdef SCI_DEBUG 649 if (sci_debug) 650 scistatus(sc, "sciparam "); 651 #endif 652 653 if (!ISSET(t->c_cflag, CHWFLOW)) { 654 if (sc->sc_tx_stopped) { 655 sc->sc_tx_stopped = 0; 656 scistart(tp); 657 } 658 } 659 660 return (0); 661 } 662 663 void 664 sci_iflush(sc) 665 struct sci_softc *sc; 666 { 667 unsigned char err_c; 668 volatile unsigned char c; 669 670 if (((err_c = SHREG_SCSSR) 671 & (SCSSR_RDRF | SCSSR_ORER | SCSSR_FER | SCSSR_PER)) != 0) { 672 673 if ((err_c & (SCSSR_ORER | SCSSR_FER | SCSSR_PER)) != 0) { 674 SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_FER | SCSSR_PER); 675 return; 676 } 677 678 c = SHREG_SCRDR; 679 680 SHREG_SCSSR &= ~SCSSR_RDRF; 681 } 682 } 683 684 int 685 sciopen(dev, flag, mode, p) 686 dev_t dev; 687 int flag, mode; 688 struct proc *p; 689 { 690 int unit = SCIUNIT(dev); 691 struct sci_softc *sc; 692 struct tty *tp; 693 int s, s2; 694 int error; 695 696 if (unit >= sci_cd.cd_ndevs) 697 return (ENXIO); 698 sc = sci_cd.cd_devs[unit]; 699 if (sc == 0 || !ISSET(sc->sc_hwflags, SCI_HW_DEV_OK) || 700 sc->sc_rbuf == NULL) 701 return (ENXIO); 702 703 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 704 return (ENXIO); 705 706 #ifdef KGDB 707 /* 708 * If this is the kgdb port, no other use is permitted. 709 */ 710 if (ISSET(sc->sc_hwflags, SCI_HW_KGDB)) 711 return (EBUSY); 712 #endif 713 714 tp = sc->sc_tty; 715 716 if (ISSET(tp->t_state, TS_ISOPEN) && 717 ISSET(tp->t_state, TS_XCLUDE) && 718 p->p_ucred->cr_uid != 0) 719 return (EBUSY); 720 721 s = spltty(); 722 723 /* 724 * Do the following iff this is a first open. 725 */ 726 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 727 struct termios t; 728 729 tp->t_dev = dev; 730 731 s2 = splserial(); 732 733 /* Turn on interrupts. */ 734 SHREG_SCSCR |= SCSCR_TIE | SCSCR_RIE; 735 736 splx(s2); 737 738 /* 739 * Initialize the termios status to the defaults. Add in the 740 * sticky bits from TIOCSFLAGS. 741 */ 742 t.c_ispeed = 0; 743 if (ISSET(sc->sc_hwflags, SCI_HW_CONSOLE)) { 744 t.c_ospeed = scicn_speed; 745 t.c_cflag = sciconscflag; 746 } else { 747 t.c_ospeed = TTYDEF_SPEED; 748 t.c_cflag = TTYDEF_CFLAG; 749 } 750 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 751 SET(t.c_cflag, CLOCAL); 752 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 753 SET(t.c_cflag, CRTSCTS); 754 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 755 SET(t.c_cflag, MDMBUF); 756 /* Make sure sciparam() will do something. */ 757 tp->t_ospeed = 0; 758 (void) sciparam(tp, &t); 759 tp->t_iflag = TTYDEF_IFLAG; 760 tp->t_oflag = TTYDEF_OFLAG; 761 tp->t_lflag = TTYDEF_LFLAG; 762 ttychars(tp); 763 ttsetwater(tp); 764 765 s2 = splserial(); 766 767 /* Clear the input ring, and unblock. */ 768 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 769 sc->sc_rbavail = sci_rbuf_size; 770 sci_iflush(sc); 771 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 772 #if 0 773 /* XXX (msaitoh) */ 774 sci_hwiflow(sc); 775 #endif 776 777 #ifdef SCI_DEBUG 778 if (sci_debug) 779 scistatus(sc, "sciopen "); 780 #endif 781 782 splx(s2); 783 } 784 785 splx(s); 786 787 error = ttyopen(tp, SCIDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 788 if (error) 789 goto bad; 790 791 error = (*tp->t_linesw->l_open)(dev, tp); 792 if (error) 793 goto bad; 794 795 return (0); 796 797 bad: 798 799 return (error); 800 } 801 802 int 803 sciclose(dev, flag, mode, p) 804 dev_t dev; 805 int flag, mode; 806 struct proc *p; 807 { 808 struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)]; 809 struct tty *tp = sc->sc_tty; 810 811 /* XXX This is for cons.c. */ 812 if (!ISSET(tp->t_state, TS_ISOPEN)) 813 return (0); 814 815 (*tp->t_linesw->l_close)(tp, flag); 816 ttyclose(tp); 817 818 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 819 return (0); 820 821 return (0); 822 } 823 824 int 825 sciread(dev, uio, flag) 826 dev_t dev; 827 struct uio *uio; 828 int flag; 829 { 830 struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)]; 831 struct tty *tp = sc->sc_tty; 832 833 return ((*tp->t_linesw->l_read)(tp, uio, flag)); 834 } 835 836 int 837 sciwrite(dev, uio, flag) 838 dev_t dev; 839 struct uio *uio; 840 int flag; 841 { 842 struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)]; 843 struct tty *tp = sc->sc_tty; 844 845 return ((*tp->t_linesw->l_write)(tp, uio, flag)); 846 } 847 848 int 849 scipoll(dev, events, p) 850 dev_t dev; 851 int events; 852 struct proc *p; 853 { 854 struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)]; 855 struct tty *tp = sc->sc_tty; 856 857 return ((*tp->t_linesw->l_poll)(tp, events, p)); 858 } 859 860 struct tty * 861 scitty(dev) 862 dev_t dev; 863 { 864 struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)]; 865 struct tty *tp = sc->sc_tty; 866 867 return (tp); 868 } 869 870 int 871 sciioctl(dev, cmd, data, flag, p) 872 dev_t dev; 873 u_long cmd; 874 caddr_t data; 875 int flag; 876 struct proc *p; 877 { 878 struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)]; 879 struct tty *tp = sc->sc_tty; 880 int error; 881 int s; 882 883 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 884 return (EIO); 885 886 error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, p); 887 if (error >= 0) 888 return (error); 889 890 error = ttioctl(tp, cmd, data, flag, p); 891 if (error >= 0) 892 return (error); 893 894 error = 0; 895 896 s = splserial(); 897 898 switch (cmd) { 899 case TIOCSBRK: 900 sci_break(sc, 1); 901 break; 902 903 case TIOCCBRK: 904 sci_break(sc, 0); 905 break; 906 907 case TIOCGFLAGS: 908 *(int *)data = sc->sc_swflags; 909 break; 910 911 case TIOCSFLAGS: 912 error = suser(p->p_ucred, &p->p_acflag); 913 if (error) 914 break; 915 sc->sc_swflags = *(int *)data; 916 break; 917 918 default: 919 error = ENOTTY; 920 break; 921 } 922 923 splx(s); 924 925 return (error); 926 } 927 928 integrate void 929 sci_schedrx(sc) 930 struct sci_softc *sc; 931 { 932 933 sc->sc_rx_ready = 1; 934 935 /* Wake up the poller. */ 936 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 937 softintr_schedule(sc->sc_si); 938 #else 939 #ifndef __NO_SOFT_SERIAL_INTERRUPT 940 setsoftserial(); 941 #else 942 if (!sci_softintr_scheduled) { 943 sci_softintr_scheduled = 1; 944 callout_reset(&sci_soft_ch, 1, scisoft, NULL); 945 } 946 #endif 947 #endif 948 } 949 950 void 951 sci_break(sc, onoff) 952 struct sci_softc *sc; 953 int onoff; 954 { 955 956 if (onoff) 957 SHREG_SCSSR &= ~SCSSR_TDRE; 958 else 959 SHREG_SCSSR |= SCSSR_TDRE; 960 961 #if 0 /* XXX */ 962 if (!sc->sc_heldchange) { 963 if (sc->sc_tx_busy) { 964 sc->sc_heldtbc = sc->sc_tbc; 965 sc->sc_tbc = 0; 966 sc->sc_heldchange = 1; 967 } else 968 sci_loadchannelregs(sc); 969 } 970 #endif 971 } 972 973 /* 974 * Stop output, e.g., for ^S or output flush. 975 */ 976 void 977 scistop(tp, flag) 978 struct tty *tp; 979 int flag; 980 { 981 struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(tp->t_dev)]; 982 int s; 983 984 s = splserial(); 985 if (ISSET(tp->t_state, TS_BUSY)) { 986 /* Stop transmitting at the next chunk. */ 987 sc->sc_tbc = 0; 988 sc->sc_heldtbc = 0; 989 if (!ISSET(tp->t_state, TS_TTSTOP)) 990 SET(tp->t_state, TS_FLUSH); 991 } 992 splx(s); 993 } 994 995 void 996 scidiag(arg) 997 void *arg; 998 { 999 struct sci_softc *sc = arg; 1000 int overflows, floods; 1001 int s; 1002 1003 s = splserial(); 1004 overflows = sc->sc_overflows; 1005 sc->sc_overflows = 0; 1006 floods = sc->sc_floods; 1007 sc->sc_floods = 0; 1008 sc->sc_errors = 0; 1009 splx(s); 1010 1011 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1012 sc->sc_dev.dv_xname, 1013 overflows, overflows == 1 ? "" : "s", 1014 floods, floods == 1 ? "" : "s"); 1015 } 1016 1017 integrate void 1018 sci_rxsoft(sc, tp) 1019 struct sci_softc *sc; 1020 struct tty *tp; 1021 { 1022 int (*rint) __P((int c, struct tty *tp)) = tp->t_linesw->l_rint; 1023 u_char *get, *end; 1024 u_int cc, scc; 1025 u_char ssr; 1026 int code; 1027 int s; 1028 1029 end = sc->sc_ebuf; 1030 get = sc->sc_rbget; 1031 scc = cc = sci_rbuf_size - sc->sc_rbavail; 1032 1033 if (cc == sci_rbuf_size) { 1034 sc->sc_floods++; 1035 if (sc->sc_errors++ == 0) 1036 callout_reset(&sc->sc_diag_ch, 60 * hz, scidiag, sc); 1037 } 1038 1039 while (cc) { 1040 code = get[0]; 1041 ssr = get[1]; 1042 if (ISSET(ssr, SCSSR_FER | SCSSR_PER)) { 1043 if (ISSET(ssr, SCSSR_FER)) 1044 SET(code, TTY_FE); 1045 if (ISSET(ssr, SCSSR_PER)) 1046 SET(code, TTY_PE); 1047 } 1048 if ((*rint)(code, tp) == -1) { 1049 /* 1050 * The line discipline's buffer is out of space. 1051 */ 1052 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1053 /* 1054 * We're either not using flow control, or the 1055 * line discipline didn't tell us to block for 1056 * some reason. Either way, we have no way to 1057 * know when there's more space available, so 1058 * just drop the rest of the data. 1059 */ 1060 get += cc << 1; 1061 if (get >= end) 1062 get -= sci_rbuf_size << 1; 1063 cc = 0; 1064 } else { 1065 /* 1066 * Don't schedule any more receive processing 1067 * until the line discipline tells us there's 1068 * space available (through scihwiflow()). 1069 * Leave the rest of the data in the input 1070 * buffer. 1071 */ 1072 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1073 } 1074 break; 1075 } 1076 get += 2; 1077 if (get >= end) 1078 get = sc->sc_rbuf; 1079 cc--; 1080 } 1081 1082 if (cc != scc) { 1083 sc->sc_rbget = get; 1084 s = splserial(); 1085 cc = sc->sc_rbavail += scc - cc; 1086 /* Buffers should be ok again, release possible block. */ 1087 if (cc >= sc->sc_r_lowat) { 1088 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1089 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1090 SHREG_SCSCR |= SCSCR_RIE; 1091 } 1092 #if 0 1093 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1094 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1095 sci_hwiflow(sc); 1096 } 1097 #endif 1098 } 1099 splx(s); 1100 } 1101 } 1102 1103 integrate void 1104 sci_txsoft(sc, tp) 1105 struct sci_softc *sc; 1106 struct tty *tp; 1107 { 1108 1109 CLR(tp->t_state, TS_BUSY); 1110 if (ISSET(tp->t_state, TS_FLUSH)) 1111 CLR(tp->t_state, TS_FLUSH); 1112 else 1113 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1114 (*tp->t_linesw->l_start)(tp); 1115 } 1116 1117 integrate void 1118 sci_stsoft(sc, tp) 1119 struct sci_softc *sc; 1120 struct tty *tp; 1121 { 1122 #if 0 1123 /* XXX (msaitoh) */ 1124 u_char msr, delta; 1125 int s; 1126 1127 s = splserial(); 1128 msr = sc->sc_msr; 1129 delta = sc->sc_msr_delta; 1130 sc->sc_msr_delta = 0; 1131 splx(s); 1132 1133 if (ISSET(delta, sc->sc_msr_dcd)) { 1134 /* 1135 * Inform the tty layer that carrier detect changed. 1136 */ 1137 (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD)); 1138 } 1139 1140 if (ISSET(delta, sc->sc_msr_cts)) { 1141 /* Block or unblock output according to flow control. */ 1142 if (ISSET(msr, sc->sc_msr_cts)) { 1143 sc->sc_tx_stopped = 0; 1144 (*tp->t_linesw->l_start)(tp); 1145 } else { 1146 sc->sc_tx_stopped = 1; 1147 } 1148 } 1149 1150 #ifdef SCI_DEBUG 1151 if (sci_debug) 1152 scistatus(sc, "sci_stsoft"); 1153 #endif 1154 #endif 1155 } 1156 1157 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1158 void 1159 scisoft(arg) 1160 void *arg; 1161 { 1162 struct sci_softc *sc = arg; 1163 struct tty *tp; 1164 1165 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 1166 return; 1167 1168 { 1169 #else 1170 void 1171 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1172 scisoft() 1173 #else 1174 scisoft(arg) 1175 void *arg; 1176 #endif 1177 { 1178 struct sci_softc *sc; 1179 struct tty *tp; 1180 int unit; 1181 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1182 int s; 1183 1184 s = splsoftserial(); 1185 sci_softintr_scheduled = 0; 1186 #endif 1187 1188 for (unit = 0; unit < sci_cd.cd_ndevs; unit++) { 1189 sc = sci_cd.cd_devs[unit]; 1190 if (sc == NULL || !ISSET(sc->sc_hwflags, SCI_HW_DEV_OK)) 1191 continue; 1192 1193 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 1194 continue; 1195 1196 tp = sc->sc_tty; 1197 if (tp == NULL) 1198 continue; 1199 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) 1200 continue; 1201 #endif 1202 tp = sc->sc_tty; 1203 1204 if (sc->sc_rx_ready) { 1205 sc->sc_rx_ready = 0; 1206 sci_rxsoft(sc, tp); 1207 } 1208 1209 #if 0 1210 if (sc->sc_st_check) { 1211 sc->sc_st_check = 0; 1212 sci_stsoft(sc, tp); 1213 } 1214 #endif 1215 1216 if (sc->sc_tx_done) { 1217 sc->sc_tx_done = 0; 1218 sci_txsoft(sc, tp); 1219 } 1220 } 1221 1222 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS 1223 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1224 splx(s); 1225 #endif 1226 #endif 1227 } 1228 1229 int 1230 sciintr(arg) 1231 void *arg; 1232 { 1233 struct sci_softc *sc = arg; 1234 u_char *put, *end; 1235 u_int cc; 1236 u_short ssr; 1237 1238 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 1239 return (0); 1240 1241 end = sc->sc_ebuf; 1242 put = sc->sc_rbput; 1243 cc = sc->sc_rbavail; 1244 1245 ssr = SHREG_SCSSR; 1246 #if defined(DDB) || defined(KGDB) 1247 if (ISSET(ssr, SCSSR_BRK)) { 1248 #ifdef DDB 1249 if (ISSET(sc->sc_hwflags, SCI_HW_CONSOLE)) { 1250 console_debugger(); 1251 } 1252 #endif 1253 #ifdef KGDB 1254 if (ISSET(sc->sc_hwflags, SCI_HW_KGDB)) { 1255 kgdb_connect(1); 1256 } 1257 #endif 1258 } 1259 #endif /* DDB || KGDB */ 1260 if ((SHREG_SCSSR & SCSSR_RDRF) != 0) { 1261 if (cc > 0) { 1262 put[0] = SHREG_SCRDR; 1263 put[1] = SHREG_SCSSR & 0x00ff; 1264 1265 SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_FER | SCSSR_PER | 1266 SCSSR_RDRF); 1267 1268 put += 2; 1269 if (put >= end) 1270 put = sc->sc_rbuf; 1271 cc--; 1272 } 1273 1274 /* 1275 * Current string of incoming characters ended because 1276 * no more data was available or we ran out of space. 1277 * Schedule a receive event if any data was received. 1278 * If we're out of space, turn off receive interrupts. 1279 */ 1280 sc->sc_rbput = put; 1281 sc->sc_rbavail = cc; 1282 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 1283 sc->sc_rx_ready = 1; 1284 1285 /* 1286 * See if we are in danger of overflowing a buffer. If 1287 * so, use hardware flow control to ease the pressure. 1288 */ 1289 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 1290 cc < sc->sc_r_hiwat) { 1291 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1292 #if 0 1293 sci_hwiflow(sc); 1294 #endif 1295 } 1296 1297 /* 1298 * If we're out of space, disable receive interrupts 1299 * until the queue has drained a bit. 1300 */ 1301 if (!cc) { 1302 SHREG_SCSCR &= ~SCSCR_RIE; 1303 } 1304 } else { 1305 if (SHREG_SCSSR & SCSSR_RDRF) { 1306 SHREG_SCSCR &= ~(SCSCR_TIE | SCSCR_RIE); 1307 } 1308 } 1309 1310 #if 0 1311 msr = bus_space_read_1(iot, ioh, sci_msr); 1312 delta = msr ^ sc->sc_msr; 1313 sc->sc_msr = msr; 1314 if (ISSET(delta, sc->sc_msr_mask)) { 1315 SET(sc->sc_msr_delta, delta); 1316 1317 /* 1318 * Pulse-per-second clock signal on edge of DCD? 1319 */ 1320 if (ISSET(delta, sc->sc_ppsmask)) { 1321 struct timeval tv; 1322 if (ISSET(msr, sc->sc_ppsmask) == 1323 sc->sc_ppsassert) { 1324 /* XXX nanotime() */ 1325 microtime(&tv); 1326 TIMEVAL_TO_TIMESPEC(&tv, 1327 &sc->ppsinfo.assert_timestamp); 1328 if (sc->ppsparam.mode & PPS_OFFSETASSERT) { 1329 timespecadd(&sc->ppsinfo.assert_timestamp, 1330 &sc->ppsparam.assert_offset, 1331 &sc->ppsinfo.assert_timestamp); 1332 TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.assert_timestamp); 1333 } 1334 1335 #ifdef PPS_SYNC 1336 if (sc->ppsparam.mode & PPS_HARDPPSONASSERT) 1337 hardpps(&tv, tv.tv_usec); 1338 #endif 1339 sc->ppsinfo.assert_sequence++; 1340 sc->ppsinfo.current_mode = 1341 sc->ppsparam.mode; 1342 1343 } else if (ISSET(msr, sc->sc_ppsmask) == 1344 sc->sc_ppsclear) { 1345 /* XXX nanotime() */ 1346 microtime(&tv); 1347 TIMEVAL_TO_TIMESPEC(&tv, 1348 &sc->ppsinfo.clear_timestamp); 1349 if (sc->ppsparam.mode & PPS_OFFSETCLEAR) { 1350 timespecadd(&sc->ppsinfo.clear_timestamp, 1351 &sc->ppsparam.clear_offset, 1352 &sc->ppsinfo.clear_timestamp); 1353 TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.clear_timestamp); 1354 } 1355 1356 #ifdef PPS_SYNC 1357 if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR) 1358 hardpps(&tv, tv.tv_usec); 1359 #endif 1360 sc->ppsinfo.clear_sequence++; 1361 sc->ppsinfo.current_mode = 1362 sc->ppsparam.mode; 1363 } 1364 } 1365 1366 /* 1367 * Stop output immediately if we lose the output 1368 * flow control signal or carrier detect. 1369 */ 1370 if (ISSET(~msr, sc->sc_msr_mask)) { 1371 sc->sc_tbc = 0; 1372 sc->sc_heldtbc = 0; 1373 #ifdef SCI_DEBUG 1374 if (sci_debug) 1375 scistatus(sc, "sciintr "); 1376 #endif 1377 } 1378 1379 sc->sc_st_check = 1; 1380 } 1381 #endif 1382 1383 /* 1384 * Done handling any receive interrupts. See if data can be 1385 * transmitted as well. Schedule tx done event if no data left 1386 * and tty was marked busy. 1387 */ 1388 if ((SHREG_SCSSR & SCSSR_TDRE) != 0) { 1389 /* 1390 * If we've delayed a parameter change, do it now, and restart 1391 * output. 1392 */ 1393 if (sc->sc_heldchange) { 1394 sc->sc_heldchange = 0; 1395 sc->sc_tbc = sc->sc_heldtbc; 1396 sc->sc_heldtbc = 0; 1397 } 1398 1399 /* Output the next chunk of the contiguous buffer, if any. */ 1400 if (sc->sc_tbc > 0) { 1401 sci_putc(*(sc->sc_tba)); 1402 sc->sc_tba++; 1403 sc->sc_tbc--; 1404 } else { 1405 /* Disable transmit completion interrupts if necessary. */ 1406 #if 0 1407 if (ISSET(sc->sc_ier, IER_ETXRDY)) 1408 #endif 1409 SHREG_SCSCR &= ~SCSCR_TIE; 1410 1411 if (sc->sc_tx_busy) { 1412 sc->sc_tx_busy = 0; 1413 sc->sc_tx_done = 1; 1414 } 1415 } 1416 } 1417 1418 /* Wake up the poller. */ 1419 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1420 softintr_schedule(sc->sc_si); 1421 #else 1422 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1423 setsoftserial(); 1424 #else 1425 if (!sci_softintr_scheduled) { 1426 sci_softintr_scheduled = 1; 1427 callout_reset(&sci_soft_ch, 1, scisoft, 1); 1428 } 1429 #endif 1430 #endif 1431 1432 #if NRND > 0 && defined(RND_SCI) 1433 rnd_add_uint32(&sc->rnd_source, iir | lsr); 1434 #endif 1435 1436 return (1); 1437 } 1438 1439 void 1440 scicnprobe(cp) 1441 struct consdev *cp; 1442 { 1443 int maj; 1444 1445 /* locate the major number */ 1446 for (maj = 0; maj < nchrdev; maj++) 1447 if (cdevsw[maj].d_open == sciopen) 1448 break; 1449 1450 /* Initialize required fields. */ 1451 cp->cn_dev = makedev(maj, 0); 1452 #ifdef SCICONSOLE 1453 cp->cn_pri = CN_REMOTE; 1454 #else 1455 cp->cn_pri = CN_NORMAL; 1456 #endif 1457 } 1458 1459 void 1460 scicninit(cp) 1461 struct consdev *cp; 1462 { 1463 1464 InitializeSci(scicn_speed); 1465 sciisconsole = 1; 1466 } 1467 1468 int 1469 scicngetc(dev) 1470 dev_t dev; 1471 { 1472 int c; 1473 int s; 1474 1475 s = splserial(); 1476 c = sci_getc(); 1477 splx(s); 1478 1479 return (c); 1480 } 1481 1482 void 1483 scicnputc(dev, c) 1484 dev_t dev; 1485 int c; 1486 { 1487 int s; 1488 1489 s = splserial(); 1490 sci_putc((u_char)c); 1491 splx(s); 1492 } 1493
Indexes created Wed Oct 01 18:09:54 GMT 2025