sci.c revision 1.15.4.3
1 /* $NetBSD: sci.c,v 1.15.4.3 2001/10/13 17:42:41 fvdl Exp $ */ 2 3 /*- 4 * Copyright (C) 1999 T.Horiuchi and SAITOH Masanobu. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 /*- 30 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. 31 * All rights reserved. 32 * 33 * This code is derived from software contributed to The NetBSD Foundation 34 * by Charles M. Hannum. 35 * 36 * Redistribution and use in source and binary forms, with or without 37 * modification, are permitted provided that the following conditions 38 * are met: 39 * 1. Redistributions of source code must retain the above copyright 40 * notice, this list of conditions and the following disclaimer. 41 * 2. Redistributions in binary form must reproduce the above copyright 42 * notice, this list of conditions and the following disclaimer in the 43 * documentation and/or other materials provided with the distribution. 44 * 3. All advertising materials mentioning features or use of this software 45 * must display the following acknowledgement: 46 * This product includes software developed by the NetBSD 47 * Foundation, Inc. and its contributors. 48 * 4. Neither the name of The NetBSD Foundation nor the names of its 49 * contributors may be used to endorse or promote products derived 50 * from this software without specific prior written permission. 51 * 52 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 53 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 54 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 55 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 56 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 57 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 58 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 59 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 60 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 61 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 62 * POSSIBILITY OF SUCH DAMAGE. 63 */ 64 65 /* 66 * Copyright (c) 1991 The Regents of the University of California. 67 * All rights reserved. 68 * 69 * Redistribution and use in source and binary forms, with or without 70 * modification, are permitted provided that the following conditions 71 * are met: 72 * 1. Redistributions of source code must retain the above copyright 73 * notice, this list of conditions and the following disclaimer. 74 * 2. Redistributions in binary form must reproduce the above copyright 75 * notice, this list of conditions and the following disclaimer in the 76 * documentation and/or other materials provided with the distribution. 77 * 3. All advertising materials mentioning features or use of this software 78 * must display the following acknowledgement: 79 * This product includes software developed by the University of 80 * California, Berkeley and its contributors. 81 * 4. Neither the name of the University nor the names of its contributors 82 * may be used to endorse or promote products derived from this software 83 * without specific prior written permission. 84 * 85 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 86 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 87 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 88 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 89 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 90 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 91 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 92 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 93 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 94 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 95 * SUCH DAMAGE. 96 * 97 * @(#)com.c 7.5 (Berkeley) 5/16/91 98 */ 99 100 /* 101 * SH internal serial driver 102 * 103 * This code is derived from both z8530tty.c and com.c 104 */ 105 106 #include "opt_kgdb.h" 107 #include "opt_pclock.h" 108 #include "opt_sci.h" 109 110 #include <sys/param.h> 111 #include <sys/systm.h> 112 #include <sys/tty.h> 113 #include <sys/proc.h> 114 #include <sys/conf.h> 115 #include <sys/file.h> 116 #include <sys/syslog.h> 117 #include <sys/kernel.h> 118 #include <sys/device.h> 119 #include <sys/malloc.h> 120 121 #include <dev/cons.h> 122 123 #include <machine/cpu.h> 124 #include <sh3/scireg.h> 125 #include <sh3/tmureg.h> 126 127 #include <machine/shbvar.h> 128 129 static void scistart __P((struct tty *)); 130 static int sciparam __P((struct tty *, struct termios *)); 131 132 void scicnprobe __P((struct consdev *)); 133 void scicninit __P((struct consdev *)); 134 void scicnputc __P((dev_t, int)); 135 int scicngetc __P((dev_t)); 136 void scicnpoolc __P((dev_t, int)); 137 int sciintr __P((void *)); 138 139 struct sci_softc { 140 struct device sc_dev; /* boilerplate */ 141 struct tty *sc_tty; 142 void *sc_ih; 143 144 struct callout sc_diag_ch; 145 146 #if 0 147 bus_space_tag_t sc_iot; /* ISA i/o space identifier */ 148 bus_space_handle_t sc_ioh; /* ISA io handle */ 149 150 int sc_drq; 151 152 int sc_frequency; 153 #endif 154 155 u_int sc_overflows, 156 sc_floods, 157 sc_errors; /* number of retries so far */ 158 u_char sc_status[7]; /* copy of registers */ 159 160 int sc_hwflags; 161 int sc_swflags; 162 u_int sc_fifolen; /* XXX always 0? */ 163 164 u_int sc_r_hiwat, 165 sc_r_lowat; 166 u_char *volatile sc_rbget, 167 *volatile sc_rbput; 168 volatile u_int sc_rbavail; 169 u_char *sc_rbuf, 170 *sc_ebuf; 171 172 u_char *sc_tba; /* transmit buffer address */ 173 u_int sc_tbc, /* transmit byte count */ 174 sc_heldtbc; 175 176 volatile u_char sc_rx_flags, /* receiver blocked */ 177 #define RX_TTY_BLOCKED 0x01 178 #define RX_TTY_OVERFLOWED 0x02 179 #define RX_IBUF_BLOCKED 0x04 180 #define RX_IBUF_OVERFLOWED 0x08 181 #define RX_ANY_BLOCK 0x0f 182 sc_tx_busy, /* working on an output chunk */ 183 sc_tx_done, /* done with one output chunk */ 184 sc_tx_stopped, /* H/W level stop (lost CTS) */ 185 sc_st_check, /* got a status interrupt */ 186 sc_rx_ready; 187 188 volatile u_char sc_heldchange; 189 }; 190 191 /* controller driver configuration */ 192 static int sci_match __P((struct device *, struct cfdata *, void *)); 193 static void sci_attach __P((struct device *, struct device *, void *)); 194 195 void sci_break __P((struct sci_softc *, int)); 196 void sci_iflush __P((struct sci_softc *)); 197 198 #define integrate static inline 199 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 200 void scisoft __P((void *)); 201 #else 202 #ifndef __NO_SOFT_SERIAL_INTERRUPT 203 void scisoft __P((void)); 204 #else 205 void scisoft __P((void *)); 206 #endif 207 #endif 208 integrate void sci_rxsoft __P((struct sci_softc *, struct tty *)); 209 integrate void sci_txsoft __P((struct sci_softc *, struct tty *)); 210 integrate void sci_stsoft __P((struct sci_softc *, struct tty *)); 211 integrate void sci_schedrx __P((struct sci_softc *)); 212 void scidiag __P((void *)); 213 214 #define SCIUNIT_MASK 0x7ffff 215 #define SCIDIALOUT_MASK 0x80000 216 217 #define SCIUNIT(x) (minor(x) & SCIUNIT_MASK) 218 #define SCIDIALOUT(x) (minor(x) & SCIDIALOUT_MASK) 219 220 /* Macros to clear/set/test flags. */ 221 #define SET(t, f) (t) |= (f) 222 #define CLR(t, f) (t) &= ~(f) 223 #define ISSET(t, f) ((t) & (f)) 224 225 /* Hardware flag masks */ 226 #define SCI_HW_NOIEN 0x01 227 #define SCI_HW_FIFO 0x02 228 #define SCI_HW_FLOW 0x08 229 #define SCI_HW_DEV_OK 0x20 230 #define SCI_HW_CONSOLE 0x40 231 #define SCI_HW_KGDB 0x80 232 233 /* Buffer size for character buffer */ 234 #define SCI_RING_SIZE 2048 235 236 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 237 u_int sci_rbuf_hiwat = (SCI_RING_SIZE * 1) / 4; 238 u_int sci_rbuf_lowat = (SCI_RING_SIZE * 3) / 4; 239 240 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 241 int sciconscflag = CONMODE; 242 int sciisconsole = 0; 243 244 #ifdef SCICN_SPEED 245 int scicn_speed = SCICN_SPEED; 246 #else 247 int scicn_speed = 9600; 248 #endif 249 250 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 251 252 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS 253 #ifdef __NO_SOFT_SERIAL_INTERRUPT 254 volatile int sci_softintr_scheduled; 255 struct callout sci_soft_ch = CALLOUT_INITIALIZER; 256 #endif 257 #endif 258 259 u_int sci_rbuf_size = SCI_RING_SIZE; 260 261 struct cfattach sci_ca = { 262 sizeof(struct sci_softc), sci_match, sci_attach 263 }; 264 265 extern struct cfdriver sci_cd; 266 267 cdev_decl(sci); 268 269 void InitializeSci __P((unsigned int)); 270 271 /* 272 * following functions are debugging prupose only 273 */ 274 #define CR 0x0D 275 #define I2C_ADRS (*(volatile unsigned int *)0xa8000000) 276 #define USART_ON (unsigned int)~0x08 277 278 static void WaitFor __P((int)); 279 void sci_putc __P((unsigned char)); 280 unsigned char sci_getc __P((void)); 281 int SciErrCheck __P((void)); 282 283 /* 284 * WaitFor 285 * : int mSec; 286 */ 287 static void 288 WaitFor(mSec) 289 int mSec; 290 { 291 292 /* Disable Under Flow interrupt, rising edge, 1/4 */ 293 SHREG_TCR2 = 0x0000; 294 295 /* Set counter value (count down with 4 KHz) */ 296 SHREG_TCNT2 = mSec * 4; 297 298 /* start Channel2 */ 299 SHREG_TSTR |= TSTR_STR2; 300 301 /* wait for under flag ON of channel2 */ 302 while ((SHREG_TCR2 & TCR_UNF) == 0) 303 ; 304 305 /* stop channel2 */ 306 SHREG_TSTR &= ~TSTR_STR2; 307 } 308 309 /* 310 * InitializeSci 311 * : unsigned int bps; 312 * : SCI(Serial Communication Interface) 313 */ 314 315 void 316 InitializeSci(bps) 317 unsigned int bps; 318 { 319 320 /* Initialize SCR */ 321 SHREG_SCSCR = 0x00; 322 323 /* Serial Mode Register */ 324 SHREG_SCSMR = 0x00; /* Async,8bit,NonParity,Even,1Stop,NoMulti */ 325 326 /* Bit Rate Register */ 327 SHREG_SCBRR = divrnd(PCLOCK, 32 * bps) - 1; 328 329 /* 330 * wait 1mSec, because Send/Recv must begin 1 bit period after 331 * BRR is set. 332 */ 333 WaitFor(1); 334 335 /* Send permission, Receive permission ON */ 336 SHREG_SCSCR = SCSCR_TE | SCSCR_RE; 337 338 /* Serial Status Register */ 339 SHREG_SCSSR &= SCSSR_TDRE; /* Clear Status */ 340 341 #if 0 342 I2C_ADRS &= ~0x08; /* enable RS-232C */ 343 #endif 344 } 345 346 347 /* 348 * sci_putc 349 * : unsigned char c; 350 */ 351 void 352 sci_putc(c) 353 unsigned char c; 354 { 355 356 if (c == '\n') 357 sci_putc('\r'); 358 359 /* wait for ready */ 360 while ((SHREG_SCSSR & SCSSR_TDRE) == NULL) 361 ; 362 363 /* write send data to send register */ 364 SHREG_SCTDR = c; 365 366 /* clear ready flag */ 367 SHREG_SCSSR &= ~SCSSR_TDRE; 368 } 369 370 /* 371 * : SciErrCheck 372 * 0x20 = over run 373 * 0x10 = frame error 374 * 0x80 = parity error 375 */ 376 int 377 SciErrCheck(void) 378 { 379 380 return(SHREG_SCSSR & (SCSSR_ORER | SCSSR_FER | SCSSR_PER)); 381 } 382 383 /* 384 * sci_getc 385 */ 386 unsigned char 387 sci_getc(void) 388 { 389 unsigned char c, err_c; 390 391 while (((err_c = SHREG_SCSSR) 392 & (SCSSR_RDRF | SCSSR_ORER | SCSSR_FER | SCSSR_PER)) == 0) 393 ; 394 if ((err_c & (SCSSR_ORER | SCSSR_FER | SCSSR_PER)) != 0) { 395 SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_FER | SCSSR_PER); 396 return(err_c |= 0x80); 397 } 398 399 c = SHREG_SCRDR; 400 401 SHREG_SCSSR &= ~SCSSR_RDRF; 402 403 return(c); 404 } 405 406 #if 0 407 #define SCI_MAX_UNITS 2 408 #else 409 #define SCI_MAX_UNITS 1 410 #endif 411 412 413 static int 414 sci_match(parent, cfp, aux) 415 struct device *parent; 416 struct cfdata *cfp; 417 void *aux; 418 { 419 struct shb_attach_args *sa = aux; 420 421 if (strcmp(cfp->cf_driver->cd_name, "sci") 422 || cfp->cf_unit >= SCI_MAX_UNITS) 423 return 0; 424 425 sa->ia_iosize = 0x10; 426 return 1; 427 } 428 429 static void 430 sci_attach(parent, self, aux) 431 struct device *parent, *self; 432 void *aux; 433 { 434 struct sci_softc *sc = (struct sci_softc *)self; 435 struct tty *tp; 436 int irq; 437 struct shb_attach_args *ia = aux; 438 439 sc->sc_hwflags = 0; /* XXX */ 440 sc->sc_swflags = 0; /* XXX */ 441 sc->sc_fifolen = 0; /* XXX */ 442 443 irq = ia->ia_irq; 444 445 if (sciisconsole) { 446 SET(sc->sc_hwflags, SCI_HW_CONSOLE); 447 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 448 printf("\n%s: console\n", sc->sc_dev.dv_xname); 449 } else { 450 InitializeSci(9600); 451 printf("\n"); 452 } 453 454 callout_init(&sc->sc_diag_ch); 455 456 #if 0 457 if (irq != IRQUNK) { 458 sc->sc_ih = shb_intr_establish(irq, 459 IST_EDGE, IPL_SERIAL, sciintr, sc); 460 } 461 #else 462 if (irq != IRQUNK) { 463 sc->sc_ih = shb_intr_establish(SCI_IRQ, 464 IST_EDGE, IPL_SERIAL, sciintr, sc); 465 } 466 #endif 467 468 SET(sc->sc_hwflags, SCI_HW_DEV_OK); 469 470 tp = ttymalloc(); 471 tp->t_oproc = scistart; 472 tp->t_param = sciparam; 473 tp->t_hwiflow = NULL; 474 475 sc->sc_tty = tp; 476 sc->sc_rbuf = malloc(sci_rbuf_size << 1, M_DEVBUF, M_NOWAIT); 477 if (sc->sc_rbuf == NULL) { 478 printf("%s: unable to allocate ring buffer\n", 479 sc->sc_dev.dv_xname); 480 return; 481 } 482 sc->sc_ebuf = sc->sc_rbuf + (sci_rbuf_size << 1); 483 484 tty_attach(tp); 485 } 486 487 /* 488 * Start or restart transmission. 489 */ 490 static void 491 scistart(tp) 492 struct tty *tp; 493 { 494 struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(tp->t_dev)]; 495 int s; 496 497 s = spltty(); 498 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 499 goto out; 500 if (sc->sc_tx_stopped) 501 goto out; 502 503 if (tp->t_outq.c_cc <= tp->t_lowat) { 504 if (ISSET(tp->t_state, TS_ASLEEP)) { 505 CLR(tp->t_state, TS_ASLEEP); 506 wakeup(&tp->t_outq); 507 } 508 selwakeup(&tp->t_wsel); 509 if (tp->t_outq.c_cc == 0) 510 goto out; 511 } 512 513 /* Grab the first contiguous region of buffer space. */ 514 { 515 u_char *tba; 516 int tbc; 517 518 tba = tp->t_outq.c_cf; 519 tbc = ndqb(&tp->t_outq, 0); 520 521 (void)splserial(); 522 523 sc->sc_tba = tba; 524 sc->sc_tbc = tbc; 525 } 526 527 SET(tp->t_state, TS_BUSY); 528 sc->sc_tx_busy = 1; 529 530 /* Enable transmit completion interrupts if necessary. */ 531 SHREG_SCSCR |= SCSCR_TIE | SCSCR_RIE; 532 533 /* Output the first byte of the contiguous buffer. */ 534 { 535 if (sc->sc_tbc > 0) { 536 sci_putc(*(sc->sc_tba)); 537 sc->sc_tba++; 538 sc->sc_tbc--; 539 } 540 } 541 out: 542 splx(s); 543 return; 544 } 545 546 /* 547 * Set SCI tty parameters from termios. 548 * XXX - Should just copy the whole termios after 549 * making sure all the changes could be done. 550 */ 551 static int 552 sciparam(tp, t) 553 struct tty *tp; 554 struct termios *t; 555 { 556 struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(tp->t_dev)]; 557 int ospeed = t->c_ospeed; 558 int s; 559 560 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 561 return (EIO); 562 563 /* Check requested parameters. */ 564 if (ospeed < 0) 565 return (EINVAL); 566 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 567 return (EINVAL); 568 569 /* 570 * For the console, always force CLOCAL and !HUPCL, so that the port 571 * is always active. 572 */ 573 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 574 ISSET(sc->sc_hwflags, SCI_HW_CONSOLE)) { 575 SET(t->c_cflag, CLOCAL); 576 CLR(t->c_cflag, HUPCL); 577 } 578 579 /* 580 * If there were no changes, don't do anything. This avoids dropping 581 * input and improves performance when all we did was frob things like 582 * VMIN and VTIME. 583 */ 584 if (tp->t_ospeed == t->c_ospeed && 585 tp->t_cflag == t->c_cflag) 586 return (0); 587 588 #if 0 589 /* XXX (msaitoh) */ 590 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 591 #endif 592 593 s = splserial(); 594 595 /* 596 * Set the FIFO threshold based on the receive speed. 597 * 598 * * If it's a low speed, it's probably a mouse or some other 599 * interactive device, so set the threshold low. 600 * * If it's a high speed, trim the trigger level down to prevent 601 * overflows. 602 * * Otherwise set it a bit higher. 603 */ 604 #if 0 605 /* XXX (msaitoh) */ 606 if (ISSET(sc->sc_hwflags, SCI_HW_HAYESP)) 607 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 608 else if (ISSET(sc->sc_hwflags, SCI_HW_FIFO)) 609 sc->sc_fifo = FIFO_ENABLE | 610 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : 611 t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4); 612 else 613 sc->sc_fifo = 0; 614 #endif 615 616 /* And copy to tty. */ 617 tp->t_ispeed = 0; 618 tp->t_ospeed = t->c_ospeed; 619 tp->t_cflag = t->c_cflag; 620 621 if (!sc->sc_heldchange) { 622 if (sc->sc_tx_busy) { 623 sc->sc_heldtbc = sc->sc_tbc; 624 sc->sc_tbc = 0; 625 sc->sc_heldchange = 1; 626 } 627 #if 0 628 /* XXX (msaitoh) */ 629 else 630 sci_loadchannelregs(sc); 631 #endif 632 } 633 634 if (!ISSET(t->c_cflag, CHWFLOW)) { 635 /* Disable the high water mark. */ 636 sc->sc_r_hiwat = 0; 637 sc->sc_r_lowat = 0; 638 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 639 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 640 sci_schedrx(sc); 641 } 642 } else { 643 sc->sc_r_hiwat = sci_rbuf_hiwat; 644 sc->sc_r_lowat = sci_rbuf_lowat; 645 } 646 647 splx(s); 648 649 #ifdef SCI_DEBUG 650 if (sci_debug) 651 scistatus(sc, "sciparam "); 652 #endif 653 654 if (!ISSET(t->c_cflag, CHWFLOW)) { 655 if (sc->sc_tx_stopped) { 656 sc->sc_tx_stopped = 0; 657 scistart(tp); 658 } 659 } 660 661 return (0); 662 } 663 664 void 665 sci_iflush(sc) 666 struct sci_softc *sc; 667 { 668 unsigned char err_c; 669 volatile unsigned char c; 670 671 if (((err_c = SHREG_SCSSR) 672 & (SCSSR_RDRF | SCSSR_ORER | SCSSR_FER | SCSSR_PER)) != 0) { 673 674 if ((err_c & (SCSSR_ORER | SCSSR_FER | SCSSR_PER)) != 0) { 675 SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_FER | SCSSR_PER); 676 return; 677 } 678 679 c = SHREG_SCRDR; 680 681 SHREG_SCSSR &= ~SCSSR_RDRF; 682 } 683 } 684 685 int 686 sciopen(devvp, flag, mode, p) 687 struct vnode *devvp; 688 int flag, mode; 689 struct proc *p; 690 { 691 dev_t dev = vdev_rdev(devvp); 692 int unit = SCIUNIT(dev); 693 struct sci_softc *sc; 694 struct tty *tp; 695 int s, s2; 696 int error; 697 698 if (unit >= sci_cd.cd_ndevs) 699 return (ENXIO); 700 sc = sci_cd.cd_devs[unit]; 701 if (sc == 0 || !ISSET(sc->sc_hwflags, SCI_HW_DEV_OK) || 702 sc->sc_rbuf == NULL) 703 return (ENXIO); 704 705 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 706 return (ENXIO); 707 708 #ifdef KGDB 709 /* 710 * If this is the kgdb port, no other use is permitted. 711 */ 712 if (ISSET(sc->sc_hwflags, SCI_HW_KGDB)) 713 return (EBUSY); 714 #endif 715 716 vdev_setprivdata(devvp, sc); 717 718 tp = sc->sc_tty; 719 720 if (ISSET(tp->t_state, TS_ISOPEN) && 721 ISSET(tp->t_state, TS_XCLUDE) && 722 p->p_ucred->cr_uid != 0) 723 return (EBUSY); 724 725 s = spltty(); 726 727 /* 728 * Do the following iff this is a first open. 729 */ 730 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 731 struct termios t; 732 733 tp->t_dev = dev; 734 735 s2 = splserial(); 736 737 /* Turn on interrupts. */ 738 SHREG_SCSCR |= SCSCR_TIE | SCSCR_RIE; 739 740 splx(s2); 741 742 /* 743 * Initialize the termios status to the defaults. Add in the 744 * sticky bits from TIOCSFLAGS. 745 */ 746 t.c_ispeed = 0; 747 if (ISSET(sc->sc_hwflags, SCI_HW_CONSOLE)) { 748 t.c_ospeed = scicn_speed; 749 t.c_cflag = sciconscflag; 750 } else { 751 t.c_ospeed = TTYDEF_SPEED; 752 t.c_cflag = TTYDEF_CFLAG; 753 } 754 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 755 SET(t.c_cflag, CLOCAL); 756 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 757 SET(t.c_cflag, CRTSCTS); 758 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 759 SET(t.c_cflag, MDMBUF); 760 /* Make sure sciparam() will do something. */ 761 tp->t_ospeed = 0; 762 (void) sciparam(tp, &t); 763 tp->t_iflag = TTYDEF_IFLAG; 764 tp->t_oflag = TTYDEF_OFLAG; 765 tp->t_lflag = TTYDEF_LFLAG; 766 ttychars(tp); 767 ttsetwater(tp); 768 769 s2 = splserial(); 770 771 /* Clear the input ring, and unblock. */ 772 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 773 sc->sc_rbavail = sci_rbuf_size; 774 sci_iflush(sc); 775 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 776 #if 0 777 /* XXX (msaitoh) */ 778 sci_hwiflow(sc); 779 #endif 780 781 #ifdef SCI_DEBUG 782 if (sci_debug) 783 scistatus(sc, "sciopen "); 784 #endif 785 786 splx(s2); 787 } 788 789 splx(s); 790 791 error = ttyopen(tp, SCIDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 792 if (error) 793 goto bad; 794 795 error = (*tp->t_linesw->l_open)(devvp, tp); 796 if (error) 797 goto bad; 798 799 return (0); 800 801 bad: 802 803 return (error); 804 } 805 806 int 807 sciclose(devvp, flag, mode, p) 808 struct vnode *devvp; 809 int flag, mode; 810 struct proc *p; 811 { 812 struct sci_softc *sc = vdev_privdata(devvp); 813 struct tty *tp = sc->sc_tty; 814 815 /* XXX This is for cons.c. */ 816 if (!ISSET(tp->t_state, TS_ISOPEN)) 817 return (0); 818 819 (*tp->t_linesw->l_close)(tp, flag); 820 ttyclose(tp); 821 822 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 823 return (0); 824 825 return (0); 826 } 827 828 int 829 sciread(devvp, uio, flag) 830 struct vnode *devvp; 831 struct uio *uio; 832 int flag; 833 { 834 struct sci_softc *sc = vdev_privdata(devvp); 835 struct tty *tp = sc->sc_tty; 836 837 return ((*tp->t_linesw->l_read)(tp, uio, flag)); 838 } 839 840 int 841 sciwrite(devvp, uio, flag) 842 struct vnode *devvp; 843 struct uio *uio; 844 int flag; 845 { 846 struct sci_softc *sc = vdev_privdata(devvp); 847 struct tty *tp = sc->sc_tty; 848 849 return ((*tp->t_linesw->l_write)(tp, uio, flag)); 850 } 851 852 int 853 scipoll(devvp, events, p) 854 struct vnode *devvp; 855 int events; 856 struct proc *p; 857 { 858 struct sci_softc *sc = vdev_privdata(devvp); 859 struct tty *tp = sc->sc_tty; 860 861 return ((*tp->t_linesw->l_poll)(tp, events, p)); 862 } 863 864 struct tty * 865 scitty(devvp) 866 struct vnode *devvp; 867 { 868 struct sci_softc *sc = vdev_privdata(devvp); 869 struct tty *tp = sc->sc_tty; 870 871 return (tp); 872 } 873 874 int 875 sciioctl(devvp, cmd, data, flag, p) 876 struct vnode *devvp; 877 u_long cmd; 878 caddr_t data; 879 int flag; 880 struct proc *p; 881 { 882 struct sci_softc *sc = vdev_privdata(devvp); 883 struct tty *tp = sc->sc_tty; 884 int error; 885 int s; 886 887 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 888 return (EIO); 889 890 error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, p); 891 if (error >= 0) 892 return (error); 893 894 error = ttioctl(tp, devvp, cmd, data, flag, p); 895 if (error >= 0) 896 return (error); 897 898 error = 0; 899 900 s = splserial(); 901 902 switch (cmd) { 903 case TIOCSBRK: 904 sci_break(sc, 1); 905 break; 906 907 case TIOCCBRK: 908 sci_break(sc, 0); 909 break; 910 911 case TIOCGFLAGS: 912 *(int *)data = sc->sc_swflags; 913 break; 914 915 case TIOCSFLAGS: 916 error = suser(p->p_ucred, &p->p_acflag); 917 if (error) 918 break; 919 sc->sc_swflags = *(int *)data; 920 break; 921 922 default: 923 error = ENOTTY; 924 break; 925 } 926 927 splx(s); 928 929 return (error); 930 } 931 932 integrate void 933 sci_schedrx(sc) 934 struct sci_softc *sc; 935 { 936 937 sc->sc_rx_ready = 1; 938 939 /* Wake up the poller. */ 940 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 941 softintr_schedule(sc->sc_si); 942 #else 943 #ifndef __NO_SOFT_SERIAL_INTERRUPT 944 setsoftserial(); 945 #else 946 if (!sci_softintr_scheduled) { 947 sci_softintr_scheduled = 1; 948 callout_reset(&sci_soft_ch, 1, scisoft, NULL); 949 } 950 #endif 951 #endif 952 } 953 954 void 955 sci_break(sc, onoff) 956 struct sci_softc *sc; 957 int onoff; 958 { 959 960 if (onoff) 961 SHREG_SCSSR &= ~SCSSR_TDRE; 962 else 963 SHREG_SCSSR |= SCSSR_TDRE; 964 965 #if 0 /* XXX */ 966 if (!sc->sc_heldchange) { 967 if (sc->sc_tx_busy) { 968 sc->sc_heldtbc = sc->sc_tbc; 969 sc->sc_tbc = 0; 970 sc->sc_heldchange = 1; 971 } else 972 sci_loadchannelregs(sc); 973 } 974 #endif 975 } 976 977 /* 978 * Stop output, e.g., for ^S or output flush. 979 */ 980 void 981 scistop(tp, flag) 982 struct tty *tp; 983 int flag; 984 { 985 struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(tp->t_dev)]; 986 int s; 987 988 s = splserial(); 989 if (ISSET(tp->t_state, TS_BUSY)) { 990 /* Stop transmitting at the next chunk. */ 991 sc->sc_tbc = 0; 992 sc->sc_heldtbc = 0; 993 if (!ISSET(tp->t_state, TS_TTSTOP)) 994 SET(tp->t_state, TS_FLUSH); 995 } 996 splx(s); 997 } 998 999 void 1000 scidiag(arg) 1001 void *arg; 1002 { 1003 struct sci_softc *sc = arg; 1004 int overflows, floods; 1005 int s; 1006 1007 s = splserial(); 1008 overflows = sc->sc_overflows; 1009 sc->sc_overflows = 0; 1010 floods = sc->sc_floods; 1011 sc->sc_floods = 0; 1012 sc->sc_errors = 0; 1013 splx(s); 1014 1015 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1016 sc->sc_dev.dv_xname, 1017 overflows, overflows == 1 ? "" : "s", 1018 floods, floods == 1 ? "" : "s"); 1019 } 1020 1021 integrate void 1022 sci_rxsoft(sc, tp) 1023 struct sci_softc *sc; 1024 struct tty *tp; 1025 { 1026 int (*rint) __P((int c, struct tty *tp)) = tp->t_linesw->l_rint; 1027 u_char *get, *end; 1028 u_int cc, scc; 1029 u_char ssr; 1030 int code; 1031 int s; 1032 1033 end = sc->sc_ebuf; 1034 get = sc->sc_rbget; 1035 scc = cc = sci_rbuf_size - sc->sc_rbavail; 1036 1037 if (cc == sci_rbuf_size) { 1038 sc->sc_floods++; 1039 if (sc->sc_errors++ == 0) 1040 callout_reset(&sc->sc_diag_ch, 60 * hz, scidiag, sc); 1041 } 1042 1043 while (cc) { 1044 code = get[0]; 1045 ssr = get[1]; 1046 if (ISSET(ssr, SCSSR_FER | SCSSR_PER)) { 1047 if (ISSET(ssr, SCSSR_FER)) 1048 SET(code, TTY_FE); 1049 if (ISSET(ssr, SCSSR_PER)) 1050 SET(code, TTY_PE); 1051 } 1052 if ((*rint)(code, tp) == -1) { 1053 /* 1054 * The line discipline's buffer is out of space. 1055 */ 1056 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1057 /* 1058 * We're either not using flow control, or the 1059 * line discipline didn't tell us to block for 1060 * some reason. Either way, we have no way to 1061 * know when there's more space available, so 1062 * just drop the rest of the data. 1063 */ 1064 get += cc << 1; 1065 if (get >= end) 1066 get -= sci_rbuf_size << 1; 1067 cc = 0; 1068 } else { 1069 /* 1070 * Don't schedule any more receive processing 1071 * until the line discipline tells us there's 1072 * space available (through scihwiflow()). 1073 * Leave the rest of the data in the input 1074 * buffer. 1075 */ 1076 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1077 } 1078 break; 1079 } 1080 get += 2; 1081 if (get >= end) 1082 get = sc->sc_rbuf; 1083 cc--; 1084 } 1085 1086 if (cc != scc) { 1087 sc->sc_rbget = get; 1088 s = splserial(); 1089 cc = sc->sc_rbavail += scc - cc; 1090 /* Buffers should be ok again, release possible block. */ 1091 if (cc >= sc->sc_r_lowat) { 1092 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1093 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1094 SHREG_SCSCR |= SCSCR_RIE; 1095 } 1096 #if 0 1097 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1098 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1099 sci_hwiflow(sc); 1100 } 1101 #endif 1102 } 1103 splx(s); 1104 } 1105 } 1106 1107 integrate void 1108 sci_txsoft(sc, tp) 1109 struct sci_softc *sc; 1110 struct tty *tp; 1111 { 1112 1113 CLR(tp->t_state, TS_BUSY); 1114 if (ISSET(tp->t_state, TS_FLUSH)) 1115 CLR(tp->t_state, TS_FLUSH); 1116 else 1117 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1118 (*tp->t_linesw->l_start)(tp); 1119 } 1120 1121 integrate void 1122 sci_stsoft(sc, tp) 1123 struct sci_softc *sc; 1124 struct tty *tp; 1125 { 1126 #if 0 1127 /* XXX (msaitoh) */ 1128 u_char msr, delta; 1129 int s; 1130 1131 s = splserial(); 1132 msr = sc->sc_msr; 1133 delta = sc->sc_msr_delta; 1134 sc->sc_msr_delta = 0; 1135 splx(s); 1136 1137 if (ISSET(delta, sc->sc_msr_dcd)) { 1138 /* 1139 * Inform the tty layer that carrier detect changed. 1140 */ 1141 (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD)); 1142 } 1143 1144 if (ISSET(delta, sc->sc_msr_cts)) { 1145 /* Block or unblock output according to flow control. */ 1146 if (ISSET(msr, sc->sc_msr_cts)) { 1147 sc->sc_tx_stopped = 0; 1148 (*tp->t_linesw->l_start)(tp); 1149 } else { 1150 sc->sc_tx_stopped = 1; 1151 } 1152 } 1153 1154 #ifdef SCI_DEBUG 1155 if (sci_debug) 1156 scistatus(sc, "sci_stsoft"); 1157 #endif 1158 #endif 1159 } 1160 1161 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1162 void 1163 scisoft(arg) 1164 void *arg; 1165 { 1166 struct sci_softc *sc = arg; 1167 struct tty *tp; 1168 1169 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 1170 return; 1171 1172 { 1173 #else 1174 void 1175 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1176 scisoft() 1177 #else 1178 scisoft(arg) 1179 void *arg; 1180 #endif 1181 { 1182 struct sci_softc *sc; 1183 struct tty *tp; 1184 int unit; 1185 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1186 int s; 1187 1188 s = splsoftserial(); 1189 sci_softintr_scheduled = 0; 1190 #endif 1191 1192 for (unit = 0; unit < sci_cd.cd_ndevs; unit++) { 1193 sc = sci_cd.cd_devs[unit]; 1194 if (sc == NULL || !ISSET(sc->sc_hwflags, SCI_HW_DEV_OK)) 1195 continue; 1196 1197 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 1198 continue; 1199 1200 tp = sc->sc_tty; 1201 if (tp == NULL) 1202 continue; 1203 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) 1204 continue; 1205 #endif 1206 tp = sc->sc_tty; 1207 1208 if (sc->sc_rx_ready) { 1209 sc->sc_rx_ready = 0; 1210 sci_rxsoft(sc, tp); 1211 } 1212 1213 #if 0 1214 if (sc->sc_st_check) { 1215 sc->sc_st_check = 0; 1216 sci_stsoft(sc, tp); 1217 } 1218 #endif 1219 1220 if (sc->sc_tx_done) { 1221 sc->sc_tx_done = 0; 1222 sci_txsoft(sc, tp); 1223 } 1224 } 1225 1226 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS 1227 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1228 splx(s); 1229 #endif 1230 #endif 1231 } 1232 1233 int 1234 sciintr(arg) 1235 void *arg; 1236 { 1237 struct sci_softc *sc = arg; 1238 u_char *put, *end; 1239 u_int cc; 1240 u_short ssr; 1241 1242 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 1243 return (0); 1244 1245 end = sc->sc_ebuf; 1246 put = sc->sc_rbput; 1247 cc = sc->sc_rbavail; 1248 1249 ssr = SHREG_SCSSR; 1250 if (ISSET(ssr, SCSSR_FER)) { 1251 SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_PER | SCSSR_FER); 1252 #if defined(DDB) || defined(KGDB) 1253 #ifdef SH4 1254 if ((SHREG_SCSPTR & SCPTR_SPB0DT) != 0) { 1255 #else 1256 if ((SHREG_SCSPDR & SCPDR_SCP0DT) != 0) { 1257 #endif 1258 #ifdef DDB 1259 if (ISSET(sc->sc_hwflags, SCI_HW_CONSOLE)) { 1260 console_debugger(); 1261 } 1262 #endif 1263 #ifdef KGDB 1264 if (ISSET(sc->sc_hwflags, SCI_HW_KGDB)) { 1265 kgdb_connect(1); 1266 } 1267 #endif 1268 } 1269 #endif /* DDB || KGDB */ 1270 } 1271 if ((SHREG_SCSSR & SCSSR_RDRF) != 0) { 1272 if (cc > 0) { 1273 put[0] = SHREG_SCRDR; 1274 put[1] = SHREG_SCSSR & 0x00ff; 1275 1276 SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_FER | SCSSR_PER | 1277 SCSSR_RDRF); 1278 1279 put += 2; 1280 if (put >= end) 1281 put = sc->sc_rbuf; 1282 cc--; 1283 } 1284 1285 /* 1286 * Current string of incoming characters ended because 1287 * no more data was available or we ran out of space. 1288 * Schedule a receive event if any data was received. 1289 * If we're out of space, turn off receive interrupts. 1290 */ 1291 sc->sc_rbput = put; 1292 sc->sc_rbavail = cc; 1293 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 1294 sc->sc_rx_ready = 1; 1295 1296 /* 1297 * See if we are in danger of overflowing a buffer. If 1298 * so, use hardware flow control to ease the pressure. 1299 */ 1300 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 1301 cc < sc->sc_r_hiwat) { 1302 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1303 #if 0 1304 sci_hwiflow(sc); 1305 #endif 1306 } 1307 1308 /* 1309 * If we're out of space, disable receive interrupts 1310 * until the queue has drained a bit. 1311 */ 1312 if (!cc) { 1313 SHREG_SCSCR &= ~SCSCR_RIE; 1314 } 1315 } else { 1316 if (SHREG_SCSSR & SCSSR_RDRF) { 1317 SHREG_SCSCR &= ~(SCSCR_TIE | SCSCR_RIE); 1318 } 1319 } 1320 1321 #if 0 1322 msr = bus_space_read_1(iot, ioh, sci_msr); 1323 delta = msr ^ sc->sc_msr; 1324 sc->sc_msr = msr; 1325 if (ISSET(delta, sc->sc_msr_mask)) { 1326 SET(sc->sc_msr_delta, delta); 1327 1328 /* 1329 * Pulse-per-second clock signal on edge of DCD? 1330 */ 1331 if (ISSET(delta, sc->sc_ppsmask)) { 1332 struct timeval tv; 1333 if (ISSET(msr, sc->sc_ppsmask) == 1334 sc->sc_ppsassert) { 1335 /* XXX nanotime() */ 1336 microtime(&tv); 1337 TIMEVAL_TO_TIMESPEC(&tv, 1338 &sc->ppsinfo.assert_timestamp); 1339 if (sc->ppsparam.mode & PPS_OFFSETASSERT) { 1340 timespecadd(&sc->ppsinfo.assert_timestamp, 1341 &sc->ppsparam.assert_offset, 1342 &sc->ppsinfo.assert_timestamp); 1343 TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.assert_timestamp); 1344 } 1345 1346 #ifdef PPS_SYNC 1347 if (sc->ppsparam.mode & PPS_HARDPPSONASSERT) 1348 hardpps(&tv, tv.tv_usec); 1349 #endif 1350 sc->ppsinfo.assert_sequence++; 1351 sc->ppsinfo.current_mode = 1352 sc->ppsparam.mode; 1353 1354 } else if (ISSET(msr, sc->sc_ppsmask) == 1355 sc->sc_ppsclear) { 1356 /* XXX nanotime() */ 1357 microtime(&tv); 1358 TIMEVAL_TO_TIMESPEC(&tv, 1359 &sc->ppsinfo.clear_timestamp); 1360 if (sc->ppsparam.mode & PPS_OFFSETCLEAR) { 1361 timespecadd(&sc->ppsinfo.clear_timestamp, 1362 &sc->ppsparam.clear_offset, 1363 &sc->ppsinfo.clear_timestamp); 1364 TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.clear_timestamp); 1365 } 1366 1367 #ifdef PPS_SYNC 1368 if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR) 1369 hardpps(&tv, tv.tv_usec); 1370 #endif 1371 sc->ppsinfo.clear_sequence++; 1372 sc->ppsinfo.current_mode = 1373 sc->ppsparam.mode; 1374 } 1375 } 1376 1377 /* 1378 * Stop output immediately if we lose the output 1379 * flow control signal or carrier detect. 1380 */ 1381 if (ISSET(~msr, sc->sc_msr_mask)) { 1382 sc->sc_tbc = 0; 1383 sc->sc_heldtbc = 0; 1384 #ifdef SCI_DEBUG 1385 if (sci_debug) 1386 scistatus(sc, "sciintr "); 1387 #endif 1388 } 1389 1390 sc->sc_st_check = 1; 1391 } 1392 #endif 1393 1394 /* 1395 * Done handling any receive interrupts. See if data can be 1396 * transmitted as well. Schedule tx done event if no data left 1397 * and tty was marked busy. 1398 */ 1399 if ((SHREG_SCSSR & SCSSR_TDRE) != 0) { 1400 /* 1401 * If we've delayed a parameter change, do it now, and restart 1402 * output. 1403 */ 1404 if (sc->sc_heldchange) { 1405 sc->sc_heldchange = 0; 1406 sc->sc_tbc = sc->sc_heldtbc; 1407 sc->sc_heldtbc = 0; 1408 } 1409 1410 /* Output the next chunk of the contiguous buffer, if any. */ 1411 if (sc->sc_tbc > 0) { 1412 sci_putc(*(sc->sc_tba)); 1413 sc->sc_tba++; 1414 sc->sc_tbc--; 1415 } else { 1416 /* Disable transmit completion interrupts if necessary. */ 1417 #if 0 1418 if (ISSET(sc->sc_ier, IER_ETXRDY)) 1419 #endif 1420 SHREG_SCSCR &= ~SCSCR_TIE; 1421 1422 if (sc->sc_tx_busy) { 1423 sc->sc_tx_busy = 0; 1424 sc->sc_tx_done = 1; 1425 } 1426 } 1427 } 1428 1429 /* Wake up the poller. */ 1430 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1431 softintr_schedule(sc->sc_si); 1432 #else 1433 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1434 setsoftserial(); 1435 #else 1436 if (!sci_softintr_scheduled) { 1437 sci_softintr_scheduled = 1; 1438 callout_reset(&sci_soft_ch, 1, scisoft, 1); 1439 } 1440 #endif 1441 #endif 1442 1443 #if NRND > 0 && defined(RND_SCI) 1444 rnd_add_uint32(&sc->rnd_source, iir | lsr); 1445 #endif 1446 1447 return (1); 1448 } 1449 1450 void 1451 scicnprobe(cp) 1452 struct consdev *cp; 1453 { 1454 int maj; 1455 1456 /* locate the major number */ 1457 for (maj = 0; maj < nchrdev; maj++) 1458 if (cdevsw[maj].d_open == sciopen) 1459 break; 1460 1461 /* Initialize required fields. */ 1462 cp->cn_dev = makedev(maj, 0); 1463 #ifdef SCICONSOLE 1464 cp->cn_pri = CN_REMOTE; 1465 #else 1466 cp->cn_pri = CN_NORMAL; 1467 #endif 1468 } 1469 1470 void 1471 scicninit(cp) 1472 struct consdev *cp; 1473 { 1474 1475 InitializeSci(scicn_speed); 1476 sciisconsole = 1; 1477 } 1478 1479 int 1480 scicngetc(dev) 1481 dev_t dev; 1482 { 1483 int c; 1484 int s; 1485 1486 s = splserial(); 1487 c = sci_getc(); 1488 splx(s); 1489 1490 return (c); 1491 } 1492 1493 void 1494 scicnputc(dev, c) 1495 dev_t dev; 1496 int c; 1497 { 1498 int s; 1499 1500 s = splserial(); 1501 sci_putc((u_char)c); 1502 splx(s); 1503 } 1504
Indexes created Wed Oct 01 18:09:54 GMT 2025