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sci.c revision 1.19
      1 /* $NetBSD: sci.c,v 1.19 2002/02/22 19:44:04 uch Exp $ */
      2 
      3 /*-
      4  * Copyright (C) 1999 T.Horiuchi and SAITOH Masanobu.  All rights reserved.
      5  *
      6  * Redistribution and use in source and binary forms, with or without
      7  * modification, are permitted provided that the following conditions
      8  * are met:
      9  * 1. Redistributions of source code must retain the above copyright
     10  *    notice, this list of conditions and the following disclaimer.
     11  * 2. Redistributions in binary form must reproduce the above copyright
     12  *    notice, this list of conditions and the following disclaimer in the
     13  *    documentation and/or other materials provided with the distribution.
     14  * 3. The name of the author may not be used to endorse or promote products
     15  *    derived from this software without specific prior written permission.
     16  *
     17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     18  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     19  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     20  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     21  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     22  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
     26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     27  */
     28 
     29 /*-
     30  * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
     31  * All rights reserved.
     32  *
     33  * This code is derived from software contributed to The NetBSD Foundation
     34  * by Charles M. Hannum.
     35  *
     36  * Redistribution and use in source and binary forms, with or without
     37  * modification, are permitted provided that the following conditions
     38  * are met:
     39  * 1. Redistributions of source code must retain the above copyright
     40  *    notice, this list of conditions and the following disclaimer.
     41  * 2. Redistributions in binary form must reproduce the above copyright
     42  *    notice, this list of conditions and the following disclaimer in the
     43  *    documentation and/or other materials provided with the distribution.
     44  * 3. All advertising materials mentioning features or use of this software
     45  *    must display the following acknowledgement:
     46  *        This product includes software developed by the NetBSD
     47  *        Foundation, Inc. and its contributors.
     48  * 4. Neither the name of The NetBSD Foundation nor the names of its
     49  *    contributors may be used to endorse or promote products derived
     50  *    from this software without specific prior written permission.
     51  *
     52  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     53  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     54  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     55  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     56  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     57  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     58  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     59  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     60  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     61  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     62  * POSSIBILITY OF SUCH DAMAGE.
     63  */
     64 
     65 /*
     66  * Copyright (c) 1991 The Regents of the University of California.
     67  * All rights reserved.
     68  *
     69  * Redistribution and use in source and binary forms, with or without
     70  * modification, are permitted provided that the following conditions
     71  * are met:
     72  * 1. Redistributions of source code must retain the above copyright
     73  *    notice, this list of conditions and the following disclaimer.
     74  * 2. Redistributions in binary form must reproduce the above copyright
     75  *    notice, this list of conditions and the following disclaimer in the
     76  *    documentation and/or other materials provided with the distribution.
     77  * 3. All advertising materials mentioning features or use of this software
     78  *    must display the following acknowledgement:
     79  *	This product includes software developed by the University of
     80  *	California, Berkeley and its contributors.
     81  * 4. Neither the name of the University nor the names of its contributors
     82  *    may be used to endorse or promote products derived from this software
     83  *    without specific prior written permission.
     84  *
     85  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     86  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     87  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     88  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     89  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     90  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     91  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     92  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     93  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     94  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     95  * SUCH DAMAGE.
     96  *
     97  *	@(#)com.c	7.5 (Berkeley) 5/16/91
     98  */
     99 
    100 /*
    101  * SH internal serial driver
    102  *
    103  * This code is derived from both z8530tty.c and com.c
    104  */
    105 
    106 #include "opt_kgdb.h"
    107 #include "opt_sci.h"
    108 
    109 #include <sys/param.h>
    110 #include <sys/systm.h>
    111 #include <sys/tty.h>
    112 #include <sys/proc.h>
    113 #include <sys/conf.h>
    114 #include <sys/file.h>
    115 #include <sys/syslog.h>
    116 #include <sys/kernel.h>
    117 #include <sys/device.h>
    118 #include <sys/malloc.h>
    119 
    120 #include <dev/cons.h>
    121 
    122 #include <machine/cpu.h>
    123 #include <sh3/clock.h>
    124 #include <sh3/scireg.h>
    125 #include <sh3/tmureg.h>
    126 
    127 #include <machine/shbvar.h>
    128 
    129 static void	scistart(struct tty *);
    130 static int	sciparam(struct tty *, struct termios *);
    131 
    132 void scicnprobe(struct consdev *);
    133 void scicninit(struct consdev *);
    134 void scicnputc(dev_t, int);
    135 int scicngetc(dev_t);
    136 void scicnpoolc(dev_t, int);
    137 int sciintr(void *);
    138 
    139 struct sci_softc {
    140 	struct device sc_dev;		/* boilerplate */
    141 	struct tty *sc_tty;
    142 	void *sc_ih;
    143 
    144 	struct callout sc_diag_ch;
    145 
    146 #if 0
    147 	bus_space_tag_t sc_iot;		/* ISA i/o space identifier */
    148 	bus_space_handle_t   sc_ioh;	/* ISA io handle */
    149 
    150 	int sc_drq;
    151 
    152 	int sc_frequency;
    153 #endif
    154 
    155 	u_int sc_overflows,
    156 	      sc_floods,
    157 	      sc_errors;		/* number of retries so far */
    158 	u_char sc_status[7];		/* copy of registers */
    159 
    160 	int sc_hwflags;
    161 	int sc_swflags;
    162 	u_int sc_fifolen;		/* XXX always 0? */
    163 
    164 	u_int sc_r_hiwat,
    165 	      sc_r_lowat;
    166 	u_char *volatile sc_rbget,
    167 	       *volatile sc_rbput;
    168  	volatile u_int sc_rbavail;
    169 	u_char *sc_rbuf,
    170 	       *sc_ebuf;
    171 
    172  	u_char *sc_tba;			/* transmit buffer address */
    173  	u_int sc_tbc,			/* transmit byte count */
    174 	      sc_heldtbc;
    175 
    176 	volatile u_char sc_rx_flags,	/* receiver blocked */
    177 #define	RX_TTY_BLOCKED		0x01
    178 #define	RX_TTY_OVERFLOWED	0x02
    179 #define	RX_IBUF_BLOCKED		0x04
    180 #define	RX_IBUF_OVERFLOWED	0x08
    181 #define	RX_ANY_BLOCK		0x0f
    182 			sc_tx_busy,	/* working on an output chunk */
    183 			sc_tx_done,	/* done with one output chunk */
    184 			sc_tx_stopped,	/* H/W level stop (lost CTS) */
    185 			sc_st_check,	/* got a status interrupt */
    186 			sc_rx_ready;
    187 
    188 	volatile u_char sc_heldchange;
    189 };
    190 
    191 /* controller driver configuration */
    192 static int sci_match(struct device *, struct cfdata *, void *);
    193 static void sci_attach(struct device *, struct device *, void *);
    194 
    195 void	sci_break(struct sci_softc *, int);
    196 void	sci_iflush(struct sci_softc *);
    197 
    198 #define	integrate	static inline
    199 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
    200 void 	scisoft(void *);
    201 #else
    202 #ifndef __NO_SOFT_SERIAL_INTERRUPT
    203 void 	scisoft(void);
    204 #else
    205 void 	scisoft(void *);
    206 #endif
    207 #endif
    208 integrate void sci_rxsoft(struct sci_softc *, struct tty *);
    209 integrate void sci_txsoft(struct sci_softc *, struct tty *);
    210 integrate void sci_stsoft(struct sci_softc *, struct tty *);
    211 integrate void sci_schedrx(struct sci_softc *);
    212 void	scidiag(void *);
    213 
    214 #define	SCIUNIT_MASK		0x7ffff
    215 #define	SCIDIALOUT_MASK	0x80000
    216 
    217 #define	SCIUNIT(x)	(minor(x) & SCIUNIT_MASK)
    218 #define	SCIDIALOUT(x)	(minor(x) & SCIDIALOUT_MASK)
    219 
    220 /* Macros to clear/set/test flags. */
    221 #define SET(t, f)	(t) |= (f)
    222 #define CLR(t, f)	(t) &= ~(f)
    223 #define ISSET(t, f)	((t) & (f))
    224 
    225 /* Hardware flag masks */
    226 #define	SCI_HW_NOIEN	0x01
    227 #define	SCI_HW_FIFO	0x02
    228 #define	SCI_HW_FLOW	0x08
    229 #define	SCI_HW_DEV_OK	0x20
    230 #define	SCI_HW_CONSOLE	0x40
    231 #define	SCI_HW_KGDB	0x80
    232 
    233 /* Buffer size for character buffer */
    234 #define	SCI_RING_SIZE	2048
    235 
    236 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */
    237 u_int sci_rbuf_hiwat = (SCI_RING_SIZE * 1) / 4;
    238 u_int sci_rbuf_lowat = (SCI_RING_SIZE * 3) / 4;
    239 
    240 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
    241 int sciconscflag = CONMODE;
    242 int sciisconsole = 0;
    243 
    244 #ifdef SCICN_SPEED
    245 int scicn_speed = SCICN_SPEED;
    246 #else
    247 int scicn_speed = 9600;
    248 #endif
    249 
    250 #define	divrnd(n, q)	(((n)*2/(q)+1)/2)	/* divide and round off */
    251 
    252 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS
    253 #ifdef __NO_SOFT_SERIAL_INTERRUPT
    254 volatile int	sci_softintr_scheduled;
    255 struct callout sci_soft_ch = CALLOUT_INITIALIZER;
    256 #endif
    257 #endif
    258 
    259 u_int sci_rbuf_size = SCI_RING_SIZE;
    260 
    261 struct cfattach sci_ca = {
    262 	sizeof(struct sci_softc), sci_match, sci_attach
    263 };
    264 
    265 extern struct cfdriver sci_cd;
    266 
    267 cdev_decl(sci);
    268 
    269 void InitializeSci (unsigned int);
    270 
    271 /*
    272  * following functions are debugging prupose only
    273  */
    274 #define CR      0x0D
    275 #define I2C_ADRS (*(volatile unsigned int *)0xa8000000)
    276 #define USART_ON (unsigned int)~0x08
    277 
    278 void sci_putc(unsigned char);
    279 unsigned char sci_getc(void);
    280 int SciErrCheck(void);
    281 
    282 /*
    283  * InitializeSci
    284  * : unsigned int bps;
    285  * : SCI(Serial Communication Interface)
    286  */
    287 
    288 void
    289 InitializeSci(unsigned int bps)
    290 {
    291 
    292 	/* Initialize SCR */
    293 	SHREG_SCSCR = 0x00;
    294 
    295 	/* Serial Mode Register */
    296 	SHREG_SCSMR = 0x00;	/* Async,8bit,NonParity,Even,1Stop,NoMulti */
    297 
    298 	/* Bit Rate Register */
    299 	SHREG_SCBRR = divrnd(PCLOCK, 32 * bps) - 1;
    300 
    301 	/*
    302 	 * wait 1mSec, because Send/Recv must begin 1 bit period after
    303 	 * BRR is set.
    304 	 */
    305 	delay(1000);
    306 
    307 	/* Send permission, Receive permission ON */
    308 	SHREG_SCSCR = SCSCR_TE | SCSCR_RE;
    309 
    310 	/* Serial Status Register */
    311 	SHREG_SCSSR &= SCSSR_TDRE;	/* Clear Status */
    312 
    313 #if 0
    314 	I2C_ADRS &= ~0x08;	/* enable RS-232C */
    315 #endif
    316 }
    317 
    318 
    319 /*
    320  * sci_putc
    321  *  : unsigned char c;
    322  */
    323 void
    324 sci_putc(unsigned char c)
    325 {
    326 
    327 	if (c == '\n')
    328 		sci_putc('\r');
    329 
    330 	/* wait for ready */
    331 	while ((SHREG_SCSSR & SCSSR_TDRE) == NULL)
    332 		;
    333 
    334 	/* write send data to send register */
    335 	SHREG_SCTDR = c;
    336 
    337 	/* clear ready flag */
    338 	SHREG_SCSSR &= ~SCSSR_TDRE;
    339 }
    340 
    341 /*
    342  * : SciErrCheck
    343  *	0x20 = over run
    344  *	0x10 = frame error
    345  *	0x80 = parity error
    346  */
    347 int
    348 SciErrCheck(void)
    349 {
    350 
    351 	return(SHREG_SCSSR & (SCSSR_ORER | SCSSR_FER | SCSSR_PER));
    352 }
    353 
    354 /*
    355  * sci_getc
    356  */
    357 unsigned char
    358 sci_getc(void)
    359 {
    360 	unsigned char c, err_c;
    361 
    362 	while (((err_c = SHREG_SCSSR)
    363 		& (SCSSR_RDRF | SCSSR_ORER | SCSSR_FER | SCSSR_PER)) == 0)
    364 		;
    365 	if ((err_c & (SCSSR_ORER | SCSSR_FER | SCSSR_PER)) != 0) {
    366 		SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_FER | SCSSR_PER);
    367 		return(err_c |= 0x80);
    368 	}
    369 
    370 	c = SHREG_SCRDR;
    371 
    372 	SHREG_SCSSR &= ~SCSSR_RDRF;
    373 
    374 	return(c);
    375 }
    376 
    377 #if 0
    378 #define SCI_MAX_UNITS 2
    379 #else
    380 #define SCI_MAX_UNITS 1
    381 #endif
    382 
    383 
    384 static int
    385 sci_match(struct device *parent, struct cfdata *cfp, void *aux)
    386 {
    387 	struct shb_attach_args *sa = aux;
    388 
    389 	if (strcmp(cfp->cf_driver->cd_name, "sci")
    390 	    || cfp->cf_unit >= SCI_MAX_UNITS)
    391 		return 0;
    392 
    393 	sa->ia_iosize = 0x10;
    394 	return 1;
    395 }
    396 
    397 static void
    398 sci_attach(struct device *parent, struct device *self, void *aux)
    399 {
    400 	struct sci_softc *sc = (struct sci_softc *)self;
    401 	struct tty *tp;
    402 	int irq;
    403 	struct shb_attach_args *ia = aux;
    404 
    405 	sc->sc_hwflags = 0;	/* XXX */
    406 	sc->sc_swflags = 0;	/* XXX */
    407 	sc->sc_fifolen = 0;	/* XXX */
    408 
    409 	irq = ia->ia_irq;
    410 
    411 	if (sciisconsole) {
    412 		SET(sc->sc_hwflags, SCI_HW_CONSOLE);
    413 		SET(sc->sc_swflags, TIOCFLAG_SOFTCAR);
    414 		printf("\n%s: console\n", sc->sc_dev.dv_xname);
    415 	} else {
    416 		InitializeSci(9600);
    417 		printf("\n");
    418 	}
    419 
    420 	callout_init(&sc->sc_diag_ch);
    421 
    422 #if 0
    423 	if (irq != IRQUNK) {
    424 		sc->sc_ih = shb_intr_establish(irq,
    425 		    IST_EDGE, IPL_SERIAL, sciintr, sc);
    426 	}
    427 #else
    428 	if (irq != IRQUNK) {
    429 		sc->sc_ih = shb_intr_establish(SCI_IRQ,
    430 		    IST_EDGE, IPL_SERIAL, sciintr, sc);
    431 	}
    432 #endif
    433 
    434 	SET(sc->sc_hwflags, SCI_HW_DEV_OK);
    435 
    436 	tp = ttymalloc();
    437 	tp->t_oproc = scistart;
    438 	tp->t_param = sciparam;
    439 	tp->t_hwiflow = NULL;
    440 
    441 	sc->sc_tty = tp;
    442 	sc->sc_rbuf = malloc(sci_rbuf_size << 1, M_DEVBUF, M_NOWAIT);
    443 	if (sc->sc_rbuf == NULL) {
    444 		printf("%s: unable to allocate ring buffer\n",
    445 		    sc->sc_dev.dv_xname);
    446 		return;
    447 	}
    448 	sc->sc_ebuf = sc->sc_rbuf + (sci_rbuf_size << 1);
    449 
    450 	tty_attach(tp);
    451 }
    452 
    453 /*
    454  * Start or restart transmission.
    455  */
    456 static void
    457 scistart(struct tty *tp)
    458 {
    459 	struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(tp->t_dev)];
    460 	int s;
    461 
    462 	s = spltty();
    463 	if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP))
    464 		goto out;
    465 	if (sc->sc_tx_stopped)
    466 		goto out;
    467 
    468 	if (tp->t_outq.c_cc <= tp->t_lowat) {
    469 		if (ISSET(tp->t_state, TS_ASLEEP)) {
    470 			CLR(tp->t_state, TS_ASLEEP);
    471 			wakeup(&tp->t_outq);
    472 		}
    473 		selwakeup(&tp->t_wsel);
    474 		if (tp->t_outq.c_cc == 0)
    475 			goto out;
    476 	}
    477 
    478 	/* Grab the first contiguous region of buffer space. */
    479 	{
    480 		u_char *tba;
    481 		int tbc;
    482 
    483 		tba = tp->t_outq.c_cf;
    484 		tbc = ndqb(&tp->t_outq, 0);
    485 
    486 		(void)splserial();
    487 
    488 		sc->sc_tba = tba;
    489 		sc->sc_tbc = tbc;
    490 	}
    491 
    492 	SET(tp->t_state, TS_BUSY);
    493 	sc->sc_tx_busy = 1;
    494 
    495 	/* Enable transmit completion interrupts if necessary. */
    496 	SHREG_SCSCR |= SCSCR_TIE | SCSCR_RIE;
    497 
    498 	/* Output the first byte of the contiguous buffer. */
    499 	{
    500 		if (sc->sc_tbc > 0) {
    501 			sci_putc(*(sc->sc_tba));
    502 			sc->sc_tba++;
    503 			sc->sc_tbc--;
    504 		}
    505 	}
    506 out:
    507 	splx(s);
    508 	return;
    509 }
    510 
    511 /*
    512  * Set SCI tty parameters from termios.
    513  * XXX - Should just copy the whole termios after
    514  * making sure all the changes could be done.
    515  */
    516 static int
    517 sciparam(struct tty *tp, struct termios *t)
    518 {
    519 	struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(tp->t_dev)];
    520 	int ospeed = t->c_ospeed;
    521 	int s;
    522 
    523 	if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
    524 		return (EIO);
    525 
    526 	/* Check requested parameters. */
    527 	if (ospeed < 0)
    528 		return (EINVAL);
    529 	if (t->c_ispeed && t->c_ispeed != t->c_ospeed)
    530 		return (EINVAL);
    531 
    532 	/*
    533 	 * For the console, always force CLOCAL and !HUPCL, so that the port
    534 	 * is always active.
    535 	 */
    536 	if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) ||
    537 	    ISSET(sc->sc_hwflags, SCI_HW_CONSOLE)) {
    538 		SET(t->c_cflag, CLOCAL);
    539 		CLR(t->c_cflag, HUPCL);
    540 	}
    541 
    542 	/*
    543 	 * If there were no changes, don't do anything.  This avoids dropping
    544 	 * input and improves performance when all we did was frob things like
    545 	 * VMIN and VTIME.
    546 	 */
    547 	if (tp->t_ospeed == t->c_ospeed &&
    548 	    tp->t_cflag == t->c_cflag)
    549 		return (0);
    550 
    551 #if 0
    552 /* XXX (msaitoh) */
    553 	lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag);
    554 #endif
    555 
    556 	s = splserial();
    557 
    558 	/*
    559 	 * Set the FIFO threshold based on the receive speed.
    560 	 *
    561 	 *  * If it's a low speed, it's probably a mouse or some other
    562 	 *    interactive device, so set the threshold low.
    563 	 *  * If it's a high speed, trim the trigger level down to prevent
    564 	 *    overflows.
    565 	 *  * Otherwise set it a bit higher.
    566 	 */
    567 #if 0
    568 /* XXX (msaitoh) */
    569 	if (ISSET(sc->sc_hwflags, SCI_HW_HAYESP))
    570 		sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8;
    571 	else if (ISSET(sc->sc_hwflags, SCI_HW_FIFO))
    572 		sc->sc_fifo = FIFO_ENABLE |
    573 		    (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 :
    574 		     t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4);
    575 	else
    576 		sc->sc_fifo = 0;
    577 #endif
    578 
    579 	/* And copy to tty. */
    580 	tp->t_ispeed = 0;
    581 	tp->t_ospeed = t->c_ospeed;
    582 	tp->t_cflag = t->c_cflag;
    583 
    584 	if (!sc->sc_heldchange) {
    585 		if (sc->sc_tx_busy) {
    586 			sc->sc_heldtbc = sc->sc_tbc;
    587 			sc->sc_tbc = 0;
    588 			sc->sc_heldchange = 1;
    589 		}
    590 #if 0
    591 /* XXX (msaitoh) */
    592 		else
    593 			sci_loadchannelregs(sc);
    594 #endif
    595 	}
    596 
    597 	if (!ISSET(t->c_cflag, CHWFLOW)) {
    598 		/* Disable the high water mark. */
    599 		sc->sc_r_hiwat = 0;
    600 		sc->sc_r_lowat = 0;
    601 		if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) {
    602 			CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
    603 			sci_schedrx(sc);
    604 		}
    605 	} else {
    606 		sc->sc_r_hiwat = sci_rbuf_hiwat;
    607 		sc->sc_r_lowat = sci_rbuf_lowat;
    608 	}
    609 
    610 	splx(s);
    611 
    612 #ifdef SCI_DEBUG
    613 	if (sci_debug)
    614 		scistatus(sc, "sciparam ");
    615 #endif
    616 
    617 	if (!ISSET(t->c_cflag, CHWFLOW)) {
    618 		if (sc->sc_tx_stopped) {
    619 			sc->sc_tx_stopped = 0;
    620 			scistart(tp);
    621 		}
    622 	}
    623 
    624 	return (0);
    625 }
    626 
    627 void
    628 sci_iflush(struct sci_softc *sc)
    629 {
    630 	unsigned char err_c;
    631 	volatile unsigned char c;
    632 
    633 	if (((err_c = SHREG_SCSSR)
    634 	     & (SCSSR_RDRF | SCSSR_ORER | SCSSR_FER | SCSSR_PER)) != 0) {
    635 
    636 		if ((err_c & (SCSSR_ORER | SCSSR_FER | SCSSR_PER)) != 0) {
    637 			SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_FER | SCSSR_PER);
    638 			return;
    639 		}
    640 
    641 		c = SHREG_SCRDR;
    642 
    643 		SHREG_SCSSR &= ~SCSSR_RDRF;
    644 	}
    645 }
    646 
    647 int
    648 sciopen(dev_t dev, int flag, int mode, struct proc *p)
    649 {
    650 	int unit = SCIUNIT(dev);
    651 	struct sci_softc *sc;
    652 	struct tty *tp;
    653 	int s, s2;
    654 	int error;
    655 
    656 	if (unit >= sci_cd.cd_ndevs)
    657 		return (ENXIO);
    658 	sc = sci_cd.cd_devs[unit];
    659 	if (sc == 0 || !ISSET(sc->sc_hwflags, SCI_HW_DEV_OK) ||
    660 	    sc->sc_rbuf == NULL)
    661 		return (ENXIO);
    662 
    663 	if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
    664 		return (ENXIO);
    665 
    666 #ifdef KGDB
    667 	/*
    668 	 * If this is the kgdb port, no other use is permitted.
    669 	 */
    670 	if (ISSET(sc->sc_hwflags, SCI_HW_KGDB))
    671 		return (EBUSY);
    672 #endif
    673 
    674 	tp = sc->sc_tty;
    675 
    676 	if (ISSET(tp->t_state, TS_ISOPEN) &&
    677 	    ISSET(tp->t_state, TS_XCLUDE) &&
    678 	    p->p_ucred->cr_uid != 0)
    679 		return (EBUSY);
    680 
    681 	s = spltty();
    682 
    683 	/*
    684 	 * Do the following iff this is a first open.
    685 	 */
    686 	if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
    687 		struct termios t;
    688 
    689 		tp->t_dev = dev;
    690 
    691 		s2 = splserial();
    692 
    693 		/* Turn on interrupts. */
    694 		SHREG_SCSCR |= SCSCR_TIE | SCSCR_RIE;
    695 
    696 		splx(s2);
    697 
    698 		/*
    699 		 * Initialize the termios status to the defaults.  Add in the
    700 		 * sticky bits from TIOCSFLAGS.
    701 		 */
    702 		t.c_ispeed = 0;
    703 		if (ISSET(sc->sc_hwflags, SCI_HW_CONSOLE)) {
    704 			t.c_ospeed = scicn_speed;
    705 			t.c_cflag = sciconscflag;
    706 		} else {
    707 			t.c_ospeed = TTYDEF_SPEED;
    708 			t.c_cflag = TTYDEF_CFLAG;
    709 		}
    710 		if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL))
    711 			SET(t.c_cflag, CLOCAL);
    712 		if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS))
    713 			SET(t.c_cflag, CRTSCTS);
    714 		if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF))
    715 			SET(t.c_cflag, MDMBUF);
    716 		/* Make sure sciparam() will do something. */
    717 		tp->t_ospeed = 0;
    718 		(void) sciparam(tp, &t);
    719 		tp->t_iflag = TTYDEF_IFLAG;
    720 		tp->t_oflag = TTYDEF_OFLAG;
    721 		tp->t_lflag = TTYDEF_LFLAG;
    722 		ttychars(tp);
    723 		ttsetwater(tp);
    724 
    725 		s2 = splserial();
    726 
    727 		/* Clear the input ring, and unblock. */
    728 		sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf;
    729 		sc->sc_rbavail = sci_rbuf_size;
    730 		sci_iflush(sc);
    731 		CLR(sc->sc_rx_flags, RX_ANY_BLOCK);
    732 #if 0
    733 /* XXX (msaitoh) */
    734 		sci_hwiflow(sc);
    735 #endif
    736 
    737 #ifdef SCI_DEBUG
    738 		if (sci_debug)
    739 			scistatus(sc, "sciopen  ");
    740 #endif
    741 
    742 		splx(s2);
    743 	}
    744 
    745 	splx(s);
    746 
    747 	error = ttyopen(tp, SCIDIALOUT(dev), ISSET(flag, O_NONBLOCK));
    748 	if (error)
    749 		goto bad;
    750 
    751 	error = (*tp->t_linesw->l_open)(dev, tp);
    752 	if (error)
    753 		goto bad;
    754 
    755 	return (0);
    756 
    757 bad:
    758 
    759 	return (error);
    760 }
    761 
    762 int
    763 sciclose(dev_t dev, int flag, int mode, struct proc *p)
    764 {
    765 	struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
    766 	struct tty *tp = sc->sc_tty;
    767 
    768 	/* XXX This is for cons.c. */
    769 	if (!ISSET(tp->t_state, TS_ISOPEN))
    770 		return (0);
    771 
    772 	(*tp->t_linesw->l_close)(tp, flag);
    773 	ttyclose(tp);
    774 
    775 	if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
    776 		return (0);
    777 
    778 	return (0);
    779 }
    780 
    781 int
    782 sciread(dev_t dev, struct uio *uio, int flag)
    783 {
    784 	struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
    785 	struct tty *tp = sc->sc_tty;
    786 
    787 	return ((*tp->t_linesw->l_read)(tp, uio, flag));
    788 }
    789 
    790 int
    791 sciwrite(dev_t dev, struct uio *uio, int flag)
    792 {
    793 	struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
    794 	struct tty *tp = sc->sc_tty;
    795 
    796 	return ((*tp->t_linesw->l_write)(tp, uio, flag));
    797 }
    798 
    799 int
    800 scipoll(dev_t dev, int events, struct proc *p)
    801 {
    802 	struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
    803 	struct tty *tp = sc->sc_tty;
    804 
    805 	return ((*tp->t_linesw->l_poll)(tp, events, p));
    806 }
    807 
    808 struct tty *
    809 scitty(dev_t dev)
    810 {
    811 	struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
    812 	struct tty *tp = sc->sc_tty;
    813 
    814 	return (tp);
    815 }
    816 
    817 int
    818 sciioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct proc *p)
    819 {
    820 	struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
    821 	struct tty *tp = sc->sc_tty;
    822 	int error;
    823 	int s;
    824 
    825 	if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
    826 		return (EIO);
    827 
    828 	error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, p);
    829 	if (error >= 0)
    830 		return (error);
    831 
    832 	error = ttioctl(tp, cmd, data, flag, p);
    833 	if (error >= 0)
    834 		return (error);
    835 
    836 	error = 0;
    837 
    838 	s = splserial();
    839 
    840 	switch (cmd) {
    841 	case TIOCSBRK:
    842 		sci_break(sc, 1);
    843 		break;
    844 
    845 	case TIOCCBRK:
    846 		sci_break(sc, 0);
    847 		break;
    848 
    849 	case TIOCGFLAGS:
    850 		*(int *)data = sc->sc_swflags;
    851 		break;
    852 
    853 	case TIOCSFLAGS:
    854 		error = suser(p->p_ucred, &p->p_acflag);
    855 		if (error)
    856 			break;
    857 		sc->sc_swflags = *(int *)data;
    858 		break;
    859 
    860 	default:
    861 		error = ENOTTY;
    862 		break;
    863 	}
    864 
    865 	splx(s);
    866 
    867 	return (error);
    868 }
    869 
    870 integrate void
    871 sci_schedrx(struct sci_softc *sc)
    872 {
    873 
    874 	sc->sc_rx_ready = 1;
    875 
    876 	/* Wake up the poller. */
    877 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
    878 	softintr_schedule(sc->sc_si);
    879 #else
    880 #ifndef __NO_SOFT_SERIAL_INTERRUPT
    881 	setsoftserial();
    882 #else
    883 	if (!sci_softintr_scheduled) {
    884 		sci_softintr_scheduled = 1;
    885 		callout_reset(&sci_soft_ch, 1, scisoft, NULL);
    886 	}
    887 #endif
    888 #endif
    889 }
    890 
    891 void
    892 sci_break(struct sci_softc *sc, int onoff)
    893 {
    894 
    895 	if (onoff)
    896 		SHREG_SCSSR &= ~SCSSR_TDRE;
    897 	else
    898 		SHREG_SCSSR |= SCSSR_TDRE;
    899 
    900 #if 0	/* XXX */
    901 	if (!sc->sc_heldchange) {
    902 		if (sc->sc_tx_busy) {
    903 			sc->sc_heldtbc = sc->sc_tbc;
    904 			sc->sc_tbc = 0;
    905 			sc->sc_heldchange = 1;
    906 		} else
    907 			sci_loadchannelregs(sc);
    908 	}
    909 #endif
    910 }
    911 
    912 /*
    913  * Stop output, e.g., for ^S or output flush.
    914  */
    915 void
    916 scistop(struct tty *tp, int flag)
    917 {
    918 	struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(tp->t_dev)];
    919 	int s;
    920 
    921 	s = splserial();
    922 	if (ISSET(tp->t_state, TS_BUSY)) {
    923 		/* Stop transmitting at the next chunk. */
    924 		sc->sc_tbc = 0;
    925 		sc->sc_heldtbc = 0;
    926 		if (!ISSET(tp->t_state, TS_TTSTOP))
    927 			SET(tp->t_state, TS_FLUSH);
    928 	}
    929 	splx(s);
    930 }
    931 
    932 void
    933 scidiag(void *arg)
    934 {
    935 	struct sci_softc *sc = arg;
    936 	int overflows, floods;
    937 	int s;
    938 
    939 	s = splserial();
    940 	overflows = sc->sc_overflows;
    941 	sc->sc_overflows = 0;
    942 	floods = sc->sc_floods;
    943 	sc->sc_floods = 0;
    944 	sc->sc_errors = 0;
    945 	splx(s);
    946 
    947 	log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n",
    948 	    sc->sc_dev.dv_xname,
    949 	    overflows, overflows == 1 ? "" : "s",
    950 	    floods, floods == 1 ? "" : "s");
    951 }
    952 
    953 integrate void
    954 sci_rxsoft(struct sci_softc *sc, struct tty *tp)
    955 {
    956 	int (*rint)(int c, struct tty *tp) = tp->t_linesw->l_rint;
    957 	u_char *get, *end;
    958 	u_int cc, scc;
    959 	u_char ssr;
    960 	int code;
    961 	int s;
    962 
    963 	end = sc->sc_ebuf;
    964 	get = sc->sc_rbget;
    965 	scc = cc = sci_rbuf_size - sc->sc_rbavail;
    966 
    967 	if (cc == sci_rbuf_size) {
    968 		sc->sc_floods++;
    969 		if (sc->sc_errors++ == 0)
    970 			callout_reset(&sc->sc_diag_ch, 60 * hz, scidiag, sc);
    971 	}
    972 
    973 	while (cc) {
    974 		code = get[0];
    975 		ssr = get[1];
    976 		if (ISSET(ssr, SCSSR_FER | SCSSR_PER)) {
    977 			if (ISSET(ssr, SCSSR_FER))
    978 				SET(code, TTY_FE);
    979 			if (ISSET(ssr, SCSSR_PER))
    980 				SET(code, TTY_PE);
    981 		}
    982 		if ((*rint)(code, tp) == -1) {
    983 			/*
    984 			 * The line discipline's buffer is out of space.
    985 			 */
    986 			if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) {
    987 				/*
    988 				 * We're either not using flow control, or the
    989 				 * line discipline didn't tell us to block for
    990 				 * some reason.  Either way, we have no way to
    991 				 * know when there's more space available, so
    992 				 * just drop the rest of the data.
    993 				 */
    994 				get += cc << 1;
    995 				if (get >= end)
    996 					get -= sci_rbuf_size << 1;
    997 				cc = 0;
    998 			} else {
    999 				/*
   1000 				 * Don't schedule any more receive processing
   1001 				 * until the line discipline tells us there's
   1002 				 * space available (through scihwiflow()).
   1003 				 * Leave the rest of the data in the input
   1004 				 * buffer.
   1005 				 */
   1006 				SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
   1007 			}
   1008 			break;
   1009 		}
   1010 		get += 2;
   1011 		if (get >= end)
   1012 			get = sc->sc_rbuf;
   1013 		cc--;
   1014 	}
   1015 
   1016 	if (cc != scc) {
   1017 		sc->sc_rbget = get;
   1018 		s = splserial();
   1019 		cc = sc->sc_rbavail += scc - cc;
   1020 		/* Buffers should be ok again, release possible block. */
   1021 		if (cc >= sc->sc_r_lowat) {
   1022 			if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) {
   1023 				CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED);
   1024 				SHREG_SCSCR |= SCSCR_RIE;
   1025 			}
   1026 #if 0
   1027 			if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) {
   1028 				CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED);
   1029 				sci_hwiflow(sc);
   1030 			}
   1031 #endif
   1032 		}
   1033 		splx(s);
   1034 	}
   1035 }
   1036 
   1037 integrate void
   1038 sci_txsoft(sc, tp)
   1039 	struct sci_softc *sc;
   1040 	struct tty *tp;
   1041 {
   1042 
   1043 	CLR(tp->t_state, TS_BUSY);
   1044 	if (ISSET(tp->t_state, TS_FLUSH))
   1045 		CLR(tp->t_state, TS_FLUSH);
   1046 	else
   1047 		ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf));
   1048 	(*tp->t_linesw->l_start)(tp);
   1049 }
   1050 
   1051 integrate void
   1052 sci_stsoft(struct sci_softc *sc, struct tty *tp)
   1053 {
   1054 #if 0
   1055 /* XXX (msaitoh) */
   1056 	u_char msr, delta;
   1057 	int s;
   1058 
   1059 	s = splserial();
   1060 	msr = sc->sc_msr;
   1061 	delta = sc->sc_msr_delta;
   1062 	sc->sc_msr_delta = 0;
   1063 	splx(s);
   1064 
   1065 	if (ISSET(delta, sc->sc_msr_dcd)) {
   1066 		/*
   1067 		 * Inform the tty layer that carrier detect changed.
   1068 		 */
   1069 		(void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD));
   1070 	}
   1071 
   1072 	if (ISSET(delta, sc->sc_msr_cts)) {
   1073 		/* Block or unblock output according to flow control. */
   1074 		if (ISSET(msr, sc->sc_msr_cts)) {
   1075 			sc->sc_tx_stopped = 0;
   1076 			(*tp->t_linesw->l_start)(tp);
   1077 		} else {
   1078 			sc->sc_tx_stopped = 1;
   1079 		}
   1080 	}
   1081 
   1082 #ifdef SCI_DEBUG
   1083 	if (sci_debug)
   1084 		scistatus(sc, "sci_stsoft");
   1085 #endif
   1086 #endif
   1087 }
   1088 
   1089 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
   1090 void
   1091 scisoft(void *arg)
   1092 {
   1093 	struct sci_softc *sc = arg;
   1094 	struct tty *tp;
   1095 
   1096 	if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
   1097 		return;
   1098 
   1099 	{
   1100 #else
   1101 void
   1102 #ifndef __NO_SOFT_SERIAL_INTERRUPT
   1103 scisoft()
   1104 #else
   1105 scisoft(void *arg)
   1106 #endif
   1107 {
   1108 	struct sci_softc	*sc;
   1109 	struct tty	*tp;
   1110 	int	unit;
   1111 #ifdef __NO_SOFT_SERIAL_INTERRUPT
   1112 	int s;
   1113 
   1114 	s = splsoftserial();
   1115 	sci_softintr_scheduled = 0;
   1116 #endif
   1117 
   1118 	for (unit = 0; unit < sci_cd.cd_ndevs; unit++) {
   1119 		sc = sci_cd.cd_devs[unit];
   1120 		if (sc == NULL || !ISSET(sc->sc_hwflags, SCI_HW_DEV_OK))
   1121 			continue;
   1122 
   1123 		if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
   1124 			continue;
   1125 
   1126 		tp = sc->sc_tty;
   1127 		if (tp == NULL)
   1128 			continue;
   1129 		if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0)
   1130 			continue;
   1131 #endif
   1132 		tp = sc->sc_tty;
   1133 
   1134 		if (sc->sc_rx_ready) {
   1135 			sc->sc_rx_ready = 0;
   1136 			sci_rxsoft(sc, tp);
   1137 		}
   1138 
   1139 #if 0
   1140 		if (sc->sc_st_check) {
   1141 			sc->sc_st_check = 0;
   1142 			sci_stsoft(sc, tp);
   1143 		}
   1144 #endif
   1145 
   1146 		if (sc->sc_tx_done) {
   1147 			sc->sc_tx_done = 0;
   1148 			sci_txsoft(sc, tp);
   1149 		}
   1150 	}
   1151 
   1152 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS
   1153 #ifdef __NO_SOFT_SERIAL_INTERRUPT
   1154 	splx(s);
   1155 #endif
   1156 #endif
   1157 }
   1158 
   1159 int
   1160 sciintr(void *arg)
   1161 {
   1162 	struct sci_softc *sc = arg;
   1163 	u_char *put, *end;
   1164 	u_int cc;
   1165 	u_short ssr;
   1166 
   1167 	if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
   1168 		return (0);
   1169 
   1170 	end = sc->sc_ebuf;
   1171 	put = sc->sc_rbput;
   1172 	cc = sc->sc_rbavail;
   1173 
   1174 	ssr = SHREG_SCSSR;
   1175 	if (ISSET(ssr, SCSSR_FER)) {
   1176 		SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_PER | SCSSR_FER);
   1177 #if defined(DDB) || defined(KGDB)
   1178 #ifdef SH4
   1179 		if ((SHREG_SCSPTR & SCPTR_SPB0DT) != 0) {
   1180 #else
   1181 		if ((SHREG_SCSPDR & SCPDR_SCP0DT) != 0) {
   1182 #endif
   1183 #ifdef DDB
   1184 			if (ISSET(sc->sc_hwflags, SCI_HW_CONSOLE)) {
   1185 				console_debugger();
   1186 			}
   1187 #endif
   1188 #ifdef KGDB
   1189 			if (ISSET(sc->sc_hwflags, SCI_HW_KGDB)) {
   1190 				kgdb_connect(1);
   1191 			}
   1192 #endif
   1193 		}
   1194 #endif /* DDB || KGDB */
   1195 	}
   1196 	if ((SHREG_SCSSR & SCSSR_RDRF) != 0) {
   1197 		if (cc > 0) {
   1198 			put[0] = SHREG_SCRDR;
   1199 			put[1] = SHREG_SCSSR & 0x00ff;
   1200 
   1201 			SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_FER | SCSSR_PER |
   1202 					 SCSSR_RDRF);
   1203 
   1204 			put += 2;
   1205 			if (put >= end)
   1206 				put = sc->sc_rbuf;
   1207 			cc--;
   1208 		}
   1209 
   1210 		/*
   1211 		 * Current string of incoming characters ended because
   1212 		 * no more data was available or we ran out of space.
   1213 		 * Schedule a receive event if any data was received.
   1214 		 * If we're out of space, turn off receive interrupts.
   1215 		 */
   1216 		sc->sc_rbput = put;
   1217 		sc->sc_rbavail = cc;
   1218 		if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED))
   1219 			sc->sc_rx_ready = 1;
   1220 
   1221 		/*
   1222 		 * See if we are in danger of overflowing a buffer. If
   1223 		 * so, use hardware flow control to ease the pressure.
   1224 		 */
   1225 		if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) &&
   1226 		    cc < sc->sc_r_hiwat) {
   1227 			SET(sc->sc_rx_flags, RX_IBUF_BLOCKED);
   1228 #if 0
   1229 			sci_hwiflow(sc);
   1230 #endif
   1231 		}
   1232 
   1233 		/*
   1234 		 * If we're out of space, disable receive interrupts
   1235 		 * until the queue has drained a bit.
   1236 		 */
   1237 		if (!cc) {
   1238 			SHREG_SCSCR &= ~SCSCR_RIE;
   1239 		}
   1240 	} else {
   1241 		if (SHREG_SCSSR & SCSSR_RDRF) {
   1242 			SHREG_SCSCR &= ~(SCSCR_TIE | SCSCR_RIE);
   1243 		}
   1244 	}
   1245 
   1246 #if 0
   1247 	msr = bus_space_read_1(iot, ioh, sci_msr);
   1248 	delta = msr ^ sc->sc_msr;
   1249 	sc->sc_msr = msr;
   1250 	if (ISSET(delta, sc->sc_msr_mask)) {
   1251 		SET(sc->sc_msr_delta, delta);
   1252 
   1253 		/*
   1254 		 * Pulse-per-second clock signal on edge of DCD?
   1255 		 */
   1256 		if (ISSET(delta, sc->sc_ppsmask)) {
   1257 			struct timeval tv;
   1258 			if (ISSET(msr, sc->sc_ppsmask) ==
   1259 			    sc->sc_ppsassert) {
   1260 				/* XXX nanotime() */
   1261 				microtime(&tv);
   1262 				TIMEVAL_TO_TIMESPEC(&tv,
   1263 						    &sc->ppsinfo.assert_timestamp);
   1264 				if (sc->ppsparam.mode & PPS_OFFSETASSERT) {
   1265 					timespecadd(&sc->ppsinfo.assert_timestamp,
   1266 						    &sc->ppsparam.assert_offset,
   1267 						    &sc->ppsinfo.assert_timestamp);
   1268 					TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.assert_timestamp);
   1269 				}
   1270 
   1271 #ifdef PPS_SYNC
   1272 				if (sc->ppsparam.mode & PPS_HARDPPSONASSERT)
   1273 					hardpps(&tv, tv.tv_usec);
   1274 #endif
   1275 				sc->ppsinfo.assert_sequence++;
   1276 				sc->ppsinfo.current_mode =
   1277 					sc->ppsparam.mode;
   1278 
   1279 			} else if (ISSET(msr, sc->sc_ppsmask) ==
   1280 				   sc->sc_ppsclear) {
   1281 				/* XXX nanotime() */
   1282 				microtime(&tv);
   1283 				TIMEVAL_TO_TIMESPEC(&tv,
   1284 						    &sc->ppsinfo.clear_timestamp);
   1285 				if (sc->ppsparam.mode & PPS_OFFSETCLEAR) {
   1286 					timespecadd(&sc->ppsinfo.clear_timestamp,
   1287 						    &sc->ppsparam.clear_offset,
   1288 						    &sc->ppsinfo.clear_timestamp);
   1289 					TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.clear_timestamp);
   1290 				}
   1291 
   1292 #ifdef PPS_SYNC
   1293 				if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR)
   1294 					hardpps(&tv, tv.tv_usec);
   1295 #endif
   1296 				sc->ppsinfo.clear_sequence++;
   1297 				sc->ppsinfo.current_mode =
   1298 					sc->ppsparam.mode;
   1299 			}
   1300 		}
   1301 
   1302 		/*
   1303 		 * Stop output immediately if we lose the output
   1304 		 * flow control signal or carrier detect.
   1305 		 */
   1306 		if (ISSET(~msr, sc->sc_msr_mask)) {
   1307 			sc->sc_tbc = 0;
   1308 			sc->sc_heldtbc = 0;
   1309 #ifdef SCI_DEBUG
   1310 			if (sci_debug)
   1311 				scistatus(sc, "sciintr  ");
   1312 #endif
   1313 		}
   1314 
   1315 		sc->sc_st_check = 1;
   1316 	}
   1317 #endif
   1318 
   1319 	/*
   1320 	 * Done handling any receive interrupts. See if data can be
   1321 	 * transmitted as well. Schedule tx done event if no data left
   1322 	 * and tty was marked busy.
   1323 	 */
   1324 	if ((SHREG_SCSSR & SCSSR_TDRE) != 0) {
   1325 		/*
   1326 		 * If we've delayed a parameter change, do it now, and restart
   1327 		 * output.
   1328 		 */
   1329 		if (sc->sc_heldchange) {
   1330 			sc->sc_heldchange = 0;
   1331 			sc->sc_tbc = sc->sc_heldtbc;
   1332 			sc->sc_heldtbc = 0;
   1333 		}
   1334 
   1335 		/* Output the next chunk of the contiguous buffer, if any. */
   1336 		if (sc->sc_tbc > 0) {
   1337 			sci_putc(*(sc->sc_tba));
   1338 			sc->sc_tba++;
   1339 			sc->sc_tbc--;
   1340 		} else {
   1341 			/* Disable transmit completion interrupts if necessary. */
   1342 #if 0
   1343 			if (ISSET(sc->sc_ier, IER_ETXRDY))
   1344 #endif
   1345 				SHREG_SCSCR &= ~SCSCR_TIE;
   1346 
   1347 			if (sc->sc_tx_busy) {
   1348 				sc->sc_tx_busy = 0;
   1349 				sc->sc_tx_done = 1;
   1350 			}
   1351 		}
   1352 	}
   1353 
   1354 	/* Wake up the poller. */
   1355 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
   1356 	softintr_schedule(sc->sc_si);
   1357 #else
   1358 #ifndef __NO_SOFT_SERIAL_INTERRUPT
   1359 	setsoftserial();
   1360 #else
   1361 	if (!sci_softintr_scheduled) {
   1362 		sci_softintr_scheduled = 1;
   1363 		callout_reset(&sci_soft_ch, 1, scisoft, 1);
   1364 	}
   1365 #endif
   1366 #endif
   1367 
   1368 #if NRND > 0 && defined(RND_SCI)
   1369 	rnd_add_uint32(&sc->rnd_source, iir | lsr);
   1370 #endif
   1371 
   1372 	return (1);
   1373 }
   1374 
   1375 void
   1376 scicnprobe(cp)
   1377 	struct consdev *cp;
   1378 {
   1379 	int maj;
   1380 
   1381 	/* locate the major number */
   1382 	for (maj = 0; maj < nchrdev; maj++)
   1383 		if (cdevsw[maj].d_open == sciopen)
   1384 			break;
   1385 
   1386 	/* Initialize required fields. */
   1387 	cp->cn_dev = makedev(maj, 0);
   1388 #ifdef SCICONSOLE
   1389 	cp->cn_pri = CN_REMOTE;
   1390 #else
   1391 	cp->cn_pri = CN_NORMAL;
   1392 #endif
   1393 }
   1394 
   1395 void
   1396 scicninit(struct consdev *cp)
   1397 {
   1398 
   1399 	InitializeSci(scicn_speed);
   1400 	sciisconsole = 1;
   1401 }
   1402 
   1403 int
   1404 scicngetc(dev_t dev)
   1405 {
   1406 	int c;
   1407 	int s;
   1408 
   1409 	s = splserial();
   1410 	c = sci_getc();
   1411 	splx(s);
   1412 
   1413 	return (c);
   1414 }
   1415 
   1416 void
   1417 scicnputc(dev_t dev, int c)
   1418 {
   1419 	int s;
   1420 
   1421 	s = splserial();
   1422 	sci_putc((u_char)c);
   1423 	splx(s);
   1424 }
   1425