sci.c revision 1.2
1 /* $NetBSD: sci.c,v 1.2 1999/09/13 19:13:09 msaitoh Exp $ */ 2 3 /*- 4 * Copyright (C) 1999 T.Horiuchi and SAITOH Masanobu. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 /*- 30 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. 31 * All rights reserved. 32 * 33 * This code is derived from software contributed to The NetBSD Foundation 34 * by Charles M. Hannum. 35 * 36 * Redistribution and use in source and binary forms, with or without 37 * modification, are permitted provided that the following conditions 38 * are met: 39 * 1. Redistributions of source code must retain the above copyright 40 * notice, this list of conditions and the following disclaimer. 41 * 2. Redistributions in binary form must reproduce the above copyright 42 * notice, this list of conditions and the following disclaimer in the 43 * documentation and/or other materials provided with the distribution. 44 * 3. All advertising materials mentioning features or use of this software 45 * must display the following acknowledgement: 46 * This product includes software developed by the NetBSD 47 * Foundation, Inc. and its contributors. 48 * 4. Neither the name of The NetBSD Foundation nor the names of its 49 * contributors may be used to endorse or promote products derived 50 * from this software without specific prior written permission. 51 * 52 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 53 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 54 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 55 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 56 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 57 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 58 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 59 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 60 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 61 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 62 * POSSIBILITY OF SUCH DAMAGE. 63 */ 64 65 /* 66 * Copyright (c) 1991 The Regents of the University of California. 67 * All rights reserved. 68 * 69 * Redistribution and use in source and binary forms, with or without 70 * modification, are permitted provided that the following conditions 71 * are met: 72 * 1. Redistributions of source code must retain the above copyright 73 * notice, this list of conditions and the following disclaimer. 74 * 2. Redistributions in binary form must reproduce the above copyright 75 * notice, this list of conditions and the following disclaimer in the 76 * documentation and/or other materials provided with the distribution. 77 * 3. All advertising materials mentioning features or use of this software 78 * must display the following acknowledgement: 79 * This product includes software developed by the University of 80 * California, Berkeley and its contributors. 81 * 4. Neither the name of the University nor the names of its contributors 82 * may be used to endorse or promote products derived from this software 83 * without specific prior written permission. 84 * 85 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 86 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 87 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 88 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 89 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 90 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 91 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 92 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 93 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 94 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 95 * SUCH DAMAGE. 96 * 97 * @(#)com.c 7.5 (Berkeley) 5/16/91 98 */ 99 100 /* 101 * SH internal serial driver 102 * 103 * This code is derived from both z8530tty.c and com.c 104 */ 105 106 #include "opt_pclock.h" 107 #include "opt_sci.h" 108 109 #include <sys/param.h> 110 #include <sys/systm.h> 111 #include <sys/tty.h> 112 #include <sys/proc.h> 113 #include <sys/conf.h> 114 #include <sys/file.h> 115 #include <sys/syslog.h> 116 #include <sys/kernel.h> 117 #include <sys/device.h> 118 #include <sys/malloc.h> 119 120 #include <dev/cons.h> 121 122 #include <machine/cpu.h> 123 #include <sh3/scireg.h> 124 #include <sh3/tmureg.h> 125 126 #include <machine/shbvar.h> 127 128 static void scistart __P((struct tty *)); 129 static int sciparam __P((struct tty *, struct termios *)); 130 131 void scicnprobe __P((struct consdev *)); 132 void scicninit __P((struct consdev *)); 133 void scicnputc __P((dev_t, int)); 134 int scicngetc __P((dev_t)); 135 void scicnpoolc __P((dev_t, int)); 136 int sciintr __P((void *)); 137 138 struct sci_softc { 139 struct device sc_dev; /* boilerplate */ 140 struct tty *sc_tty; 141 void *sc_ih; 142 143 #if 0 144 bus_space_tag_t sc_iot; /* ISA i/o space identifier */ 145 bus_space_handle_t sc_ioh; /* ISA io handle */ 146 147 int sc_drq; 148 149 int sc_frequency; 150 #endif 151 152 u_int sc_overflows, 153 sc_floods, 154 sc_errors; /* number of retries so far */ 155 u_char sc_status[7]; /* copy of registers */ 156 157 int sc_hwflags; 158 int sc_swflags; 159 u_int sc_fifolen; /* XXX always 0? */ 160 161 u_int sc_r_hiwat, 162 sc_r_lowat; 163 u_char *volatile sc_rbget, 164 *volatile sc_rbput; 165 volatile u_int sc_rbavail; 166 u_char *sc_rbuf, 167 *sc_ebuf; 168 169 u_char *sc_tba; /* transmit buffer address */ 170 u_int sc_tbc, /* transmit byte count */ 171 sc_heldtbc; 172 173 volatile u_char sc_rx_flags, /* receiver blocked */ 174 #define RX_TTY_BLOCKED 0x01 175 #define RX_TTY_OVERFLOWED 0x02 176 #define RX_IBUF_BLOCKED 0x04 177 #define RX_IBUF_OVERFLOWED 0x08 178 #define RX_ANY_BLOCK 0x0f 179 sc_tx_busy, /* working on an output chunk */ 180 sc_tx_done, /* done with one output chunk */ 181 sc_tx_stopped, /* H/W level stop (lost CTS) */ 182 sc_st_check, /* got a status interrupt */ 183 sc_rx_ready; 184 185 volatile u_char sc_heldchange; 186 }; 187 188 /* controller driver configuration */ 189 static int sci_match __P((struct device *, struct cfdata *, void *)); 190 static void sci_attach __P((struct device *, struct device *, void *)); 191 192 void sci_iflush __P((struct sci_softc *)); 193 194 #define integrate static inline 195 #ifdef __GENERIC_SOFT_INTERRUPTS 196 void scisoft __P((void *)); 197 #else 198 #ifndef __NO_SOFT_SERIAL_INTERRUPT 199 void scisoft __P((void)); 200 #else 201 void scisoft __P((void *)); 202 #endif 203 #endif 204 integrate void sci_rxsoft __P((struct sci_softc *, struct tty *)); 205 integrate void sci_txsoft __P((struct sci_softc *, struct tty *)); 206 integrate void sci_stsoft __P((struct sci_softc *, struct tty *)); 207 integrate void sci_schedrx __P((struct sci_softc *)); 208 void scidiag __P((void *)); 209 210 #define SCIUNIT_MASK 0x7ffff 211 #define SCIDIALOUT_MASK 0x80000 212 213 #define SCIUNIT(x) (minor(x) & SCIUNIT_MASK) 214 #define SCIDIALOUT(x) (minor(x) & SCIDIALOUT_MASK) 215 216 /* Macros to clear/set/test flags. */ 217 #define SET(t, f) (t) |= (f) 218 #define CLR(t, f) (t) &= ~(f) 219 #define ISSET(t, f) ((t) & (f)) 220 221 /* Hardware flag masks */ 222 #define SCI_HW_NOIEN 0x01 223 #define SCI_HW_FIFO 0x02 224 #define SCI_HW_FLOW 0x08 225 #define SCI_HW_DEV_OK 0x20 226 #define SCI_HW_CONSOLE 0x40 227 #define SCI_HW_KGDB 0x80 228 229 /* Buffer size for character buffer */ 230 #define SCI_RING_SIZE 2048 231 232 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 233 u_int sci_rbuf_hiwat = (SCI_RING_SIZE * 1) / 4; 234 u_int sci_rbuf_lowat = (SCI_RING_SIZE * 3) / 4; 235 236 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 237 int sciconscflag = CONMODE; 238 239 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 240 241 #ifndef __GENERIC_SOFT_INTERRUPTS 242 #ifdef __NO_SOFT_SERIAL_INTERRUPT 243 volatile int sci_softintr_scheduled; 244 #endif 245 #endif 246 247 u_int sci_rbuf_size = SCI_RING_SIZE; 248 249 struct cfattach sci_ca = { 250 sizeof(struct sci_softc), sci_match, sci_attach 251 }; 252 253 extern struct cfdriver sci_cd; 254 255 cdev_decl(sci); 256 257 void InitializeSci __P((unsigned int)); 258 259 /* 260 * following functions are debugging prupose only 261 */ 262 #define CR 0x0D 263 #define I2C_ADRS (*(volatile unsigned int *)0xa8000000) 264 #define USART_ON (unsigned int)~0x08 265 266 static void WaitFor __P((int)); 267 void PutcSci __P((unsigned char)); 268 void PutStrSci __P((unsigned char *)); 269 int SciErrCheck __P((void)); 270 unsigned char GetcSci __P((void)); 271 int GetStrSci __P((unsigned char *, int)); 272 273 /* 274 * WaitFor 275 * : int mSec; 276 */ 277 static void 278 WaitFor(mSec) 279 int mSec; 280 { 281 282 /* using clock = Internal RTC */ 283 SHREG_TMU.TOCR.BYTE = 0x01; 284 285 /* Disable Under Flow interrupt, rising edge, 1/4 */ 286 SHREG_TMU.TCR0.WORD = 0x0000; 287 288 /* Set counter value (count down with 4 KHz) */ 289 SHREG_TMU.TCNT0 = mSec * 4; 290 291 /* start Channel0 */ 292 SHREG_TMU.TSTR.BYTE |= TSTR_STR0; 293 294 /* wait for under flag ON of channel0 */ 295 while ((SHREG_TMU.TCR0.WORD & 0x0100) == 0) 296 ; 297 298 /* stop channel0 */ 299 SHREG_TMU.TSTR.BYTE &= ~TSTR_STR0; 300 } 301 302 /* 303 * InitializeSci 304 * : unsigned int bps; 305 * : SCI(Serial Communication Interface) 306 */ 307 308 void 309 InitializeSci(bps) 310 unsigned int bps; 311 { 312 SH3SCSCR scr; 313 SH3SCSMR smr; 314 315 /* Initialize SCR */ 316 scr.BYTE = 0; 317 SHREG_SCSCR = scr.BYTE; 318 319 /*Serial Mode Register */ 320 smr.BYTE = 0; /*Async,8bit,NonParity,Even,1Stop,NoMulti */ 321 SHREG_SCSMR = smr.BYTE; 322 323 /*Bit Rate Register */ 324 SHREG_SCBRR = divrnd(PCLOCK, 32 * bps) -1; 325 326 /*wait 1mSec, because Send/Recv must begin 1 bit period after BRR is set. */ 327 WaitFor(1); 328 329 /* Send permission, Recieve permission ON */ 330 scr.BIT.TE =1; 331 scr.BIT.RE =1; 332 SHREG_SCSCR = scr.BYTE; 333 334 /*Serial Status Register */ 335 SHREG_SCSSR &= SCSSR_TDRE; /* Clear Status */ 336 337 #if 0 338 I2C_ADRS &= ~0x08; /* enable RS-232C */ 339 #endif 340 } 341 342 343 /* 344 * PutcSci 345 * : unsigned char c; 346 */ 347 void 348 PutcSci(c) 349 unsigned char c; 350 { 351 352 /* wait for ready */ 353 while ((SHREG_SCSSR & SCSSR_TDRE) == NULL) 354 ; 355 356 /* write send data to send register */ 357 SHREG_SCTDR = c; 358 359 /* clear ready flag */ 360 SHREG_SCSSR &= ~SCSSR_TDRE; 361 362 if (c == '\n'){ 363 while ((SHREG_SCSSR & SCSSR_TDRE) == NULL) 364 ; 365 366 SHREG_SCTDR = '\r'; 367 368 SHREG_SCSSR &= ~SCSSR_TDRE; 369 } 370 } 371 372 /* 373 * PutStrSci 374 * : unsigned char *s; 375 */ 376 void 377 PutStrSci(s) 378 unsigned char *s; 379 { 380 #if 0 381 static int SciInit = 0; 382 if (SciInit == 0) { 383 InitializeSci(SCICN_SPEED); 384 SciInit = 1; 385 } 386 #endif 387 388 while (*s) 389 PutcSci(*s++); 390 } 391 392 /* 393 * : SciErrCheck 394 * 0x20 = over run 395 * 0x10 = frame error 396 * 0x80 = parity error 397 */ 398 int 399 SciErrCheck(void) 400 { 401 402 return(SHREG_SCSSR & (SCSSR_ORER | SCSSR_FER | SCSSR_PER)); 403 } 404 405 /* 406 * GetcSci 407 */ 408 unsigned char 409 GetcSci(void) 410 { 411 unsigned char c, err_c; 412 413 while (((err_c = SHREG_SCSSR) 414 & (SCSSR_RDRF | SCSSR_ORER | SCSSR_FER | SCSSR_PER)) == 0) 415 ; 416 if ((err_c & (SCSSR_ORER | SCSSR_FER | SCSSR_PER)) != 0) 417 return(err_c |= 0x80); 418 419 c = SHREG_SCRDR; 420 421 SHREG_SCSSR &= ~SCSSR_RDRF; 422 423 return(c); 424 } 425 426 /* 427 * GetStrSci 428 * : unsigned char *s; 429 * : int size; 430 */ 431 int 432 GetStrSci(s, size) 433 unsigned char *s; 434 int size; 435 { 436 437 for(; size ; size--){ 438 *s = GetcSci(); 439 if (*s & 0x80) 440 return -1; 441 if (*s == CR){ 442 *s = 0; 443 break; 444 } 445 s++; 446 } 447 if (size == 0) 448 *s = 0; 449 return 0; 450 } 451 452 #if 0 453 #define SCI_MAX_UNITS 2 454 #else 455 #define SCI_MAX_UNITS 1 456 #endif 457 458 459 static int 460 sci_match(parent, cfp, aux) 461 struct device *parent; 462 struct cfdata *cfp; 463 void *aux; 464 { 465 #if 0 466 struct shb_attach_args *ia = aux; 467 #endif 468 469 if (strcmp(cfp->cf_driver->cd_name, "sci") 470 || cfp->cf_unit >= SCI_MAX_UNITS) 471 return 0; 472 473 return 1; 474 } 475 476 static void 477 sci_attach(parent, self, aux) 478 struct device *parent, *self; 479 void *aux; 480 { 481 struct sci_softc *sc = (struct sci_softc *)self; 482 struct tty *tp; 483 int irq; 484 struct shb_attach_args *ia = aux; 485 486 sc->sc_hwflags = 0; /* XXX */ 487 sc->sc_swflags = 0; /* XXX */ 488 sc->sc_fifolen = 0; /* XXX */ 489 490 irq = ia->ia_irq; 491 492 SET(sc->sc_hwflags, SCI_HW_DEV_OK); 493 SET(sc->sc_hwflags, SCI_HW_CONSOLE); 494 495 #if 0 496 if (irq != IRQUNK) { 497 sc->sc_ih = shb_intr_establish(irq, 498 IST_EDGE, IPL_SERIAL, sciintr, sc); 499 } 500 #else 501 if (irq != IRQUNK) { 502 sc->sc_ih = shb_intr_establish(SCI_IRQ, 503 IST_EDGE, IPL_SERIAL, sciintr, sc); 504 } 505 #endif 506 507 printf("\n"); 508 509 printf("%s: console\n", sc->sc_dev.dv_xname); 510 511 tp = ttymalloc(); 512 tp->t_oproc = scistart; 513 tp->t_param = sciparam; 514 tp->t_hwiflow = NULL; 515 516 sc->sc_tty = tp; 517 sc->sc_rbuf = malloc(sci_rbuf_size << 1, M_DEVBUF, M_NOWAIT); 518 if (sc->sc_rbuf == NULL) { 519 printf("%s: unable to allocate ring buffer\n", 520 sc->sc_dev.dv_xname); 521 return; 522 } 523 sc->sc_ebuf = sc->sc_rbuf + (sci_rbuf_size << 1); 524 525 tty_attach(tp); 526 } 527 528 /* 529 * Start or restart transmission. 530 */ 531 static void 532 scistart(tp) 533 struct tty *tp; 534 { 535 struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(tp->t_dev)]; 536 int s; 537 538 s = spltty(); 539 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 540 goto out; 541 if (sc->sc_tx_stopped) 542 goto out; 543 544 if (tp->t_outq.c_cc <= tp->t_lowat) { 545 if (ISSET(tp->t_state, TS_ASLEEP)) { 546 CLR(tp->t_state, TS_ASLEEP); 547 wakeup(&tp->t_outq); 548 } 549 selwakeup(&tp->t_wsel); 550 if (tp->t_outq.c_cc == 0) 551 goto out; 552 } 553 554 /* Grab the first contiguous region of buffer space. */ 555 { 556 u_char *tba; 557 int tbc; 558 559 tba = tp->t_outq.c_cf; 560 tbc = ndqb(&tp->t_outq, 0); 561 562 (void)splserial(); 563 564 sc->sc_tba = tba; 565 sc->sc_tbc = tbc; 566 } 567 568 SET(tp->t_state, TS_BUSY); 569 sc->sc_tx_busy = 1; 570 571 /* Enable transmit completion interrupts if necessary. */ 572 SHREG_SCSCR |= SCSCR_TIE | SCSCR_RIE; 573 574 /* Output the first byte of the contiguous buffer. */ 575 { 576 if (sc->sc_tbc > 0) { 577 PutcSci(*(sc->sc_tba)); 578 sc->sc_tba++; 579 sc->sc_tbc--; 580 } 581 } 582 out: 583 splx(s); 584 return; 585 } 586 587 /* 588 * Set SCI tty parameters from termios. 589 * XXX - Should just copy the whole termios after 590 * making sure all the changes could be done. 591 */ 592 static int 593 sciparam(tp, t) 594 struct tty *tp; 595 struct termios *t; 596 { 597 struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(tp->t_dev)]; 598 int ospeed = t->c_ospeed; 599 int s; 600 601 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 602 return (EIO); 603 604 /* Check requested parameters. */ 605 if (ospeed < 0) 606 return (EINVAL); 607 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 608 return (EINVAL); 609 610 /* 611 * For the console, always force CLOCAL and !HUPCL, so that the port 612 * is always active. 613 */ 614 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 615 ISSET(sc->sc_hwflags, SCI_HW_CONSOLE)) { 616 SET(t->c_cflag, CLOCAL); 617 CLR(t->c_cflag, HUPCL); 618 } 619 620 /* 621 * If there were no changes, don't do anything. This avoids dropping 622 * input and improves performance when all we did was frob things like 623 * VMIN and VTIME. 624 */ 625 if (tp->t_ospeed == t->c_ospeed && 626 tp->t_cflag == t->c_cflag) 627 return (0); 628 629 #if 0 630 /* XXX (msaitoh) */ 631 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 632 #endif 633 634 s = splserial(); 635 636 /* 637 * Set the FIFO threshold based on the receive speed. 638 * 639 * * If it's a low speed, it's probably a mouse or some other 640 * interactive device, so set the threshold low. 641 * * If it's a high speed, trim the trigger level down to prevent 642 * overflows. 643 * * Otherwise set it a bit higher. 644 */ 645 #if 0 646 /* XXX (msaitoh) */ 647 if (ISSET(sc->sc_hwflags, SCI_HW_HAYESP)) 648 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 649 else if (ISSET(sc->sc_hwflags, SCI_HW_FIFO)) 650 sc->sc_fifo = FIFO_ENABLE | 651 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : 652 t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4); 653 else 654 sc->sc_fifo = 0; 655 #endif 656 657 /* And copy to tty. */ 658 tp->t_ispeed = 0; 659 tp->t_ospeed = t->c_ospeed; 660 tp->t_cflag = t->c_cflag; 661 662 if (!sc->sc_heldchange) { 663 if (sc->sc_tx_busy) { 664 sc->sc_heldtbc = sc->sc_tbc; 665 sc->sc_tbc = 0; 666 sc->sc_heldchange = 1; 667 } 668 #if 0 669 /* XXX (msaitoh) */ 670 else 671 sci_loadchannelregs(sc); 672 #endif 673 } 674 675 if (!ISSET(t->c_cflag, CHWFLOW)) { 676 /* Disable the high water mark. */ 677 sc->sc_r_hiwat = 0; 678 sc->sc_r_lowat = 0; 679 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 680 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 681 sci_schedrx(sc); 682 } 683 } else { 684 sc->sc_r_hiwat = sci_rbuf_hiwat; 685 sc->sc_r_lowat = sci_rbuf_lowat; 686 } 687 688 splx(s); 689 690 #ifdef SCI_DEBUG 691 if (sci_debug) 692 scistatus(sc, "sciparam "); 693 #endif 694 695 if (!ISSET(t->c_cflag, CHWFLOW)) { 696 if (sc->sc_tx_stopped) { 697 sc->sc_tx_stopped = 0; 698 scistart(tp); 699 } 700 } 701 702 return (0); 703 } 704 705 void 706 sci_iflush(sc) 707 struct sci_softc *sc; 708 { 709 unsigned char err_c; 710 volatile unsigned char c; 711 712 if (((err_c = SHREG_SCSSR) 713 & (SCSSR_RDRF | SCSSR_ORER | SCSSR_FER | SCSSR_PER)) != 0) { 714 715 if ((err_c & (SCSSR_ORER | SCSSR_FER | SCSSR_PER)) != 0) 716 return; 717 718 c = SHREG_SCRDR; 719 720 SHREG_SCSSR &= ~SCSSR_RDRF; 721 } 722 } 723 724 int sci_getc __P((void)); 725 void sci_putc __P((int)); 726 727 int 728 sci_getc() 729 { 730 731 return (GetcSci()); 732 } 733 734 void 735 sci_putc(int c) 736 { 737 738 PutcSci(c); 739 } 740 741 int 742 sciopen(dev, flag, mode, p) 743 dev_t dev; 744 int flag, mode; 745 struct proc *p; 746 { 747 int unit = SCIUNIT(dev); 748 struct sci_softc *sc; 749 struct tty *tp; 750 int s, s2; 751 int error; 752 753 if (unit >= sci_cd.cd_ndevs) 754 return (ENXIO); 755 sc = sci_cd.cd_devs[unit]; 756 if (sc == 0 || !ISSET(sc->sc_hwflags, SCI_HW_DEV_OK) || 757 sc->sc_rbuf == NULL) 758 return (ENXIO); 759 760 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 761 return (ENXIO); 762 763 #ifdef KGDB 764 /* 765 * If this is the kgdb port, no other use is permitted. 766 */ 767 if (ISSET(sc->sc_hwflags, SCI_HW_KGDB)) 768 return (EBUSY); 769 #endif 770 771 tp = sc->sc_tty; 772 773 if (ISSET(tp->t_state, TS_ISOPEN) && 774 ISSET(tp->t_state, TS_XCLUDE) && 775 p->p_ucred->cr_uid != 0) 776 return (EBUSY); 777 778 s = spltty(); 779 780 /* 781 * Do the following iff this is a first open. 782 */ 783 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 784 struct termios t; 785 786 tp->t_dev = dev; 787 788 s2 = splserial(); 789 790 /* Turn on interrupts. */ 791 SHREG_SCSCR |= SCSCR_TIE | SCSCR_RIE; 792 793 splx(s2); 794 795 /* 796 * Initialize the termios status to the defaults. Add in the 797 * sticky bits from TIOCSFLAGS. 798 */ 799 t.c_ispeed = 0; 800 if (ISSET(sc->sc_hwflags, SCI_HW_CONSOLE)) { 801 t.c_ospeed = SCICN_SPEED; 802 t.c_cflag = sciconscflag; 803 } else { 804 t.c_ospeed = TTYDEF_SPEED; 805 t.c_cflag = TTYDEF_CFLAG; 806 } 807 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 808 SET(t.c_cflag, CLOCAL); 809 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 810 SET(t.c_cflag, CRTSCTS); 811 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 812 SET(t.c_cflag, MDMBUF); 813 /* Make sure sciparam() will do something. */ 814 tp->t_ospeed = 0; 815 (void) sciparam(tp, &t); 816 tp->t_iflag = TTYDEF_IFLAG; 817 tp->t_oflag = TTYDEF_OFLAG; 818 tp->t_lflag = TTYDEF_LFLAG; 819 ttychars(tp); 820 ttsetwater(tp); 821 822 s2 = splserial(); 823 824 /* Clear the input ring, and unblock. */ 825 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 826 sc->sc_rbavail = sci_rbuf_size; 827 sci_iflush(sc); 828 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 829 #if 0 830 /* XXX (msaitoh) */ 831 sci_hwiflow(sc); 832 #endif 833 834 #ifdef SCI_DEBUG 835 if (sci_debug) 836 scistatus(sc, "sciopen "); 837 #endif 838 839 splx(s2); 840 } 841 842 splx(s); 843 844 error = ttyopen(tp, SCIDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 845 if (error) 846 goto bad; 847 848 error = (*linesw[tp->t_line].l_open)(dev, tp); 849 if (error) 850 goto bad; 851 852 return (0); 853 854 bad: 855 856 return (error); 857 } 858 859 int 860 sciclose(dev, flag, mode, p) 861 dev_t dev; 862 int flag, mode; 863 struct proc *p; 864 { 865 struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)]; 866 struct tty *tp = sc->sc_tty; 867 868 /* XXX This is for cons.c. */ 869 if (!ISSET(tp->t_state, TS_ISOPEN)) 870 return (0); 871 872 (*linesw[tp->t_line].l_close)(tp, flag); 873 ttyclose(tp); 874 875 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 876 return (0); 877 878 return (0); 879 } 880 881 int 882 sciread(dev, uio, flag) 883 dev_t dev; 884 struct uio *uio; 885 int flag; 886 { 887 struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)]; 888 struct tty *tp = sc->sc_tty; 889 890 return ((*linesw[tp->t_line].l_read)(tp, uio, flag)); 891 } 892 893 int 894 sciwrite(dev, uio, flag) 895 dev_t dev; 896 struct uio *uio; 897 int flag; 898 { 899 struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)]; 900 struct tty *tp = sc->sc_tty; 901 902 return ((*linesw[tp->t_line].l_write)(tp, uio, flag)); 903 } 904 905 struct tty * 906 scitty(dev) 907 dev_t dev; 908 { 909 struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)]; 910 struct tty *tp = sc->sc_tty; 911 912 return (tp); 913 } 914 915 int 916 sciioctl(dev, cmd, data, flag, p) 917 dev_t dev; 918 u_long cmd; 919 caddr_t data; 920 int flag; 921 struct proc *p; 922 { 923 struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)]; 924 struct tty *tp = sc->sc_tty; 925 int error; 926 int s; 927 928 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 929 return (EIO); 930 931 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p); 932 if (error >= 0) 933 return (error); 934 935 error = ttioctl(tp, cmd, data, flag, p); 936 if (error >= 0) 937 return (error); 938 939 error = 0; 940 941 s = splserial(); 942 943 switch (cmd) { 944 #if 0 945 case TIOCSBRK: 946 scif_break(sc, 1); 947 break; 948 949 case TIOCCBRK: 950 scif_break(sc, 0); 951 break; 952 #endif 953 case TIOCGFLAGS: 954 *(int *)data = sc->sc_swflags; 955 break; 956 957 case TIOCSFLAGS: 958 error = suser(p->p_ucred, &p->p_acflag); 959 if (error) 960 break; 961 sc->sc_swflags = *(int *)data; 962 break; 963 964 default: 965 error = ENOTTY; 966 break; 967 } 968 969 splx(s); 970 971 return (error); 972 } 973 974 integrate void 975 sci_schedrx(sc) 976 struct sci_softc *sc; 977 { 978 979 sc->sc_rx_ready = 1; 980 981 /* Wake up the poller. */ 982 #ifdef __GENERIC_SOFT_INTERRUPTS 983 softintr_schedule(sc->sc_si); 984 #else 985 #ifndef __NO_SOFT_SERIAL_INTERRUPT 986 setsoftserial(); 987 #else 988 if (!sci_softintr_scheduled) { 989 sci_softintr_scheduled = 1; 990 timeout(scisoft, NULL, 1); 991 } 992 #endif 993 #endif 994 } 995 996 /* 997 * Stop output, e.g., for ^S or output flush. 998 */ 999 void 1000 scistop(tp, flag) 1001 struct tty *tp; 1002 int flag; 1003 { 1004 struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(tp->t_dev)]; 1005 int s; 1006 1007 s = splserial(); 1008 if (ISSET(tp->t_state, TS_BUSY)) { 1009 /* Stop transmitting at the next chunk. */ 1010 sc->sc_tbc = 0; 1011 sc->sc_heldtbc = 0; 1012 if (!ISSET(tp->t_state, TS_TTSTOP)) 1013 SET(tp->t_state, TS_FLUSH); 1014 } 1015 splx(s); 1016 } 1017 1018 void 1019 scidiag(arg) 1020 void *arg; 1021 { 1022 struct sci_softc *sc = arg; 1023 int overflows, floods; 1024 int s; 1025 1026 s = splserial(); 1027 overflows = sc->sc_overflows; 1028 sc->sc_overflows = 0; 1029 floods = sc->sc_floods; 1030 sc->sc_floods = 0; 1031 sc->sc_errors = 0; 1032 splx(s); 1033 1034 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1035 sc->sc_dev.dv_xname, 1036 overflows, overflows == 1 ? "" : "s", 1037 floods, floods == 1 ? "" : "s"); 1038 } 1039 1040 integrate void 1041 sci_rxsoft(sc, tp) 1042 struct sci_softc *sc; 1043 struct tty *tp; 1044 { 1045 int (*rint) __P((int c, struct tty *tp)) = linesw[tp->t_line].l_rint; 1046 u_char *get, *end; 1047 u_int cc, scc; 1048 u_char ssr; 1049 int code; 1050 int s; 1051 1052 end = sc->sc_ebuf; 1053 get = sc->sc_rbget; 1054 scc = cc = sci_rbuf_size - sc->sc_rbavail; 1055 1056 if (cc == sci_rbuf_size) { 1057 sc->sc_floods++; 1058 if (sc->sc_errors++ == 0) 1059 timeout(scidiag, sc, 60 * hz); 1060 } 1061 1062 while (cc) { 1063 code = get[0]; 1064 ssr = get[1]; 1065 if (ISSET(ssr, SCSSR_FER | SCSSR_PER)) { 1066 if (ISSET(ssr, SCSSR_FER)) 1067 SET(code, TTY_FE); 1068 if (ISSET(ssr, SCSSR_PER)) 1069 SET(code, TTY_PE); 1070 } 1071 if ((*rint)(code, tp) == -1) { 1072 /* 1073 * The line discipline's buffer is out of space. 1074 */ 1075 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1076 /* 1077 * We're either not using flow control, or the 1078 * line discipline didn't tell us to block for 1079 * some reason. Either way, we have no way to 1080 * know when there's more space available, so 1081 * just drop the rest of the data. 1082 */ 1083 get += cc << 1; 1084 if (get >= end) 1085 get -= sci_rbuf_size << 1; 1086 cc = 0; 1087 } else { 1088 /* 1089 * Don't schedule any more receive processing 1090 * until the line discipline tells us there's 1091 * space available (through scihwiflow()). 1092 * Leave the rest of the data in the input 1093 * buffer. 1094 */ 1095 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1096 } 1097 break; 1098 } 1099 get += 2; 1100 if (get >= end) 1101 get = sc->sc_rbuf; 1102 cc--; 1103 } 1104 1105 if (cc != scc) { 1106 sc->sc_rbget = get; 1107 s = splserial(); 1108 cc = sc->sc_rbavail += scc - cc; 1109 /* Buffers should be ok again, release possible block. */ 1110 if (cc >= sc->sc_r_lowat) { 1111 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1112 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1113 SHREG_SCSCR |= SCSCR_RIE; 1114 } 1115 #if 0 1116 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1117 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1118 sci_hwiflow(sc); 1119 } 1120 #endif 1121 } 1122 splx(s); 1123 } 1124 } 1125 1126 integrate void 1127 sci_txsoft(sc, tp) 1128 struct sci_softc *sc; 1129 struct tty *tp; 1130 { 1131 1132 CLR(tp->t_state, TS_BUSY); 1133 if (ISSET(tp->t_state, TS_FLUSH)) 1134 CLR(tp->t_state, TS_FLUSH); 1135 else 1136 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1137 (*linesw[tp->t_line].l_start)(tp); 1138 } 1139 1140 integrate void 1141 sci_stsoft(sc, tp) 1142 struct sci_softc *sc; 1143 struct tty *tp; 1144 { 1145 #if 0 1146 /* XXX (msaitoh) */ 1147 u_char msr, delta; 1148 int s; 1149 1150 s = splserial(); 1151 msr = sc->sc_msr; 1152 delta = sc->sc_msr_delta; 1153 sc->sc_msr_delta = 0; 1154 splx(s); 1155 1156 if (ISSET(delta, sc->sc_msr_dcd)) { 1157 /* 1158 * Inform the tty layer that carrier detect changed. 1159 */ 1160 (void) (*linesw[tp->t_line].l_modem)(tp, ISSET(msr, MSR_DCD)); 1161 } 1162 1163 if (ISSET(delta, sc->sc_msr_cts)) { 1164 /* Block or unblock output according to flow control. */ 1165 if (ISSET(msr, sc->sc_msr_cts)) { 1166 sc->sc_tx_stopped = 0; 1167 (*linesw[tp->t_line].l_start)(tp); 1168 } else { 1169 sc->sc_tx_stopped = 1; 1170 } 1171 } 1172 1173 #ifdef SCI_DEBUG 1174 if (sci_debug) 1175 scistatus(sc, "sci_stsoft"); 1176 #endif 1177 #endif 1178 } 1179 1180 #ifdef __GENERIC_SOFT_INTERRUPTS 1181 void 1182 scisoft(arg) 1183 void *arg; 1184 { 1185 struct sci_softc *sc = arg; 1186 struct tty *tp; 1187 1188 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 1189 return; 1190 1191 { 1192 #else 1193 void 1194 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1195 scisoft() 1196 #else 1197 scisoft(arg) 1198 void *arg; 1199 #endif 1200 { 1201 struct sci_softc *sc; 1202 struct tty *tp; 1203 int unit; 1204 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1205 int s; 1206 1207 s = splsoftserial(); 1208 sci_softintr_scheduled = 0; 1209 #endif 1210 1211 for (unit = 0; unit < sci_cd.cd_ndevs; unit++) { 1212 sc = sci_cd.cd_devs[unit]; 1213 if (sc == NULL || !ISSET(sc->sc_hwflags, SCI_HW_DEV_OK)) 1214 continue; 1215 1216 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 1217 continue; 1218 1219 tp = sc->sc_tty; 1220 if (tp == NULL) 1221 continue; 1222 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) 1223 continue; 1224 #endif 1225 tp = sc->sc_tty; 1226 1227 if (sc->sc_rx_ready) { 1228 sc->sc_rx_ready = 0; 1229 sci_rxsoft(sc, tp); 1230 } 1231 1232 #if 0 1233 if (sc->sc_st_check) { 1234 sc->sc_st_check = 0; 1235 sci_stsoft(sc, tp); 1236 } 1237 #endif 1238 1239 if (sc->sc_tx_done) { 1240 sc->sc_tx_done = 0; 1241 sci_txsoft(sc, tp); 1242 } 1243 } 1244 1245 #ifndef __GENERIC_SOFT_INTERRUPTS 1246 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1247 splx(s); 1248 #endif 1249 #endif 1250 } 1251 1252 int 1253 sciintr(arg) 1254 void *arg; 1255 { 1256 struct sci_softc *sc = arg; 1257 u_char *put, *end; 1258 u_int cc; 1259 u_short ssr; 1260 1261 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 1262 return (0); 1263 1264 end = sc->sc_ebuf; 1265 put = sc->sc_rbput; 1266 cc = sc->sc_rbavail; 1267 1268 do { 1269 1270 ssr = SHREG_SCSSR; 1271 #if defined(DDB) || defined(KGDB) 1272 if (ISSET(ssr, SCSSR_BRK)) { 1273 #ifdef DDB 1274 if (ISSET(sc->sc_hwflags, SCI_HW_CONSOLE)) { 1275 console_debugger(); 1276 continue; 1277 } 1278 #endif 1279 #ifdef KGDB 1280 if (ISSET(sc->sc_hwflags, SCI_HW_KGDB)) { 1281 kgdb_connect(1); 1282 continue; 1283 } 1284 #endif 1285 } 1286 #endif /* DDB || KGDB */ 1287 if ((SHREG_SCSSR & SCSSR_RDRF) != 0) { 1288 if (cc > 0){ 1289 put[0] = SHREG_SCRDR; 1290 put[1] = SHREG_SCSSR & 0x00ff; 1291 1292 SHREG_SCSSR &= ~SCSSR_RDRF; 1293 1294 put += 2; 1295 if (put >= end) 1296 put = sc->sc_rbuf; 1297 cc--; 1298 } 1299 1300 /* 1301 * Current string of incoming characters ended because 1302 * no more data was available or we ran out of space. 1303 * Schedule a receive event if any data was received. 1304 * If we're out of space, turn off receive interrupts. 1305 */ 1306 sc->sc_rbput = put; 1307 sc->sc_rbavail = cc; 1308 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 1309 sc->sc_rx_ready = 1; 1310 1311 /* 1312 * See if we are in danger of overflowing a buffer. If 1313 * so, use hardware flow control to ease the pressure. 1314 */ 1315 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 1316 cc < sc->sc_r_hiwat) { 1317 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1318 #if 0 1319 sci_hwiflow(sc); 1320 #endif 1321 } 1322 1323 /* 1324 * If we're out of space, disable receive interrupts 1325 * until the queue has drained a bit. 1326 */ 1327 if (!cc) { 1328 SHREG_SCSCR &= ~SCSCR_RIE; 1329 } 1330 } else { 1331 if (SHREG_SCSSR & SCSSR_RDRF) { 1332 SHREG_SCSCR &= ~(SCSCR_TIE | SCSCR_RIE); 1333 continue; 1334 } 1335 } 1336 1337 #if 0 1338 msr = bus_space_read_1(iot, ioh, sci_msr); 1339 delta = msr ^ sc->sc_msr; 1340 sc->sc_msr = msr; 1341 if (ISSET(delta, sc->sc_msr_mask)) { 1342 SET(sc->sc_msr_delta, delta); 1343 1344 /* 1345 * Pulse-per-second clock signal on edge of DCD? 1346 */ 1347 if (ISSET(delta, sc->sc_ppsmask)) { 1348 struct timeval tv; 1349 if (ISSET(msr, sc->sc_ppsmask) == 1350 sc->sc_ppsassert) { 1351 /* XXX nanotime() */ 1352 microtime(&tv); 1353 TIMEVAL_TO_TIMESPEC(&tv, 1354 &sc->ppsinfo.assert_timestamp); 1355 if (sc->ppsparam.mode & PPS_OFFSETASSERT) { 1356 timespecadd(&sc->ppsinfo.assert_timestamp, 1357 &sc->ppsparam.assert_offset, 1358 &sc->ppsinfo.assert_timestamp); 1359 TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.assert_timestamp); 1360 } 1361 1362 #ifdef PPS_SYNC 1363 if (sc->ppsparam.mode & PPS_HARDPPSONASSERT) 1364 hardpps(&tv, tv.tv_usec); 1365 #endif 1366 sc->ppsinfo.assert_sequence++; 1367 sc->ppsinfo.current_mode = 1368 sc->ppsparam.mode; 1369 1370 } else if (ISSET(msr, sc->sc_ppsmask) == 1371 sc->sc_ppsclear) { 1372 /* XXX nanotime() */ 1373 microtime(&tv); 1374 TIMEVAL_TO_TIMESPEC(&tv, 1375 &sc->ppsinfo.clear_timestamp); 1376 if (sc->ppsparam.mode & PPS_OFFSETCLEAR) { 1377 timespecadd(&sc->ppsinfo.clear_timestamp, 1378 &sc->ppsparam.clear_offset, 1379 &sc->ppsinfo.clear_timestamp); 1380 TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.clear_timestamp); 1381 } 1382 1383 #ifdef PPS_SYNC 1384 if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR) 1385 hardpps(&tv, tv.tv_usec); 1386 #endif 1387 sc->ppsinfo.clear_sequence++; 1388 sc->ppsinfo.current_mode = 1389 sc->ppsparam.mode; 1390 } 1391 } 1392 1393 /* 1394 * Stop output immediately if we lose the output 1395 * flow control signal or carrier detect. 1396 */ 1397 if (ISSET(~msr, sc->sc_msr_mask)) { 1398 sc->sc_tbc = 0; 1399 sc->sc_heldtbc = 0; 1400 #ifdef SCI_DEBUG 1401 if (sci_debug) 1402 scistatus(sc, "sciintr "); 1403 #endif 1404 } 1405 1406 sc->sc_st_check = 1; 1407 } 1408 #endif 1409 } while (SHREG_SCSSR & SCSSR_RDRF); 1410 1411 /* 1412 * Done handling any receive interrupts. See if data can be 1413 * transmitted as well. Schedule tx done event if no data left 1414 * and tty was marked busy. 1415 */ 1416 if ((SHREG_SCSSR & SCSSR_TDRE) != 0) { 1417 /* 1418 * If we've delayed a parameter change, do it now, and restart 1419 * output. 1420 */ 1421 if (sc->sc_heldchange) { 1422 sc->sc_heldchange = 0; 1423 sc->sc_tbc = sc->sc_heldtbc; 1424 sc->sc_heldtbc = 0; 1425 } 1426 1427 /* Output the next chunk of the contiguous buffer, if any. */ 1428 if (sc->sc_tbc > 0) { 1429 PutcSci(*(sc->sc_tba)); 1430 sc->sc_tba++; 1431 sc->sc_tbc--; 1432 } else { 1433 /* Disable transmit completion interrupts if necessary. */ 1434 #if 0 1435 if (ISSET(sc->sc_ier, IER_ETXRDY)) 1436 #endif 1437 SHREG_SCSCR &= ~SCSCR_TIE; 1438 1439 if (sc->sc_tx_busy) { 1440 sc->sc_tx_busy = 0; 1441 sc->sc_tx_done = 1; 1442 } 1443 } 1444 } 1445 1446 /* Wake up the poller. */ 1447 #ifdef __GENERIC_SOFT_INTERRUPTS 1448 softintr_schedule(sc->sc_si); 1449 #else 1450 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1451 setsoftserial(); 1452 #else 1453 if (!sci_softintr_scheduled) { 1454 sci_softintr_scheduled = 1; 1455 timeout(scisoft, NULL, 1); 1456 } 1457 #endif 1458 #endif 1459 1460 #if NRND > 0 && defined(RND_SCI) 1461 rnd_add_uint32(&sc->rnd_source, iir | lsr); 1462 #endif 1463 1464 return (1); 1465 } 1466 1467 void 1468 scicnprobe(cp) 1469 struct consdev *cp; 1470 { 1471 int maj; 1472 1473 /* locate the major number */ 1474 for (maj = 0; maj < nchrdev; maj++) 1475 if (cdevsw[maj].d_open == sciopen) 1476 break; 1477 1478 /* Initialize required fields. */ 1479 cp->cn_dev = makedev(maj, 0); 1480 cp->cn_pri = CN_NORMAL; 1481 } 1482 1483 #define sci_gets GetStrSci 1484 #define sci_puts PutStrSci 1485 1486 void 1487 scicninit(cp) 1488 struct consdev *cp; 1489 { 1490 1491 InitializeSci(SCICN_SPEED); 1492 1493 #if 0 1494 sci_intr_init(); /* XXX msaitoh */ 1495 #endif 1496 1497 sci_puts("sci initialized.\n\r"); 1498 } 1499 1500 #define sci_getc GetcSci 1501 #define sci_putc PutcSci 1502 1503 int 1504 scicngetc(dev) 1505 dev_t dev; 1506 { 1507 int c; 1508 int s; 1509 1510 s = splserial(); 1511 c = sci_getc(); 1512 splx(s); 1513 1514 return (c); 1515 } 1516 1517 void 1518 scicnputc(dev, c) 1519 dev_t dev; 1520 int c; 1521 { 1522 int s; 1523 1524 s = splserial(); 1525 sci_putc(c); 1526 splx(s); 1527 } 1528
Indexes created Wed Oct 01 18:09:54 GMT 2025