sci.c revision 1.23
1 /* $NetBSD: sci.c,v 1.23 2002/04/26 10:22:54 msaitoh Exp $ */ 2 3 /*- 4 * Copyright (C) 1999 T.Horiuchi and SAITOH Masanobu. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 /*- 30 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. 31 * All rights reserved. 32 * 33 * This code is derived from software contributed to The NetBSD Foundation 34 * by Charles M. Hannum. 35 * 36 * Redistribution and use in source and binary forms, with or without 37 * modification, are permitted provided that the following conditions 38 * are met: 39 * 1. Redistributions of source code must retain the above copyright 40 * notice, this list of conditions and the following disclaimer. 41 * 2. Redistributions in binary form must reproduce the above copyright 42 * notice, this list of conditions and the following disclaimer in the 43 * documentation and/or other materials provided with the distribution. 44 * 3. All advertising materials mentioning features or use of this software 45 * must display the following acknowledgement: 46 * This product includes software developed by the NetBSD 47 * Foundation, Inc. and its contributors. 48 * 4. Neither the name of The NetBSD Foundation nor the names of its 49 * contributors may be used to endorse or promote products derived 50 * from this software without specific prior written permission. 51 * 52 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 53 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 54 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 55 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 56 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 57 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 58 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 59 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 60 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 61 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 62 * POSSIBILITY OF SUCH DAMAGE. 63 */ 64 65 /* 66 * Copyright (c) 1991 The Regents of the University of California. 67 * All rights reserved. 68 * 69 * Redistribution and use in source and binary forms, with or without 70 * modification, are permitted provided that the following conditions 71 * are met: 72 * 1. Redistributions of source code must retain the above copyright 73 * notice, this list of conditions and the following disclaimer. 74 * 2. Redistributions in binary form must reproduce the above copyright 75 * notice, this list of conditions and the following disclaimer in the 76 * documentation and/or other materials provided with the distribution. 77 * 3. All advertising materials mentioning features or use of this software 78 * must display the following acknowledgement: 79 * This product includes software developed by the University of 80 * California, Berkeley and its contributors. 81 * 4. Neither the name of the University nor the names of its contributors 82 * may be used to endorse or promote products derived from this software 83 * without specific prior written permission. 84 * 85 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 86 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 87 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 88 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 89 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 90 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 91 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 92 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 93 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 94 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 95 * SUCH DAMAGE. 96 * 97 * @(#)com.c 7.5 (Berkeley) 5/16/91 98 */ 99 100 /* 101 * SH internal serial driver 102 * 103 * This code is derived from both z8530tty.c and com.c 104 */ 105 106 #include "opt_kgdb.h" 107 #include "opt_sci.h" 108 109 #include <sys/param.h> 110 #include <sys/systm.h> 111 #include <sys/tty.h> 112 #include <sys/proc.h> 113 #include <sys/conf.h> 114 #include <sys/file.h> 115 #include <sys/syslog.h> 116 #include <sys/kernel.h> 117 #include <sys/device.h> 118 #include <sys/malloc.h> 119 120 #include <dev/cons.h> 121 122 #include <sh3/clock.h> 123 #include <sh3/scireg.h> 124 #include <sh3/pfcreg.h> 125 #include <sh3/tmureg.h> 126 #include <sh3/exception.h> 127 #include <machine/intr.h> 128 129 static void scistart(struct tty *); 130 static int sciparam(struct tty *, struct termios *); 131 132 void scicnprobe(struct consdev *); 133 void scicninit(struct consdev *); 134 void scicnputc(dev_t, int); 135 int scicngetc(dev_t); 136 void scicnpoolc(dev_t, int); 137 int sciintr(void *); 138 139 struct sci_softc { 140 struct device sc_dev; /* boilerplate */ 141 struct tty *sc_tty; 142 void *sc_si; 143 struct callout sc_diag_ch; 144 145 #if 0 146 bus_space_tag_t sc_iot; /* ISA i/o space identifier */ 147 bus_space_handle_t sc_ioh; /* ISA io handle */ 148 149 int sc_drq; 150 151 int sc_frequency; 152 #endif 153 154 u_int sc_overflows, 155 sc_floods, 156 sc_errors; /* number of retries so far */ 157 u_char sc_status[7]; /* copy of registers */ 158 159 int sc_hwflags; 160 int sc_swflags; 161 u_int sc_fifolen; /* XXX always 0? */ 162 163 u_int sc_r_hiwat, 164 sc_r_lowat; 165 u_char *volatile sc_rbget, 166 *volatile sc_rbput; 167 volatile u_int sc_rbavail; 168 u_char *sc_rbuf, 169 *sc_ebuf; 170 171 u_char *sc_tba; /* transmit buffer address */ 172 u_int sc_tbc, /* transmit byte count */ 173 sc_heldtbc; 174 175 volatile u_char sc_rx_flags, /* receiver blocked */ 176 #define RX_TTY_BLOCKED 0x01 177 #define RX_TTY_OVERFLOWED 0x02 178 #define RX_IBUF_BLOCKED 0x04 179 #define RX_IBUF_OVERFLOWED 0x08 180 #define RX_ANY_BLOCK 0x0f 181 sc_tx_busy, /* working on an output chunk */ 182 sc_tx_done, /* done with one output chunk */ 183 sc_tx_stopped, /* H/W level stop (lost CTS) */ 184 sc_st_check, /* got a status interrupt */ 185 sc_rx_ready; 186 187 volatile u_char sc_heldchange; 188 }; 189 190 /* controller driver configuration */ 191 static int sci_match(struct device *, struct cfdata *, void *); 192 static void sci_attach(struct device *, struct device *, void *); 193 194 void sci_break(struct sci_softc *, int); 195 void sci_iflush(struct sci_softc *); 196 197 #define integrate static inline 198 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 199 void scisoft(void *); 200 #else 201 #ifndef __NO_SOFT_SERIAL_INTERRUPT 202 void scisoft(void); 203 #else 204 void scisoft(void *); 205 #endif 206 #endif 207 integrate void sci_rxsoft(struct sci_softc *, struct tty *); 208 integrate void sci_txsoft(struct sci_softc *, struct tty *); 209 integrate void sci_stsoft(struct sci_softc *, struct tty *); 210 integrate void sci_schedrx(struct sci_softc *); 211 void scidiag(void *); 212 213 #define SCIUNIT_MASK 0x7ffff 214 #define SCIDIALOUT_MASK 0x80000 215 216 #define SCIUNIT(x) (minor(x) & SCIUNIT_MASK) 217 #define SCIDIALOUT(x) (minor(x) & SCIDIALOUT_MASK) 218 219 /* Macros to clear/set/test flags. */ 220 #define SET(t, f) (t) |= (f) 221 #define CLR(t, f) (t) &= ~(f) 222 #define ISSET(t, f) ((t) & (f)) 223 224 /* Hardware flag masks */ 225 #define SCI_HW_NOIEN 0x01 226 #define SCI_HW_FIFO 0x02 227 #define SCI_HW_FLOW 0x08 228 #define SCI_HW_DEV_OK 0x20 229 #define SCI_HW_CONSOLE 0x40 230 #define SCI_HW_KGDB 0x80 231 232 /* Buffer size for character buffer */ 233 #define SCI_RING_SIZE 2048 234 235 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 236 u_int sci_rbuf_hiwat = (SCI_RING_SIZE * 1) / 4; 237 u_int sci_rbuf_lowat = (SCI_RING_SIZE * 3) / 4; 238 239 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 240 int sciconscflag = CONMODE; 241 int sciisconsole = 0; 242 243 #ifdef SCICN_SPEED 244 int scicn_speed = SCICN_SPEED; 245 #else 246 int scicn_speed = 9600; 247 #endif 248 249 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 250 251 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS 252 #ifdef __NO_SOFT_SERIAL_INTERRUPT 253 volatile int sci_softintr_scheduled; 254 struct callout sci_soft_ch = CALLOUT_INITIALIZER; 255 #endif 256 #endif 257 258 u_int sci_rbuf_size = SCI_RING_SIZE; 259 260 struct cfattach sci_ca = { 261 sizeof(struct sci_softc), sci_match, sci_attach 262 }; 263 264 extern struct cfdriver sci_cd; 265 266 cdev_decl(sci); 267 268 void InitializeSci (unsigned int); 269 270 /* 271 * following functions are debugging prupose only 272 */ 273 #define CR 0x0D 274 #define I2C_ADRS (*(volatile unsigned int *)0xa8000000) 275 #define USART_ON (unsigned int)~0x08 276 277 void sci_putc(unsigned char); 278 unsigned char sci_getc(void); 279 int SciErrCheck(void); 280 281 /* 282 * InitializeSci 283 * : unsigned int bps; 284 * : SCI(Serial Communication Interface) 285 */ 286 287 void 288 InitializeSci(unsigned int bps) 289 { 290 291 /* Initialize SCR */ 292 SHREG_SCSCR = 0x00; 293 294 /* Serial Mode Register */ 295 SHREG_SCSMR = 0x00; /* Async,8bit,NonParity,Even,1Stop,NoMulti */ 296 297 /* Bit Rate Register */ 298 SHREG_SCBRR = divrnd(sh_clock_get_pclock(), 32 * bps) - 1; 299 300 /* 301 * wait 1mSec, because Send/Recv must begin 1 bit period after 302 * BRR is set. 303 */ 304 delay(1000); 305 306 /* Send permission, Receive permission ON */ 307 SHREG_SCSCR = SCSCR_TE | SCSCR_RE; 308 309 /* Serial Status Register */ 310 SHREG_SCSSR &= SCSSR_TDRE; /* Clear Status */ 311 312 #if 0 313 I2C_ADRS &= ~0x08; /* enable RS-232C */ 314 #endif 315 } 316 317 318 /* 319 * sci_putc 320 * : unsigned char c; 321 */ 322 void 323 sci_putc(unsigned char c) 324 { 325 326 if (c == '\n') 327 sci_putc('\r'); 328 329 /* wait for ready */ 330 while ((SHREG_SCSSR & SCSSR_TDRE) == NULL) 331 ; 332 333 /* write send data to send register */ 334 SHREG_SCTDR = c; 335 336 /* clear ready flag */ 337 SHREG_SCSSR &= ~SCSSR_TDRE; 338 } 339 340 /* 341 * : SciErrCheck 342 * 0x20 = over run 343 * 0x10 = frame error 344 * 0x80 = parity error 345 */ 346 int 347 SciErrCheck(void) 348 { 349 350 return(SHREG_SCSSR & (SCSSR_ORER | SCSSR_FER | SCSSR_PER)); 351 } 352 353 /* 354 * sci_getc 355 */ 356 unsigned char 357 sci_getc(void) 358 { 359 unsigned char c, err_c; 360 361 while (((err_c = SHREG_SCSSR) 362 & (SCSSR_RDRF | SCSSR_ORER | SCSSR_FER | SCSSR_PER)) == 0) 363 ; 364 if ((err_c & (SCSSR_ORER | SCSSR_FER | SCSSR_PER)) != 0) { 365 SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_FER | SCSSR_PER); 366 return(err_c |= 0x80); 367 } 368 369 c = SHREG_SCRDR; 370 371 SHREG_SCSSR &= ~SCSSR_RDRF; 372 373 return(c); 374 } 375 376 #if 0 377 #define SCI_MAX_UNITS 2 378 #else 379 #define SCI_MAX_UNITS 1 380 #endif 381 382 383 static int 384 sci_match(struct device *parent, struct cfdata *cfp, void *aux) 385 { 386 387 if (strcmp(cfp->cf_driver->cd_name, "sci") 388 || cfp->cf_unit >= SCI_MAX_UNITS) //XXX __BROKEN_CONFIG_UNIT_USAGE 389 return 0; 390 391 return 1; 392 } 393 394 static void 395 sci_attach(struct device *parent, struct device *self, void *aux) 396 { 397 struct sci_softc *sc = (struct sci_softc *)self; 398 struct tty *tp; 399 400 sc->sc_hwflags = 0; /* XXX */ 401 sc->sc_swflags = 0; /* XXX */ 402 sc->sc_fifolen = 0; /* XXX */ 403 404 if (sciisconsole) { 405 SET(sc->sc_hwflags, SCI_HW_CONSOLE); 406 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 407 printf("\n%s: console\n", sc->sc_dev.dv_xname); 408 } else { 409 InitializeSci(9600); 410 printf("\n"); 411 } 412 413 callout_init(&sc->sc_diag_ch); 414 415 intc_intr_establish(SH_INTEVT_SCI_ERI, IST_LEVEL, IPL_SERIAL, sciintr, 416 sc); 417 intc_intr_establish(SH_INTEVT_SCI_RXI, IST_LEVEL, IPL_SERIAL, sciintr, 418 sc); 419 intc_intr_establish(SH_INTEVT_SCI_TXI, IST_LEVEL, IPL_SERIAL, sciintr, 420 sc); 421 intc_intr_establish(SH_INTEVT_SCI_TEI, IST_LEVEL, IPL_SERIAL, sciintr, 422 sc); 423 424 SET(sc->sc_hwflags, SCI_HW_DEV_OK); 425 426 tp = ttymalloc(); 427 tp->t_oproc = scistart; 428 tp->t_param = sciparam; 429 tp->t_hwiflow = NULL; 430 431 sc->sc_tty = tp; 432 sc->sc_rbuf = malloc(sci_rbuf_size << 1, M_DEVBUF, M_NOWAIT); 433 if (sc->sc_rbuf == NULL) { 434 printf("%s: unable to allocate ring buffer\n", 435 sc->sc_dev.dv_xname); 436 return; 437 } 438 sc->sc_ebuf = sc->sc_rbuf + (sci_rbuf_size << 1); 439 440 tty_attach(tp); 441 } 442 443 /* 444 * Start or restart transmission. 445 */ 446 static void 447 scistart(struct tty *tp) 448 { 449 struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(tp->t_dev)]; 450 int s; 451 452 s = spltty(); 453 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 454 goto out; 455 if (sc->sc_tx_stopped) 456 goto out; 457 458 if (tp->t_outq.c_cc <= tp->t_lowat) { 459 if (ISSET(tp->t_state, TS_ASLEEP)) { 460 CLR(tp->t_state, TS_ASLEEP); 461 wakeup(&tp->t_outq); 462 } 463 selwakeup(&tp->t_wsel); 464 if (tp->t_outq.c_cc == 0) 465 goto out; 466 } 467 468 /* Grab the first contiguous region of buffer space. */ 469 { 470 u_char *tba; 471 int tbc; 472 473 tba = tp->t_outq.c_cf; 474 tbc = ndqb(&tp->t_outq, 0); 475 476 (void)splserial(); 477 478 sc->sc_tba = tba; 479 sc->sc_tbc = tbc; 480 } 481 482 SET(tp->t_state, TS_BUSY); 483 sc->sc_tx_busy = 1; 484 485 /* Enable transmit completion interrupts if necessary. */ 486 SHREG_SCSCR |= SCSCR_TIE | SCSCR_RIE; 487 488 /* Output the first byte of the contiguous buffer. */ 489 { 490 if (sc->sc_tbc > 0) { 491 sci_putc(*(sc->sc_tba)); 492 sc->sc_tba++; 493 sc->sc_tbc--; 494 } 495 } 496 out: 497 splx(s); 498 return; 499 } 500 501 /* 502 * Set SCI tty parameters from termios. 503 * XXX - Should just copy the whole termios after 504 * making sure all the changes could be done. 505 */ 506 static int 507 sciparam(struct tty *tp, struct termios *t) 508 { 509 struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(tp->t_dev)]; 510 int ospeed = t->c_ospeed; 511 int s; 512 513 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 514 return (EIO); 515 516 /* Check requested parameters. */ 517 if (ospeed < 0) 518 return (EINVAL); 519 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 520 return (EINVAL); 521 522 /* 523 * For the console, always force CLOCAL and !HUPCL, so that the port 524 * is always active. 525 */ 526 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 527 ISSET(sc->sc_hwflags, SCI_HW_CONSOLE)) { 528 SET(t->c_cflag, CLOCAL); 529 CLR(t->c_cflag, HUPCL); 530 } 531 532 /* 533 * If there were no changes, don't do anything. This avoids dropping 534 * input and improves performance when all we did was frob things like 535 * VMIN and VTIME. 536 */ 537 if (tp->t_ospeed == t->c_ospeed && 538 tp->t_cflag == t->c_cflag) 539 return (0); 540 541 #if 0 542 /* XXX (msaitoh) */ 543 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 544 #endif 545 546 s = splserial(); 547 548 /* 549 * Set the FIFO threshold based on the receive speed. 550 * 551 * * If it's a low speed, it's probably a mouse or some other 552 * interactive device, so set the threshold low. 553 * * If it's a high speed, trim the trigger level down to prevent 554 * overflows. 555 * * Otherwise set it a bit higher. 556 */ 557 #if 0 558 /* XXX (msaitoh) */ 559 if (ISSET(sc->sc_hwflags, SCI_HW_HAYESP)) 560 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 561 else if (ISSET(sc->sc_hwflags, SCI_HW_FIFO)) 562 sc->sc_fifo = FIFO_ENABLE | 563 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : 564 t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4); 565 else 566 sc->sc_fifo = 0; 567 #endif 568 569 /* And copy to tty. */ 570 tp->t_ispeed = 0; 571 tp->t_ospeed = t->c_ospeed; 572 tp->t_cflag = t->c_cflag; 573 574 if (!sc->sc_heldchange) { 575 if (sc->sc_tx_busy) { 576 sc->sc_heldtbc = sc->sc_tbc; 577 sc->sc_tbc = 0; 578 sc->sc_heldchange = 1; 579 } 580 #if 0 581 /* XXX (msaitoh) */ 582 else 583 sci_loadchannelregs(sc); 584 #endif 585 } 586 587 if (!ISSET(t->c_cflag, CHWFLOW)) { 588 /* Disable the high water mark. */ 589 sc->sc_r_hiwat = 0; 590 sc->sc_r_lowat = 0; 591 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 592 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 593 sci_schedrx(sc); 594 } 595 } else { 596 sc->sc_r_hiwat = sci_rbuf_hiwat; 597 sc->sc_r_lowat = sci_rbuf_lowat; 598 } 599 600 splx(s); 601 602 #ifdef SCI_DEBUG 603 if (sci_debug) 604 scistatus(sc, "sciparam "); 605 #endif 606 607 if (!ISSET(t->c_cflag, CHWFLOW)) { 608 if (sc->sc_tx_stopped) { 609 sc->sc_tx_stopped = 0; 610 scistart(tp); 611 } 612 } 613 614 return (0); 615 } 616 617 void 618 sci_iflush(struct sci_softc *sc) 619 { 620 unsigned char err_c; 621 volatile unsigned char c; 622 623 if (((err_c = SHREG_SCSSR) 624 & (SCSSR_RDRF | SCSSR_ORER | SCSSR_FER | SCSSR_PER)) != 0) { 625 626 if ((err_c & (SCSSR_ORER | SCSSR_FER | SCSSR_PER)) != 0) { 627 SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_FER | SCSSR_PER); 628 return; 629 } 630 631 c = SHREG_SCRDR; 632 633 SHREG_SCSSR &= ~SCSSR_RDRF; 634 } 635 } 636 637 int 638 sciopen(dev_t dev, int flag, int mode, struct proc *p) 639 { 640 int unit = SCIUNIT(dev); 641 struct sci_softc *sc; 642 struct tty *tp; 643 int s, s2; 644 int error; 645 646 if (unit >= sci_cd.cd_ndevs) 647 return (ENXIO); 648 sc = sci_cd.cd_devs[unit]; 649 if (sc == 0 || !ISSET(sc->sc_hwflags, SCI_HW_DEV_OK) || 650 sc->sc_rbuf == NULL) 651 return (ENXIO); 652 653 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 654 return (ENXIO); 655 656 #ifdef KGDB 657 /* 658 * If this is the kgdb port, no other use is permitted. 659 */ 660 if (ISSET(sc->sc_hwflags, SCI_HW_KGDB)) 661 return (EBUSY); 662 #endif 663 664 tp = sc->sc_tty; 665 666 if (ISSET(tp->t_state, TS_ISOPEN) && 667 ISSET(tp->t_state, TS_XCLUDE) && 668 p->p_ucred->cr_uid != 0) 669 return (EBUSY); 670 671 s = spltty(); 672 673 /* 674 * Do the following iff this is a first open. 675 */ 676 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 677 struct termios t; 678 679 tp->t_dev = dev; 680 681 s2 = splserial(); 682 683 /* Turn on interrupts. */ 684 SHREG_SCSCR |= SCSCR_TIE | SCSCR_RIE; 685 686 splx(s2); 687 688 /* 689 * Initialize the termios status to the defaults. Add in the 690 * sticky bits from TIOCSFLAGS. 691 */ 692 t.c_ispeed = 0; 693 if (ISSET(sc->sc_hwflags, SCI_HW_CONSOLE)) { 694 t.c_ospeed = scicn_speed; 695 t.c_cflag = sciconscflag; 696 } else { 697 t.c_ospeed = TTYDEF_SPEED; 698 t.c_cflag = TTYDEF_CFLAG; 699 } 700 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 701 SET(t.c_cflag, CLOCAL); 702 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 703 SET(t.c_cflag, CRTSCTS); 704 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 705 SET(t.c_cflag, MDMBUF); 706 /* Make sure sciparam() will do something. */ 707 tp->t_ospeed = 0; 708 (void) sciparam(tp, &t); 709 tp->t_iflag = TTYDEF_IFLAG; 710 tp->t_oflag = TTYDEF_OFLAG; 711 tp->t_lflag = TTYDEF_LFLAG; 712 ttychars(tp); 713 ttsetwater(tp); 714 715 s2 = splserial(); 716 717 /* Clear the input ring, and unblock. */ 718 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 719 sc->sc_rbavail = sci_rbuf_size; 720 sci_iflush(sc); 721 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 722 #if 0 723 /* XXX (msaitoh) */ 724 sci_hwiflow(sc); 725 #endif 726 727 #ifdef SCI_DEBUG 728 if (sci_debug) 729 scistatus(sc, "sciopen "); 730 #endif 731 732 splx(s2); 733 } 734 735 splx(s); 736 737 error = ttyopen(tp, SCIDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 738 if (error) 739 goto bad; 740 741 error = (*tp->t_linesw->l_open)(dev, tp); 742 if (error) 743 goto bad; 744 745 return (0); 746 747 bad: 748 749 return (error); 750 } 751 752 int 753 sciclose(dev_t dev, int flag, int mode, struct proc *p) 754 { 755 struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)]; 756 struct tty *tp = sc->sc_tty; 757 758 /* XXX This is for cons.c. */ 759 if (!ISSET(tp->t_state, TS_ISOPEN)) 760 return (0); 761 762 (*tp->t_linesw->l_close)(tp, flag); 763 ttyclose(tp); 764 765 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 766 return (0); 767 768 return (0); 769 } 770 771 int 772 sciread(dev_t dev, struct uio *uio, int flag) 773 { 774 struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)]; 775 struct tty *tp = sc->sc_tty; 776 777 return ((*tp->t_linesw->l_read)(tp, uio, flag)); 778 } 779 780 int 781 sciwrite(dev_t dev, struct uio *uio, int flag) 782 { 783 struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)]; 784 struct tty *tp = sc->sc_tty; 785 786 return ((*tp->t_linesw->l_write)(tp, uio, flag)); 787 } 788 789 int 790 scipoll(dev_t dev, int events, struct proc *p) 791 { 792 struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)]; 793 struct tty *tp = sc->sc_tty; 794 795 return ((*tp->t_linesw->l_poll)(tp, events, p)); 796 } 797 798 struct tty * 799 scitty(dev_t dev) 800 { 801 struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)]; 802 struct tty *tp = sc->sc_tty; 803 804 return (tp); 805 } 806 807 int 808 sciioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct proc *p) 809 { 810 struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)]; 811 struct tty *tp = sc->sc_tty; 812 int error; 813 int s; 814 815 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 816 return (EIO); 817 818 error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, p); 819 if (error != EPASSTHROUGH) 820 return (error); 821 822 error = ttioctl(tp, cmd, data, flag, p); 823 if (error != EPASSTHROUGH) 824 return (error); 825 826 error = 0; 827 828 s = splserial(); 829 830 switch (cmd) { 831 case TIOCSBRK: 832 sci_break(sc, 1); 833 break; 834 835 case TIOCCBRK: 836 sci_break(sc, 0); 837 break; 838 839 case TIOCGFLAGS: 840 *(int *)data = sc->sc_swflags; 841 break; 842 843 case TIOCSFLAGS: 844 error = suser(p->p_ucred, &p->p_acflag); 845 if (error) 846 break; 847 sc->sc_swflags = *(int *)data; 848 break; 849 850 default: 851 error = EPASSTHROUGH; 852 break; 853 } 854 855 splx(s); 856 857 return (error); 858 } 859 860 integrate void 861 sci_schedrx(struct sci_softc *sc) 862 { 863 864 sc->sc_rx_ready = 1; 865 866 /* Wake up the poller. */ 867 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 868 softintr_schedule(sc->sc_si); 869 #else 870 #ifndef __NO_SOFT_SERIAL_INTERRUPT 871 setsoftserial(); 872 #else 873 if (!sci_softintr_scheduled) { 874 sci_softintr_scheduled = 1; 875 callout_reset(&sci_soft_ch, 1, scisoft, NULL); 876 } 877 #endif 878 #endif 879 } 880 881 void 882 sci_break(struct sci_softc *sc, int onoff) 883 { 884 885 if (onoff) 886 SHREG_SCSSR &= ~SCSSR_TDRE; 887 else 888 SHREG_SCSSR |= SCSSR_TDRE; 889 890 #if 0 /* XXX */ 891 if (!sc->sc_heldchange) { 892 if (sc->sc_tx_busy) { 893 sc->sc_heldtbc = sc->sc_tbc; 894 sc->sc_tbc = 0; 895 sc->sc_heldchange = 1; 896 } else 897 sci_loadchannelregs(sc); 898 } 899 #endif 900 } 901 902 /* 903 * Stop output, e.g., for ^S or output flush. 904 */ 905 void 906 scistop(struct tty *tp, int flag) 907 { 908 struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(tp->t_dev)]; 909 int s; 910 911 s = splserial(); 912 if (ISSET(tp->t_state, TS_BUSY)) { 913 /* Stop transmitting at the next chunk. */ 914 sc->sc_tbc = 0; 915 sc->sc_heldtbc = 0; 916 if (!ISSET(tp->t_state, TS_TTSTOP)) 917 SET(tp->t_state, TS_FLUSH); 918 } 919 splx(s); 920 } 921 922 void 923 scidiag(void *arg) 924 { 925 struct sci_softc *sc = arg; 926 int overflows, floods; 927 int s; 928 929 s = splserial(); 930 overflows = sc->sc_overflows; 931 sc->sc_overflows = 0; 932 floods = sc->sc_floods; 933 sc->sc_floods = 0; 934 sc->sc_errors = 0; 935 splx(s); 936 937 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 938 sc->sc_dev.dv_xname, 939 overflows, overflows == 1 ? "" : "s", 940 floods, floods == 1 ? "" : "s"); 941 } 942 943 integrate void 944 sci_rxsoft(struct sci_softc *sc, struct tty *tp) 945 { 946 int (*rint)(int c, struct tty *tp) = tp->t_linesw->l_rint; 947 u_char *get, *end; 948 u_int cc, scc; 949 u_char ssr; 950 int code; 951 int s; 952 953 end = sc->sc_ebuf; 954 get = sc->sc_rbget; 955 scc = cc = sci_rbuf_size - sc->sc_rbavail; 956 957 if (cc == sci_rbuf_size) { 958 sc->sc_floods++; 959 if (sc->sc_errors++ == 0) 960 callout_reset(&sc->sc_diag_ch, 60 * hz, scidiag, sc); 961 } 962 963 while (cc) { 964 code = get[0]; 965 ssr = get[1]; 966 if (ISSET(ssr, SCSSR_FER | SCSSR_PER)) { 967 if (ISSET(ssr, SCSSR_FER)) 968 SET(code, TTY_FE); 969 if (ISSET(ssr, SCSSR_PER)) 970 SET(code, TTY_PE); 971 } 972 if ((*rint)(code, tp) == -1) { 973 /* 974 * The line discipline's buffer is out of space. 975 */ 976 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 977 /* 978 * We're either not using flow control, or the 979 * line discipline didn't tell us to block for 980 * some reason. Either way, we have no way to 981 * know when there's more space available, so 982 * just drop the rest of the data. 983 */ 984 get += cc << 1; 985 if (get >= end) 986 get -= sci_rbuf_size << 1; 987 cc = 0; 988 } else { 989 /* 990 * Don't schedule any more receive processing 991 * until the line discipline tells us there's 992 * space available (through scihwiflow()). 993 * Leave the rest of the data in the input 994 * buffer. 995 */ 996 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 997 } 998 break; 999 } 1000 get += 2; 1001 if (get >= end) 1002 get = sc->sc_rbuf; 1003 cc--; 1004 } 1005 1006 if (cc != scc) { 1007 sc->sc_rbget = get; 1008 s = splserial(); 1009 cc = sc->sc_rbavail += scc - cc; 1010 /* Buffers should be ok again, release possible block. */ 1011 if (cc >= sc->sc_r_lowat) { 1012 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1013 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1014 SHREG_SCSCR |= SCSCR_RIE; 1015 } 1016 #if 0 1017 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1018 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1019 sci_hwiflow(sc); 1020 } 1021 #endif 1022 } 1023 splx(s); 1024 } 1025 } 1026 1027 integrate void 1028 sci_txsoft(sc, tp) 1029 struct sci_softc *sc; 1030 struct tty *tp; 1031 { 1032 1033 CLR(tp->t_state, TS_BUSY); 1034 if (ISSET(tp->t_state, TS_FLUSH)) 1035 CLR(tp->t_state, TS_FLUSH); 1036 else 1037 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1038 (*tp->t_linesw->l_start)(tp); 1039 } 1040 1041 integrate void 1042 sci_stsoft(struct sci_softc *sc, struct tty *tp) 1043 { 1044 #if 0 1045 /* XXX (msaitoh) */ 1046 u_char msr, delta; 1047 int s; 1048 1049 s = splserial(); 1050 msr = sc->sc_msr; 1051 delta = sc->sc_msr_delta; 1052 sc->sc_msr_delta = 0; 1053 splx(s); 1054 1055 if (ISSET(delta, sc->sc_msr_dcd)) { 1056 /* 1057 * Inform the tty layer that carrier detect changed. 1058 */ 1059 (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD)); 1060 } 1061 1062 if (ISSET(delta, sc->sc_msr_cts)) { 1063 /* Block or unblock output according to flow control. */ 1064 if (ISSET(msr, sc->sc_msr_cts)) { 1065 sc->sc_tx_stopped = 0; 1066 (*tp->t_linesw->l_start)(tp); 1067 } else { 1068 sc->sc_tx_stopped = 1; 1069 } 1070 } 1071 1072 #ifdef SCI_DEBUG 1073 if (sci_debug) 1074 scistatus(sc, "sci_stsoft"); 1075 #endif 1076 #endif 1077 } 1078 1079 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1080 void 1081 scisoft(void *arg) 1082 { 1083 struct sci_softc *sc = arg; 1084 struct tty *tp; 1085 1086 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 1087 return; 1088 1089 { 1090 #else 1091 void 1092 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1093 scisoft() 1094 #else 1095 scisoft(void *arg) 1096 #endif 1097 { 1098 struct sci_softc *sc; 1099 struct tty *tp; 1100 int unit; 1101 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1102 int s; 1103 1104 s = splsoftserial(); 1105 sci_softintr_scheduled = 0; 1106 #endif 1107 1108 for (unit = 0; unit < sci_cd.cd_ndevs; unit++) { 1109 sc = sci_cd.cd_devs[unit]; 1110 if (sc == NULL || !ISSET(sc->sc_hwflags, SCI_HW_DEV_OK)) 1111 continue; 1112 1113 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 1114 continue; 1115 1116 tp = sc->sc_tty; 1117 if (tp == NULL) 1118 continue; 1119 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) 1120 continue; 1121 #endif 1122 tp = sc->sc_tty; 1123 1124 if (sc->sc_rx_ready) { 1125 sc->sc_rx_ready = 0; 1126 sci_rxsoft(sc, tp); 1127 } 1128 1129 #if 0 1130 if (sc->sc_st_check) { 1131 sc->sc_st_check = 0; 1132 sci_stsoft(sc, tp); 1133 } 1134 #endif 1135 1136 if (sc->sc_tx_done) { 1137 sc->sc_tx_done = 0; 1138 sci_txsoft(sc, tp); 1139 } 1140 } 1141 1142 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS 1143 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1144 splx(s); 1145 #endif 1146 #endif 1147 } 1148 1149 int 1150 sciintr(void *arg) 1151 { 1152 struct sci_softc *sc = arg; 1153 u_char *put, *end; 1154 u_int cc; 1155 u_short ssr; 1156 1157 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 1158 return (0); 1159 1160 end = sc->sc_ebuf; 1161 put = sc->sc_rbput; 1162 cc = sc->sc_rbavail; 1163 1164 ssr = SHREG_SCSSR; 1165 if (ISSET(ssr, SCSSR_FER)) { 1166 SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_PER | SCSSR_FER); 1167 #if defined(DDB) || defined(KGDB) 1168 #ifdef SH4 1169 if ((SHREG_SCSPTR & SCSPTR_SPB0DT) != 0) { 1170 #else 1171 if ((SHREG_SCSPDR & SCSPDR_SCP0DT) != 0) { 1172 #endif 1173 #ifdef DDB 1174 if (ISSET(sc->sc_hwflags, SCI_HW_CONSOLE)) { 1175 console_debugger(); 1176 } 1177 #endif 1178 #ifdef KGDB 1179 if (ISSET(sc->sc_hwflags, SCI_HW_KGDB)) { 1180 kgdb_connect(1); 1181 } 1182 #endif 1183 } 1184 #endif /* DDB || KGDB */ 1185 } 1186 if ((SHREG_SCSSR & SCSSR_RDRF) != 0) { 1187 if (cc > 0) { 1188 put[0] = SHREG_SCRDR; 1189 put[1] = SHREG_SCSSR & 0x00ff; 1190 1191 SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_FER | SCSSR_PER | 1192 SCSSR_RDRF); 1193 1194 put += 2; 1195 if (put >= end) 1196 put = sc->sc_rbuf; 1197 cc--; 1198 } 1199 1200 /* 1201 * Current string of incoming characters ended because 1202 * no more data was available or we ran out of space. 1203 * Schedule a receive event if any data was received. 1204 * If we're out of space, turn off receive interrupts. 1205 */ 1206 sc->sc_rbput = put; 1207 sc->sc_rbavail = cc; 1208 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 1209 sc->sc_rx_ready = 1; 1210 1211 /* 1212 * See if we are in danger of overflowing a buffer. If 1213 * so, use hardware flow control to ease the pressure. 1214 */ 1215 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 1216 cc < sc->sc_r_hiwat) { 1217 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1218 #if 0 1219 sci_hwiflow(sc); 1220 #endif 1221 } 1222 1223 /* 1224 * If we're out of space, disable receive interrupts 1225 * until the queue has drained a bit. 1226 */ 1227 if (!cc) { 1228 SHREG_SCSCR &= ~SCSCR_RIE; 1229 } 1230 } else { 1231 if (SHREG_SCSSR & SCSSR_RDRF) { 1232 SHREG_SCSCR &= ~(SCSCR_TIE | SCSCR_RIE); 1233 } 1234 } 1235 1236 #if 0 1237 msr = bus_space_read_1(iot, ioh, sci_msr); 1238 delta = msr ^ sc->sc_msr; 1239 sc->sc_msr = msr; 1240 if (ISSET(delta, sc->sc_msr_mask)) { 1241 SET(sc->sc_msr_delta, delta); 1242 1243 /* 1244 * Pulse-per-second clock signal on edge of DCD? 1245 */ 1246 if (ISSET(delta, sc->sc_ppsmask)) { 1247 struct timeval tv; 1248 if (ISSET(msr, sc->sc_ppsmask) == 1249 sc->sc_ppsassert) { 1250 /* XXX nanotime() */ 1251 microtime(&tv); 1252 TIMEVAL_TO_TIMESPEC(&tv, 1253 &sc->ppsinfo.assert_timestamp); 1254 if (sc->ppsparam.mode & PPS_OFFSETASSERT) { 1255 timespecadd(&sc->ppsinfo.assert_timestamp, 1256 &sc->ppsparam.assert_offset, 1257 &sc->ppsinfo.assert_timestamp); 1258 TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.assert_timestamp); 1259 } 1260 1261 #ifdef PPS_SYNC 1262 if (sc->ppsparam.mode & PPS_HARDPPSONASSERT) 1263 hardpps(&tv, tv.tv_usec); 1264 #endif 1265 sc->ppsinfo.assert_sequence++; 1266 sc->ppsinfo.current_mode = 1267 sc->ppsparam.mode; 1268 1269 } else if (ISSET(msr, sc->sc_ppsmask) == 1270 sc->sc_ppsclear) { 1271 /* XXX nanotime() */ 1272 microtime(&tv); 1273 TIMEVAL_TO_TIMESPEC(&tv, 1274 &sc->ppsinfo.clear_timestamp); 1275 if (sc->ppsparam.mode & PPS_OFFSETCLEAR) { 1276 timespecadd(&sc->ppsinfo.clear_timestamp, 1277 &sc->ppsparam.clear_offset, 1278 &sc->ppsinfo.clear_timestamp); 1279 TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.clear_timestamp); 1280 } 1281 1282 #ifdef PPS_SYNC 1283 if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR) 1284 hardpps(&tv, tv.tv_usec); 1285 #endif 1286 sc->ppsinfo.clear_sequence++; 1287 sc->ppsinfo.current_mode = 1288 sc->ppsparam.mode; 1289 } 1290 } 1291 1292 /* 1293 * Stop output immediately if we lose the output 1294 * flow control signal or carrier detect. 1295 */ 1296 if (ISSET(~msr, sc->sc_msr_mask)) { 1297 sc->sc_tbc = 0; 1298 sc->sc_heldtbc = 0; 1299 #ifdef SCI_DEBUG 1300 if (sci_debug) 1301 scistatus(sc, "sciintr "); 1302 #endif 1303 } 1304 1305 sc->sc_st_check = 1; 1306 } 1307 #endif 1308 1309 /* 1310 * Done handling any receive interrupts. See if data can be 1311 * transmitted as well. Schedule tx done event if no data left 1312 * and tty was marked busy. 1313 */ 1314 if ((SHREG_SCSSR & SCSSR_TDRE) != 0) { 1315 /* 1316 * If we've delayed a parameter change, do it now, and restart 1317 * output. 1318 */ 1319 if (sc->sc_heldchange) { 1320 sc->sc_heldchange = 0; 1321 sc->sc_tbc = sc->sc_heldtbc; 1322 sc->sc_heldtbc = 0; 1323 } 1324 1325 /* Output the next chunk of the contiguous buffer, if any. */ 1326 if (sc->sc_tbc > 0) { 1327 sci_putc(*(sc->sc_tba)); 1328 sc->sc_tba++; 1329 sc->sc_tbc--; 1330 } else { 1331 /* Disable transmit completion interrupts if necessary. */ 1332 #if 0 1333 if (ISSET(sc->sc_ier, IER_ETXRDY)) 1334 #endif 1335 SHREG_SCSCR &= ~SCSCR_TIE; 1336 1337 if (sc->sc_tx_busy) { 1338 sc->sc_tx_busy = 0; 1339 sc->sc_tx_done = 1; 1340 } 1341 } 1342 } 1343 1344 /* Wake up the poller. */ 1345 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1346 softintr_schedule(sc->sc_si); 1347 #else 1348 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1349 setsoftserial(); 1350 #else 1351 if (!sci_softintr_scheduled) { 1352 sci_softintr_scheduled = 1; 1353 callout_reset(&sci_soft_ch, 1, scisoft, 1); 1354 } 1355 #endif 1356 #endif 1357 1358 #if NRND > 0 && defined(RND_SCI) 1359 rnd_add_uint32(&sc->rnd_source, iir | lsr); 1360 #endif 1361 1362 return (1); 1363 } 1364 1365 void 1366 scicnprobe(cp) 1367 struct consdev *cp; 1368 { 1369 int maj; 1370 1371 /* locate the major number */ 1372 for (maj = 0; maj < nchrdev; maj++) 1373 if (cdevsw[maj].d_open == sciopen) 1374 break; 1375 1376 /* Initialize required fields. */ 1377 cp->cn_dev = makedev(maj, 0); 1378 #ifdef SCICONSOLE 1379 cp->cn_pri = CN_REMOTE; 1380 #else 1381 cp->cn_pri = CN_NORMAL; 1382 #endif 1383 } 1384 1385 void 1386 scicninit(struct consdev *cp) 1387 { 1388 1389 InitializeSci(scicn_speed); 1390 sciisconsole = 1; 1391 } 1392 1393 int 1394 scicngetc(dev_t dev) 1395 { 1396 int c; 1397 int s; 1398 1399 s = splserial(); 1400 c = sci_getc(); 1401 splx(s); 1402 1403 return (c); 1404 } 1405 1406 void 1407 scicnputc(dev_t dev, int c) 1408 { 1409 int s; 1410 1411 s = splserial(); 1412 sci_putc((u_char)c); 1413 splx(s); 1414 } 1415
Indexes created Wed Oct 01 18:09:54 GMT 2025