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sci.c revision 1.24
      1 /* $NetBSD: sci.c,v 1.24 2002/04/28 11:38:48 msaitoh Exp $ */
      2 
      3 /*-
      4  * Copyright (C) 1999 T.Horiuchi and SAITOH Masanobu.  All rights reserved.
      5  *
      6  * Redistribution and use in source and binary forms, with or without
      7  * modification, are permitted provided that the following conditions
      8  * are met:
      9  * 1. Redistributions of source code must retain the above copyright
     10  *    notice, this list of conditions and the following disclaimer.
     11  * 2. Redistributions in binary form must reproduce the above copyright
     12  *    notice, this list of conditions and the following disclaimer in the
     13  *    documentation and/or other materials provided with the distribution.
     14  * 3. The name of the author may not be used to endorse or promote products
     15  *    derived from this software without specific prior written permission.
     16  *
     17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     18  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     19  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     20  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     21  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     22  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
     26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     27  */
     28 
     29 /*-
     30  * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
     31  * All rights reserved.
     32  *
     33  * This code is derived from software contributed to The NetBSD Foundation
     34  * by Charles M. Hannum.
     35  *
     36  * Redistribution and use in source and binary forms, with or without
     37  * modification, are permitted provided that the following conditions
     38  * are met:
     39  * 1. Redistributions of source code must retain the above copyright
     40  *    notice, this list of conditions and the following disclaimer.
     41  * 2. Redistributions in binary form must reproduce the above copyright
     42  *    notice, this list of conditions and the following disclaimer in the
     43  *    documentation and/or other materials provided with the distribution.
     44  * 3. All advertising materials mentioning features or use of this software
     45  *    must display the following acknowledgement:
     46  *        This product includes software developed by the NetBSD
     47  *        Foundation, Inc. and its contributors.
     48  * 4. Neither the name of The NetBSD Foundation nor the names of its
     49  *    contributors may be used to endorse or promote products derived
     50  *    from this software without specific prior written permission.
     51  *
     52  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     53  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     54  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     55  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     56  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     57  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     58  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     59  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     60  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     61  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     62  * POSSIBILITY OF SUCH DAMAGE.
     63  */
     64 
     65 /*
     66  * Copyright (c) 1991 The Regents of the University of California.
     67  * All rights reserved.
     68  *
     69  * Redistribution and use in source and binary forms, with or without
     70  * modification, are permitted provided that the following conditions
     71  * are met:
     72  * 1. Redistributions of source code must retain the above copyright
     73  *    notice, this list of conditions and the following disclaimer.
     74  * 2. Redistributions in binary form must reproduce the above copyright
     75  *    notice, this list of conditions and the following disclaimer in the
     76  *    documentation and/or other materials provided with the distribution.
     77  * 3. All advertising materials mentioning features or use of this software
     78  *    must display the following acknowledgement:
     79  *	This product includes software developed by the University of
     80  *	California, Berkeley and its contributors.
     81  * 4. Neither the name of the University nor the names of its contributors
     82  *    may be used to endorse or promote products derived from this software
     83  *    without specific prior written permission.
     84  *
     85  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     86  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     87  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     88  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     89  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     90  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     91  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     92  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     93  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     94  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     95  * SUCH DAMAGE.
     96  *
     97  *	@(#)com.c	7.5 (Berkeley) 5/16/91
     98  */
     99 
    100 /*
    101  * SH internal serial driver
    102  *
    103  * This code is derived from both z8530tty.c and com.c
    104  */
    105 
    106 #include "opt_kgdb.h"
    107 #include "opt_sci.h"
    108 
    109 #include <sys/param.h>
    110 #include <sys/systm.h>
    111 #include <sys/tty.h>
    112 #include <sys/proc.h>
    113 #include <sys/conf.h>
    114 #include <sys/file.h>
    115 #include <sys/syslog.h>
    116 #include <sys/kernel.h>
    117 #include <sys/device.h>
    118 #include <sys/malloc.h>
    119 
    120 #include <dev/cons.h>
    121 
    122 #include <sh3/clock.h>
    123 #include <sh3/scireg.h>
    124 #include <sh3/pfcreg.h>
    125 #include <sh3/tmureg.h>
    126 #include <sh3/exception.h>
    127 #include <machine/intr.h>
    128 
    129 static void	scistart(struct tty *);
    130 static int	sciparam(struct tty *, struct termios *);
    131 
    132 void scicnprobe(struct consdev *);
    133 void scicninit(struct consdev *);
    134 void scicnputc(dev_t, int);
    135 int scicngetc(dev_t);
    136 void scicnpoolc(dev_t, int);
    137 int sciintr(void *);
    138 
    139 struct sci_softc {
    140 	struct device sc_dev;		/* boilerplate */
    141 	struct tty *sc_tty;
    142 	void *sc_si;
    143 	struct callout sc_diag_ch;
    144 
    145 #if 0
    146 	bus_space_tag_t sc_iot;		/* ISA i/o space identifier */
    147 	bus_space_handle_t   sc_ioh;	/* ISA io handle */
    148 
    149 	int sc_drq;
    150 
    151 	int sc_frequency;
    152 #endif
    153 
    154 	u_int sc_overflows,
    155 	      sc_floods,
    156 	      sc_errors;		/* number of retries so far */
    157 	u_char sc_status[7];		/* copy of registers */
    158 
    159 	int sc_hwflags;
    160 	int sc_swflags;
    161 	u_int sc_fifolen;		/* XXX always 0? */
    162 
    163 	u_int sc_r_hiwat,
    164 	      sc_r_lowat;
    165 	u_char *volatile sc_rbget,
    166 	       *volatile sc_rbput;
    167  	volatile u_int sc_rbavail;
    168 	u_char *sc_rbuf,
    169 	       *sc_ebuf;
    170 
    171  	u_char *sc_tba;			/* transmit buffer address */
    172  	u_int sc_tbc,			/* transmit byte count */
    173 	      sc_heldtbc;
    174 
    175 	volatile u_char sc_rx_flags,	/* receiver blocked */
    176 #define	RX_TTY_BLOCKED		0x01
    177 #define	RX_TTY_OVERFLOWED	0x02
    178 #define	RX_IBUF_BLOCKED		0x04
    179 #define	RX_IBUF_OVERFLOWED	0x08
    180 #define	RX_ANY_BLOCK		0x0f
    181 			sc_tx_busy,	/* working on an output chunk */
    182 			sc_tx_done,	/* done with one output chunk */
    183 			sc_tx_stopped,	/* H/W level stop (lost CTS) */
    184 			sc_st_check,	/* got a status interrupt */
    185 			sc_rx_ready;
    186 
    187 	volatile u_char sc_heldchange;
    188 };
    189 
    190 /* controller driver configuration */
    191 static int sci_match(struct device *, struct cfdata *, void *);
    192 static void sci_attach(struct device *, struct device *, void *);
    193 
    194 void	sci_break(struct sci_softc *, int);
    195 void	sci_iflush(struct sci_softc *);
    196 
    197 #define	integrate	static inline
    198 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
    199 void 	scisoft(void *);
    200 #else
    201 #ifndef __NO_SOFT_SERIAL_INTERRUPT
    202 void 	scisoft(void);
    203 #else
    204 void 	scisoft(void *);
    205 #endif
    206 #endif
    207 integrate void sci_rxsoft(struct sci_softc *, struct tty *);
    208 integrate void sci_txsoft(struct sci_softc *, struct tty *);
    209 integrate void sci_stsoft(struct sci_softc *, struct tty *);
    210 integrate void sci_schedrx(struct sci_softc *);
    211 void	scidiag(void *);
    212 
    213 #define	SCIUNIT_MASK		0x7ffff
    214 #define	SCIDIALOUT_MASK	0x80000
    215 
    216 #define	SCIUNIT(x)	(minor(x) & SCIUNIT_MASK)
    217 #define	SCIDIALOUT(x)	(minor(x) & SCIDIALOUT_MASK)
    218 
    219 /* Macros to clear/set/test flags. */
    220 #define SET(t, f)	(t) |= (f)
    221 #define CLR(t, f)	(t) &= ~(f)
    222 #define ISSET(t, f)	((t) & (f))
    223 
    224 /* Hardware flag masks */
    225 #define	SCI_HW_NOIEN	0x01
    226 #define	SCI_HW_FIFO	0x02
    227 #define	SCI_HW_FLOW	0x08
    228 #define	SCI_HW_DEV_OK	0x20
    229 #define	SCI_HW_CONSOLE	0x40
    230 #define	SCI_HW_KGDB	0x80
    231 
    232 /* Buffer size for character buffer */
    233 #define	SCI_RING_SIZE	2048
    234 
    235 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */
    236 u_int sci_rbuf_hiwat = (SCI_RING_SIZE * 1) / 4;
    237 u_int sci_rbuf_lowat = (SCI_RING_SIZE * 3) / 4;
    238 
    239 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
    240 int sciconscflag = CONMODE;
    241 int sciisconsole = 0;
    242 
    243 #ifdef SCICN_SPEED
    244 int scicn_speed = SCICN_SPEED;
    245 #else
    246 int scicn_speed = 9600;
    247 #endif
    248 
    249 #define	divrnd(n, q)	(((n)*2/(q)+1)/2)	/* divide and round off */
    250 
    251 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS
    252 #ifdef __NO_SOFT_SERIAL_INTERRUPT
    253 volatile int	sci_softintr_scheduled;
    254 struct callout sci_soft_ch = CALLOUT_INITIALIZER;
    255 #endif
    256 #endif
    257 
    258 u_int sci_rbuf_size = SCI_RING_SIZE;
    259 
    260 struct cfattach sci_ca = {
    261 	sizeof(struct sci_softc), sci_match, sci_attach
    262 };
    263 
    264 extern struct cfdriver sci_cd;
    265 
    266 cdev_decl(sci);
    267 
    268 void InitializeSci (unsigned int);
    269 
    270 /*
    271  * following functions are debugging prupose only
    272  */
    273 #define CR      0x0D
    274 #define I2C_ADRS (*(volatile unsigned int *)0xa8000000)
    275 #define USART_ON (unsigned int)~0x08
    276 
    277 void sci_putc(unsigned char);
    278 unsigned char sci_getc(void);
    279 int SciErrCheck(void);
    280 
    281 /*
    282  * InitializeSci
    283  * : unsigned int bps;
    284  * : SCI(Serial Communication Interface)
    285  */
    286 
    287 void
    288 InitializeSci(unsigned int bps)
    289 {
    290 
    291 	/* Initialize SCR */
    292 	SHREG_SCSCR = 0x00;
    293 
    294 	/* Serial Mode Register */
    295 	SHREG_SCSMR = 0x00;	/* Async,8bit,NonParity,Even,1Stop,NoMulti */
    296 
    297 	/* Bit Rate Register */
    298 	SHREG_SCBRR = divrnd(sh_clock_get_pclock(), 32 * bps) - 1;
    299 
    300 	/*
    301 	 * wait 1mSec, because Send/Recv must begin 1 bit period after
    302 	 * BRR is set.
    303 	 */
    304 	delay(1000);
    305 
    306 	/* Send permission, Receive permission ON */
    307 	SHREG_SCSCR = SCSCR_TE | SCSCR_RE;
    308 
    309 	/* Serial Status Register */
    310 	SHREG_SCSSR &= SCSSR_TDRE;	/* Clear Status */
    311 
    312 #if 0
    313 	I2C_ADRS &= ~0x08;	/* enable RS-232C */
    314 #endif
    315 }
    316 
    317 
    318 /*
    319  * sci_putc
    320  *  : unsigned char c;
    321  */
    322 void
    323 sci_putc(unsigned char c)
    324 {
    325 
    326 	if (c == '\n')
    327 		sci_putc('\r');
    328 
    329 	/* wait for ready */
    330 	while ((SHREG_SCSSR & SCSSR_TDRE) == NULL)
    331 		;
    332 
    333 	/* write send data to send register */
    334 	SHREG_SCTDR = c;
    335 
    336 	/* clear ready flag */
    337 	SHREG_SCSSR &= ~SCSSR_TDRE;
    338 }
    339 
    340 /*
    341  * : SciErrCheck
    342  *	0x20 = over run
    343  *	0x10 = frame error
    344  *	0x80 = parity error
    345  */
    346 int
    347 SciErrCheck(void)
    348 {
    349 
    350 	return(SHREG_SCSSR & (SCSSR_ORER | SCSSR_FER | SCSSR_PER));
    351 }
    352 
    353 /*
    354  * sci_getc
    355  */
    356 unsigned char
    357 sci_getc(void)
    358 {
    359 	unsigned char c, err_c;
    360 
    361 	while (((err_c = SHREG_SCSSR)
    362 		& (SCSSR_RDRF | SCSSR_ORER | SCSSR_FER | SCSSR_PER)) == 0)
    363 		;
    364 	if ((err_c & (SCSSR_ORER | SCSSR_FER | SCSSR_PER)) != 0) {
    365 		SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_FER | SCSSR_PER);
    366 		return(err_c |= 0x80);
    367 	}
    368 
    369 	c = SHREG_SCRDR;
    370 
    371 	SHREG_SCSSR &= ~SCSSR_RDRF;
    372 
    373 	return(c);
    374 }
    375 
    376 #if 0
    377 #define SCI_MAX_UNITS 2
    378 #else
    379 #define SCI_MAX_UNITS 1
    380 #endif
    381 
    382 
    383 static int
    384 sci_match(struct device *parent, struct cfdata *cfp, void *aux)
    385 {
    386 
    387 	if (strcmp(cfp->cf_driver->cd_name, "sci")
    388 	    || cfp->cf_unit >= SCI_MAX_UNITS) //XXX __BROKEN_CONFIG_UNIT_USAGE
    389 		return 0;
    390 
    391 	return 1;
    392 }
    393 
    394 static void
    395 sci_attach(struct device *parent, struct device *self, void *aux)
    396 {
    397 	struct sci_softc *sc = (struct sci_softc *)self;
    398 	struct tty *tp;
    399 
    400 	sc->sc_hwflags = 0;	/* XXX */
    401 	sc->sc_swflags = 0;	/* XXX */
    402 	sc->sc_fifolen = 0;	/* XXX */
    403 
    404 	if (sciisconsole) {
    405 		SET(sc->sc_hwflags, SCI_HW_CONSOLE);
    406 		SET(sc->sc_swflags, TIOCFLAG_SOFTCAR);
    407 		printf("\n%s: console\n", sc->sc_dev.dv_xname);
    408 	} else {
    409 		InitializeSci(9600);
    410 		printf("\n");
    411 	}
    412 
    413 	callout_init(&sc->sc_diag_ch);
    414 
    415 	intc_intr_establish(SH_INTEVT_SCI_ERI, IST_LEVEL, IPL_SERIAL, sciintr,
    416 	    sc);
    417 	intc_intr_establish(SH_INTEVT_SCI_RXI, IST_LEVEL, IPL_SERIAL, sciintr,
    418 	    sc);
    419 	intc_intr_establish(SH_INTEVT_SCI_TXI, IST_LEVEL, IPL_SERIAL, sciintr,
    420 	    sc);
    421 	intc_intr_establish(SH_INTEVT_SCI_TEI, IST_LEVEL, IPL_SERIAL, sciintr,
    422 	    sc);
    423 
    424 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
    425 	sc->sc_si = softintr_establish(IPL_SOFTSERIAL, scisoft, sc);
    426 #endif
    427 	SET(sc->sc_hwflags, SCI_HW_DEV_OK);
    428 
    429 	tp = ttymalloc();
    430 	tp->t_oproc = scistart;
    431 	tp->t_param = sciparam;
    432 	tp->t_hwiflow = NULL;
    433 
    434 	sc->sc_tty = tp;
    435 	sc->sc_rbuf = malloc(sci_rbuf_size << 1, M_DEVBUF, M_NOWAIT);
    436 	if (sc->sc_rbuf == NULL) {
    437 		printf("%s: unable to allocate ring buffer\n",
    438 		    sc->sc_dev.dv_xname);
    439 		return;
    440 	}
    441 	sc->sc_ebuf = sc->sc_rbuf + (sci_rbuf_size << 1);
    442 
    443 	tty_attach(tp);
    444 }
    445 
    446 /*
    447  * Start or restart transmission.
    448  */
    449 static void
    450 scistart(struct tty *tp)
    451 {
    452 	struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(tp->t_dev)];
    453 	int s;
    454 
    455 	s = spltty();
    456 	if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP))
    457 		goto out;
    458 	if (sc->sc_tx_stopped)
    459 		goto out;
    460 
    461 	if (tp->t_outq.c_cc <= tp->t_lowat) {
    462 		if (ISSET(tp->t_state, TS_ASLEEP)) {
    463 			CLR(tp->t_state, TS_ASLEEP);
    464 			wakeup(&tp->t_outq);
    465 		}
    466 		selwakeup(&tp->t_wsel);
    467 		if (tp->t_outq.c_cc == 0)
    468 			goto out;
    469 	}
    470 
    471 	/* Grab the first contiguous region of buffer space. */
    472 	{
    473 		u_char *tba;
    474 		int tbc;
    475 
    476 		tba = tp->t_outq.c_cf;
    477 		tbc = ndqb(&tp->t_outq, 0);
    478 
    479 		(void)splserial();
    480 
    481 		sc->sc_tba = tba;
    482 		sc->sc_tbc = tbc;
    483 	}
    484 
    485 	SET(tp->t_state, TS_BUSY);
    486 	sc->sc_tx_busy = 1;
    487 
    488 	/* Enable transmit completion interrupts if necessary. */
    489 	SHREG_SCSCR |= SCSCR_TIE | SCSCR_RIE;
    490 
    491 	/* Output the first byte of the contiguous buffer. */
    492 	{
    493 		if (sc->sc_tbc > 0) {
    494 			sci_putc(*(sc->sc_tba));
    495 			sc->sc_tba++;
    496 			sc->sc_tbc--;
    497 		}
    498 	}
    499 out:
    500 	splx(s);
    501 	return;
    502 }
    503 
    504 /*
    505  * Set SCI tty parameters from termios.
    506  * XXX - Should just copy the whole termios after
    507  * making sure all the changes could be done.
    508  */
    509 static int
    510 sciparam(struct tty *tp, struct termios *t)
    511 {
    512 	struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(tp->t_dev)];
    513 	int ospeed = t->c_ospeed;
    514 	int s;
    515 
    516 	if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
    517 		return (EIO);
    518 
    519 	/* Check requested parameters. */
    520 	if (ospeed < 0)
    521 		return (EINVAL);
    522 	if (t->c_ispeed && t->c_ispeed != t->c_ospeed)
    523 		return (EINVAL);
    524 
    525 	/*
    526 	 * For the console, always force CLOCAL and !HUPCL, so that the port
    527 	 * is always active.
    528 	 */
    529 	if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) ||
    530 	    ISSET(sc->sc_hwflags, SCI_HW_CONSOLE)) {
    531 		SET(t->c_cflag, CLOCAL);
    532 		CLR(t->c_cflag, HUPCL);
    533 	}
    534 
    535 	/*
    536 	 * If there were no changes, don't do anything.  This avoids dropping
    537 	 * input and improves performance when all we did was frob things like
    538 	 * VMIN and VTIME.
    539 	 */
    540 	if (tp->t_ospeed == t->c_ospeed &&
    541 	    tp->t_cflag == t->c_cflag)
    542 		return (0);
    543 
    544 #if 0
    545 /* XXX (msaitoh) */
    546 	lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag);
    547 #endif
    548 
    549 	s = splserial();
    550 
    551 	/*
    552 	 * Set the FIFO threshold based on the receive speed.
    553 	 *
    554 	 *  * If it's a low speed, it's probably a mouse or some other
    555 	 *    interactive device, so set the threshold low.
    556 	 *  * If it's a high speed, trim the trigger level down to prevent
    557 	 *    overflows.
    558 	 *  * Otherwise set it a bit higher.
    559 	 */
    560 #if 0
    561 /* XXX (msaitoh) */
    562 	if (ISSET(sc->sc_hwflags, SCI_HW_HAYESP))
    563 		sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8;
    564 	else if (ISSET(sc->sc_hwflags, SCI_HW_FIFO))
    565 		sc->sc_fifo = FIFO_ENABLE |
    566 		    (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 :
    567 		     t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4);
    568 	else
    569 		sc->sc_fifo = 0;
    570 #endif
    571 
    572 	/* And copy to tty. */
    573 	tp->t_ispeed = 0;
    574 	tp->t_ospeed = t->c_ospeed;
    575 	tp->t_cflag = t->c_cflag;
    576 
    577 	if (!sc->sc_heldchange) {
    578 		if (sc->sc_tx_busy) {
    579 			sc->sc_heldtbc = sc->sc_tbc;
    580 			sc->sc_tbc = 0;
    581 			sc->sc_heldchange = 1;
    582 		}
    583 #if 0
    584 /* XXX (msaitoh) */
    585 		else
    586 			sci_loadchannelregs(sc);
    587 #endif
    588 	}
    589 
    590 	if (!ISSET(t->c_cflag, CHWFLOW)) {
    591 		/* Disable the high water mark. */
    592 		sc->sc_r_hiwat = 0;
    593 		sc->sc_r_lowat = 0;
    594 		if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) {
    595 			CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
    596 			sci_schedrx(sc);
    597 		}
    598 	} else {
    599 		sc->sc_r_hiwat = sci_rbuf_hiwat;
    600 		sc->sc_r_lowat = sci_rbuf_lowat;
    601 	}
    602 
    603 	splx(s);
    604 
    605 #ifdef SCI_DEBUG
    606 	if (sci_debug)
    607 		scistatus(sc, "sciparam ");
    608 #endif
    609 
    610 	if (!ISSET(t->c_cflag, CHWFLOW)) {
    611 		if (sc->sc_tx_stopped) {
    612 			sc->sc_tx_stopped = 0;
    613 			scistart(tp);
    614 		}
    615 	}
    616 
    617 	return (0);
    618 }
    619 
    620 void
    621 sci_iflush(struct sci_softc *sc)
    622 {
    623 	unsigned char err_c;
    624 	volatile unsigned char c;
    625 
    626 	if (((err_c = SHREG_SCSSR)
    627 	     & (SCSSR_RDRF | SCSSR_ORER | SCSSR_FER | SCSSR_PER)) != 0) {
    628 
    629 		if ((err_c & (SCSSR_ORER | SCSSR_FER | SCSSR_PER)) != 0) {
    630 			SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_FER | SCSSR_PER);
    631 			return;
    632 		}
    633 
    634 		c = SHREG_SCRDR;
    635 
    636 		SHREG_SCSSR &= ~SCSSR_RDRF;
    637 	}
    638 }
    639 
    640 int
    641 sciopen(dev_t dev, int flag, int mode, struct proc *p)
    642 {
    643 	int unit = SCIUNIT(dev);
    644 	struct sci_softc *sc;
    645 	struct tty *tp;
    646 	int s, s2;
    647 	int error;
    648 
    649 	if (unit >= sci_cd.cd_ndevs)
    650 		return (ENXIO);
    651 	sc = sci_cd.cd_devs[unit];
    652 	if (sc == 0 || !ISSET(sc->sc_hwflags, SCI_HW_DEV_OK) ||
    653 	    sc->sc_rbuf == NULL)
    654 		return (ENXIO);
    655 
    656 	if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
    657 		return (ENXIO);
    658 
    659 #ifdef KGDB
    660 	/*
    661 	 * If this is the kgdb port, no other use is permitted.
    662 	 */
    663 	if (ISSET(sc->sc_hwflags, SCI_HW_KGDB))
    664 		return (EBUSY);
    665 #endif
    666 
    667 	tp = sc->sc_tty;
    668 
    669 	if (ISSET(tp->t_state, TS_ISOPEN) &&
    670 	    ISSET(tp->t_state, TS_XCLUDE) &&
    671 	    p->p_ucred->cr_uid != 0)
    672 		return (EBUSY);
    673 
    674 	s = spltty();
    675 
    676 	/*
    677 	 * Do the following iff this is a first open.
    678 	 */
    679 	if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
    680 		struct termios t;
    681 
    682 		tp->t_dev = dev;
    683 
    684 		s2 = splserial();
    685 
    686 		/* Turn on interrupts. */
    687 		SHREG_SCSCR |= SCSCR_TIE | SCSCR_RIE;
    688 
    689 		splx(s2);
    690 
    691 		/*
    692 		 * Initialize the termios status to the defaults.  Add in the
    693 		 * sticky bits from TIOCSFLAGS.
    694 		 */
    695 		t.c_ispeed = 0;
    696 		if (ISSET(sc->sc_hwflags, SCI_HW_CONSOLE)) {
    697 			t.c_ospeed = scicn_speed;
    698 			t.c_cflag = sciconscflag;
    699 		} else {
    700 			t.c_ospeed = TTYDEF_SPEED;
    701 			t.c_cflag = TTYDEF_CFLAG;
    702 		}
    703 		if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL))
    704 			SET(t.c_cflag, CLOCAL);
    705 		if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS))
    706 			SET(t.c_cflag, CRTSCTS);
    707 		if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF))
    708 			SET(t.c_cflag, MDMBUF);
    709 		/* Make sure sciparam() will do something. */
    710 		tp->t_ospeed = 0;
    711 		(void) sciparam(tp, &t);
    712 		tp->t_iflag = TTYDEF_IFLAG;
    713 		tp->t_oflag = TTYDEF_OFLAG;
    714 		tp->t_lflag = TTYDEF_LFLAG;
    715 		ttychars(tp);
    716 		ttsetwater(tp);
    717 
    718 		s2 = splserial();
    719 
    720 		/* Clear the input ring, and unblock. */
    721 		sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf;
    722 		sc->sc_rbavail = sci_rbuf_size;
    723 		sci_iflush(sc);
    724 		CLR(sc->sc_rx_flags, RX_ANY_BLOCK);
    725 #if 0
    726 /* XXX (msaitoh) */
    727 		sci_hwiflow(sc);
    728 #endif
    729 
    730 #ifdef SCI_DEBUG
    731 		if (sci_debug)
    732 			scistatus(sc, "sciopen  ");
    733 #endif
    734 
    735 		splx(s2);
    736 	}
    737 
    738 	splx(s);
    739 
    740 	error = ttyopen(tp, SCIDIALOUT(dev), ISSET(flag, O_NONBLOCK));
    741 	if (error)
    742 		goto bad;
    743 
    744 	error = (*tp->t_linesw->l_open)(dev, tp);
    745 	if (error)
    746 		goto bad;
    747 
    748 	return (0);
    749 
    750 bad:
    751 
    752 	return (error);
    753 }
    754 
    755 int
    756 sciclose(dev_t dev, int flag, int mode, struct proc *p)
    757 {
    758 	struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
    759 	struct tty *tp = sc->sc_tty;
    760 
    761 	/* XXX This is for cons.c. */
    762 	if (!ISSET(tp->t_state, TS_ISOPEN))
    763 		return (0);
    764 
    765 	(*tp->t_linesw->l_close)(tp, flag);
    766 	ttyclose(tp);
    767 
    768 	if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
    769 		return (0);
    770 
    771 	return (0);
    772 }
    773 
    774 int
    775 sciread(dev_t dev, struct uio *uio, int flag)
    776 {
    777 	struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
    778 	struct tty *tp = sc->sc_tty;
    779 
    780 	return ((*tp->t_linesw->l_read)(tp, uio, flag));
    781 }
    782 
    783 int
    784 sciwrite(dev_t dev, struct uio *uio, int flag)
    785 {
    786 	struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
    787 	struct tty *tp = sc->sc_tty;
    788 
    789 	return ((*tp->t_linesw->l_write)(tp, uio, flag));
    790 }
    791 
    792 int
    793 scipoll(dev_t dev, int events, struct proc *p)
    794 {
    795 	struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
    796 	struct tty *tp = sc->sc_tty;
    797 
    798 	return ((*tp->t_linesw->l_poll)(tp, events, p));
    799 }
    800 
    801 struct tty *
    802 scitty(dev_t dev)
    803 {
    804 	struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
    805 	struct tty *tp = sc->sc_tty;
    806 
    807 	return (tp);
    808 }
    809 
    810 int
    811 sciioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct proc *p)
    812 {
    813 	struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
    814 	struct tty *tp = sc->sc_tty;
    815 	int error;
    816 	int s;
    817 
    818 	if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
    819 		return (EIO);
    820 
    821 	error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, p);
    822 	if (error != EPASSTHROUGH)
    823 		return (error);
    824 
    825 	error = ttioctl(tp, cmd, data, flag, p);
    826 	if (error != EPASSTHROUGH)
    827 		return (error);
    828 
    829 	error = 0;
    830 
    831 	s = splserial();
    832 
    833 	switch (cmd) {
    834 	case TIOCSBRK:
    835 		sci_break(sc, 1);
    836 		break;
    837 
    838 	case TIOCCBRK:
    839 		sci_break(sc, 0);
    840 		break;
    841 
    842 	case TIOCGFLAGS:
    843 		*(int *)data = sc->sc_swflags;
    844 		break;
    845 
    846 	case TIOCSFLAGS:
    847 		error = suser(p->p_ucred, &p->p_acflag);
    848 		if (error)
    849 			break;
    850 		sc->sc_swflags = *(int *)data;
    851 		break;
    852 
    853 	default:
    854 		error = EPASSTHROUGH;
    855 		break;
    856 	}
    857 
    858 	splx(s);
    859 
    860 	return (error);
    861 }
    862 
    863 integrate void
    864 sci_schedrx(struct sci_softc *sc)
    865 {
    866 
    867 	sc->sc_rx_ready = 1;
    868 
    869 	/* Wake up the poller. */
    870 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
    871 	softintr_schedule(sc->sc_si);
    872 #else
    873 #ifndef __NO_SOFT_SERIAL_INTERRUPT
    874 	setsoftserial();
    875 #else
    876 	if (!sci_softintr_scheduled) {
    877 		sci_softintr_scheduled = 1;
    878 		callout_reset(&sci_soft_ch, 1, scisoft, NULL);
    879 	}
    880 #endif
    881 #endif
    882 }
    883 
    884 void
    885 sci_break(struct sci_softc *sc, int onoff)
    886 {
    887 
    888 	if (onoff)
    889 		SHREG_SCSSR &= ~SCSSR_TDRE;
    890 	else
    891 		SHREG_SCSSR |= SCSSR_TDRE;
    892 
    893 #if 0	/* XXX */
    894 	if (!sc->sc_heldchange) {
    895 		if (sc->sc_tx_busy) {
    896 			sc->sc_heldtbc = sc->sc_tbc;
    897 			sc->sc_tbc = 0;
    898 			sc->sc_heldchange = 1;
    899 		} else
    900 			sci_loadchannelregs(sc);
    901 	}
    902 #endif
    903 }
    904 
    905 /*
    906  * Stop output, e.g., for ^S or output flush.
    907  */
    908 void
    909 scistop(struct tty *tp, int flag)
    910 {
    911 	struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(tp->t_dev)];
    912 	int s;
    913 
    914 	s = splserial();
    915 	if (ISSET(tp->t_state, TS_BUSY)) {
    916 		/* Stop transmitting at the next chunk. */
    917 		sc->sc_tbc = 0;
    918 		sc->sc_heldtbc = 0;
    919 		if (!ISSET(tp->t_state, TS_TTSTOP))
    920 			SET(tp->t_state, TS_FLUSH);
    921 	}
    922 	splx(s);
    923 }
    924 
    925 void
    926 scidiag(void *arg)
    927 {
    928 	struct sci_softc *sc = arg;
    929 	int overflows, floods;
    930 	int s;
    931 
    932 	s = splserial();
    933 	overflows = sc->sc_overflows;
    934 	sc->sc_overflows = 0;
    935 	floods = sc->sc_floods;
    936 	sc->sc_floods = 0;
    937 	sc->sc_errors = 0;
    938 	splx(s);
    939 
    940 	log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n",
    941 	    sc->sc_dev.dv_xname,
    942 	    overflows, overflows == 1 ? "" : "s",
    943 	    floods, floods == 1 ? "" : "s");
    944 }
    945 
    946 integrate void
    947 sci_rxsoft(struct sci_softc *sc, struct tty *tp)
    948 {
    949 	int (*rint)(int c, struct tty *tp) = tp->t_linesw->l_rint;
    950 	u_char *get, *end;
    951 	u_int cc, scc;
    952 	u_char ssr;
    953 	int code;
    954 	int s;
    955 
    956 	end = sc->sc_ebuf;
    957 	get = sc->sc_rbget;
    958 	scc = cc = sci_rbuf_size - sc->sc_rbavail;
    959 
    960 	if (cc == sci_rbuf_size) {
    961 		sc->sc_floods++;
    962 		if (sc->sc_errors++ == 0)
    963 			callout_reset(&sc->sc_diag_ch, 60 * hz, scidiag, sc);
    964 	}
    965 
    966 	while (cc) {
    967 		code = get[0];
    968 		ssr = get[1];
    969 		if (ISSET(ssr, SCSSR_FER | SCSSR_PER)) {
    970 			if (ISSET(ssr, SCSSR_FER))
    971 				SET(code, TTY_FE);
    972 			if (ISSET(ssr, SCSSR_PER))
    973 				SET(code, TTY_PE);
    974 		}
    975 		if ((*rint)(code, tp) == -1) {
    976 			/*
    977 			 * The line discipline's buffer is out of space.
    978 			 */
    979 			if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) {
    980 				/*
    981 				 * We're either not using flow control, or the
    982 				 * line discipline didn't tell us to block for
    983 				 * some reason.  Either way, we have no way to
    984 				 * know when there's more space available, so
    985 				 * just drop the rest of the data.
    986 				 */
    987 				get += cc << 1;
    988 				if (get >= end)
    989 					get -= sci_rbuf_size << 1;
    990 				cc = 0;
    991 			} else {
    992 				/*
    993 				 * Don't schedule any more receive processing
    994 				 * until the line discipline tells us there's
    995 				 * space available (through scihwiflow()).
    996 				 * Leave the rest of the data in the input
    997 				 * buffer.
    998 				 */
    999 				SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
   1000 			}
   1001 			break;
   1002 		}
   1003 		get += 2;
   1004 		if (get >= end)
   1005 			get = sc->sc_rbuf;
   1006 		cc--;
   1007 	}
   1008 
   1009 	if (cc != scc) {
   1010 		sc->sc_rbget = get;
   1011 		s = splserial();
   1012 		cc = sc->sc_rbavail += scc - cc;
   1013 		/* Buffers should be ok again, release possible block. */
   1014 		if (cc >= sc->sc_r_lowat) {
   1015 			if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) {
   1016 				CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED);
   1017 				SHREG_SCSCR |= SCSCR_RIE;
   1018 			}
   1019 #if 0
   1020 			if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) {
   1021 				CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED);
   1022 				sci_hwiflow(sc);
   1023 			}
   1024 #endif
   1025 		}
   1026 		splx(s);
   1027 	}
   1028 }
   1029 
   1030 integrate void
   1031 sci_txsoft(sc, tp)
   1032 	struct sci_softc *sc;
   1033 	struct tty *tp;
   1034 {
   1035 
   1036 	CLR(tp->t_state, TS_BUSY);
   1037 	if (ISSET(tp->t_state, TS_FLUSH))
   1038 		CLR(tp->t_state, TS_FLUSH);
   1039 	else
   1040 		ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf));
   1041 	(*tp->t_linesw->l_start)(tp);
   1042 }
   1043 
   1044 integrate void
   1045 sci_stsoft(struct sci_softc *sc, struct tty *tp)
   1046 {
   1047 #if 0
   1048 /* XXX (msaitoh) */
   1049 	u_char msr, delta;
   1050 	int s;
   1051 
   1052 	s = splserial();
   1053 	msr = sc->sc_msr;
   1054 	delta = sc->sc_msr_delta;
   1055 	sc->sc_msr_delta = 0;
   1056 	splx(s);
   1057 
   1058 	if (ISSET(delta, sc->sc_msr_dcd)) {
   1059 		/*
   1060 		 * Inform the tty layer that carrier detect changed.
   1061 		 */
   1062 		(void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD));
   1063 	}
   1064 
   1065 	if (ISSET(delta, sc->sc_msr_cts)) {
   1066 		/* Block or unblock output according to flow control. */
   1067 		if (ISSET(msr, sc->sc_msr_cts)) {
   1068 			sc->sc_tx_stopped = 0;
   1069 			(*tp->t_linesw->l_start)(tp);
   1070 		} else {
   1071 			sc->sc_tx_stopped = 1;
   1072 		}
   1073 	}
   1074 
   1075 #ifdef SCI_DEBUG
   1076 	if (sci_debug)
   1077 		scistatus(sc, "sci_stsoft");
   1078 #endif
   1079 #endif
   1080 }
   1081 
   1082 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
   1083 void
   1084 scisoft(void *arg)
   1085 {
   1086 	struct sci_softc *sc = arg;
   1087 	struct tty *tp;
   1088 
   1089 	if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
   1090 		return;
   1091 
   1092 	{
   1093 #else
   1094 void
   1095 #ifndef __NO_SOFT_SERIAL_INTERRUPT
   1096 scisoft()
   1097 #else
   1098 scisoft(void *arg)
   1099 #endif
   1100 {
   1101 	struct sci_softc	*sc;
   1102 	struct tty	*tp;
   1103 	int	unit;
   1104 #ifdef __NO_SOFT_SERIAL_INTERRUPT
   1105 	int s;
   1106 
   1107 	s = splsoftserial();
   1108 	sci_softintr_scheduled = 0;
   1109 #endif
   1110 
   1111 	for (unit = 0; unit < sci_cd.cd_ndevs; unit++) {
   1112 		sc = sci_cd.cd_devs[unit];
   1113 		if (sc == NULL || !ISSET(sc->sc_hwflags, SCI_HW_DEV_OK))
   1114 			continue;
   1115 
   1116 		if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
   1117 			continue;
   1118 
   1119 		tp = sc->sc_tty;
   1120 		if (tp == NULL)
   1121 			continue;
   1122 		if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0)
   1123 			continue;
   1124 #endif
   1125 		tp = sc->sc_tty;
   1126 
   1127 		if (sc->sc_rx_ready) {
   1128 			sc->sc_rx_ready = 0;
   1129 			sci_rxsoft(sc, tp);
   1130 		}
   1131 
   1132 #if 0
   1133 		if (sc->sc_st_check) {
   1134 			sc->sc_st_check = 0;
   1135 			sci_stsoft(sc, tp);
   1136 		}
   1137 #endif
   1138 
   1139 		if (sc->sc_tx_done) {
   1140 			sc->sc_tx_done = 0;
   1141 			sci_txsoft(sc, tp);
   1142 		}
   1143 	}
   1144 
   1145 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS
   1146 #ifdef __NO_SOFT_SERIAL_INTERRUPT
   1147 	splx(s);
   1148 #endif
   1149 #endif
   1150 }
   1151 
   1152 int
   1153 sciintr(void *arg)
   1154 {
   1155 	struct sci_softc *sc = arg;
   1156 	u_char *put, *end;
   1157 	u_int cc;
   1158 	u_short ssr;
   1159 
   1160 	if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
   1161 		return (0);
   1162 
   1163 	end = sc->sc_ebuf;
   1164 	put = sc->sc_rbput;
   1165 	cc = sc->sc_rbavail;
   1166 
   1167 	ssr = SHREG_SCSSR;
   1168 	if (ISSET(ssr, SCSSR_FER)) {
   1169 		SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_PER | SCSSR_FER);
   1170 #if defined(DDB) || defined(KGDB)
   1171 #ifdef SH4
   1172 		if ((SHREG_SCSPTR & SCSPTR_SPB0DT) != 0) {
   1173 #else
   1174 		if ((SHREG_SCSPDR & SCSPDR_SCP0DT) != 0) {
   1175 #endif
   1176 #ifdef DDB
   1177 			if (ISSET(sc->sc_hwflags, SCI_HW_CONSOLE)) {
   1178 				console_debugger();
   1179 			}
   1180 #endif
   1181 #ifdef KGDB
   1182 			if (ISSET(sc->sc_hwflags, SCI_HW_KGDB)) {
   1183 				kgdb_connect(1);
   1184 			}
   1185 #endif
   1186 		}
   1187 #endif /* DDB || KGDB */
   1188 	}
   1189 	if ((SHREG_SCSSR & SCSSR_RDRF) != 0) {
   1190 		if (cc > 0) {
   1191 			put[0] = SHREG_SCRDR;
   1192 			put[1] = SHREG_SCSSR & 0x00ff;
   1193 
   1194 			SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_FER | SCSSR_PER |
   1195 					 SCSSR_RDRF);
   1196 
   1197 			put += 2;
   1198 			if (put >= end)
   1199 				put = sc->sc_rbuf;
   1200 			cc--;
   1201 		}
   1202 
   1203 		/*
   1204 		 * Current string of incoming characters ended because
   1205 		 * no more data was available or we ran out of space.
   1206 		 * Schedule a receive event if any data was received.
   1207 		 * If we're out of space, turn off receive interrupts.
   1208 		 */
   1209 		sc->sc_rbput = put;
   1210 		sc->sc_rbavail = cc;
   1211 		if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED))
   1212 			sc->sc_rx_ready = 1;
   1213 
   1214 		/*
   1215 		 * See if we are in danger of overflowing a buffer. If
   1216 		 * so, use hardware flow control to ease the pressure.
   1217 		 */
   1218 		if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) &&
   1219 		    cc < sc->sc_r_hiwat) {
   1220 			SET(sc->sc_rx_flags, RX_IBUF_BLOCKED);
   1221 #if 0
   1222 			sci_hwiflow(sc);
   1223 #endif
   1224 		}
   1225 
   1226 		/*
   1227 		 * If we're out of space, disable receive interrupts
   1228 		 * until the queue has drained a bit.
   1229 		 */
   1230 		if (!cc) {
   1231 			SHREG_SCSCR &= ~SCSCR_RIE;
   1232 		}
   1233 	} else {
   1234 		if (SHREG_SCSSR & SCSSR_RDRF) {
   1235 			SHREG_SCSCR &= ~(SCSCR_TIE | SCSCR_RIE);
   1236 		}
   1237 	}
   1238 
   1239 #if 0
   1240 	msr = bus_space_read_1(iot, ioh, sci_msr);
   1241 	delta = msr ^ sc->sc_msr;
   1242 	sc->sc_msr = msr;
   1243 	if (ISSET(delta, sc->sc_msr_mask)) {
   1244 		SET(sc->sc_msr_delta, delta);
   1245 
   1246 		/*
   1247 		 * Pulse-per-second clock signal on edge of DCD?
   1248 		 */
   1249 		if (ISSET(delta, sc->sc_ppsmask)) {
   1250 			struct timeval tv;
   1251 			if (ISSET(msr, sc->sc_ppsmask) ==
   1252 			    sc->sc_ppsassert) {
   1253 				/* XXX nanotime() */
   1254 				microtime(&tv);
   1255 				TIMEVAL_TO_TIMESPEC(&tv,
   1256 						    &sc->ppsinfo.assert_timestamp);
   1257 				if (sc->ppsparam.mode & PPS_OFFSETASSERT) {
   1258 					timespecadd(&sc->ppsinfo.assert_timestamp,
   1259 						    &sc->ppsparam.assert_offset,
   1260 						    &sc->ppsinfo.assert_timestamp);
   1261 					TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.assert_timestamp);
   1262 				}
   1263 
   1264 #ifdef PPS_SYNC
   1265 				if (sc->ppsparam.mode & PPS_HARDPPSONASSERT)
   1266 					hardpps(&tv, tv.tv_usec);
   1267 #endif
   1268 				sc->ppsinfo.assert_sequence++;
   1269 				sc->ppsinfo.current_mode =
   1270 					sc->ppsparam.mode;
   1271 
   1272 			} else if (ISSET(msr, sc->sc_ppsmask) ==
   1273 				   sc->sc_ppsclear) {
   1274 				/* XXX nanotime() */
   1275 				microtime(&tv);
   1276 				TIMEVAL_TO_TIMESPEC(&tv,
   1277 						    &sc->ppsinfo.clear_timestamp);
   1278 				if (sc->ppsparam.mode & PPS_OFFSETCLEAR) {
   1279 					timespecadd(&sc->ppsinfo.clear_timestamp,
   1280 						    &sc->ppsparam.clear_offset,
   1281 						    &sc->ppsinfo.clear_timestamp);
   1282 					TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.clear_timestamp);
   1283 				}
   1284 
   1285 #ifdef PPS_SYNC
   1286 				if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR)
   1287 					hardpps(&tv, tv.tv_usec);
   1288 #endif
   1289 				sc->ppsinfo.clear_sequence++;
   1290 				sc->ppsinfo.current_mode =
   1291 					sc->ppsparam.mode;
   1292 			}
   1293 		}
   1294 
   1295 		/*
   1296 		 * Stop output immediately if we lose the output
   1297 		 * flow control signal or carrier detect.
   1298 		 */
   1299 		if (ISSET(~msr, sc->sc_msr_mask)) {
   1300 			sc->sc_tbc = 0;
   1301 			sc->sc_heldtbc = 0;
   1302 #ifdef SCI_DEBUG
   1303 			if (sci_debug)
   1304 				scistatus(sc, "sciintr  ");
   1305 #endif
   1306 		}
   1307 
   1308 		sc->sc_st_check = 1;
   1309 	}
   1310 #endif
   1311 
   1312 	/*
   1313 	 * Done handling any receive interrupts. See if data can be
   1314 	 * transmitted as well. Schedule tx done event if no data left
   1315 	 * and tty was marked busy.
   1316 	 */
   1317 	if ((SHREG_SCSSR & SCSSR_TDRE) != 0) {
   1318 		/*
   1319 		 * If we've delayed a parameter change, do it now, and restart
   1320 		 * output.
   1321 		 */
   1322 		if (sc->sc_heldchange) {
   1323 			sc->sc_heldchange = 0;
   1324 			sc->sc_tbc = sc->sc_heldtbc;
   1325 			sc->sc_heldtbc = 0;
   1326 		}
   1327 
   1328 		/* Output the next chunk of the contiguous buffer, if any. */
   1329 		if (sc->sc_tbc > 0) {
   1330 			sci_putc(*(sc->sc_tba));
   1331 			sc->sc_tba++;
   1332 			sc->sc_tbc--;
   1333 		} else {
   1334 			/* Disable transmit completion interrupts if necessary. */
   1335 #if 0
   1336 			if (ISSET(sc->sc_ier, IER_ETXRDY))
   1337 #endif
   1338 				SHREG_SCSCR &= ~SCSCR_TIE;
   1339 
   1340 			if (sc->sc_tx_busy) {
   1341 				sc->sc_tx_busy = 0;
   1342 				sc->sc_tx_done = 1;
   1343 			}
   1344 		}
   1345 	}
   1346 
   1347 	/* Wake up the poller. */
   1348 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
   1349 	softintr_schedule(sc->sc_si);
   1350 #else
   1351 #ifndef __NO_SOFT_SERIAL_INTERRUPT
   1352 	setsoftserial();
   1353 #else
   1354 	if (!sci_softintr_scheduled) {
   1355 		sci_softintr_scheduled = 1;
   1356 		callout_reset(&sci_soft_ch, 1, scisoft, 1);
   1357 	}
   1358 #endif
   1359 #endif
   1360 
   1361 #if NRND > 0 && defined(RND_SCI)
   1362 	rnd_add_uint32(&sc->rnd_source, iir | lsr);
   1363 #endif
   1364 
   1365 	return (1);
   1366 }
   1367 
   1368 void
   1369 scicnprobe(cp)
   1370 	struct consdev *cp;
   1371 {
   1372 	int maj;
   1373 
   1374 	/* locate the major number */
   1375 	for (maj = 0; maj < nchrdev; maj++)
   1376 		if (cdevsw[maj].d_open == sciopen)
   1377 			break;
   1378 
   1379 	/* Initialize required fields. */
   1380 	cp->cn_dev = makedev(maj, 0);
   1381 #ifdef SCICONSOLE
   1382 	cp->cn_pri = CN_REMOTE;
   1383 #else
   1384 	cp->cn_pri = CN_NORMAL;
   1385 #endif
   1386 }
   1387 
   1388 void
   1389 scicninit(struct consdev *cp)
   1390 {
   1391 
   1392 	InitializeSci(scicn_speed);
   1393 	sciisconsole = 1;
   1394 }
   1395 
   1396 int
   1397 scicngetc(dev_t dev)
   1398 {
   1399 	int c;
   1400 	int s;
   1401 
   1402 	s = splserial();
   1403 	c = sci_getc();
   1404 	splx(s);
   1405 
   1406 	return (c);
   1407 }
   1408 
   1409 void
   1410 scicnputc(dev_t dev, int c)
   1411 {
   1412 	int s;
   1413 
   1414 	s = splserial();
   1415 	sci_putc((u_char)c);
   1416 	splx(s);
   1417 }
   1418