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sci.c revision 1.28
      1 /* $NetBSD: sci.c,v 1.28 2002/09/06 13:18:43 gehenna Exp $ */
      2 
      3 /*-
      4  * Copyright (C) 1999 T.Horiuchi and SAITOH Masanobu.  All rights reserved.
      5  *
      6  * Redistribution and use in source and binary forms, with or without
      7  * modification, are permitted provided that the following conditions
      8  * are met:
      9  * 1. Redistributions of source code must retain the above copyright
     10  *    notice, this list of conditions and the following disclaimer.
     11  * 2. Redistributions in binary form must reproduce the above copyright
     12  *    notice, this list of conditions and the following disclaimer in the
     13  *    documentation and/or other materials provided with the distribution.
     14  * 3. The name of the author may not be used to endorse or promote products
     15  *    derived from this software without specific prior written permission.
     16  *
     17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     18  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     19  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     20  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     21  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     22  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
     26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     27  */
     28 
     29 /*-
     30  * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
     31  * All rights reserved.
     32  *
     33  * This code is derived from software contributed to The NetBSD Foundation
     34  * by Charles M. Hannum.
     35  *
     36  * Redistribution and use in source and binary forms, with or without
     37  * modification, are permitted provided that the following conditions
     38  * are met:
     39  * 1. Redistributions of source code must retain the above copyright
     40  *    notice, this list of conditions and the following disclaimer.
     41  * 2. Redistributions in binary form must reproduce the above copyright
     42  *    notice, this list of conditions and the following disclaimer in the
     43  *    documentation and/or other materials provided with the distribution.
     44  * 3. All advertising materials mentioning features or use of this software
     45  *    must display the following acknowledgement:
     46  *        This product includes software developed by the NetBSD
     47  *        Foundation, Inc. and its contributors.
     48  * 4. Neither the name of The NetBSD Foundation nor the names of its
     49  *    contributors may be used to endorse or promote products derived
     50  *    from this software without specific prior written permission.
     51  *
     52  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     53  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     54  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     55  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     56  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     57  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     58  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     59  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     60  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     61  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     62  * POSSIBILITY OF SUCH DAMAGE.
     63  */
     64 
     65 /*
     66  * Copyright (c) 1991 The Regents of the University of California.
     67  * All rights reserved.
     68  *
     69  * Redistribution and use in source and binary forms, with or without
     70  * modification, are permitted provided that the following conditions
     71  * are met:
     72  * 1. Redistributions of source code must retain the above copyright
     73  *    notice, this list of conditions and the following disclaimer.
     74  * 2. Redistributions in binary form must reproduce the above copyright
     75  *    notice, this list of conditions and the following disclaimer in the
     76  *    documentation and/or other materials provided with the distribution.
     77  * 3. All advertising materials mentioning features or use of this software
     78  *    must display the following acknowledgement:
     79  *	This product includes software developed by the University of
     80  *	California, Berkeley and its contributors.
     81  * 4. Neither the name of the University nor the names of its contributors
     82  *    may be used to endorse or promote products derived from this software
     83  *    without specific prior written permission.
     84  *
     85  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     86  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     87  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     88  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     89  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     90  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     91  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     92  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     93  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     94  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     95  * SUCH DAMAGE.
     96  *
     97  *	@(#)com.c	7.5 (Berkeley) 5/16/91
     98  */
     99 
    100 /*
    101  * SH internal serial driver
    102  *
    103  * This code is derived from both z8530tty.c and com.c
    104  */
    105 
    106 #include "opt_kgdb.h"
    107 #include "opt_sci.h"
    108 
    109 #include <sys/param.h>
    110 #include <sys/systm.h>
    111 #include <sys/tty.h>
    112 #include <sys/proc.h>
    113 #include <sys/conf.h>
    114 #include <sys/file.h>
    115 #include <sys/syslog.h>
    116 #include <sys/kernel.h>
    117 #include <sys/device.h>
    118 #include <sys/malloc.h>
    119 
    120 #include <dev/cons.h>
    121 
    122 #include <sh3/clock.h>
    123 #include <sh3/scireg.h>
    124 #include <sh3/pfcreg.h>
    125 #include <sh3/tmureg.h>
    126 #include <sh3/exception.h>
    127 #include <machine/intr.h>
    128 
    129 static void	scistart(struct tty *);
    130 static int	sciparam(struct tty *, struct termios *);
    131 
    132 void scicnprobe(struct consdev *);
    133 void scicninit(struct consdev *);
    134 void scicnputc(dev_t, int);
    135 int scicngetc(dev_t);
    136 void scicnpoolc(dev_t, int);
    137 int sciintr(void *);
    138 
    139 struct sci_softc {
    140 	struct device sc_dev;		/* boilerplate */
    141 	struct tty *sc_tty;
    142 	void *sc_si;
    143 	struct callout sc_diag_ch;
    144 
    145 #if 0
    146 	bus_space_tag_t sc_iot;		/* ISA i/o space identifier */
    147 	bus_space_handle_t   sc_ioh;	/* ISA io handle */
    148 
    149 	int sc_drq;
    150 
    151 	int sc_frequency;
    152 #endif
    153 
    154 	u_int sc_overflows,
    155 	      sc_floods,
    156 	      sc_errors;		/* number of retries so far */
    157 	u_char sc_status[7];		/* copy of registers */
    158 
    159 	int sc_hwflags;
    160 	int sc_swflags;
    161 	u_int sc_fifolen;		/* XXX always 0? */
    162 
    163 	u_int sc_r_hiwat,
    164 	      sc_r_lowat;
    165 	u_char *volatile sc_rbget,
    166 	       *volatile sc_rbput;
    167  	volatile u_int sc_rbavail;
    168 	u_char *sc_rbuf,
    169 	       *sc_ebuf;
    170 
    171  	u_char *sc_tba;			/* transmit buffer address */
    172  	u_int sc_tbc,			/* transmit byte count */
    173 	      sc_heldtbc;
    174 
    175 	volatile u_char sc_rx_flags,	/* receiver blocked */
    176 #define	RX_TTY_BLOCKED		0x01
    177 #define	RX_TTY_OVERFLOWED	0x02
    178 #define	RX_IBUF_BLOCKED		0x04
    179 #define	RX_IBUF_OVERFLOWED	0x08
    180 #define	RX_ANY_BLOCK		0x0f
    181 			sc_tx_busy,	/* working on an output chunk */
    182 			sc_tx_done,	/* done with one output chunk */
    183 			sc_tx_stopped,	/* H/W level stop (lost CTS) */
    184 			sc_st_check,	/* got a status interrupt */
    185 			sc_rx_ready;
    186 
    187 	volatile u_char sc_heldchange;
    188 };
    189 
    190 /* controller driver configuration */
    191 static int sci_match(struct device *, struct cfdata *, void *);
    192 static void sci_attach(struct device *, struct device *, void *);
    193 
    194 void	sci_break(struct sci_softc *, int);
    195 void	sci_iflush(struct sci_softc *);
    196 
    197 #define	integrate	static inline
    198 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
    199 void 	scisoft(void *);
    200 #else
    201 #ifndef __NO_SOFT_SERIAL_INTERRUPT
    202 void 	scisoft(void);
    203 #else
    204 void 	scisoft(void *);
    205 #endif
    206 #endif
    207 integrate void sci_rxsoft(struct sci_softc *, struct tty *);
    208 integrate void sci_txsoft(struct sci_softc *, struct tty *);
    209 integrate void sci_stsoft(struct sci_softc *, struct tty *);
    210 integrate void sci_schedrx(struct sci_softc *);
    211 void	scidiag(void *);
    212 
    213 #define	SCIUNIT_MASK		0x7ffff
    214 #define	SCIDIALOUT_MASK	0x80000
    215 
    216 #define	SCIUNIT(x)	(minor(x) & SCIUNIT_MASK)
    217 #define	SCIDIALOUT(x)	(minor(x) & SCIDIALOUT_MASK)
    218 
    219 /* Macros to clear/set/test flags. */
    220 #define	SET(t, f)	(t) |= (f)
    221 #define	CLR(t, f)	(t) &= ~(f)
    222 #define	ISSET(t, f)	((t) & (f))
    223 
    224 /* Hardware flag masks */
    225 #define	SCI_HW_NOIEN	0x01
    226 #define	SCI_HW_FIFO	0x02
    227 #define	SCI_HW_FLOW	0x08
    228 #define	SCI_HW_DEV_OK	0x20
    229 #define	SCI_HW_CONSOLE	0x40
    230 #define	SCI_HW_KGDB	0x80
    231 
    232 /* Buffer size for character buffer */
    233 #define	SCI_RING_SIZE	2048
    234 
    235 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */
    236 u_int sci_rbuf_hiwat = (SCI_RING_SIZE * 1) / 4;
    237 u_int sci_rbuf_lowat = (SCI_RING_SIZE * 3) / 4;
    238 
    239 #define	CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
    240 int sciconscflag = CONMODE;
    241 int sciisconsole = 0;
    242 
    243 #ifdef SCICN_SPEED
    244 int scicn_speed = SCICN_SPEED;
    245 #else
    246 int scicn_speed = 9600;
    247 #endif
    248 
    249 #define	divrnd(n, q)	(((n)*2/(q)+1)/2)	/* divide and round off */
    250 
    251 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS
    252 #ifdef __NO_SOFT_SERIAL_INTERRUPT
    253 volatile int	sci_softintr_scheduled;
    254 struct callout sci_soft_ch = CALLOUT_INITIALIZER;
    255 #endif
    256 #endif
    257 
    258 u_int sci_rbuf_size = SCI_RING_SIZE;
    259 
    260 struct cfattach sci_ca = {
    261 	sizeof(struct sci_softc), sci_match, sci_attach
    262 };
    263 
    264 extern struct cfdriver sci_cd;
    265 
    266 dev_type_open(sciopen);
    267 dev_type_close(sciclose);
    268 dev_type_read(sciread);
    269 dev_type_write(sciwrite);
    270 dev_type_ioctl(sciioctl);
    271 dev_type_stop(scistop);
    272 dev_type_tty(scitty);
    273 dev_type_poll(scipoll);
    274 
    275 const struct cdevsw sci_cdevsw = {
    276 	sciopen, sciclose, sciread, sciwrite, sciioctl,
    277 	scistop, scitty, scipoll, nommap, D_TTY
    278 };
    279 
    280 void InitializeSci (unsigned int);
    281 
    282 /*
    283  * following functions are debugging prupose only
    284  */
    285 #define	CR      0x0D
    286 #define	I2C_ADRS (*(volatile unsigned int *)0xa8000000)
    287 #define	USART_ON (unsigned int)~0x08
    288 
    289 void sci_putc(unsigned char);
    290 unsigned char sci_getc(void);
    291 int SciErrCheck(void);
    292 
    293 /*
    294  * InitializeSci
    295  * : unsigned int bps;
    296  * : SCI(Serial Communication Interface)
    297  */
    298 
    299 void
    300 InitializeSci(unsigned int bps)
    301 {
    302 
    303 	/* Initialize SCR */
    304 	SHREG_SCSCR = 0x00;
    305 
    306 	/* Serial Mode Register */
    307 	SHREG_SCSMR = 0x00;	/* Async,8bit,NonParity,Even,1Stop,NoMulti */
    308 
    309 	/* Bit Rate Register */
    310 	SHREG_SCBRR = divrnd(sh_clock_get_pclock(), 32 * bps) - 1;
    311 
    312 	/*
    313 	 * wait 1mSec, because Send/Recv must begin 1 bit period after
    314 	 * BRR is set.
    315 	 */
    316 	delay(1000);
    317 
    318 	/* Send permission, Receive permission ON */
    319 	SHREG_SCSCR = SCSCR_TE | SCSCR_RE;
    320 
    321 	/* Serial Status Register */
    322 	SHREG_SCSSR &= SCSSR_TDRE;	/* Clear Status */
    323 
    324 #if 0
    325 	I2C_ADRS &= ~0x08;	/* enable RS-232C */
    326 #endif
    327 }
    328 
    329 
    330 /*
    331  * sci_putc
    332  *  : unsigned char c;
    333  */
    334 void
    335 sci_putc(unsigned char c)
    336 {
    337 
    338 	/* wait for ready */
    339 	while ((SHREG_SCSSR & SCSSR_TDRE) == NULL)
    340 		;
    341 
    342 	/* write send data to send register */
    343 	SHREG_SCTDR = c;
    344 
    345 	/* clear ready flag */
    346 	SHREG_SCSSR &= ~SCSSR_TDRE;
    347 }
    348 
    349 /*
    350  * : SciErrCheck
    351  *	0x20 = over run
    352  *	0x10 = frame error
    353  *	0x80 = parity error
    354  */
    355 int
    356 SciErrCheck(void)
    357 {
    358 
    359 	return(SHREG_SCSSR & (SCSSR_ORER | SCSSR_FER | SCSSR_PER));
    360 }
    361 
    362 /*
    363  * sci_getc
    364  */
    365 unsigned char
    366 sci_getc(void)
    367 {
    368 	unsigned char c, err_c;
    369 
    370 	while (((err_c = SHREG_SCSSR)
    371 		& (SCSSR_RDRF | SCSSR_ORER | SCSSR_FER | SCSSR_PER)) == 0)
    372 		;
    373 	if ((err_c & (SCSSR_ORER | SCSSR_FER | SCSSR_PER)) != 0) {
    374 		SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_FER | SCSSR_PER);
    375 		return(err_c |= 0x80);
    376 	}
    377 
    378 	c = SHREG_SCRDR;
    379 
    380 	SHREG_SCSSR &= ~SCSSR_RDRF;
    381 
    382 	return(c);
    383 }
    384 
    385 #if 0
    386 #define	SCI_MAX_UNITS 2
    387 #else
    388 #define	SCI_MAX_UNITS 1
    389 #endif
    390 
    391 
    392 static int
    393 sci_match(struct device *parent, struct cfdata *cfp, void *aux)
    394 {
    395 
    396 	if (strcmp(cfp->cf_driver->cd_name, "sci")
    397 	    || cfp->cf_unit >= SCI_MAX_UNITS) //XXX __BROKEN_CONFIG_UNIT_USAGE
    398 		return 0;
    399 
    400 	return 1;
    401 }
    402 
    403 static void
    404 sci_attach(struct device *parent, struct device *self, void *aux)
    405 {
    406 	struct sci_softc *sc = (struct sci_softc *)self;
    407 	struct tty *tp;
    408 
    409 	sc->sc_hwflags = 0;	/* XXX */
    410 	sc->sc_swflags = 0;	/* XXX */
    411 	sc->sc_fifolen = 0;	/* XXX */
    412 
    413 	if (sciisconsole) {
    414 		SET(sc->sc_hwflags, SCI_HW_CONSOLE);
    415 		SET(sc->sc_swflags, TIOCFLAG_SOFTCAR);
    416 		printf("\n%s: console\n", sc->sc_dev.dv_xname);
    417 	} else {
    418 		InitializeSci(9600);
    419 		printf("\n");
    420 	}
    421 
    422 	callout_init(&sc->sc_diag_ch);
    423 
    424 	intc_intr_establish(SH_INTEVT_SCI_ERI, IST_LEVEL, IPL_SERIAL, sciintr,
    425 	    sc);
    426 	intc_intr_establish(SH_INTEVT_SCI_RXI, IST_LEVEL, IPL_SERIAL, sciintr,
    427 	    sc);
    428 	intc_intr_establish(SH_INTEVT_SCI_TXI, IST_LEVEL, IPL_SERIAL, sciintr,
    429 	    sc);
    430 	intc_intr_establish(SH_INTEVT_SCI_TEI, IST_LEVEL, IPL_SERIAL, sciintr,
    431 	    sc);
    432 
    433 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
    434 	sc->sc_si = softintr_establish(IPL_SOFTSERIAL, scisoft, sc);
    435 #endif
    436 	SET(sc->sc_hwflags, SCI_HW_DEV_OK);
    437 
    438 	tp = ttymalloc();
    439 	tp->t_oproc = scistart;
    440 	tp->t_param = sciparam;
    441 	tp->t_hwiflow = NULL;
    442 
    443 	sc->sc_tty = tp;
    444 	sc->sc_rbuf = malloc(sci_rbuf_size << 1, M_DEVBUF, M_NOWAIT);
    445 	if (sc->sc_rbuf == NULL) {
    446 		printf("%s: unable to allocate ring buffer\n",
    447 		    sc->sc_dev.dv_xname);
    448 		return;
    449 	}
    450 	sc->sc_ebuf = sc->sc_rbuf + (sci_rbuf_size << 1);
    451 
    452 	tty_attach(tp);
    453 }
    454 
    455 /*
    456  * Start or restart transmission.
    457  */
    458 static void
    459 scistart(struct tty *tp)
    460 {
    461 	struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(tp->t_dev)];
    462 	int s;
    463 
    464 	s = spltty();
    465 	if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP))
    466 		goto out;
    467 	if (sc->sc_tx_stopped)
    468 		goto out;
    469 
    470 	if (tp->t_outq.c_cc <= tp->t_lowat) {
    471 		if (ISSET(tp->t_state, TS_ASLEEP)) {
    472 			CLR(tp->t_state, TS_ASLEEP);
    473 			wakeup(&tp->t_outq);
    474 		}
    475 		selwakeup(&tp->t_wsel);
    476 		if (tp->t_outq.c_cc == 0)
    477 			goto out;
    478 	}
    479 
    480 	/* Grab the first contiguous region of buffer space. */
    481 	{
    482 		u_char *tba;
    483 		int tbc;
    484 
    485 		tba = tp->t_outq.c_cf;
    486 		tbc = ndqb(&tp->t_outq, 0);
    487 
    488 		(void)splserial();
    489 
    490 		sc->sc_tba = tba;
    491 		sc->sc_tbc = tbc;
    492 	}
    493 
    494 	SET(tp->t_state, TS_BUSY);
    495 	sc->sc_tx_busy = 1;
    496 
    497 	/* Enable transmit completion interrupts if necessary. */
    498 	SHREG_SCSCR |= SCSCR_TIE | SCSCR_RIE;
    499 
    500 	/* Output the first byte of the contiguous buffer. */
    501 	{
    502 		if (sc->sc_tbc > 0) {
    503 			sci_putc(*(sc->sc_tba));
    504 			sc->sc_tba++;
    505 			sc->sc_tbc--;
    506 		}
    507 	}
    508 out:
    509 	splx(s);
    510 	return;
    511 }
    512 
    513 /*
    514  * Set SCI tty parameters from termios.
    515  * XXX - Should just copy the whole termios after
    516  * making sure all the changes could be done.
    517  */
    518 static int
    519 sciparam(struct tty *tp, struct termios *t)
    520 {
    521 	struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(tp->t_dev)];
    522 	int ospeed = t->c_ospeed;
    523 	int s;
    524 
    525 	if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
    526 		return (EIO);
    527 
    528 	/* Check requested parameters. */
    529 	if (ospeed < 0)
    530 		return (EINVAL);
    531 	if (t->c_ispeed && t->c_ispeed != t->c_ospeed)
    532 		return (EINVAL);
    533 
    534 	/*
    535 	 * For the console, always force CLOCAL and !HUPCL, so that the port
    536 	 * is always active.
    537 	 */
    538 	if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) ||
    539 	    ISSET(sc->sc_hwflags, SCI_HW_CONSOLE)) {
    540 		SET(t->c_cflag, CLOCAL);
    541 		CLR(t->c_cflag, HUPCL);
    542 	}
    543 
    544 	/*
    545 	 * If there were no changes, don't do anything.  This avoids dropping
    546 	 * input and improves performance when all we did was frob things like
    547 	 * VMIN and VTIME.
    548 	 */
    549 	if (tp->t_ospeed == t->c_ospeed &&
    550 	    tp->t_cflag == t->c_cflag)
    551 		return (0);
    552 
    553 #if 0
    554 /* XXX (msaitoh) */
    555 	lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag);
    556 #endif
    557 
    558 	s = splserial();
    559 
    560 	/*
    561 	 * Set the FIFO threshold based on the receive speed.
    562 	 *
    563 	 *  * If it's a low speed, it's probably a mouse or some other
    564 	 *    interactive device, so set the threshold low.
    565 	 *  * If it's a high speed, trim the trigger level down to prevent
    566 	 *    overflows.
    567 	 *  * Otherwise set it a bit higher.
    568 	 */
    569 #if 0
    570 /* XXX (msaitoh) */
    571 	if (ISSET(sc->sc_hwflags, SCI_HW_HAYESP))
    572 		sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8;
    573 	else if (ISSET(sc->sc_hwflags, SCI_HW_FIFO))
    574 		sc->sc_fifo = FIFO_ENABLE |
    575 		    (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 :
    576 		     t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4);
    577 	else
    578 		sc->sc_fifo = 0;
    579 #endif
    580 
    581 	/* And copy to tty. */
    582 	tp->t_ispeed = 0;
    583 	tp->t_ospeed = t->c_ospeed;
    584 	tp->t_cflag = t->c_cflag;
    585 
    586 	if (!sc->sc_heldchange) {
    587 		if (sc->sc_tx_busy) {
    588 			sc->sc_heldtbc = sc->sc_tbc;
    589 			sc->sc_tbc = 0;
    590 			sc->sc_heldchange = 1;
    591 		}
    592 #if 0
    593 /* XXX (msaitoh) */
    594 		else
    595 			sci_loadchannelregs(sc);
    596 #endif
    597 	}
    598 
    599 	if (!ISSET(t->c_cflag, CHWFLOW)) {
    600 		/* Disable the high water mark. */
    601 		sc->sc_r_hiwat = 0;
    602 		sc->sc_r_lowat = 0;
    603 		if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) {
    604 			CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
    605 			sci_schedrx(sc);
    606 		}
    607 	} else {
    608 		sc->sc_r_hiwat = sci_rbuf_hiwat;
    609 		sc->sc_r_lowat = sci_rbuf_lowat;
    610 	}
    611 
    612 	splx(s);
    613 
    614 #ifdef SCI_DEBUG
    615 	if (sci_debug)
    616 		scistatus(sc, "sciparam ");
    617 #endif
    618 
    619 	if (!ISSET(t->c_cflag, CHWFLOW)) {
    620 		if (sc->sc_tx_stopped) {
    621 			sc->sc_tx_stopped = 0;
    622 			scistart(tp);
    623 		}
    624 	}
    625 
    626 	return (0);
    627 }
    628 
    629 void
    630 sci_iflush(struct sci_softc *sc)
    631 {
    632 	unsigned char err_c;
    633 	volatile unsigned char c;
    634 
    635 	if (((err_c = SHREG_SCSSR)
    636 	     & (SCSSR_RDRF | SCSSR_ORER | SCSSR_FER | SCSSR_PER)) != 0) {
    637 
    638 		if ((err_c & (SCSSR_ORER | SCSSR_FER | SCSSR_PER)) != 0) {
    639 			SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_FER | SCSSR_PER);
    640 			return;
    641 		}
    642 
    643 		c = SHREG_SCRDR;
    644 
    645 		SHREG_SCSSR &= ~SCSSR_RDRF;
    646 	}
    647 }
    648 
    649 int
    650 sciopen(dev_t dev, int flag, int mode, struct proc *p)
    651 {
    652 	int unit = SCIUNIT(dev);
    653 	struct sci_softc *sc;
    654 	struct tty *tp;
    655 	int s, s2;
    656 	int error;
    657 
    658 	if (unit >= sci_cd.cd_ndevs)
    659 		return (ENXIO);
    660 	sc = sci_cd.cd_devs[unit];
    661 	if (sc == 0 || !ISSET(sc->sc_hwflags, SCI_HW_DEV_OK) ||
    662 	    sc->sc_rbuf == NULL)
    663 		return (ENXIO);
    664 
    665 	if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
    666 		return (ENXIO);
    667 
    668 #ifdef KGDB
    669 	/*
    670 	 * If this is the kgdb port, no other use is permitted.
    671 	 */
    672 	if (ISSET(sc->sc_hwflags, SCI_HW_KGDB))
    673 		return (EBUSY);
    674 #endif
    675 
    676 	tp = sc->sc_tty;
    677 
    678 	if (ISSET(tp->t_state, TS_ISOPEN) &&
    679 	    ISSET(tp->t_state, TS_XCLUDE) &&
    680 	    p->p_ucred->cr_uid != 0)
    681 		return (EBUSY);
    682 
    683 	s = spltty();
    684 
    685 	/*
    686 	 * Do the following iff this is a first open.
    687 	 */
    688 	if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
    689 		struct termios t;
    690 
    691 		tp->t_dev = dev;
    692 
    693 		s2 = splserial();
    694 
    695 		/* Turn on interrupts. */
    696 		SHREG_SCSCR |= SCSCR_TIE | SCSCR_RIE;
    697 
    698 		splx(s2);
    699 
    700 		/*
    701 		 * Initialize the termios status to the defaults.  Add in the
    702 		 * sticky bits from TIOCSFLAGS.
    703 		 */
    704 		t.c_ispeed = 0;
    705 		if (ISSET(sc->sc_hwflags, SCI_HW_CONSOLE)) {
    706 			t.c_ospeed = scicn_speed;
    707 			t.c_cflag = sciconscflag;
    708 		} else {
    709 			t.c_ospeed = TTYDEF_SPEED;
    710 			t.c_cflag = TTYDEF_CFLAG;
    711 		}
    712 		if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL))
    713 			SET(t.c_cflag, CLOCAL);
    714 		if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS))
    715 			SET(t.c_cflag, CRTSCTS);
    716 		if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF))
    717 			SET(t.c_cflag, MDMBUF);
    718 		/* Make sure sciparam() will do something. */
    719 		tp->t_ospeed = 0;
    720 		(void) sciparam(tp, &t);
    721 		tp->t_iflag = TTYDEF_IFLAG;
    722 		tp->t_oflag = TTYDEF_OFLAG;
    723 		tp->t_lflag = TTYDEF_LFLAG;
    724 		ttychars(tp);
    725 		ttsetwater(tp);
    726 
    727 		s2 = splserial();
    728 
    729 		/* Clear the input ring, and unblock. */
    730 		sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf;
    731 		sc->sc_rbavail = sci_rbuf_size;
    732 		sci_iflush(sc);
    733 		CLR(sc->sc_rx_flags, RX_ANY_BLOCK);
    734 #if 0
    735 /* XXX (msaitoh) */
    736 		sci_hwiflow(sc);
    737 #endif
    738 
    739 #ifdef SCI_DEBUG
    740 		if (sci_debug)
    741 			scistatus(sc, "sciopen  ");
    742 #endif
    743 
    744 		splx(s2);
    745 	}
    746 
    747 	splx(s);
    748 
    749 	error = ttyopen(tp, SCIDIALOUT(dev), ISSET(flag, O_NONBLOCK));
    750 	if (error)
    751 		goto bad;
    752 
    753 	error = (*tp->t_linesw->l_open)(dev, tp);
    754 	if (error)
    755 		goto bad;
    756 
    757 	return (0);
    758 
    759 bad:
    760 
    761 	return (error);
    762 }
    763 
    764 int
    765 sciclose(dev_t dev, int flag, int mode, struct proc *p)
    766 {
    767 	struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
    768 	struct tty *tp = sc->sc_tty;
    769 
    770 	/* XXX This is for cons.c. */
    771 	if (!ISSET(tp->t_state, TS_ISOPEN))
    772 		return (0);
    773 
    774 	(*tp->t_linesw->l_close)(tp, flag);
    775 	ttyclose(tp);
    776 
    777 	if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
    778 		return (0);
    779 
    780 	return (0);
    781 }
    782 
    783 int
    784 sciread(dev_t dev, struct uio *uio, int flag)
    785 {
    786 	struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
    787 	struct tty *tp = sc->sc_tty;
    788 
    789 	return ((*tp->t_linesw->l_read)(tp, uio, flag));
    790 }
    791 
    792 int
    793 sciwrite(dev_t dev, struct uio *uio, int flag)
    794 {
    795 	struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
    796 	struct tty *tp = sc->sc_tty;
    797 
    798 	return ((*tp->t_linesw->l_write)(tp, uio, flag));
    799 }
    800 
    801 int
    802 scipoll(dev_t dev, int events, struct proc *p)
    803 {
    804 	struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
    805 	struct tty *tp = sc->sc_tty;
    806 
    807 	return ((*tp->t_linesw->l_poll)(tp, events, p));
    808 }
    809 
    810 struct tty *
    811 scitty(dev_t dev)
    812 {
    813 	struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
    814 	struct tty *tp = sc->sc_tty;
    815 
    816 	return (tp);
    817 }
    818 
    819 int
    820 sciioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct proc *p)
    821 {
    822 	struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
    823 	struct tty *tp = sc->sc_tty;
    824 	int error;
    825 	int s;
    826 
    827 	if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
    828 		return (EIO);
    829 
    830 	error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, p);
    831 	if (error != EPASSTHROUGH)
    832 		return (error);
    833 
    834 	error = ttioctl(tp, cmd, data, flag, p);
    835 	if (error != EPASSTHROUGH)
    836 		return (error);
    837 
    838 	error = 0;
    839 
    840 	s = splserial();
    841 
    842 	switch (cmd) {
    843 	case TIOCSBRK:
    844 		sci_break(sc, 1);
    845 		break;
    846 
    847 	case TIOCCBRK:
    848 		sci_break(sc, 0);
    849 		break;
    850 
    851 	case TIOCGFLAGS:
    852 		*(int *)data = sc->sc_swflags;
    853 		break;
    854 
    855 	case TIOCSFLAGS:
    856 		error = suser(p->p_ucred, &p->p_acflag);
    857 		if (error)
    858 			break;
    859 		sc->sc_swflags = *(int *)data;
    860 		break;
    861 
    862 	default:
    863 		error = EPASSTHROUGH;
    864 		break;
    865 	}
    866 
    867 	splx(s);
    868 
    869 	return (error);
    870 }
    871 
    872 integrate void
    873 sci_schedrx(struct sci_softc *sc)
    874 {
    875 
    876 	sc->sc_rx_ready = 1;
    877 
    878 	/* Wake up the poller. */
    879 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
    880 	softintr_schedule(sc->sc_si);
    881 #else
    882 #ifndef __NO_SOFT_SERIAL_INTERRUPT
    883 	setsoftserial();
    884 #else
    885 	if (!sci_softintr_scheduled) {
    886 		sci_softintr_scheduled = 1;
    887 		callout_reset(&sci_soft_ch, 1, scisoft, NULL);
    888 	}
    889 #endif
    890 #endif
    891 }
    892 
    893 void
    894 sci_break(struct sci_softc *sc, int onoff)
    895 {
    896 
    897 	if (onoff)
    898 		SHREG_SCSSR &= ~SCSSR_TDRE;
    899 	else
    900 		SHREG_SCSSR |= SCSSR_TDRE;
    901 
    902 #if 0	/* XXX */
    903 	if (!sc->sc_heldchange) {
    904 		if (sc->sc_tx_busy) {
    905 			sc->sc_heldtbc = sc->sc_tbc;
    906 			sc->sc_tbc = 0;
    907 			sc->sc_heldchange = 1;
    908 		} else
    909 			sci_loadchannelregs(sc);
    910 	}
    911 #endif
    912 }
    913 
    914 /*
    915  * Stop output, e.g., for ^S or output flush.
    916  */
    917 void
    918 scistop(struct tty *tp, int flag)
    919 {
    920 	struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(tp->t_dev)];
    921 	int s;
    922 
    923 	s = splserial();
    924 	if (ISSET(tp->t_state, TS_BUSY)) {
    925 		/* Stop transmitting at the next chunk. */
    926 		sc->sc_tbc = 0;
    927 		sc->sc_heldtbc = 0;
    928 		if (!ISSET(tp->t_state, TS_TTSTOP))
    929 			SET(tp->t_state, TS_FLUSH);
    930 	}
    931 	splx(s);
    932 }
    933 
    934 void
    935 scidiag(void *arg)
    936 {
    937 	struct sci_softc *sc = arg;
    938 	int overflows, floods;
    939 	int s;
    940 
    941 	s = splserial();
    942 	overflows = sc->sc_overflows;
    943 	sc->sc_overflows = 0;
    944 	floods = sc->sc_floods;
    945 	sc->sc_floods = 0;
    946 	sc->sc_errors = 0;
    947 	splx(s);
    948 
    949 	log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n",
    950 	    sc->sc_dev.dv_xname,
    951 	    overflows, overflows == 1 ? "" : "s",
    952 	    floods, floods == 1 ? "" : "s");
    953 }
    954 
    955 integrate void
    956 sci_rxsoft(struct sci_softc *sc, struct tty *tp)
    957 {
    958 	int (*rint)(int c, struct tty *tp) = tp->t_linesw->l_rint;
    959 	u_char *get, *end;
    960 	u_int cc, scc;
    961 	u_char ssr;
    962 	int code;
    963 	int s;
    964 
    965 	end = sc->sc_ebuf;
    966 	get = sc->sc_rbget;
    967 	scc = cc = sci_rbuf_size - sc->sc_rbavail;
    968 
    969 	if (cc == sci_rbuf_size) {
    970 		sc->sc_floods++;
    971 		if (sc->sc_errors++ == 0)
    972 			callout_reset(&sc->sc_diag_ch, 60 * hz, scidiag, sc);
    973 	}
    974 
    975 	while (cc) {
    976 		code = get[0];
    977 		ssr = get[1];
    978 		if (ISSET(ssr, SCSSR_FER | SCSSR_PER)) {
    979 			if (ISSET(ssr, SCSSR_FER))
    980 				SET(code, TTY_FE);
    981 			if (ISSET(ssr, SCSSR_PER))
    982 				SET(code, TTY_PE);
    983 		}
    984 		if ((*rint)(code, tp) == -1) {
    985 			/*
    986 			 * The line discipline's buffer is out of space.
    987 			 */
    988 			if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) {
    989 				/*
    990 				 * We're either not using flow control, or the
    991 				 * line discipline didn't tell us to block for
    992 				 * some reason.  Either way, we have no way to
    993 				 * know when there's more space available, so
    994 				 * just drop the rest of the data.
    995 				 */
    996 				get += cc << 1;
    997 				if (get >= end)
    998 					get -= sci_rbuf_size << 1;
    999 				cc = 0;
   1000 			} else {
   1001 				/*
   1002 				 * Don't schedule any more receive processing
   1003 				 * until the line discipline tells us there's
   1004 				 * space available (through scihwiflow()).
   1005 				 * Leave the rest of the data in the input
   1006 				 * buffer.
   1007 				 */
   1008 				SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
   1009 			}
   1010 			break;
   1011 		}
   1012 		get += 2;
   1013 		if (get >= end)
   1014 			get = sc->sc_rbuf;
   1015 		cc--;
   1016 	}
   1017 
   1018 	if (cc != scc) {
   1019 		sc->sc_rbget = get;
   1020 		s = splserial();
   1021 		cc = sc->sc_rbavail += scc - cc;
   1022 		/* Buffers should be ok again, release possible block. */
   1023 		if (cc >= sc->sc_r_lowat) {
   1024 			if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) {
   1025 				CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED);
   1026 				SHREG_SCSCR |= SCSCR_RIE;
   1027 			}
   1028 #if 0
   1029 			if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) {
   1030 				CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED);
   1031 				sci_hwiflow(sc);
   1032 			}
   1033 #endif
   1034 		}
   1035 		splx(s);
   1036 	}
   1037 }
   1038 
   1039 integrate void
   1040 sci_txsoft(sc, tp)
   1041 	struct sci_softc *sc;
   1042 	struct tty *tp;
   1043 {
   1044 
   1045 	CLR(tp->t_state, TS_BUSY);
   1046 	if (ISSET(tp->t_state, TS_FLUSH))
   1047 		CLR(tp->t_state, TS_FLUSH);
   1048 	else
   1049 		ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf));
   1050 	(*tp->t_linesw->l_start)(tp);
   1051 }
   1052 
   1053 integrate void
   1054 sci_stsoft(struct sci_softc *sc, struct tty *tp)
   1055 {
   1056 #if 0
   1057 /* XXX (msaitoh) */
   1058 	u_char msr, delta;
   1059 	int s;
   1060 
   1061 	s = splserial();
   1062 	msr = sc->sc_msr;
   1063 	delta = sc->sc_msr_delta;
   1064 	sc->sc_msr_delta = 0;
   1065 	splx(s);
   1066 
   1067 	if (ISSET(delta, sc->sc_msr_dcd)) {
   1068 		/*
   1069 		 * Inform the tty layer that carrier detect changed.
   1070 		 */
   1071 		(void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD));
   1072 	}
   1073 
   1074 	if (ISSET(delta, sc->sc_msr_cts)) {
   1075 		/* Block or unblock output according to flow control. */
   1076 		if (ISSET(msr, sc->sc_msr_cts)) {
   1077 			sc->sc_tx_stopped = 0;
   1078 			(*tp->t_linesw->l_start)(tp);
   1079 		} else {
   1080 			sc->sc_tx_stopped = 1;
   1081 		}
   1082 	}
   1083 
   1084 #ifdef SCI_DEBUG
   1085 	if (sci_debug)
   1086 		scistatus(sc, "sci_stsoft");
   1087 #endif
   1088 #endif
   1089 }
   1090 
   1091 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
   1092 void
   1093 scisoft(void *arg)
   1094 {
   1095 	struct sci_softc *sc = arg;
   1096 	struct tty *tp;
   1097 
   1098 	if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
   1099 		return;
   1100 
   1101 	{
   1102 #else
   1103 void
   1104 #ifndef __NO_SOFT_SERIAL_INTERRUPT
   1105 scisoft()
   1106 #else
   1107 scisoft(void *arg)
   1108 #endif
   1109 {
   1110 	struct sci_softc	*sc;
   1111 	struct tty	*tp;
   1112 	int	unit;
   1113 #ifdef __NO_SOFT_SERIAL_INTERRUPT
   1114 	int s;
   1115 
   1116 	s = splsoftserial();
   1117 	sci_softintr_scheduled = 0;
   1118 #endif
   1119 
   1120 	for (unit = 0; unit < sci_cd.cd_ndevs; unit++) {
   1121 		sc = sci_cd.cd_devs[unit];
   1122 		if (sc == NULL || !ISSET(sc->sc_hwflags, SCI_HW_DEV_OK))
   1123 			continue;
   1124 
   1125 		if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
   1126 			continue;
   1127 
   1128 		tp = sc->sc_tty;
   1129 		if (tp == NULL)
   1130 			continue;
   1131 		if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0)
   1132 			continue;
   1133 #endif
   1134 		tp = sc->sc_tty;
   1135 
   1136 		if (sc->sc_rx_ready) {
   1137 			sc->sc_rx_ready = 0;
   1138 			sci_rxsoft(sc, tp);
   1139 		}
   1140 
   1141 #if 0
   1142 		if (sc->sc_st_check) {
   1143 			sc->sc_st_check = 0;
   1144 			sci_stsoft(sc, tp);
   1145 		}
   1146 #endif
   1147 
   1148 		if (sc->sc_tx_done) {
   1149 			sc->sc_tx_done = 0;
   1150 			sci_txsoft(sc, tp);
   1151 		}
   1152 	}
   1153 
   1154 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS
   1155 #ifdef __NO_SOFT_SERIAL_INTERRUPT
   1156 	splx(s);
   1157 #endif
   1158 #endif
   1159 }
   1160 
   1161 int
   1162 sciintr(void *arg)
   1163 {
   1164 	struct sci_softc *sc = arg;
   1165 	u_char *put, *end;
   1166 	u_int cc;
   1167 	u_short ssr;
   1168 
   1169 	if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
   1170 		return (0);
   1171 
   1172 	end = sc->sc_ebuf;
   1173 	put = sc->sc_rbput;
   1174 	cc = sc->sc_rbavail;
   1175 
   1176 	do {
   1177 		ssr = SHREG_SCSSR;
   1178 		if (ISSET(ssr, SCSSR_FER)) {
   1179 			SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_PER | SCSSR_FER);
   1180 #if defined(DDB) || defined(KGDB)
   1181 #ifdef SH4
   1182 			if ((SHREG_SCSPTR & SCSPTR_SPB0DT) != 0) {
   1183 #else
   1184 			if ((SHREG_SCSPDR & SCSPDR_SCP0DT) != 0) {
   1185 #endif
   1186 #ifdef DDB
   1187 				if (ISSET(sc->sc_hwflags, SCI_HW_CONSOLE)) {
   1188 					console_debugger();
   1189 				}
   1190 #endif
   1191 #ifdef KGDB
   1192 				if (ISSET(sc->sc_hwflags, SCI_HW_KGDB)) {
   1193 					kgdb_connect(1);
   1194 				}
   1195 #endif
   1196 			}
   1197 #endif /* DDB || KGDB */
   1198 		}
   1199 		if ((SHREG_SCSSR & SCSSR_RDRF) != 0) {
   1200 			if (cc > 0) {
   1201 				put[0] = SHREG_SCRDR;
   1202 				put[1] = SHREG_SCSSR & 0x00ff;
   1203 
   1204 				put += 2;
   1205 				if (put >= end)
   1206 					put = sc->sc_rbuf;
   1207 				cc--;
   1208 			}
   1209 
   1210 			SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_FER | SCSSR_PER |
   1211 			    SCSSR_RDRF);
   1212 
   1213 				/*
   1214 				 * Current string of incoming characters ended because
   1215 				 * no more data was available or we ran out of space.
   1216 				 * Schedule a receive event if any data was received.
   1217 				 * If we're out of space, turn off receive interrupts.
   1218 				 */
   1219 			sc->sc_rbput = put;
   1220 			sc->sc_rbavail = cc;
   1221 			if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED))
   1222 				sc->sc_rx_ready = 1;
   1223 
   1224 				/*
   1225 				 * See if we are in danger of overflowing a buffer. If
   1226 				 * so, use hardware flow control to ease the pressure.
   1227 				 */
   1228 			if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) &&
   1229 			    cc < sc->sc_r_hiwat) {
   1230 				SET(sc->sc_rx_flags, RX_IBUF_BLOCKED);
   1231 #if 0
   1232 				sci_hwiflow(sc);
   1233 #endif
   1234 			}
   1235 
   1236 				/*
   1237 				 * If we're out of space, disable receive interrupts
   1238 				 * until the queue has drained a bit.
   1239 				 */
   1240 			if (!cc) {
   1241 				SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED);
   1242 				SHREG_SCSCR &= ~SCSCR_RIE;
   1243 			}
   1244 		} else {
   1245 			if (SHREG_SCSSR & SCSSR_RDRF) {
   1246 				SHREG_SCSCR &= ~(SCSCR_TIE | SCSCR_RIE);
   1247 				delay(10);
   1248 				SHREG_SCSCR |= SCSCR_TIE | SCSCR_RIE;
   1249 				continue;
   1250 			}
   1251 		}
   1252 	} while (SHREG_SCSSR & SCSSR_RDRF);
   1253 
   1254 #if 0
   1255 	msr = bus_space_read_1(iot, ioh, sci_msr);
   1256 	delta = msr ^ sc->sc_msr;
   1257 	sc->sc_msr = msr;
   1258 	if (ISSET(delta, sc->sc_msr_mask)) {
   1259 		SET(sc->sc_msr_delta, delta);
   1260 
   1261 		/*
   1262 		 * Pulse-per-second clock signal on edge of DCD?
   1263 		 */
   1264 		if (ISSET(delta, sc->sc_ppsmask)) {
   1265 			struct timeval tv;
   1266 			if (ISSET(msr, sc->sc_ppsmask) ==
   1267 			    sc->sc_ppsassert) {
   1268 				/* XXX nanotime() */
   1269 				microtime(&tv);
   1270 				TIMEVAL_TO_TIMESPEC(&tv,
   1271 						    &sc->ppsinfo.assert_timestamp);
   1272 				if (sc->ppsparam.mode & PPS_OFFSETASSERT) {
   1273 					timespecadd(&sc->ppsinfo.assert_timestamp,
   1274 						    &sc->ppsparam.assert_offset,
   1275 						    &sc->ppsinfo.assert_timestamp);
   1276 					TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.assert_timestamp);
   1277 				}
   1278 
   1279 #ifdef PPS_SYNC
   1280 				if (sc->ppsparam.mode & PPS_HARDPPSONASSERT)
   1281 					hardpps(&tv, tv.tv_usec);
   1282 #endif
   1283 				sc->ppsinfo.assert_sequence++;
   1284 				sc->ppsinfo.current_mode =
   1285 					sc->ppsparam.mode;
   1286 
   1287 			} else if (ISSET(msr, sc->sc_ppsmask) ==
   1288 				   sc->sc_ppsclear) {
   1289 				/* XXX nanotime() */
   1290 				microtime(&tv);
   1291 				TIMEVAL_TO_TIMESPEC(&tv,
   1292 						    &sc->ppsinfo.clear_timestamp);
   1293 				if (sc->ppsparam.mode & PPS_OFFSETCLEAR) {
   1294 					timespecadd(&sc->ppsinfo.clear_timestamp,
   1295 						    &sc->ppsparam.clear_offset,
   1296 						    &sc->ppsinfo.clear_timestamp);
   1297 					TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.clear_timestamp);
   1298 				}
   1299 
   1300 #ifdef PPS_SYNC
   1301 				if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR)
   1302 					hardpps(&tv, tv.tv_usec);
   1303 #endif
   1304 				sc->ppsinfo.clear_sequence++;
   1305 				sc->ppsinfo.current_mode =
   1306 					sc->ppsparam.mode;
   1307 			}
   1308 		}
   1309 
   1310 		/*
   1311 		 * Stop output immediately if we lose the output
   1312 		 * flow control signal or carrier detect.
   1313 		 */
   1314 		if (ISSET(~msr, sc->sc_msr_mask)) {
   1315 			sc->sc_tbc = 0;
   1316 			sc->sc_heldtbc = 0;
   1317 #ifdef SCI_DEBUG
   1318 			if (sci_debug)
   1319 				scistatus(sc, "sciintr  ");
   1320 #endif
   1321 		}
   1322 
   1323 		sc->sc_st_check = 1;
   1324 	}
   1325 #endif
   1326 
   1327 	/*
   1328 	 * Done handling any receive interrupts. See if data can be
   1329 	 * transmitted as well. Schedule tx done event if no data left
   1330 	 * and tty was marked busy.
   1331 	 */
   1332 	if ((SHREG_SCSSR & SCSSR_TDRE) != 0) {
   1333 		/*
   1334 		 * If we've delayed a parameter change, do it now, and restart
   1335 		 * output.
   1336 		 */
   1337 		if (sc->sc_heldchange) {
   1338 			sc->sc_heldchange = 0;
   1339 			sc->sc_tbc = sc->sc_heldtbc;
   1340 			sc->sc_heldtbc = 0;
   1341 		}
   1342 
   1343 		/* Output the next chunk of the contiguous buffer, if any. */
   1344 		if (sc->sc_tbc > 0) {
   1345 			sci_putc(*(sc->sc_tba));
   1346 			sc->sc_tba++;
   1347 			sc->sc_tbc--;
   1348 		} else {
   1349 			/* Disable transmit completion interrupts if necessary. */
   1350 #if 0
   1351 			if (ISSET(sc->sc_ier, IER_ETXRDY))
   1352 #endif
   1353 				SHREG_SCSCR &= ~SCSCR_TIE;
   1354 
   1355 			if (sc->sc_tx_busy) {
   1356 				sc->sc_tx_busy = 0;
   1357 				sc->sc_tx_done = 1;
   1358 			}
   1359 		}
   1360 	}
   1361 
   1362 	/* Wake up the poller. */
   1363 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
   1364 	softintr_schedule(sc->sc_si);
   1365 #else
   1366 #ifndef __NO_SOFT_SERIAL_INTERRUPT
   1367 	setsoftserial();
   1368 #else
   1369 	if (!sci_softintr_scheduled) {
   1370 		sci_softintr_scheduled = 1;
   1371 		callout_reset(&sci_soft_ch, 1, scisoft, 1);
   1372 	}
   1373 #endif
   1374 #endif
   1375 
   1376 #if NRND > 0 && defined(RND_SCI)
   1377 	rnd_add_uint32(&sc->rnd_source, iir | lsr);
   1378 #endif
   1379 
   1380 	return (1);
   1381 }
   1382 
   1383 void
   1384 scicnprobe(cp)
   1385 	struct consdev *cp;
   1386 {
   1387 	int maj;
   1388 
   1389 	/* locate the major number */
   1390 	maj = cdevsw_lookup_major(&sci_cdevsw);
   1391 
   1392 	/* Initialize required fields. */
   1393 	cp->cn_dev = makedev(maj, 0);
   1394 #ifdef SCICONSOLE
   1395 	cp->cn_pri = CN_REMOTE;
   1396 #else
   1397 	cp->cn_pri = CN_NORMAL;
   1398 #endif
   1399 }
   1400 
   1401 void
   1402 scicninit(struct consdev *cp)
   1403 {
   1404 
   1405 	InitializeSci(scicn_speed);
   1406 	sciisconsole = 1;
   1407 }
   1408 
   1409 int
   1410 scicngetc(dev_t dev)
   1411 {
   1412 	int c;
   1413 	int s;
   1414 
   1415 	s = splserial();
   1416 	c = sci_getc();
   1417 	splx(s);
   1418 
   1419 	return (c);
   1420 }
   1421 
   1422 void
   1423 scicnputc(dev_t dev, int c)
   1424 {
   1425 	int s;
   1426 
   1427 	s = splserial();
   1428 	sci_putc((u_char)c);
   1429 	splx(s);
   1430 }
   1431