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sci.c revision 1.32
      1 /* $NetBSD: sci.c,v 1.32 2002/10/02 15:52:34 thorpej Exp $ */
      2 
      3 /*-
      4  * Copyright (C) 1999 T.Horiuchi and SAITOH Masanobu.  All rights reserved.
      5  *
      6  * Redistribution and use in source and binary forms, with or without
      7  * modification, are permitted provided that the following conditions
      8  * are met:
      9  * 1. Redistributions of source code must retain the above copyright
     10  *    notice, this list of conditions and the following disclaimer.
     11  * 2. Redistributions in binary form must reproduce the above copyright
     12  *    notice, this list of conditions and the following disclaimer in the
     13  *    documentation and/or other materials provided with the distribution.
     14  * 3. The name of the author may not be used to endorse or promote products
     15  *    derived from this software without specific prior written permission.
     16  *
     17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     18  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     19  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     20  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     21  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     22  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
     26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     27  */
     28 
     29 /*-
     30  * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
     31  * All rights reserved.
     32  *
     33  * This code is derived from software contributed to The NetBSD Foundation
     34  * by Charles M. Hannum.
     35  *
     36  * Redistribution and use in source and binary forms, with or without
     37  * modification, are permitted provided that the following conditions
     38  * are met:
     39  * 1. Redistributions of source code must retain the above copyright
     40  *    notice, this list of conditions and the following disclaimer.
     41  * 2. Redistributions in binary form must reproduce the above copyright
     42  *    notice, this list of conditions and the following disclaimer in the
     43  *    documentation and/or other materials provided with the distribution.
     44  * 3. All advertising materials mentioning features or use of this software
     45  *    must display the following acknowledgement:
     46  *        This product includes software developed by the NetBSD
     47  *        Foundation, Inc. and its contributors.
     48  * 4. Neither the name of The NetBSD Foundation nor the names of its
     49  *    contributors may be used to endorse or promote products derived
     50  *    from this software without specific prior written permission.
     51  *
     52  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     53  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     54  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     55  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     56  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     57  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     58  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     59  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     60  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     61  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     62  * POSSIBILITY OF SUCH DAMAGE.
     63  */
     64 
     65 /*
     66  * Copyright (c) 1991 The Regents of the University of California.
     67  * All rights reserved.
     68  *
     69  * Redistribution and use in source and binary forms, with or without
     70  * modification, are permitted provided that the following conditions
     71  * are met:
     72  * 1. Redistributions of source code must retain the above copyright
     73  *    notice, this list of conditions and the following disclaimer.
     74  * 2. Redistributions in binary form must reproduce the above copyright
     75  *    notice, this list of conditions and the following disclaimer in the
     76  *    documentation and/or other materials provided with the distribution.
     77  * 3. All advertising materials mentioning features or use of this software
     78  *    must display the following acknowledgement:
     79  *	This product includes software developed by the University of
     80  *	California, Berkeley and its contributors.
     81  * 4. Neither the name of the University nor the names of its contributors
     82  *    may be used to endorse or promote products derived from this software
     83  *    without specific prior written permission.
     84  *
     85  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     86  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     87  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     88  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     89  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     90  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     91  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     92  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     93  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     94  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     95  * SUCH DAMAGE.
     96  *
     97  *	@(#)com.c	7.5 (Berkeley) 5/16/91
     98  */
     99 
    100 /*
    101  * SH internal serial driver
    102  *
    103  * This code is derived from both z8530tty.c and com.c
    104  */
    105 
    106 #include "opt_kgdb.h"
    107 #include "opt_sci.h"
    108 
    109 #include <sys/param.h>
    110 #include <sys/systm.h>
    111 #include <sys/tty.h>
    112 #include <sys/proc.h>
    113 #include <sys/conf.h>
    114 #include <sys/file.h>
    115 #include <sys/syslog.h>
    116 #include <sys/kernel.h>
    117 #include <sys/device.h>
    118 #include <sys/malloc.h>
    119 
    120 #include <dev/cons.h>
    121 
    122 #include <sh3/clock.h>
    123 #include <sh3/scireg.h>
    124 #include <sh3/pfcreg.h>
    125 #include <sh3/tmureg.h>
    126 #include <sh3/exception.h>
    127 #include <machine/intr.h>
    128 
    129 static void	scistart(struct tty *);
    130 static int	sciparam(struct tty *, struct termios *);
    131 
    132 void scicnprobe(struct consdev *);
    133 void scicninit(struct consdev *);
    134 void scicnputc(dev_t, int);
    135 int scicngetc(dev_t);
    136 void scicnpoolc(dev_t, int);
    137 int sciintr(void *);
    138 
    139 struct sci_softc {
    140 	struct device sc_dev;		/* boilerplate */
    141 	struct tty *sc_tty;
    142 	void *sc_si;
    143 	struct callout sc_diag_ch;
    144 
    145 #if 0
    146 	bus_space_tag_t sc_iot;		/* ISA i/o space identifier */
    147 	bus_space_handle_t   sc_ioh;	/* ISA io handle */
    148 
    149 	int sc_drq;
    150 
    151 	int sc_frequency;
    152 #endif
    153 
    154 	u_int sc_overflows,
    155 	      sc_floods,
    156 	      sc_errors;		/* number of retries so far */
    157 	u_char sc_status[7];		/* copy of registers */
    158 
    159 	int sc_hwflags;
    160 	int sc_swflags;
    161 	u_int sc_fifolen;		/* XXX always 0? */
    162 
    163 	u_int sc_r_hiwat,
    164 	      sc_r_lowat;
    165 	u_char *volatile sc_rbget,
    166 	       *volatile sc_rbput;
    167  	volatile u_int sc_rbavail;
    168 	u_char *sc_rbuf,
    169 	       *sc_ebuf;
    170 
    171  	u_char *sc_tba;			/* transmit buffer address */
    172  	u_int sc_tbc,			/* transmit byte count */
    173 	      sc_heldtbc;
    174 
    175 	volatile u_char sc_rx_flags,	/* receiver blocked */
    176 #define	RX_TTY_BLOCKED		0x01
    177 #define	RX_TTY_OVERFLOWED	0x02
    178 #define	RX_IBUF_BLOCKED		0x04
    179 #define	RX_IBUF_OVERFLOWED	0x08
    180 #define	RX_ANY_BLOCK		0x0f
    181 			sc_tx_busy,	/* working on an output chunk */
    182 			sc_tx_done,	/* done with one output chunk */
    183 			sc_tx_stopped,	/* H/W level stop (lost CTS) */
    184 			sc_st_check,	/* got a status interrupt */
    185 			sc_rx_ready;
    186 
    187 	volatile u_char sc_heldchange;
    188 };
    189 
    190 /* controller driver configuration */
    191 static int sci_match(struct device *, struct cfdata *, void *);
    192 static void sci_attach(struct device *, struct device *, void *);
    193 
    194 void	sci_break(struct sci_softc *, int);
    195 void	sci_iflush(struct sci_softc *);
    196 
    197 #define	integrate	static inline
    198 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
    199 void 	scisoft(void *);
    200 #else
    201 #ifndef __NO_SOFT_SERIAL_INTERRUPT
    202 void 	scisoft(void);
    203 #else
    204 void 	scisoft(void *);
    205 #endif
    206 #endif
    207 integrate void sci_rxsoft(struct sci_softc *, struct tty *);
    208 integrate void sci_txsoft(struct sci_softc *, struct tty *);
    209 integrate void sci_stsoft(struct sci_softc *, struct tty *);
    210 integrate void sci_schedrx(struct sci_softc *);
    211 void	scidiag(void *);
    212 
    213 #define	SCIUNIT_MASK		0x7ffff
    214 #define	SCIDIALOUT_MASK	0x80000
    215 
    216 #define	SCIUNIT(x)	(minor(x) & SCIUNIT_MASK)
    217 #define	SCIDIALOUT(x)	(minor(x) & SCIDIALOUT_MASK)
    218 
    219 /* Macros to clear/set/test flags. */
    220 #define	SET(t, f)	(t) |= (f)
    221 #define	CLR(t, f)	(t) &= ~(f)
    222 #define	ISSET(t, f)	((t) & (f))
    223 
    224 /* Hardware flag masks */
    225 #define	SCI_HW_NOIEN	0x01
    226 #define	SCI_HW_FIFO	0x02
    227 #define	SCI_HW_FLOW	0x08
    228 #define	SCI_HW_DEV_OK	0x20
    229 #define	SCI_HW_CONSOLE	0x40
    230 #define	SCI_HW_KGDB	0x80
    231 
    232 /* Buffer size for character buffer */
    233 #define	SCI_RING_SIZE	2048
    234 
    235 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */
    236 u_int sci_rbuf_hiwat = (SCI_RING_SIZE * 1) / 4;
    237 u_int sci_rbuf_lowat = (SCI_RING_SIZE * 3) / 4;
    238 
    239 #define	CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
    240 int sciconscflag = CONMODE;
    241 int sciisconsole = 0;
    242 
    243 #ifdef SCICN_SPEED
    244 int scicn_speed = SCICN_SPEED;
    245 #else
    246 int scicn_speed = 9600;
    247 #endif
    248 
    249 #define	divrnd(n, q)	(((n)*2/(q)+1)/2)	/* divide and round off */
    250 
    251 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS
    252 #ifdef __NO_SOFT_SERIAL_INTERRUPT
    253 volatile int	sci_softintr_scheduled;
    254 struct callout sci_soft_ch = CALLOUT_INITIALIZER;
    255 #endif
    256 #endif
    257 
    258 u_int sci_rbuf_size = SCI_RING_SIZE;
    259 
    260 CFATTACH_DECL(sci, sizeof(struct sci_softc),
    261     sci_match, sci_attach, NULL, NULL);
    262 
    263 extern struct cfdriver sci_cd;
    264 
    265 dev_type_open(sciopen);
    266 dev_type_close(sciclose);
    267 dev_type_read(sciread);
    268 dev_type_write(sciwrite);
    269 dev_type_ioctl(sciioctl);
    270 dev_type_stop(scistop);
    271 dev_type_tty(scitty);
    272 dev_type_poll(scipoll);
    273 
    274 const struct cdevsw sci_cdevsw = {
    275 	sciopen, sciclose, sciread, sciwrite, sciioctl,
    276 	scistop, scitty, scipoll, nommap, D_TTY
    277 };
    278 
    279 void InitializeSci (unsigned int);
    280 
    281 /*
    282  * following functions are debugging prupose only
    283  */
    284 #define	CR      0x0D
    285 #define	I2C_ADRS (*(volatile unsigned int *)0xa8000000)
    286 #define	USART_ON (unsigned int)~0x08
    287 
    288 void sci_putc(unsigned char);
    289 unsigned char sci_getc(void);
    290 int SciErrCheck(void);
    291 
    292 /*
    293  * InitializeSci
    294  * : unsigned int bps;
    295  * : SCI(Serial Communication Interface)
    296  */
    297 
    298 void
    299 InitializeSci(unsigned int bps)
    300 {
    301 
    302 	/* Initialize SCR */
    303 	SHREG_SCSCR = 0x00;
    304 
    305 	/* Serial Mode Register */
    306 	SHREG_SCSMR = 0x00;	/* Async,8bit,NonParity,Even,1Stop,NoMulti */
    307 
    308 	/* Bit Rate Register */
    309 	SHREG_SCBRR = divrnd(sh_clock_get_pclock(), 32 * bps) - 1;
    310 
    311 	/*
    312 	 * wait 1mSec, because Send/Recv must begin 1 bit period after
    313 	 * BRR is set.
    314 	 */
    315 	delay(1000);
    316 
    317 	/* Send permission, Receive permission ON */
    318 	SHREG_SCSCR = SCSCR_TE | SCSCR_RE;
    319 
    320 	/* Serial Status Register */
    321 	SHREG_SCSSR &= SCSSR_TDRE;	/* Clear Status */
    322 
    323 #if 0
    324 	I2C_ADRS &= ~0x08;	/* enable RS-232C */
    325 #endif
    326 }
    327 
    328 
    329 /*
    330  * sci_putc
    331  *  : unsigned char c;
    332  */
    333 void
    334 sci_putc(unsigned char c)
    335 {
    336 
    337 	/* wait for ready */
    338 	while ((SHREG_SCSSR & SCSSR_TDRE) == NULL)
    339 		;
    340 
    341 	/* write send data to send register */
    342 	SHREG_SCTDR = c;
    343 
    344 	/* clear ready flag */
    345 	SHREG_SCSSR &= ~SCSSR_TDRE;
    346 }
    347 
    348 /*
    349  * : SciErrCheck
    350  *	0x20 = over run
    351  *	0x10 = frame error
    352  *	0x80 = parity error
    353  */
    354 int
    355 SciErrCheck(void)
    356 {
    357 
    358 	return(SHREG_SCSSR & (SCSSR_ORER | SCSSR_FER | SCSSR_PER));
    359 }
    360 
    361 /*
    362  * sci_getc
    363  */
    364 unsigned char
    365 sci_getc(void)
    366 {
    367 	unsigned char c, err_c;
    368 
    369 	while (((err_c = SHREG_SCSSR)
    370 		& (SCSSR_RDRF | SCSSR_ORER | SCSSR_FER | SCSSR_PER)) == 0)
    371 		;
    372 	if ((err_c & (SCSSR_ORER | SCSSR_FER | SCSSR_PER)) != 0) {
    373 		SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_FER | SCSSR_PER);
    374 		return(err_c |= 0x80);
    375 	}
    376 
    377 	c = SHREG_SCRDR;
    378 
    379 	SHREG_SCSSR &= ~SCSSR_RDRF;
    380 
    381 	return(c);
    382 }
    383 
    384 #if 0
    385 #define	SCI_MAX_UNITS 2
    386 #else
    387 #define	SCI_MAX_UNITS 1
    388 #endif
    389 
    390 
    391 static int
    392 sci_match(struct device *parent, struct cfdata *cfp, void *aux)
    393 {
    394 
    395 	if (strcmp(cfp->cf_name, "sci")
    396 	    || cfp->cf_unit >= SCI_MAX_UNITS) //XXX __BROKEN_CONFIG_UNIT_USAGE
    397 		return 0;
    398 
    399 	return 1;
    400 }
    401 
    402 static void
    403 sci_attach(struct device *parent, struct device *self, void *aux)
    404 {
    405 	struct sci_softc *sc = (struct sci_softc *)self;
    406 	struct tty *tp;
    407 
    408 	sc->sc_hwflags = 0;	/* XXX */
    409 	sc->sc_swflags = 0;	/* XXX */
    410 	sc->sc_fifolen = 0;	/* XXX */
    411 
    412 	if (sciisconsole) {
    413 		SET(sc->sc_hwflags, SCI_HW_CONSOLE);
    414 		SET(sc->sc_swflags, TIOCFLAG_SOFTCAR);
    415 		printf("\n%s: console\n", sc->sc_dev.dv_xname);
    416 	} else {
    417 		InitializeSci(9600);
    418 		printf("\n");
    419 	}
    420 
    421 	callout_init(&sc->sc_diag_ch);
    422 
    423 	intc_intr_establish(SH_INTEVT_SCI_ERI, IST_LEVEL, IPL_SERIAL, sciintr,
    424 	    sc);
    425 	intc_intr_establish(SH_INTEVT_SCI_RXI, IST_LEVEL, IPL_SERIAL, sciintr,
    426 	    sc);
    427 	intc_intr_establish(SH_INTEVT_SCI_TXI, IST_LEVEL, IPL_SERIAL, sciintr,
    428 	    sc);
    429 	intc_intr_establish(SH_INTEVT_SCI_TEI, IST_LEVEL, IPL_SERIAL, sciintr,
    430 	    sc);
    431 
    432 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
    433 	sc->sc_si = softintr_establish(IPL_SOFTSERIAL, scisoft, sc);
    434 #endif
    435 	SET(sc->sc_hwflags, SCI_HW_DEV_OK);
    436 
    437 	tp = ttymalloc();
    438 	tp->t_oproc = scistart;
    439 	tp->t_param = sciparam;
    440 	tp->t_hwiflow = NULL;
    441 
    442 	sc->sc_tty = tp;
    443 	sc->sc_rbuf = malloc(sci_rbuf_size << 1, M_DEVBUF, M_NOWAIT);
    444 	if (sc->sc_rbuf == NULL) {
    445 		printf("%s: unable to allocate ring buffer\n",
    446 		    sc->sc_dev.dv_xname);
    447 		return;
    448 	}
    449 	sc->sc_ebuf = sc->sc_rbuf + (sci_rbuf_size << 1);
    450 
    451 	tty_attach(tp);
    452 }
    453 
    454 /*
    455  * Start or restart transmission.
    456  */
    457 static void
    458 scistart(struct tty *tp)
    459 {
    460 	struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(tp->t_dev)];
    461 	int s;
    462 
    463 	s = spltty();
    464 	if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP))
    465 		goto out;
    466 	if (sc->sc_tx_stopped)
    467 		goto out;
    468 
    469 	if (tp->t_outq.c_cc <= tp->t_lowat) {
    470 		if (ISSET(tp->t_state, TS_ASLEEP)) {
    471 			CLR(tp->t_state, TS_ASLEEP);
    472 			wakeup(&tp->t_outq);
    473 		}
    474 		selwakeup(&tp->t_wsel);
    475 		if (tp->t_outq.c_cc == 0)
    476 			goto out;
    477 	}
    478 
    479 	/* Grab the first contiguous region of buffer space. */
    480 	{
    481 		u_char *tba;
    482 		int tbc;
    483 
    484 		tba = tp->t_outq.c_cf;
    485 		tbc = ndqb(&tp->t_outq, 0);
    486 
    487 		(void)splserial();
    488 
    489 		sc->sc_tba = tba;
    490 		sc->sc_tbc = tbc;
    491 	}
    492 
    493 	SET(tp->t_state, TS_BUSY);
    494 	sc->sc_tx_busy = 1;
    495 
    496 	/* Enable transmit completion interrupts if necessary. */
    497 	SHREG_SCSCR |= SCSCR_TIE | SCSCR_RIE;
    498 
    499 	/* Output the first byte of the contiguous buffer. */
    500 	{
    501 		if (sc->sc_tbc > 0) {
    502 			sci_putc(*(sc->sc_tba));
    503 			sc->sc_tba++;
    504 			sc->sc_tbc--;
    505 		}
    506 	}
    507 out:
    508 	splx(s);
    509 	return;
    510 }
    511 
    512 /*
    513  * Set SCI tty parameters from termios.
    514  * XXX - Should just copy the whole termios after
    515  * making sure all the changes could be done.
    516  */
    517 static int
    518 sciparam(struct tty *tp, struct termios *t)
    519 {
    520 	struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(tp->t_dev)];
    521 	int ospeed = t->c_ospeed;
    522 	int s;
    523 
    524 	if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
    525 		return (EIO);
    526 
    527 	/* Check requested parameters. */
    528 	if (ospeed < 0)
    529 		return (EINVAL);
    530 	if (t->c_ispeed && t->c_ispeed != t->c_ospeed)
    531 		return (EINVAL);
    532 
    533 	/*
    534 	 * For the console, always force CLOCAL and !HUPCL, so that the port
    535 	 * is always active.
    536 	 */
    537 	if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) ||
    538 	    ISSET(sc->sc_hwflags, SCI_HW_CONSOLE)) {
    539 		SET(t->c_cflag, CLOCAL);
    540 		CLR(t->c_cflag, HUPCL);
    541 	}
    542 
    543 	/*
    544 	 * If there were no changes, don't do anything.  This avoids dropping
    545 	 * input and improves performance when all we did was frob things like
    546 	 * VMIN and VTIME.
    547 	 */
    548 	if (tp->t_ospeed == t->c_ospeed &&
    549 	    tp->t_cflag == t->c_cflag)
    550 		return (0);
    551 
    552 #if 0
    553 /* XXX (msaitoh) */
    554 	lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag);
    555 #endif
    556 
    557 	s = splserial();
    558 
    559 	/*
    560 	 * Set the FIFO threshold based on the receive speed.
    561 	 *
    562 	 *  * If it's a low speed, it's probably a mouse or some other
    563 	 *    interactive device, so set the threshold low.
    564 	 *  * If it's a high speed, trim the trigger level down to prevent
    565 	 *    overflows.
    566 	 *  * Otherwise set it a bit higher.
    567 	 */
    568 #if 0
    569 /* XXX (msaitoh) */
    570 	if (ISSET(sc->sc_hwflags, SCI_HW_HAYESP))
    571 		sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8;
    572 	else if (ISSET(sc->sc_hwflags, SCI_HW_FIFO))
    573 		sc->sc_fifo = FIFO_ENABLE |
    574 		    (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 :
    575 		     t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4);
    576 	else
    577 		sc->sc_fifo = 0;
    578 #endif
    579 
    580 	/* And copy to tty. */
    581 	tp->t_ispeed = 0;
    582 	tp->t_ospeed = t->c_ospeed;
    583 	tp->t_cflag = t->c_cflag;
    584 
    585 	if (!sc->sc_heldchange) {
    586 		if (sc->sc_tx_busy) {
    587 			sc->sc_heldtbc = sc->sc_tbc;
    588 			sc->sc_tbc = 0;
    589 			sc->sc_heldchange = 1;
    590 		}
    591 #if 0
    592 /* XXX (msaitoh) */
    593 		else
    594 			sci_loadchannelregs(sc);
    595 #endif
    596 	}
    597 
    598 	if (!ISSET(t->c_cflag, CHWFLOW)) {
    599 		/* Disable the high water mark. */
    600 		sc->sc_r_hiwat = 0;
    601 		sc->sc_r_lowat = 0;
    602 		if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) {
    603 			CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
    604 			sci_schedrx(sc);
    605 		}
    606 	} else {
    607 		sc->sc_r_hiwat = sci_rbuf_hiwat;
    608 		sc->sc_r_lowat = sci_rbuf_lowat;
    609 	}
    610 
    611 	splx(s);
    612 
    613 #ifdef SCI_DEBUG
    614 	if (sci_debug)
    615 		scistatus(sc, "sciparam ");
    616 #endif
    617 
    618 	if (!ISSET(t->c_cflag, CHWFLOW)) {
    619 		if (sc->sc_tx_stopped) {
    620 			sc->sc_tx_stopped = 0;
    621 			scistart(tp);
    622 		}
    623 	}
    624 
    625 	return (0);
    626 }
    627 
    628 void
    629 sci_iflush(struct sci_softc *sc)
    630 {
    631 	unsigned char err_c;
    632 	volatile unsigned char c;
    633 
    634 	if (((err_c = SHREG_SCSSR)
    635 	     & (SCSSR_RDRF | SCSSR_ORER | SCSSR_FER | SCSSR_PER)) != 0) {
    636 
    637 		if ((err_c & (SCSSR_ORER | SCSSR_FER | SCSSR_PER)) != 0) {
    638 			SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_FER | SCSSR_PER);
    639 			return;
    640 		}
    641 
    642 		c = SHREG_SCRDR;
    643 
    644 		SHREG_SCSSR &= ~SCSSR_RDRF;
    645 	}
    646 }
    647 
    648 int
    649 sciopen(dev_t dev, int flag, int mode, struct proc *p)
    650 {
    651 	int unit = SCIUNIT(dev);
    652 	struct sci_softc *sc;
    653 	struct tty *tp;
    654 	int s, s2;
    655 	int error;
    656 
    657 	if (unit >= sci_cd.cd_ndevs)
    658 		return (ENXIO);
    659 	sc = sci_cd.cd_devs[unit];
    660 	if (sc == 0 || !ISSET(sc->sc_hwflags, SCI_HW_DEV_OK) ||
    661 	    sc->sc_rbuf == NULL)
    662 		return (ENXIO);
    663 
    664 	if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
    665 		return (ENXIO);
    666 
    667 #ifdef KGDB
    668 	/*
    669 	 * If this is the kgdb port, no other use is permitted.
    670 	 */
    671 	if (ISSET(sc->sc_hwflags, SCI_HW_KGDB))
    672 		return (EBUSY);
    673 #endif
    674 
    675 	tp = sc->sc_tty;
    676 
    677 	if (ISSET(tp->t_state, TS_ISOPEN) &&
    678 	    ISSET(tp->t_state, TS_XCLUDE) &&
    679 	    p->p_ucred->cr_uid != 0)
    680 		return (EBUSY);
    681 
    682 	s = spltty();
    683 
    684 	/*
    685 	 * Do the following iff this is a first open.
    686 	 */
    687 	if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
    688 		struct termios t;
    689 
    690 		tp->t_dev = dev;
    691 
    692 		s2 = splserial();
    693 
    694 		/* Turn on interrupts. */
    695 		SHREG_SCSCR |= SCSCR_TIE | SCSCR_RIE;
    696 
    697 		splx(s2);
    698 
    699 		/*
    700 		 * Initialize the termios status to the defaults.  Add in the
    701 		 * sticky bits from TIOCSFLAGS.
    702 		 */
    703 		t.c_ispeed = 0;
    704 		if (ISSET(sc->sc_hwflags, SCI_HW_CONSOLE)) {
    705 			t.c_ospeed = scicn_speed;
    706 			t.c_cflag = sciconscflag;
    707 		} else {
    708 			t.c_ospeed = TTYDEF_SPEED;
    709 			t.c_cflag = TTYDEF_CFLAG;
    710 		}
    711 		if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL))
    712 			SET(t.c_cflag, CLOCAL);
    713 		if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS))
    714 			SET(t.c_cflag, CRTSCTS);
    715 		if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF))
    716 			SET(t.c_cflag, MDMBUF);
    717 		/* Make sure sciparam() will do something. */
    718 		tp->t_ospeed = 0;
    719 		(void) sciparam(tp, &t);
    720 		tp->t_iflag = TTYDEF_IFLAG;
    721 		tp->t_oflag = TTYDEF_OFLAG;
    722 		tp->t_lflag = TTYDEF_LFLAG;
    723 		ttychars(tp);
    724 		ttsetwater(tp);
    725 
    726 		s2 = splserial();
    727 
    728 		/* Clear the input ring, and unblock. */
    729 		sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf;
    730 		sc->sc_rbavail = sci_rbuf_size;
    731 		sci_iflush(sc);
    732 		CLR(sc->sc_rx_flags, RX_ANY_BLOCK);
    733 #if 0
    734 /* XXX (msaitoh) */
    735 		sci_hwiflow(sc);
    736 #endif
    737 
    738 #ifdef SCI_DEBUG
    739 		if (sci_debug)
    740 			scistatus(sc, "sciopen  ");
    741 #endif
    742 
    743 		splx(s2);
    744 	}
    745 
    746 	splx(s);
    747 
    748 	error = ttyopen(tp, SCIDIALOUT(dev), ISSET(flag, O_NONBLOCK));
    749 	if (error)
    750 		goto bad;
    751 
    752 	error = (*tp->t_linesw->l_open)(dev, tp);
    753 	if (error)
    754 		goto bad;
    755 
    756 	return (0);
    757 
    758 bad:
    759 
    760 	return (error);
    761 }
    762 
    763 int
    764 sciclose(dev_t dev, int flag, int mode, struct proc *p)
    765 {
    766 	struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
    767 	struct tty *tp = sc->sc_tty;
    768 
    769 	/* XXX This is for cons.c. */
    770 	if (!ISSET(tp->t_state, TS_ISOPEN))
    771 		return (0);
    772 
    773 	(*tp->t_linesw->l_close)(tp, flag);
    774 	ttyclose(tp);
    775 
    776 	if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
    777 		return (0);
    778 
    779 	return (0);
    780 }
    781 
    782 int
    783 sciread(dev_t dev, struct uio *uio, int flag)
    784 {
    785 	struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
    786 	struct tty *tp = sc->sc_tty;
    787 
    788 	return ((*tp->t_linesw->l_read)(tp, uio, flag));
    789 }
    790 
    791 int
    792 sciwrite(dev_t dev, struct uio *uio, int flag)
    793 {
    794 	struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
    795 	struct tty *tp = sc->sc_tty;
    796 
    797 	return ((*tp->t_linesw->l_write)(tp, uio, flag));
    798 }
    799 
    800 int
    801 scipoll(dev_t dev, int events, struct proc *p)
    802 {
    803 	struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
    804 	struct tty *tp = sc->sc_tty;
    805 
    806 	return ((*tp->t_linesw->l_poll)(tp, events, p));
    807 }
    808 
    809 struct tty *
    810 scitty(dev_t dev)
    811 {
    812 	struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
    813 	struct tty *tp = sc->sc_tty;
    814 
    815 	return (tp);
    816 }
    817 
    818 int
    819 sciioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct proc *p)
    820 {
    821 	struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)];
    822 	struct tty *tp = sc->sc_tty;
    823 	int error;
    824 	int s;
    825 
    826 	if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
    827 		return (EIO);
    828 
    829 	error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, p);
    830 	if (error != EPASSTHROUGH)
    831 		return (error);
    832 
    833 	error = ttioctl(tp, cmd, data, flag, p);
    834 	if (error != EPASSTHROUGH)
    835 		return (error);
    836 
    837 	error = 0;
    838 
    839 	s = splserial();
    840 
    841 	switch (cmd) {
    842 	case TIOCSBRK:
    843 		sci_break(sc, 1);
    844 		break;
    845 
    846 	case TIOCCBRK:
    847 		sci_break(sc, 0);
    848 		break;
    849 
    850 	case TIOCGFLAGS:
    851 		*(int *)data = sc->sc_swflags;
    852 		break;
    853 
    854 	case TIOCSFLAGS:
    855 		error = suser(p->p_ucred, &p->p_acflag);
    856 		if (error)
    857 			break;
    858 		sc->sc_swflags = *(int *)data;
    859 		break;
    860 
    861 	default:
    862 		error = EPASSTHROUGH;
    863 		break;
    864 	}
    865 
    866 	splx(s);
    867 
    868 	return (error);
    869 }
    870 
    871 integrate void
    872 sci_schedrx(struct sci_softc *sc)
    873 {
    874 
    875 	sc->sc_rx_ready = 1;
    876 
    877 	/* Wake up the poller. */
    878 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
    879 	softintr_schedule(sc->sc_si);
    880 #else
    881 #ifndef __NO_SOFT_SERIAL_INTERRUPT
    882 	setsoftserial();
    883 #else
    884 	if (!sci_softintr_scheduled) {
    885 		sci_softintr_scheduled = 1;
    886 		callout_reset(&sci_soft_ch, 1, scisoft, NULL);
    887 	}
    888 #endif
    889 #endif
    890 }
    891 
    892 void
    893 sci_break(struct sci_softc *sc, int onoff)
    894 {
    895 
    896 	if (onoff)
    897 		SHREG_SCSSR &= ~SCSSR_TDRE;
    898 	else
    899 		SHREG_SCSSR |= SCSSR_TDRE;
    900 
    901 #if 0	/* XXX */
    902 	if (!sc->sc_heldchange) {
    903 		if (sc->sc_tx_busy) {
    904 			sc->sc_heldtbc = sc->sc_tbc;
    905 			sc->sc_tbc = 0;
    906 			sc->sc_heldchange = 1;
    907 		} else
    908 			sci_loadchannelregs(sc);
    909 	}
    910 #endif
    911 }
    912 
    913 /*
    914  * Stop output, e.g., for ^S or output flush.
    915  */
    916 void
    917 scistop(struct tty *tp, int flag)
    918 {
    919 	struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(tp->t_dev)];
    920 	int s;
    921 
    922 	s = splserial();
    923 	if (ISSET(tp->t_state, TS_BUSY)) {
    924 		/* Stop transmitting at the next chunk. */
    925 		sc->sc_tbc = 0;
    926 		sc->sc_heldtbc = 0;
    927 		if (!ISSET(tp->t_state, TS_TTSTOP))
    928 			SET(tp->t_state, TS_FLUSH);
    929 	}
    930 	splx(s);
    931 }
    932 
    933 void
    934 scidiag(void *arg)
    935 {
    936 	struct sci_softc *sc = arg;
    937 	int overflows, floods;
    938 	int s;
    939 
    940 	s = splserial();
    941 	overflows = sc->sc_overflows;
    942 	sc->sc_overflows = 0;
    943 	floods = sc->sc_floods;
    944 	sc->sc_floods = 0;
    945 	sc->sc_errors = 0;
    946 	splx(s);
    947 
    948 	log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n",
    949 	    sc->sc_dev.dv_xname,
    950 	    overflows, overflows == 1 ? "" : "s",
    951 	    floods, floods == 1 ? "" : "s");
    952 }
    953 
    954 integrate void
    955 sci_rxsoft(struct sci_softc *sc, struct tty *tp)
    956 {
    957 	int (*rint)(int c, struct tty *tp) = tp->t_linesw->l_rint;
    958 	u_char *get, *end;
    959 	u_int cc, scc;
    960 	u_char ssr;
    961 	int code;
    962 	int s;
    963 
    964 	end = sc->sc_ebuf;
    965 	get = sc->sc_rbget;
    966 	scc = cc = sci_rbuf_size - sc->sc_rbavail;
    967 
    968 	if (cc == sci_rbuf_size) {
    969 		sc->sc_floods++;
    970 		if (sc->sc_errors++ == 0)
    971 			callout_reset(&sc->sc_diag_ch, 60 * hz, scidiag, sc);
    972 	}
    973 
    974 	while (cc) {
    975 		code = get[0];
    976 		ssr = get[1];
    977 		if (ISSET(ssr, SCSSR_FER | SCSSR_PER)) {
    978 			if (ISSET(ssr, SCSSR_FER))
    979 				SET(code, TTY_FE);
    980 			if (ISSET(ssr, SCSSR_PER))
    981 				SET(code, TTY_PE);
    982 		}
    983 		if ((*rint)(code, tp) == -1) {
    984 			/*
    985 			 * The line discipline's buffer is out of space.
    986 			 */
    987 			if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) {
    988 				/*
    989 				 * We're either not using flow control, or the
    990 				 * line discipline didn't tell us to block for
    991 				 * some reason.  Either way, we have no way to
    992 				 * know when there's more space available, so
    993 				 * just drop the rest of the data.
    994 				 */
    995 				get += cc << 1;
    996 				if (get >= end)
    997 					get -= sci_rbuf_size << 1;
    998 				cc = 0;
    999 			} else {
   1000 				/*
   1001 				 * Don't schedule any more receive processing
   1002 				 * until the line discipline tells us there's
   1003 				 * space available (through scihwiflow()).
   1004 				 * Leave the rest of the data in the input
   1005 				 * buffer.
   1006 				 */
   1007 				SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
   1008 			}
   1009 			break;
   1010 		}
   1011 		get += 2;
   1012 		if (get >= end)
   1013 			get = sc->sc_rbuf;
   1014 		cc--;
   1015 	}
   1016 
   1017 	if (cc != scc) {
   1018 		sc->sc_rbget = get;
   1019 		s = splserial();
   1020 		cc = sc->sc_rbavail += scc - cc;
   1021 		/* Buffers should be ok again, release possible block. */
   1022 		if (cc >= sc->sc_r_lowat) {
   1023 			if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) {
   1024 				CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED);
   1025 				SHREG_SCSCR |= SCSCR_RIE;
   1026 			}
   1027 #if 0
   1028 			if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) {
   1029 				CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED);
   1030 				sci_hwiflow(sc);
   1031 			}
   1032 #endif
   1033 		}
   1034 		splx(s);
   1035 	}
   1036 }
   1037 
   1038 integrate void
   1039 sci_txsoft(sc, tp)
   1040 	struct sci_softc *sc;
   1041 	struct tty *tp;
   1042 {
   1043 
   1044 	CLR(tp->t_state, TS_BUSY);
   1045 	if (ISSET(tp->t_state, TS_FLUSH))
   1046 		CLR(tp->t_state, TS_FLUSH);
   1047 	else
   1048 		ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf));
   1049 	(*tp->t_linesw->l_start)(tp);
   1050 }
   1051 
   1052 integrate void
   1053 sci_stsoft(struct sci_softc *sc, struct tty *tp)
   1054 {
   1055 #if 0
   1056 /* XXX (msaitoh) */
   1057 	u_char msr, delta;
   1058 	int s;
   1059 
   1060 	s = splserial();
   1061 	msr = sc->sc_msr;
   1062 	delta = sc->sc_msr_delta;
   1063 	sc->sc_msr_delta = 0;
   1064 	splx(s);
   1065 
   1066 	if (ISSET(delta, sc->sc_msr_dcd)) {
   1067 		/*
   1068 		 * Inform the tty layer that carrier detect changed.
   1069 		 */
   1070 		(void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD));
   1071 	}
   1072 
   1073 	if (ISSET(delta, sc->sc_msr_cts)) {
   1074 		/* Block or unblock output according to flow control. */
   1075 		if (ISSET(msr, sc->sc_msr_cts)) {
   1076 			sc->sc_tx_stopped = 0;
   1077 			(*tp->t_linesw->l_start)(tp);
   1078 		} else {
   1079 			sc->sc_tx_stopped = 1;
   1080 		}
   1081 	}
   1082 
   1083 #ifdef SCI_DEBUG
   1084 	if (sci_debug)
   1085 		scistatus(sc, "sci_stsoft");
   1086 #endif
   1087 #endif
   1088 }
   1089 
   1090 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
   1091 void
   1092 scisoft(void *arg)
   1093 {
   1094 	struct sci_softc *sc = arg;
   1095 	struct tty *tp;
   1096 
   1097 	if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
   1098 		return;
   1099 
   1100 	{
   1101 #else
   1102 void
   1103 #ifndef __NO_SOFT_SERIAL_INTERRUPT
   1104 scisoft()
   1105 #else
   1106 scisoft(void *arg)
   1107 #endif
   1108 {
   1109 	struct sci_softc	*sc;
   1110 	struct tty	*tp;
   1111 	int	unit;
   1112 #ifdef __NO_SOFT_SERIAL_INTERRUPT
   1113 	int s;
   1114 
   1115 	s = splsoftserial();
   1116 	sci_softintr_scheduled = 0;
   1117 #endif
   1118 
   1119 	for (unit = 0; unit < sci_cd.cd_ndevs; unit++) {
   1120 		sc = sci_cd.cd_devs[unit];
   1121 		if (sc == NULL || !ISSET(sc->sc_hwflags, SCI_HW_DEV_OK))
   1122 			continue;
   1123 
   1124 		if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
   1125 			continue;
   1126 
   1127 		tp = sc->sc_tty;
   1128 		if (tp == NULL)
   1129 			continue;
   1130 		if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0)
   1131 			continue;
   1132 #endif
   1133 		tp = sc->sc_tty;
   1134 
   1135 		if (sc->sc_rx_ready) {
   1136 			sc->sc_rx_ready = 0;
   1137 			sci_rxsoft(sc, tp);
   1138 		}
   1139 
   1140 #if 0
   1141 		if (sc->sc_st_check) {
   1142 			sc->sc_st_check = 0;
   1143 			sci_stsoft(sc, tp);
   1144 		}
   1145 #endif
   1146 
   1147 		if (sc->sc_tx_done) {
   1148 			sc->sc_tx_done = 0;
   1149 			sci_txsoft(sc, tp);
   1150 		}
   1151 	}
   1152 
   1153 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS
   1154 #ifdef __NO_SOFT_SERIAL_INTERRUPT
   1155 	splx(s);
   1156 #endif
   1157 #endif
   1158 }
   1159 
   1160 int
   1161 sciintr(void *arg)
   1162 {
   1163 	struct sci_softc *sc = arg;
   1164 	u_char *put, *end;
   1165 	u_int cc;
   1166 	u_short ssr;
   1167 
   1168 	if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
   1169 		return (0);
   1170 
   1171 	end = sc->sc_ebuf;
   1172 	put = sc->sc_rbput;
   1173 	cc = sc->sc_rbavail;
   1174 
   1175 	do {
   1176 		ssr = SHREG_SCSSR;
   1177 		if (ISSET(ssr, SCSSR_FER)) {
   1178 			SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_PER | SCSSR_FER);
   1179 #if defined(DDB) || defined(KGDB)
   1180 #ifdef SH4
   1181 			if ((SHREG_SCSPTR & SCSPTR_SPB0DT) != 0) {
   1182 #else
   1183 			if ((SHREG_SCSPDR & SCSPDR_SCP0DT) != 0) {
   1184 #endif
   1185 #ifdef DDB
   1186 				if (ISSET(sc->sc_hwflags, SCI_HW_CONSOLE)) {
   1187 					console_debugger();
   1188 				}
   1189 #endif
   1190 #ifdef KGDB
   1191 				if (ISSET(sc->sc_hwflags, SCI_HW_KGDB)) {
   1192 					kgdb_connect(1);
   1193 				}
   1194 #endif
   1195 			}
   1196 #endif /* DDB || KGDB */
   1197 		}
   1198 		if ((SHREG_SCSSR & SCSSR_RDRF) != 0) {
   1199 			if (cc > 0) {
   1200 				put[0] = SHREG_SCRDR;
   1201 				put[1] = SHREG_SCSSR & 0x00ff;
   1202 
   1203 				put += 2;
   1204 				if (put >= end)
   1205 					put = sc->sc_rbuf;
   1206 				cc--;
   1207 			}
   1208 
   1209 			SHREG_SCSSR &= ~(SCSSR_ORER | SCSSR_FER | SCSSR_PER |
   1210 			    SCSSR_RDRF);
   1211 
   1212 				/*
   1213 				 * Current string of incoming characters ended because
   1214 				 * no more data was available or we ran out of space.
   1215 				 * Schedule a receive event if any data was received.
   1216 				 * If we're out of space, turn off receive interrupts.
   1217 				 */
   1218 			sc->sc_rbput = put;
   1219 			sc->sc_rbavail = cc;
   1220 			if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED))
   1221 				sc->sc_rx_ready = 1;
   1222 
   1223 				/*
   1224 				 * See if we are in danger of overflowing a buffer. If
   1225 				 * so, use hardware flow control to ease the pressure.
   1226 				 */
   1227 			if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) &&
   1228 			    cc < sc->sc_r_hiwat) {
   1229 				SET(sc->sc_rx_flags, RX_IBUF_BLOCKED);
   1230 #if 0
   1231 				sci_hwiflow(sc);
   1232 #endif
   1233 			}
   1234 
   1235 				/*
   1236 				 * If we're out of space, disable receive interrupts
   1237 				 * until the queue has drained a bit.
   1238 				 */
   1239 			if (!cc) {
   1240 				SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED);
   1241 				SHREG_SCSCR &= ~SCSCR_RIE;
   1242 			}
   1243 		} else {
   1244 			if (SHREG_SCSSR & SCSSR_RDRF) {
   1245 				SHREG_SCSCR &= ~(SCSCR_TIE | SCSCR_RIE);
   1246 				delay(10);
   1247 				SHREG_SCSCR |= SCSCR_TIE | SCSCR_RIE;
   1248 				continue;
   1249 			}
   1250 		}
   1251 	} while (SHREG_SCSSR & SCSSR_RDRF);
   1252 
   1253 #if 0
   1254 	msr = bus_space_read_1(iot, ioh, sci_msr);
   1255 	delta = msr ^ sc->sc_msr;
   1256 	sc->sc_msr = msr;
   1257 	if (ISSET(delta, sc->sc_msr_mask)) {
   1258 		SET(sc->sc_msr_delta, delta);
   1259 
   1260 		/*
   1261 		 * Pulse-per-second clock signal on edge of DCD?
   1262 		 */
   1263 		if (ISSET(delta, sc->sc_ppsmask)) {
   1264 			struct timeval tv;
   1265 			if (ISSET(msr, sc->sc_ppsmask) ==
   1266 			    sc->sc_ppsassert) {
   1267 				/* XXX nanotime() */
   1268 				microtime(&tv);
   1269 				TIMEVAL_TO_TIMESPEC(&tv,
   1270 						    &sc->ppsinfo.assert_timestamp);
   1271 				if (sc->ppsparam.mode & PPS_OFFSETASSERT) {
   1272 					timespecadd(&sc->ppsinfo.assert_timestamp,
   1273 						    &sc->ppsparam.assert_offset,
   1274 						    &sc->ppsinfo.assert_timestamp);
   1275 					TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.assert_timestamp);
   1276 				}
   1277 
   1278 #ifdef PPS_SYNC
   1279 				if (sc->ppsparam.mode & PPS_HARDPPSONASSERT)
   1280 					hardpps(&tv, tv.tv_usec);
   1281 #endif
   1282 				sc->ppsinfo.assert_sequence++;
   1283 				sc->ppsinfo.current_mode =
   1284 					sc->ppsparam.mode;
   1285 
   1286 			} else if (ISSET(msr, sc->sc_ppsmask) ==
   1287 				   sc->sc_ppsclear) {
   1288 				/* XXX nanotime() */
   1289 				microtime(&tv);
   1290 				TIMEVAL_TO_TIMESPEC(&tv,
   1291 						    &sc->ppsinfo.clear_timestamp);
   1292 				if (sc->ppsparam.mode & PPS_OFFSETCLEAR) {
   1293 					timespecadd(&sc->ppsinfo.clear_timestamp,
   1294 						    &sc->ppsparam.clear_offset,
   1295 						    &sc->ppsinfo.clear_timestamp);
   1296 					TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.clear_timestamp);
   1297 				}
   1298 
   1299 #ifdef PPS_SYNC
   1300 				if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR)
   1301 					hardpps(&tv, tv.tv_usec);
   1302 #endif
   1303 				sc->ppsinfo.clear_sequence++;
   1304 				sc->ppsinfo.current_mode =
   1305 					sc->ppsparam.mode;
   1306 			}
   1307 		}
   1308 
   1309 		/*
   1310 		 * Stop output immediately if we lose the output
   1311 		 * flow control signal or carrier detect.
   1312 		 */
   1313 		if (ISSET(~msr, sc->sc_msr_mask)) {
   1314 			sc->sc_tbc = 0;
   1315 			sc->sc_heldtbc = 0;
   1316 #ifdef SCI_DEBUG
   1317 			if (sci_debug)
   1318 				scistatus(sc, "sciintr  ");
   1319 #endif
   1320 		}
   1321 
   1322 		sc->sc_st_check = 1;
   1323 	}
   1324 #endif
   1325 
   1326 	/*
   1327 	 * Done handling any receive interrupts. See if data can be
   1328 	 * transmitted as well. Schedule tx done event if no data left
   1329 	 * and tty was marked busy.
   1330 	 */
   1331 	if ((SHREG_SCSSR & SCSSR_TDRE) != 0) {
   1332 		/*
   1333 		 * If we've delayed a parameter change, do it now, and restart
   1334 		 * output.
   1335 		 */
   1336 		if (sc->sc_heldchange) {
   1337 			sc->sc_heldchange = 0;
   1338 			sc->sc_tbc = sc->sc_heldtbc;
   1339 			sc->sc_heldtbc = 0;
   1340 		}
   1341 
   1342 		/* Output the next chunk of the contiguous buffer, if any. */
   1343 		if (sc->sc_tbc > 0) {
   1344 			sci_putc(*(sc->sc_tba));
   1345 			sc->sc_tba++;
   1346 			sc->sc_tbc--;
   1347 		} else {
   1348 			/* Disable transmit completion interrupts if necessary. */
   1349 #if 0
   1350 			if (ISSET(sc->sc_ier, IER_ETXRDY))
   1351 #endif
   1352 				SHREG_SCSCR &= ~SCSCR_TIE;
   1353 
   1354 			if (sc->sc_tx_busy) {
   1355 				sc->sc_tx_busy = 0;
   1356 				sc->sc_tx_done = 1;
   1357 			}
   1358 		}
   1359 	}
   1360 
   1361 	/* Wake up the poller. */
   1362 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS
   1363 	softintr_schedule(sc->sc_si);
   1364 #else
   1365 #ifndef __NO_SOFT_SERIAL_INTERRUPT
   1366 	setsoftserial();
   1367 #else
   1368 	if (!sci_softintr_scheduled) {
   1369 		sci_softintr_scheduled = 1;
   1370 		callout_reset(&sci_soft_ch, 1, scisoft, 1);
   1371 	}
   1372 #endif
   1373 #endif
   1374 
   1375 #if NRND > 0 && defined(RND_SCI)
   1376 	rnd_add_uint32(&sc->rnd_source, iir | lsr);
   1377 #endif
   1378 
   1379 	return (1);
   1380 }
   1381 
   1382 void
   1383 scicnprobe(cp)
   1384 	struct consdev *cp;
   1385 {
   1386 	int maj;
   1387 
   1388 	/* locate the major number */
   1389 	maj = cdevsw_lookup_major(&sci_cdevsw);
   1390 
   1391 	/* Initialize required fields. */
   1392 	cp->cn_dev = makedev(maj, 0);
   1393 #ifdef SCICONSOLE
   1394 	cp->cn_pri = CN_REMOTE;
   1395 #else
   1396 	cp->cn_pri = CN_NORMAL;
   1397 #endif
   1398 }
   1399 
   1400 void
   1401 scicninit(struct consdev *cp)
   1402 {
   1403 
   1404 	InitializeSci(scicn_speed);
   1405 	sciisconsole = 1;
   1406 }
   1407 
   1408 int
   1409 scicngetc(dev_t dev)
   1410 {
   1411 	int c;
   1412 	int s;
   1413 
   1414 	s = splserial();
   1415 	c = sci_getc();
   1416 	splx(s);
   1417 
   1418 	return (c);
   1419 }
   1420 
   1421 void
   1422 scicnputc(dev_t dev, int c)
   1423 {
   1424 	int s;
   1425 
   1426 	s = splserial();
   1427 	sci_putc((u_char)c);
   1428 	splx(s);
   1429 }
   1430