sci.c revision 1.5
1 /* $NetBSD: sci.c,v 1.5 2000/01/07 10:50:14 msaitoh Exp $ */ 2 3 /*- 4 * Copyright (C) 1999 T.Horiuchi and SAITOH Masanobu. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 /*- 30 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. 31 * All rights reserved. 32 * 33 * This code is derived from software contributed to The NetBSD Foundation 34 * by Charles M. Hannum. 35 * 36 * Redistribution and use in source and binary forms, with or without 37 * modification, are permitted provided that the following conditions 38 * are met: 39 * 1. Redistributions of source code must retain the above copyright 40 * notice, this list of conditions and the following disclaimer. 41 * 2. Redistributions in binary form must reproduce the above copyright 42 * notice, this list of conditions and the following disclaimer in the 43 * documentation and/or other materials provided with the distribution. 44 * 3. All advertising materials mentioning features or use of this software 45 * must display the following acknowledgement: 46 * This product includes software developed by the NetBSD 47 * Foundation, Inc. and its contributors. 48 * 4. Neither the name of The NetBSD Foundation nor the names of its 49 * contributors may be used to endorse or promote products derived 50 * from this software without specific prior written permission. 51 * 52 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 53 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 54 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 55 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 56 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 57 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 58 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 59 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 60 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 61 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 62 * POSSIBILITY OF SUCH DAMAGE. 63 */ 64 65 /* 66 * Copyright (c) 1991 The Regents of the University of California. 67 * All rights reserved. 68 * 69 * Redistribution and use in source and binary forms, with or without 70 * modification, are permitted provided that the following conditions 71 * are met: 72 * 1. Redistributions of source code must retain the above copyright 73 * notice, this list of conditions and the following disclaimer. 74 * 2. Redistributions in binary form must reproduce the above copyright 75 * notice, this list of conditions and the following disclaimer in the 76 * documentation and/or other materials provided with the distribution. 77 * 3. All advertising materials mentioning features or use of this software 78 * must display the following acknowledgement: 79 * This product includes software developed by the University of 80 * California, Berkeley and its contributors. 81 * 4. Neither the name of the University nor the names of its contributors 82 * may be used to endorse or promote products derived from this software 83 * without specific prior written permission. 84 * 85 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 86 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 87 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 88 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 89 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 90 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 91 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 92 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 93 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 94 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 95 * SUCH DAMAGE. 96 * 97 * @(#)com.c 7.5 (Berkeley) 5/16/91 98 */ 99 100 /* 101 * SH internal serial driver 102 * 103 * This code is derived from both z8530tty.c and com.c 104 */ 105 106 #include "opt_pclock.h" 107 #include "opt_sci.h" 108 109 #include <sys/param.h> 110 #include <sys/systm.h> 111 #include <sys/tty.h> 112 #include <sys/proc.h> 113 #include <sys/conf.h> 114 #include <sys/file.h> 115 #include <sys/syslog.h> 116 #include <sys/kernel.h> 117 #include <sys/device.h> 118 #include <sys/malloc.h> 119 120 #include <dev/cons.h> 121 122 #include <machine/cpu.h> 123 #include <sh3/scireg.h> 124 #include <sh3/tmureg.h> 125 126 #include <machine/shbvar.h> 127 128 static void scistart __P((struct tty *)); 129 static int sciparam __P((struct tty *, struct termios *)); 130 131 void scicnprobe __P((struct consdev *)); 132 void scicninit __P((struct consdev *)); 133 void scicnputc __P((dev_t, int)); 134 int scicngetc __P((dev_t)); 135 void scicnpoolc __P((dev_t, int)); 136 int sciintr __P((void *)); 137 138 struct sci_softc { 139 struct device sc_dev; /* boilerplate */ 140 struct tty *sc_tty; 141 void *sc_ih; 142 143 #if 0 144 bus_space_tag_t sc_iot; /* ISA i/o space identifier */ 145 bus_space_handle_t sc_ioh; /* ISA io handle */ 146 147 int sc_drq; 148 149 int sc_frequency; 150 #endif 151 152 u_int sc_overflows, 153 sc_floods, 154 sc_errors; /* number of retries so far */ 155 u_char sc_status[7]; /* copy of registers */ 156 157 int sc_hwflags; 158 int sc_swflags; 159 u_int sc_fifolen; /* XXX always 0? */ 160 161 u_int sc_r_hiwat, 162 sc_r_lowat; 163 u_char *volatile sc_rbget, 164 *volatile sc_rbput; 165 volatile u_int sc_rbavail; 166 u_char *sc_rbuf, 167 *sc_ebuf; 168 169 u_char *sc_tba; /* transmit buffer address */ 170 u_int sc_tbc, /* transmit byte count */ 171 sc_heldtbc; 172 173 volatile u_char sc_rx_flags, /* receiver blocked */ 174 #define RX_TTY_BLOCKED 0x01 175 #define RX_TTY_OVERFLOWED 0x02 176 #define RX_IBUF_BLOCKED 0x04 177 #define RX_IBUF_OVERFLOWED 0x08 178 #define RX_ANY_BLOCK 0x0f 179 sc_tx_busy, /* working on an output chunk */ 180 sc_tx_done, /* done with one output chunk */ 181 sc_tx_stopped, /* H/W level stop (lost CTS) */ 182 sc_st_check, /* got a status interrupt */ 183 sc_rx_ready; 184 185 volatile u_char sc_heldchange; 186 }; 187 188 /* controller driver configuration */ 189 static int sci_match __P((struct device *, struct cfdata *, void *)); 190 static void sci_attach __P((struct device *, struct device *, void *)); 191 192 void sci_break __P((struct sci_softc *, int)); 193 void sci_iflush __P((struct sci_softc *)); 194 195 #define integrate static inline 196 #ifdef __GENERIC_SOFT_INTERRUPTS 197 void scisoft __P((void *)); 198 #else 199 #ifndef __NO_SOFT_SERIAL_INTERRUPT 200 void scisoft __P((void)); 201 #else 202 void scisoft __P((void *)); 203 #endif 204 #endif 205 integrate void sci_rxsoft __P((struct sci_softc *, struct tty *)); 206 integrate void sci_txsoft __P((struct sci_softc *, struct tty *)); 207 integrate void sci_stsoft __P((struct sci_softc *, struct tty *)); 208 integrate void sci_schedrx __P((struct sci_softc *)); 209 void scidiag __P((void *)); 210 211 #define SCIUNIT_MASK 0x7ffff 212 #define SCIDIALOUT_MASK 0x80000 213 214 #define SCIUNIT(x) (minor(x) & SCIUNIT_MASK) 215 #define SCIDIALOUT(x) (minor(x) & SCIDIALOUT_MASK) 216 217 /* Macros to clear/set/test flags. */ 218 #define SET(t, f) (t) |= (f) 219 #define CLR(t, f) (t) &= ~(f) 220 #define ISSET(t, f) ((t) & (f)) 221 222 /* Hardware flag masks */ 223 #define SCI_HW_NOIEN 0x01 224 #define SCI_HW_FIFO 0x02 225 #define SCI_HW_FLOW 0x08 226 #define SCI_HW_DEV_OK 0x20 227 #define SCI_HW_CONSOLE 0x40 228 #define SCI_HW_KGDB 0x80 229 230 /* Buffer size for character buffer */ 231 #define SCI_RING_SIZE 2048 232 233 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 234 u_int sci_rbuf_hiwat = (SCI_RING_SIZE * 1) / 4; 235 u_int sci_rbuf_lowat = (SCI_RING_SIZE * 3) / 4; 236 237 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 238 int sciconscflag = CONMODE; 239 240 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 241 242 #ifndef __GENERIC_SOFT_INTERRUPTS 243 #ifdef __NO_SOFT_SERIAL_INTERRUPT 244 volatile int sci_softintr_scheduled; 245 #endif 246 #endif 247 248 u_int sci_rbuf_size = SCI_RING_SIZE; 249 250 struct cfattach sci_ca = { 251 sizeof(struct sci_softc), sci_match, sci_attach 252 }; 253 254 extern struct cfdriver sci_cd; 255 256 cdev_decl(sci); 257 258 void InitializeSci __P((unsigned int)); 259 260 /* 261 * following functions are debugging prupose only 262 */ 263 #define CR 0x0D 264 #define I2C_ADRS (*(volatile unsigned int *)0xa8000000) 265 #define USART_ON (unsigned int)~0x08 266 267 static void WaitFor __P((int)); 268 void PutcSci __P((unsigned char)); 269 void PutStrSci __P((unsigned char *)); 270 int SciErrCheck __P((void)); 271 unsigned char GetcSci __P((void)); 272 int GetStrSci __P((unsigned char *, int)); 273 274 /* 275 * WaitFor 276 * : int mSec; 277 */ 278 static void 279 WaitFor(mSec) 280 int mSec; 281 { 282 283 /* Disable Under Flow interrupt, rising edge, 1/4 */ 284 SHREG_TCR2 = 0x0000; 285 286 /* Set counter value (count down with 4 KHz) */ 287 SHREG_TCNT2 = mSec * 4; 288 289 /* start Channel2 */ 290 SHREG_TSTR |= TSTR_STR2; 291 292 /* wait for under flag ON of channel2 */ 293 while ((SHREG_TCR2 & 0x0100) == 0) 294 ; 295 296 /* stop channel2 */ 297 SHREG_TSTR &= ~TSTR_STR2; 298 } 299 300 /* 301 * InitializeSci 302 * : unsigned int bps; 303 * : SCI(Serial Communication Interface) 304 */ 305 306 void 307 InitializeSci(bps) 308 unsigned int bps; 309 { 310 311 /* Initialize SCR */ 312 SHREG_SCSCR = 0x00; 313 314 /* Serial Mode Register */ 315 SHREG_SCSMR = 0x00; /* Async,8bit,NonParity,Even,1Stop,NoMulti */ 316 317 /* Bit Rate Register */ 318 SHREG_SCBRR = divrnd(PCLOCK, 32 * bps) -1; 319 320 /* 321 * wait 1mSec, because Send/Recv must begin 1 bit period after 322 * BRR is set. 323 */ 324 WaitFor(1); 325 326 /* Send permission, Recieve permission ON */ 327 SHREG_SCSCR = SCSCR_TE | SCSCR_RE; 328 329 /*Serial Status Register */ 330 SHREG_SCSSR &= SCSSR_TDRE; /* Clear Status */ 331 332 #if 0 333 I2C_ADRS &= ~0x08; /* enable RS-232C */ 334 #endif 335 } 336 337 338 /* 339 * PutcSci 340 * : unsigned char c; 341 */ 342 void 343 PutcSci(c) 344 unsigned char c; 345 { 346 347 /* wait for ready */ 348 while ((SHREG_SCSSR & SCSSR_TDRE) == NULL) 349 ; 350 351 /* write send data to send register */ 352 SHREG_SCTDR = c; 353 354 /* clear ready flag */ 355 SHREG_SCSSR &= ~SCSSR_TDRE; 356 357 if (c == '\n'){ 358 while ((SHREG_SCSSR & SCSSR_TDRE) == NULL) 359 ; 360 361 SHREG_SCTDR = '\r'; 362 363 SHREG_SCSSR &= ~SCSSR_TDRE; 364 } 365 } 366 367 /* 368 * PutStrSci 369 * : unsigned char *s; 370 */ 371 void 372 PutStrSci(s) 373 unsigned char *s; 374 { 375 #if 0 376 static int SciInit = 0; 377 if (SciInit == 0) { 378 InitializeSci(SCICN_SPEED); 379 SciInit = 1; 380 } 381 #endif 382 383 while (*s) 384 PutcSci(*s++); 385 } 386 387 /* 388 * : SciErrCheck 389 * 0x20 = over run 390 * 0x10 = frame error 391 * 0x80 = parity error 392 */ 393 int 394 SciErrCheck(void) 395 { 396 397 return(SHREG_SCSSR & (SCSSR_ORER | SCSSR_FER | SCSSR_PER)); 398 } 399 400 /* 401 * GetcSci 402 */ 403 unsigned char 404 GetcSci(void) 405 { 406 unsigned char c, err_c; 407 408 while (((err_c = SHREG_SCSSR) 409 & (SCSSR_RDRF | SCSSR_ORER | SCSSR_FER | SCSSR_PER)) == 0) 410 ; 411 if ((err_c & (SCSSR_ORER | SCSSR_FER | SCSSR_PER)) != 0) 412 return(err_c |= 0x80); 413 414 c = SHREG_SCRDR; 415 416 SHREG_SCSSR &= ~SCSSR_RDRF; 417 418 return(c); 419 } 420 421 /* 422 * GetStrSci 423 * : unsigned char *s; 424 * : int size; 425 */ 426 int 427 GetStrSci(s, size) 428 unsigned char *s; 429 int size; 430 { 431 432 for(; size ; size--){ 433 *s = GetcSci(); 434 if (*s & 0x80) 435 return -1; 436 if (*s == CR){ 437 *s = 0; 438 break; 439 } 440 s++; 441 } 442 if (size == 0) 443 *s = 0; 444 return 0; 445 } 446 447 #if 0 448 #define SCI_MAX_UNITS 2 449 #else 450 #define SCI_MAX_UNITS 1 451 #endif 452 453 454 static int 455 sci_match(parent, cfp, aux) 456 struct device *parent; 457 struct cfdata *cfp; 458 void *aux; 459 { 460 #if 0 461 struct shb_attach_args *ia = aux; 462 #endif 463 464 if (strcmp(cfp->cf_driver->cd_name, "sci") 465 || cfp->cf_unit >= SCI_MAX_UNITS) 466 return 0; 467 468 return 1; 469 } 470 471 static void 472 sci_attach(parent, self, aux) 473 struct device *parent, *self; 474 void *aux; 475 { 476 struct sci_softc *sc = (struct sci_softc *)self; 477 struct tty *tp; 478 int irq; 479 struct shb_attach_args *ia = aux; 480 481 sc->sc_hwflags = 0; /* XXX */ 482 sc->sc_swflags = 0; /* XXX */ 483 sc->sc_fifolen = 0; /* XXX */ 484 485 irq = ia->ia_irq; 486 487 SET(sc->sc_hwflags, SCI_HW_DEV_OK); 488 SET(sc->sc_hwflags, SCI_HW_CONSOLE); 489 490 #if 0 491 if (irq != IRQUNK) { 492 sc->sc_ih = shb_intr_establish(irq, 493 IST_EDGE, IPL_SERIAL, sciintr, sc); 494 } 495 #else 496 if (irq != IRQUNK) { 497 sc->sc_ih = shb_intr_establish(SCI_IRQ, 498 IST_EDGE, IPL_SERIAL, sciintr, sc); 499 } 500 #endif 501 502 printf("\n"); 503 504 printf("%s: console\n", sc->sc_dev.dv_xname); 505 506 tp = ttymalloc(); 507 tp->t_oproc = scistart; 508 tp->t_param = sciparam; 509 tp->t_hwiflow = NULL; 510 511 sc->sc_tty = tp; 512 sc->sc_rbuf = malloc(sci_rbuf_size << 1, M_DEVBUF, M_NOWAIT); 513 if (sc->sc_rbuf == NULL) { 514 printf("%s: unable to allocate ring buffer\n", 515 sc->sc_dev.dv_xname); 516 return; 517 } 518 sc->sc_ebuf = sc->sc_rbuf + (sci_rbuf_size << 1); 519 520 tty_attach(tp); 521 } 522 523 /* 524 * Start or restart transmission. 525 */ 526 static void 527 scistart(tp) 528 struct tty *tp; 529 { 530 struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(tp->t_dev)]; 531 int s; 532 533 s = spltty(); 534 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 535 goto out; 536 if (sc->sc_tx_stopped) 537 goto out; 538 539 if (tp->t_outq.c_cc <= tp->t_lowat) { 540 if (ISSET(tp->t_state, TS_ASLEEP)) { 541 CLR(tp->t_state, TS_ASLEEP); 542 wakeup(&tp->t_outq); 543 } 544 selwakeup(&tp->t_wsel); 545 if (tp->t_outq.c_cc == 0) 546 goto out; 547 } 548 549 /* Grab the first contiguous region of buffer space. */ 550 { 551 u_char *tba; 552 int tbc; 553 554 tba = tp->t_outq.c_cf; 555 tbc = ndqb(&tp->t_outq, 0); 556 557 (void)splserial(); 558 559 sc->sc_tba = tba; 560 sc->sc_tbc = tbc; 561 } 562 563 SET(tp->t_state, TS_BUSY); 564 sc->sc_tx_busy = 1; 565 566 /* Enable transmit completion interrupts if necessary. */ 567 SHREG_SCSCR |= SCSCR_TIE | SCSCR_RIE; 568 569 /* Output the first byte of the contiguous buffer. */ 570 { 571 if (sc->sc_tbc > 0) { 572 PutcSci(*(sc->sc_tba)); 573 sc->sc_tba++; 574 sc->sc_tbc--; 575 } 576 } 577 out: 578 splx(s); 579 return; 580 } 581 582 /* 583 * Set SCI tty parameters from termios. 584 * XXX - Should just copy the whole termios after 585 * making sure all the changes could be done. 586 */ 587 static int 588 sciparam(tp, t) 589 struct tty *tp; 590 struct termios *t; 591 { 592 struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(tp->t_dev)]; 593 int ospeed = t->c_ospeed; 594 int s; 595 596 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 597 return (EIO); 598 599 /* Check requested parameters. */ 600 if (ospeed < 0) 601 return (EINVAL); 602 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 603 return (EINVAL); 604 605 /* 606 * For the console, always force CLOCAL and !HUPCL, so that the port 607 * is always active. 608 */ 609 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 610 ISSET(sc->sc_hwflags, SCI_HW_CONSOLE)) { 611 SET(t->c_cflag, CLOCAL); 612 CLR(t->c_cflag, HUPCL); 613 } 614 615 /* 616 * If there were no changes, don't do anything. This avoids dropping 617 * input and improves performance when all we did was frob things like 618 * VMIN and VTIME. 619 */ 620 if (tp->t_ospeed == t->c_ospeed && 621 tp->t_cflag == t->c_cflag) 622 return (0); 623 624 #if 0 625 /* XXX (msaitoh) */ 626 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 627 #endif 628 629 s = splserial(); 630 631 /* 632 * Set the FIFO threshold based on the receive speed. 633 * 634 * * If it's a low speed, it's probably a mouse or some other 635 * interactive device, so set the threshold low. 636 * * If it's a high speed, trim the trigger level down to prevent 637 * overflows. 638 * * Otherwise set it a bit higher. 639 */ 640 #if 0 641 /* XXX (msaitoh) */ 642 if (ISSET(sc->sc_hwflags, SCI_HW_HAYESP)) 643 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 644 else if (ISSET(sc->sc_hwflags, SCI_HW_FIFO)) 645 sc->sc_fifo = FIFO_ENABLE | 646 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : 647 t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4); 648 else 649 sc->sc_fifo = 0; 650 #endif 651 652 /* And copy to tty. */ 653 tp->t_ispeed = 0; 654 tp->t_ospeed = t->c_ospeed; 655 tp->t_cflag = t->c_cflag; 656 657 if (!sc->sc_heldchange) { 658 if (sc->sc_tx_busy) { 659 sc->sc_heldtbc = sc->sc_tbc; 660 sc->sc_tbc = 0; 661 sc->sc_heldchange = 1; 662 } 663 #if 0 664 /* XXX (msaitoh) */ 665 else 666 sci_loadchannelregs(sc); 667 #endif 668 } 669 670 if (!ISSET(t->c_cflag, CHWFLOW)) { 671 /* Disable the high water mark. */ 672 sc->sc_r_hiwat = 0; 673 sc->sc_r_lowat = 0; 674 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 675 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 676 sci_schedrx(sc); 677 } 678 } else { 679 sc->sc_r_hiwat = sci_rbuf_hiwat; 680 sc->sc_r_lowat = sci_rbuf_lowat; 681 } 682 683 splx(s); 684 685 #ifdef SCI_DEBUG 686 if (sci_debug) 687 scistatus(sc, "sciparam "); 688 #endif 689 690 if (!ISSET(t->c_cflag, CHWFLOW)) { 691 if (sc->sc_tx_stopped) { 692 sc->sc_tx_stopped = 0; 693 scistart(tp); 694 } 695 } 696 697 return (0); 698 } 699 700 void 701 sci_iflush(sc) 702 struct sci_softc *sc; 703 { 704 unsigned char err_c; 705 volatile unsigned char c; 706 707 if (((err_c = SHREG_SCSSR) 708 & (SCSSR_RDRF | SCSSR_ORER | SCSSR_FER | SCSSR_PER)) != 0) { 709 710 if ((err_c & (SCSSR_ORER | SCSSR_FER | SCSSR_PER)) != 0) 711 return; 712 713 c = SHREG_SCRDR; 714 715 SHREG_SCSSR &= ~SCSSR_RDRF; 716 } 717 } 718 719 int sci_getc __P((void)); 720 void sci_putc __P((int)); 721 722 int 723 sci_getc() 724 { 725 726 return (GetcSci()); 727 } 728 729 void 730 sci_putc(int c) 731 { 732 733 PutcSci(c); 734 } 735 736 int 737 sciopen(dev, flag, mode, p) 738 dev_t dev; 739 int flag, mode; 740 struct proc *p; 741 { 742 int unit = SCIUNIT(dev); 743 struct sci_softc *sc; 744 struct tty *tp; 745 int s, s2; 746 int error; 747 748 if (unit >= sci_cd.cd_ndevs) 749 return (ENXIO); 750 sc = sci_cd.cd_devs[unit]; 751 if (sc == 0 || !ISSET(sc->sc_hwflags, SCI_HW_DEV_OK) || 752 sc->sc_rbuf == NULL) 753 return (ENXIO); 754 755 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 756 return (ENXIO); 757 758 #ifdef KGDB 759 /* 760 * If this is the kgdb port, no other use is permitted. 761 */ 762 if (ISSET(sc->sc_hwflags, SCI_HW_KGDB)) 763 return (EBUSY); 764 #endif 765 766 tp = sc->sc_tty; 767 768 if (ISSET(tp->t_state, TS_ISOPEN) && 769 ISSET(tp->t_state, TS_XCLUDE) && 770 p->p_ucred->cr_uid != 0) 771 return (EBUSY); 772 773 s = spltty(); 774 775 /* 776 * Do the following iff this is a first open. 777 */ 778 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 779 struct termios t; 780 781 tp->t_dev = dev; 782 783 s2 = splserial(); 784 785 /* Turn on interrupts. */ 786 SHREG_SCSCR |= SCSCR_TIE | SCSCR_RIE; 787 788 splx(s2); 789 790 /* 791 * Initialize the termios status to the defaults. Add in the 792 * sticky bits from TIOCSFLAGS. 793 */ 794 t.c_ispeed = 0; 795 if (ISSET(sc->sc_hwflags, SCI_HW_CONSOLE)) { 796 t.c_ospeed = SCICN_SPEED; 797 t.c_cflag = sciconscflag; 798 } else { 799 t.c_ospeed = TTYDEF_SPEED; 800 t.c_cflag = TTYDEF_CFLAG; 801 } 802 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 803 SET(t.c_cflag, CLOCAL); 804 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 805 SET(t.c_cflag, CRTSCTS); 806 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 807 SET(t.c_cflag, MDMBUF); 808 /* Make sure sciparam() will do something. */ 809 tp->t_ospeed = 0; 810 (void) sciparam(tp, &t); 811 tp->t_iflag = TTYDEF_IFLAG; 812 tp->t_oflag = TTYDEF_OFLAG; 813 tp->t_lflag = TTYDEF_LFLAG; 814 ttychars(tp); 815 ttsetwater(tp); 816 817 s2 = splserial(); 818 819 /* Clear the input ring, and unblock. */ 820 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 821 sc->sc_rbavail = sci_rbuf_size; 822 sci_iflush(sc); 823 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 824 #if 0 825 /* XXX (msaitoh) */ 826 sci_hwiflow(sc); 827 #endif 828 829 #ifdef SCI_DEBUG 830 if (sci_debug) 831 scistatus(sc, "sciopen "); 832 #endif 833 834 splx(s2); 835 } 836 837 splx(s); 838 839 error = ttyopen(tp, SCIDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 840 if (error) 841 goto bad; 842 843 error = (*linesw[tp->t_line].l_open)(dev, tp); 844 if (error) 845 goto bad; 846 847 return (0); 848 849 bad: 850 851 return (error); 852 } 853 854 int 855 sciclose(dev, flag, mode, p) 856 dev_t dev; 857 int flag, mode; 858 struct proc *p; 859 { 860 struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)]; 861 struct tty *tp = sc->sc_tty; 862 863 /* XXX This is for cons.c. */ 864 if (!ISSET(tp->t_state, TS_ISOPEN)) 865 return (0); 866 867 (*linesw[tp->t_line].l_close)(tp, flag); 868 ttyclose(tp); 869 870 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 871 return (0); 872 873 return (0); 874 } 875 876 int 877 sciread(dev, uio, flag) 878 dev_t dev; 879 struct uio *uio; 880 int flag; 881 { 882 struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)]; 883 struct tty *tp = sc->sc_tty; 884 885 return ((*linesw[tp->t_line].l_read)(tp, uio, flag)); 886 } 887 888 int 889 sciwrite(dev, uio, flag) 890 dev_t dev; 891 struct uio *uio; 892 int flag; 893 { 894 struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)]; 895 struct tty *tp = sc->sc_tty; 896 897 return ((*linesw[tp->t_line].l_write)(tp, uio, flag)); 898 } 899 900 struct tty * 901 scitty(dev) 902 dev_t dev; 903 { 904 struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)]; 905 struct tty *tp = sc->sc_tty; 906 907 return (tp); 908 } 909 910 int 911 sciioctl(dev, cmd, data, flag, p) 912 dev_t dev; 913 u_long cmd; 914 caddr_t data; 915 int flag; 916 struct proc *p; 917 { 918 struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(dev)]; 919 struct tty *tp = sc->sc_tty; 920 int error; 921 int s; 922 923 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 924 return (EIO); 925 926 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p); 927 if (error >= 0) 928 return (error); 929 930 error = ttioctl(tp, cmd, data, flag, p); 931 if (error >= 0) 932 return (error); 933 934 error = 0; 935 936 s = splserial(); 937 938 switch (cmd) { 939 case TIOCSBRK: 940 sci_break(sc, 1); 941 break; 942 943 case TIOCCBRK: 944 sci_break(sc, 0); 945 break; 946 947 case TIOCGFLAGS: 948 *(int *)data = sc->sc_swflags; 949 break; 950 951 case TIOCSFLAGS: 952 error = suser(p->p_ucred, &p->p_acflag); 953 if (error) 954 break; 955 sc->sc_swflags = *(int *)data; 956 break; 957 958 default: 959 error = ENOTTY; 960 break; 961 } 962 963 splx(s); 964 965 return (error); 966 } 967 968 integrate void 969 sci_schedrx(sc) 970 struct sci_softc *sc; 971 { 972 973 sc->sc_rx_ready = 1; 974 975 /* Wake up the poller. */ 976 #ifdef __GENERIC_SOFT_INTERRUPTS 977 softintr_schedule(sc->sc_si); 978 #else 979 #ifndef __NO_SOFT_SERIAL_INTERRUPT 980 setsoftserial(); 981 #else 982 if (!sci_softintr_scheduled) { 983 sci_softintr_scheduled = 1; 984 timeout(scisoft, NULL, 1); 985 } 986 #endif 987 #endif 988 } 989 990 void 991 sci_break(sc, onoff) 992 struct sci_softc *sc; 993 int onoff; 994 { 995 996 if (onoff) 997 SHREG_SCSSR2 &= ~SCSSR2_TDFE; 998 else 999 SHREG_SCSSR2 |= SCSSR2_TDFE; 1000 1001 #if 0 /* XXX */ 1002 if (!sc->sc_heldchange) { 1003 if (sc->sc_tx_busy) { 1004 sc->sc_heldtbc = sc->sc_tbc; 1005 sc->sc_tbc = 0; 1006 sc->sc_heldchange = 1; 1007 } else 1008 sci_loadchannelregs(sc); 1009 } 1010 #endif 1011 } 1012 1013 /* 1014 * Stop output, e.g., for ^S or output flush. 1015 */ 1016 void 1017 scistop(tp, flag) 1018 struct tty *tp; 1019 int flag; 1020 { 1021 struct sci_softc *sc = sci_cd.cd_devs[SCIUNIT(tp->t_dev)]; 1022 int s; 1023 1024 s = splserial(); 1025 if (ISSET(tp->t_state, TS_BUSY)) { 1026 /* Stop transmitting at the next chunk. */ 1027 sc->sc_tbc = 0; 1028 sc->sc_heldtbc = 0; 1029 if (!ISSET(tp->t_state, TS_TTSTOP)) 1030 SET(tp->t_state, TS_FLUSH); 1031 } 1032 splx(s); 1033 } 1034 1035 void 1036 scidiag(arg) 1037 void *arg; 1038 { 1039 struct sci_softc *sc = arg; 1040 int overflows, floods; 1041 int s; 1042 1043 s = splserial(); 1044 overflows = sc->sc_overflows; 1045 sc->sc_overflows = 0; 1046 floods = sc->sc_floods; 1047 sc->sc_floods = 0; 1048 sc->sc_errors = 0; 1049 splx(s); 1050 1051 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1052 sc->sc_dev.dv_xname, 1053 overflows, overflows == 1 ? "" : "s", 1054 floods, floods == 1 ? "" : "s"); 1055 } 1056 1057 integrate void 1058 sci_rxsoft(sc, tp) 1059 struct sci_softc *sc; 1060 struct tty *tp; 1061 { 1062 int (*rint) __P((int c, struct tty *tp)) = linesw[tp->t_line].l_rint; 1063 u_char *get, *end; 1064 u_int cc, scc; 1065 u_char ssr; 1066 int code; 1067 int s; 1068 1069 end = sc->sc_ebuf; 1070 get = sc->sc_rbget; 1071 scc = cc = sci_rbuf_size - sc->sc_rbavail; 1072 1073 if (cc == sci_rbuf_size) { 1074 sc->sc_floods++; 1075 if (sc->sc_errors++ == 0) 1076 timeout(scidiag, sc, 60 * hz); 1077 } 1078 1079 while (cc) { 1080 code = get[0]; 1081 ssr = get[1]; 1082 if (ISSET(ssr, SCSSR_FER | SCSSR_PER)) { 1083 if (ISSET(ssr, SCSSR_FER)) 1084 SET(code, TTY_FE); 1085 if (ISSET(ssr, SCSSR_PER)) 1086 SET(code, TTY_PE); 1087 } 1088 if ((*rint)(code, tp) == -1) { 1089 /* 1090 * The line discipline's buffer is out of space. 1091 */ 1092 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1093 /* 1094 * We're either not using flow control, or the 1095 * line discipline didn't tell us to block for 1096 * some reason. Either way, we have no way to 1097 * know when there's more space available, so 1098 * just drop the rest of the data. 1099 */ 1100 get += cc << 1; 1101 if (get >= end) 1102 get -= sci_rbuf_size << 1; 1103 cc = 0; 1104 } else { 1105 /* 1106 * Don't schedule any more receive processing 1107 * until the line discipline tells us there's 1108 * space available (through scihwiflow()). 1109 * Leave the rest of the data in the input 1110 * buffer. 1111 */ 1112 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1113 } 1114 break; 1115 } 1116 get += 2; 1117 if (get >= end) 1118 get = sc->sc_rbuf; 1119 cc--; 1120 } 1121 1122 if (cc != scc) { 1123 sc->sc_rbget = get; 1124 s = splserial(); 1125 cc = sc->sc_rbavail += scc - cc; 1126 /* Buffers should be ok again, release possible block. */ 1127 if (cc >= sc->sc_r_lowat) { 1128 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1129 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1130 SHREG_SCSCR |= SCSCR_RIE; 1131 } 1132 #if 0 1133 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1134 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1135 sci_hwiflow(sc); 1136 } 1137 #endif 1138 } 1139 splx(s); 1140 } 1141 } 1142 1143 integrate void 1144 sci_txsoft(sc, tp) 1145 struct sci_softc *sc; 1146 struct tty *tp; 1147 { 1148 1149 CLR(tp->t_state, TS_BUSY); 1150 if (ISSET(tp->t_state, TS_FLUSH)) 1151 CLR(tp->t_state, TS_FLUSH); 1152 else 1153 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1154 (*linesw[tp->t_line].l_start)(tp); 1155 } 1156 1157 integrate void 1158 sci_stsoft(sc, tp) 1159 struct sci_softc *sc; 1160 struct tty *tp; 1161 { 1162 #if 0 1163 /* XXX (msaitoh) */ 1164 u_char msr, delta; 1165 int s; 1166 1167 s = splserial(); 1168 msr = sc->sc_msr; 1169 delta = sc->sc_msr_delta; 1170 sc->sc_msr_delta = 0; 1171 splx(s); 1172 1173 if (ISSET(delta, sc->sc_msr_dcd)) { 1174 /* 1175 * Inform the tty layer that carrier detect changed. 1176 */ 1177 (void) (*linesw[tp->t_line].l_modem)(tp, ISSET(msr, MSR_DCD)); 1178 } 1179 1180 if (ISSET(delta, sc->sc_msr_cts)) { 1181 /* Block or unblock output according to flow control. */ 1182 if (ISSET(msr, sc->sc_msr_cts)) { 1183 sc->sc_tx_stopped = 0; 1184 (*linesw[tp->t_line].l_start)(tp); 1185 } else { 1186 sc->sc_tx_stopped = 1; 1187 } 1188 } 1189 1190 #ifdef SCI_DEBUG 1191 if (sci_debug) 1192 scistatus(sc, "sci_stsoft"); 1193 #endif 1194 #endif 1195 } 1196 1197 #ifdef __GENERIC_SOFT_INTERRUPTS 1198 void 1199 scisoft(arg) 1200 void *arg; 1201 { 1202 struct sci_softc *sc = arg; 1203 struct tty *tp; 1204 1205 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 1206 return; 1207 1208 { 1209 #else 1210 void 1211 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1212 scisoft() 1213 #else 1214 scisoft(arg) 1215 void *arg; 1216 #endif 1217 { 1218 struct sci_softc *sc; 1219 struct tty *tp; 1220 int unit; 1221 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1222 int s; 1223 1224 s = splsoftserial(); 1225 sci_softintr_scheduled = 0; 1226 #endif 1227 1228 for (unit = 0; unit < sci_cd.cd_ndevs; unit++) { 1229 sc = sci_cd.cd_devs[unit]; 1230 if (sc == NULL || !ISSET(sc->sc_hwflags, SCI_HW_DEV_OK)) 1231 continue; 1232 1233 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 1234 continue; 1235 1236 tp = sc->sc_tty; 1237 if (tp == NULL) 1238 continue; 1239 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) 1240 continue; 1241 #endif 1242 tp = sc->sc_tty; 1243 1244 if (sc->sc_rx_ready) { 1245 sc->sc_rx_ready = 0; 1246 sci_rxsoft(sc, tp); 1247 } 1248 1249 #if 0 1250 if (sc->sc_st_check) { 1251 sc->sc_st_check = 0; 1252 sci_stsoft(sc, tp); 1253 } 1254 #endif 1255 1256 if (sc->sc_tx_done) { 1257 sc->sc_tx_done = 0; 1258 sci_txsoft(sc, tp); 1259 } 1260 } 1261 1262 #ifndef __GENERIC_SOFT_INTERRUPTS 1263 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1264 splx(s); 1265 #endif 1266 #endif 1267 } 1268 1269 int 1270 sciintr(arg) 1271 void *arg; 1272 { 1273 struct sci_softc *sc = arg; 1274 u_char *put, *end; 1275 u_int cc; 1276 u_short ssr; 1277 1278 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 1279 return (0); 1280 1281 end = sc->sc_ebuf; 1282 put = sc->sc_rbput; 1283 cc = sc->sc_rbavail; 1284 1285 do { 1286 1287 ssr = SHREG_SCSSR; 1288 #if defined(DDB) || defined(KGDB) 1289 if (ISSET(ssr, SCSSR_BRK)) { 1290 #ifdef DDB 1291 if (ISSET(sc->sc_hwflags, SCI_HW_CONSOLE)) { 1292 console_debugger(); 1293 continue; 1294 } 1295 #endif 1296 #ifdef KGDB 1297 if (ISSET(sc->sc_hwflags, SCI_HW_KGDB)) { 1298 kgdb_connect(1); 1299 continue; 1300 } 1301 #endif 1302 } 1303 #endif /* DDB || KGDB */ 1304 if ((SHREG_SCSSR & SCSSR_RDRF) != 0) { 1305 if (cc > 0){ 1306 put[0] = SHREG_SCRDR; 1307 put[1] = SHREG_SCSSR & 0x00ff; 1308 1309 SHREG_SCSSR &= ~SCSSR_RDRF; 1310 1311 put += 2; 1312 if (put >= end) 1313 put = sc->sc_rbuf; 1314 cc--; 1315 } 1316 1317 /* 1318 * Current string of incoming characters ended because 1319 * no more data was available or we ran out of space. 1320 * Schedule a receive event if any data was received. 1321 * If we're out of space, turn off receive interrupts. 1322 */ 1323 sc->sc_rbput = put; 1324 sc->sc_rbavail = cc; 1325 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 1326 sc->sc_rx_ready = 1; 1327 1328 /* 1329 * See if we are in danger of overflowing a buffer. If 1330 * so, use hardware flow control to ease the pressure. 1331 */ 1332 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 1333 cc < sc->sc_r_hiwat) { 1334 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1335 #if 0 1336 sci_hwiflow(sc); 1337 #endif 1338 } 1339 1340 /* 1341 * If we're out of space, disable receive interrupts 1342 * until the queue has drained a bit. 1343 */ 1344 if (!cc) { 1345 SHREG_SCSCR &= ~SCSCR_RIE; 1346 } 1347 } else { 1348 if (SHREG_SCSSR & SCSSR_RDRF) { 1349 SHREG_SCSCR &= ~(SCSCR_TIE | SCSCR_RIE); 1350 continue; 1351 } 1352 } 1353 1354 #if 0 1355 msr = bus_space_read_1(iot, ioh, sci_msr); 1356 delta = msr ^ sc->sc_msr; 1357 sc->sc_msr = msr; 1358 if (ISSET(delta, sc->sc_msr_mask)) { 1359 SET(sc->sc_msr_delta, delta); 1360 1361 /* 1362 * Pulse-per-second clock signal on edge of DCD? 1363 */ 1364 if (ISSET(delta, sc->sc_ppsmask)) { 1365 struct timeval tv; 1366 if (ISSET(msr, sc->sc_ppsmask) == 1367 sc->sc_ppsassert) { 1368 /* XXX nanotime() */ 1369 microtime(&tv); 1370 TIMEVAL_TO_TIMESPEC(&tv, 1371 &sc->ppsinfo.assert_timestamp); 1372 if (sc->ppsparam.mode & PPS_OFFSETASSERT) { 1373 timespecadd(&sc->ppsinfo.assert_timestamp, 1374 &sc->ppsparam.assert_offset, 1375 &sc->ppsinfo.assert_timestamp); 1376 TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.assert_timestamp); 1377 } 1378 1379 #ifdef PPS_SYNC 1380 if (sc->ppsparam.mode & PPS_HARDPPSONASSERT) 1381 hardpps(&tv, tv.tv_usec); 1382 #endif 1383 sc->ppsinfo.assert_sequence++; 1384 sc->ppsinfo.current_mode = 1385 sc->ppsparam.mode; 1386 1387 } else if (ISSET(msr, sc->sc_ppsmask) == 1388 sc->sc_ppsclear) { 1389 /* XXX nanotime() */ 1390 microtime(&tv); 1391 TIMEVAL_TO_TIMESPEC(&tv, 1392 &sc->ppsinfo.clear_timestamp); 1393 if (sc->ppsparam.mode & PPS_OFFSETCLEAR) { 1394 timespecadd(&sc->ppsinfo.clear_timestamp, 1395 &sc->ppsparam.clear_offset, 1396 &sc->ppsinfo.clear_timestamp); 1397 TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.clear_timestamp); 1398 } 1399 1400 #ifdef PPS_SYNC 1401 if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR) 1402 hardpps(&tv, tv.tv_usec); 1403 #endif 1404 sc->ppsinfo.clear_sequence++; 1405 sc->ppsinfo.current_mode = 1406 sc->ppsparam.mode; 1407 } 1408 } 1409 1410 /* 1411 * Stop output immediately if we lose the output 1412 * flow control signal or carrier detect. 1413 */ 1414 if (ISSET(~msr, sc->sc_msr_mask)) { 1415 sc->sc_tbc = 0; 1416 sc->sc_heldtbc = 0; 1417 #ifdef SCI_DEBUG 1418 if (sci_debug) 1419 scistatus(sc, "sciintr "); 1420 #endif 1421 } 1422 1423 sc->sc_st_check = 1; 1424 } 1425 #endif 1426 } while (SHREG_SCSSR & SCSSR_RDRF); 1427 1428 /* 1429 * Done handling any receive interrupts. See if data can be 1430 * transmitted as well. Schedule tx done event if no data left 1431 * and tty was marked busy. 1432 */ 1433 if ((SHREG_SCSSR & SCSSR_TDRE) != 0) { 1434 /* 1435 * If we've delayed a parameter change, do it now, and restart 1436 * output. 1437 */ 1438 if (sc->sc_heldchange) { 1439 sc->sc_heldchange = 0; 1440 sc->sc_tbc = sc->sc_heldtbc; 1441 sc->sc_heldtbc = 0; 1442 } 1443 1444 /* Output the next chunk of the contiguous buffer, if any. */ 1445 if (sc->sc_tbc > 0) { 1446 PutcSci(*(sc->sc_tba)); 1447 sc->sc_tba++; 1448 sc->sc_tbc--; 1449 } else { 1450 /* Disable transmit completion interrupts if necessary. */ 1451 #if 0 1452 if (ISSET(sc->sc_ier, IER_ETXRDY)) 1453 #endif 1454 SHREG_SCSCR &= ~SCSCR_TIE; 1455 1456 if (sc->sc_tx_busy) { 1457 sc->sc_tx_busy = 0; 1458 sc->sc_tx_done = 1; 1459 } 1460 } 1461 } 1462 1463 /* Wake up the poller. */ 1464 #ifdef __GENERIC_SOFT_INTERRUPTS 1465 softintr_schedule(sc->sc_si); 1466 #else 1467 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1468 setsoftserial(); 1469 #else 1470 if (!sci_softintr_scheduled) { 1471 sci_softintr_scheduled = 1; 1472 timeout(scisoft, NULL, 1); 1473 } 1474 #endif 1475 #endif 1476 1477 #if NRND > 0 && defined(RND_SCI) 1478 rnd_add_uint32(&sc->rnd_source, iir | lsr); 1479 #endif 1480 1481 return (1); 1482 } 1483 1484 void 1485 scicnprobe(cp) 1486 struct consdev *cp; 1487 { 1488 int maj; 1489 1490 /* locate the major number */ 1491 for (maj = 0; maj < nchrdev; maj++) 1492 if (cdevsw[maj].d_open == sciopen) 1493 break; 1494 1495 /* Initialize required fields. */ 1496 cp->cn_dev = makedev(maj, 0); 1497 #ifdef SCICONSOLE 1498 cp->cn_pri = CN_REMOTE; 1499 #else 1500 cp->cn_pri = CN_NORMAL; 1501 #endif 1502 } 1503 1504 #define sci_gets GetStrSci 1505 #define sci_puts PutStrSci 1506 1507 void 1508 scicninit(cp) 1509 struct consdev *cp; 1510 { 1511 1512 InitializeSci(SCICN_SPEED); 1513 1514 #if 0 1515 sci_intr_init(); /* XXX msaitoh */ 1516 #endif 1517 1518 sci_puts("sci initialized.\n\r"); 1519 } 1520 1521 #define sci_getc GetcSci 1522 #define sci_putc PutcSci 1523 1524 int 1525 scicngetc(dev) 1526 dev_t dev; 1527 { 1528 int c; 1529 int s; 1530 1531 s = splserial(); 1532 c = sci_getc(); 1533 splx(s); 1534 1535 return (c); 1536 } 1537 1538 void 1539 scicnputc(dev, c) 1540 dev_t dev; 1541 int c; 1542 { 1543 int s; 1544 1545 s = splserial(); 1546 sci_putc(c); 1547 splx(s); 1548 } 1549
Indexes created Wed Oct 01 18:09:54 GMT 2025