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shpcicvar.h revision 1.1.16.1
      1  1.1.16.1  thorpej /*	$NetBSD: shpcicvar.h,v 1.1.16.1 2002/01/10 19:48:38 thorpej Exp $	*/
      2       1.1   itojun 
      3       1.1   itojun /*
      4       1.1   itojun  * Copyright (c) 1997 Marc Horowitz.  All rights reserved.
      5       1.1   itojun  *
      6       1.1   itojun  * Redistribution and use in source and binary forms, with or without
      7       1.1   itojun  * modification, are permitted provided that the following conditions
      8       1.1   itojun  * are met:
      9       1.1   itojun  * 1. Redistributions of source code must retain the above copyright
     10       1.1   itojun  *    notice, this list of conditions and the following disclaimer.
     11       1.1   itojun  * 2. Redistributions in binary form must reproduce the above copyright
     12       1.1   itojun  *    notice, this list of conditions and the following disclaimer in the
     13       1.1   itojun  *    documentation and/or other materials provided with the distribution.
     14       1.1   itojun  * 3. All advertising materials mentioning features or use of this software
     15       1.1   itojun  *    must display the following acknowledgement:
     16       1.1   itojun  *	This product includes software developed by Marc Horowitz.
     17       1.1   itojun  * 4. The name of the author may not be used to endorse or promote products
     18       1.1   itojun  *    derived from this software without specific prior written permission.
     19       1.1   itojun  *
     20       1.1   itojun  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     21       1.1   itojun  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     22       1.1   itojun  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     23       1.1   itojun  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     24       1.1   itojun  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     25       1.1   itojun  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     26       1.1   itojun  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     27       1.1   itojun  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     28       1.1   itojun  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     29       1.1   itojun  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     30       1.1   itojun  */
     31       1.1   itojun 
     32       1.1   itojun struct proc;
     33       1.1   itojun 
     34       1.1   itojun struct shpcic_event {
     35       1.1   itojun 	SIMPLEQ_ENTRY(shpcic_event) pe_q;
     36       1.1   itojun 	int pe_type;
     37       1.1   itojun };
     38       1.1   itojun 
     39       1.1   itojun /* pe_type */
     40       1.1   itojun #define SHPCIC_EVENT_INSERTION	0
     41       1.1   itojun #define SHPCIC_EVENT_REMOVAL	1
     42       1.1   itojun 
     43       1.1   itojun struct shpcic_handle {
     44       1.1   itojun 	struct shpcic_softc *sc;
     45       1.1   itojun 	int	vendor;
     46       1.1   itojun 	int	sock;
     47       1.1   itojun 	int	flags;
     48       1.1   itojun 	int	laststate;
     49       1.1   itojun 	int	memalloc;
     50       1.1   itojun 	struct {
     51       1.1   itojun 		bus_addr_t	addr;
     52       1.1   itojun 		bus_size_t	size;
     53       1.1   itojun 		long		offset;
     54       1.1   itojun 		int		kind;
     55       1.1   itojun 	} mem[SHPCIC_MEM_WINS];
     56       1.1   itojun 	int	ioalloc;
     57       1.1   itojun 	struct {
     58       1.1   itojun 		bus_addr_t	addr;
     59       1.1   itojun 		bus_size_t	size;
     60       1.1   itojun 		int		width;
     61       1.1   itojun 	} io[SHPCIC_IO_WINS];
     62       1.1   itojun 	int	ih_irq;
     63       1.1   itojun 	struct device *pcmcia;
     64       1.1   itojun 
     65       1.1   itojun 	int	shutdown;
     66       1.1   itojun 	struct proc *event_thread;
     67       1.1   itojun 	SIMPLEQ_HEAD(, shpcic_event) events;
     68       1.1   itojun };
     69       1.1   itojun 
     70       1.1   itojun /* These four lines are MMTA specific */
     71       1.1   itojun #define SHPCIC_IRQ1 10
     72       1.1   itojun #define SHPCIC_IRQ2 9
     73       1.1   itojun #define SHPCIC_SLOT1_ADDR 0xb8000000
     74       1.1   itojun #define SHPCIC_SLOT2_ADDR 0xb9000000
     75       1.1   itojun 
     76       1.1   itojun #define	SHPCIC_FLAG_SOCKETP	0x0001
     77       1.1   itojun #define	SHPCIC_FLAG_CARDP		0x0002
     78       1.1   itojun 
     79       1.1   itojun #define SHPCIC_LASTSTATE_PRESENT	0x0002
     80       1.1   itojun #define SHPCIC_LASTSTATE_HALF		0x0001
     81       1.1   itojun #define SHPCIC_LASTSTATE_EMPTY		0x0000
     82       1.1   itojun 
     83       1.1   itojun #define	C0SA SHPCIC_CHIP0_BASE+SHPCIC_SOCKETA_INDEX
     84       1.1   itojun #define	C0SB SHPCIC_CHIP0_BASE+SHPCIC_SOCKETB_INDEX
     85       1.1   itojun #define	C1SA SHPCIC_CHIP1_BASE+SHPCIC_SOCKETA_INDEX
     86       1.1   itojun #define	C1SB SHPCIC_CHIP1_BASE+SHPCIC_SOCKETB_INDEX
     87       1.1   itojun 
     88       1.1   itojun /*
     89       1.1   itojun  * This is sort of arbitrary.  It merely needs to be "enough". It can be
     90       1.1   itojun  * overridden in the conf file, anyway.
     91       1.1   itojun  */
     92       1.1   itojun 
     93       1.1   itojun #define	SHPCIC_MEM_PAGES	4
     94       1.1   itojun #define	SHPCIC_MEMSIZE	SHPCIC_MEM_PAGES*SHPCIC_MEM_PAGESIZE
     95       1.1   itojun 
     96       1.1   itojun #define	SHPCIC_NSLOTS	4
     97       1.1   itojun 
     98       1.1   itojun #define SHPCIC_WINS     5
     99       1.1   itojun #define SHPCIC_IOWINS     2
    100       1.1   itojun 
    101       1.1   itojun struct shpcic_softc {
    102       1.1   itojun 	struct device dev;
    103       1.1   itojun 
    104       1.1   itojun 	bus_space_tag_t memt;
    105       1.1   itojun 	bus_space_handle_t memh;
    106       1.1   itojun 	bus_space_tag_t iot;
    107       1.1   itojun 	bus_space_handle_t ioh;
    108       1.1   itojun 
    109       1.1   itojun 	/* XXX isa_chipset_tag_t, pci_chipset_tag_t, etc. */
    110       1.1   itojun 	void	*intr_est;
    111       1.1   itojun 
    112       1.1   itojun 	pcmcia_chipset_tag_t pct;
    113       1.1   itojun 
    114       1.1   itojun 	/* this needs to be large enough to hold PCIC_MEM_PAGES bits */
    115       1.1   itojun 	int	subregionmask;
    116       1.1   itojun #define SHPCIC_MAX_MEM_PAGES (8 * sizeof(int))
    117       1.1   itojun 
    118       1.1   itojun 	/* used by memory window mapping functions */
    119       1.1   itojun 	bus_addr_t membase;
    120       1.1   itojun 
    121       1.1   itojun 	/*
    122       1.1   itojun 	 * used by io window mapping functions.  These can actually overlap
    123       1.1   itojun 	 * with another pcic, since the underlying extent mapper will deal
    124       1.1   itojun 	 * with individual allocations.  This is here to deal with the fact
    125       1.1   itojun 	 * that different busses have different real widths (different pc
    126       1.1   itojun 	 * hardware seems to use 10 or 12 bits for the I/O bus).
    127       1.1   itojun 	 */
    128       1.1   itojun 	bus_addr_t iobase;
    129       1.1   itojun 	bus_addr_t iosize;
    130       1.1   itojun 
    131       1.1   itojun 	int	irq;
    132       1.1   itojun 	void	*ih;
    133       1.1   itojun 
    134       1.1   itojun 	struct shpcic_handle handle[SHPCIC_NSLOTS];
    135       1.1   itojun };
    136       1.1   itojun 
    137       1.1   itojun 
    138       1.1   itojun int	shpcic_ident_ok __P((int));
    139       1.1   itojun int	shpcic_vendor __P((struct shpcic_handle *));
    140       1.1   itojun char	*shpcic_vendor_to_string __P((int));
    141       1.1   itojun 
    142       1.1   itojun void	shpcic_attach __P((struct shpcic_softc *));
    143       1.1   itojun void	shpcic_attach_sockets __P((struct shpcic_softc *));
    144       1.1   itojun int	shpcic_intr __P((void *arg));
    145       1.1   itojun 
    146       1.1   itojun static inline int shpcic_read __P((struct shpcic_handle *, int));
    147       1.1   itojun static inline void shpcic_write __P((struct shpcic_handle *, int, int));
    148       1.1   itojun 
    149       1.1   itojun int	shpcic_chip_mem_alloc __P((pcmcia_chipset_handle_t, bus_size_t,
    150       1.1   itojun 	    struct pcmcia_mem_handle *));
    151       1.1   itojun void	shpcic_chip_mem_free __P((pcmcia_chipset_handle_t,
    152       1.1   itojun 	    struct pcmcia_mem_handle *));
    153       1.1   itojun int	shpcic_chip_mem_map __P((pcmcia_chipset_handle_t, int, bus_addr_t,
    154  1.1.16.1  thorpej 	    bus_size_t, struct pcmcia_mem_handle *, bus_size_t *, int *));
    155       1.1   itojun void	shpcic_chip_mem_unmap __P((pcmcia_chipset_handle_t, int));
    156       1.1   itojun 
    157       1.1   itojun int	shpcic_chip_io_alloc __P((pcmcia_chipset_handle_t, bus_addr_t,
    158       1.1   itojun 	    bus_size_t, bus_size_t, struct pcmcia_io_handle *));
    159       1.1   itojun void	shpcic_chip_io_free __P((pcmcia_chipset_handle_t,
    160       1.1   itojun 	    struct pcmcia_io_handle *));
    161       1.1   itojun int	shpcic_chip_io_map __P((pcmcia_chipset_handle_t, int, bus_addr_t,
    162       1.1   itojun 	    bus_size_t, struct pcmcia_io_handle *, int *));
    163       1.1   itojun void	shpcic_chip_io_unmap __P((pcmcia_chipset_handle_t, int));
    164       1.1   itojun 
    165       1.1   itojun void	shpcic_chip_socket_enable __P((pcmcia_chipset_handle_t));
    166       1.1   itojun void	shpcic_chip_socket_disable __P((pcmcia_chipset_handle_t));
    167       1.1   itojun 
    168       1.1   itojun static __inline int shpcic_read __P((struct shpcic_handle *, int));
    169       1.1   itojun static __inline int
    170       1.1   itojun shpcic_read(h, idx)
    171       1.1   itojun 	struct shpcic_handle *h;
    172       1.1   itojun 	int idx;
    173       1.1   itojun {
    174       1.1   itojun 	static int prev_idx = 0;
    175       1.1   itojun 
    176       1.1   itojun 	if (idx == -1){
    177       1.1   itojun 		idx = prev_idx;
    178       1.1   itojun 	}
    179       1.1   itojun 	prev_idx = idx;
    180       1.1   itojun 	return (bus_space_read_stream_2(h->sc->iot, h->sc->ioh, idx));
    181       1.1   itojun }
    182       1.1   itojun 
    183       1.1   itojun static __inline void shpcic_write __P((struct shpcic_handle *, int, int));
    184       1.1   itojun static __inline void
    185       1.1   itojun shpcic_write(h, idx, data)
    186       1.1   itojun 	struct shpcic_handle *h;
    187       1.1   itojun 	int idx;
    188       1.1   itojun 	int data;
    189       1.1   itojun {
    190       1.1   itojun 	static int prev_idx;
    191       1.1   itojun 	if (idx == -1){
    192       1.1   itojun 		idx = prev_idx;
    193       1.1   itojun 	}
    194       1.1   itojun 	prev_idx = idx;
    195       1.1   itojun 	bus_space_write_stream_2(h->sc->iot, h->sc->ioh, idx, (data));
    196       1.1   itojun }
    197       1.1   itojun 
    198       1.1   itojun void	*pcic_shb_chip_intr_establish __P((pcmcia_chipset_handle_t,
    199       1.1   itojun 	    struct pcmcia_function *, int, int (*) (void *), void *));
    200       1.1   itojun void	pcic_shb_chip_intr_disestablish __P((pcmcia_chipset_handle_t, void *));
    201       1.1   itojun void pcic_shb_bus_width_probe __P((struct shpcic_softc *, bus_space_tag_t,
    202       1.1   itojun 				   bus_space_handle_t, bus_addr_t, u_int32_t));
    203