shpcicvar.h revision 1.5 1 1.5 nonaka /* $NetBSD: shpcicvar.h,v 1.5 2005/08/16 11:32:26 nonaka Exp $ */
2 1.1 itojun
3 1.5 nonaka /*-
4 1.5 nonaka * Copyright (c) 2005 NONAKA Kimihiro
5 1.5 nonaka * All rights reserved.
6 1.1 itojun *
7 1.1 itojun * Redistribution and use in source and binary forms, with or without
8 1.1 itojun * modification, are permitted provided that the following conditions
9 1.1 itojun * are met:
10 1.1 itojun * 1. Redistributions of source code must retain the above copyright
11 1.1 itojun * notice, this list of conditions and the following disclaimer.
12 1.1 itojun * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 itojun * notice, this list of conditions and the following disclaimer in the
14 1.1 itojun * documentation and/or other materials provided with the distribution.
15 1.1 itojun *
16 1.5 nonaka * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
17 1.5 nonaka * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 1.5 nonaka * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 1.5 nonaka * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
20 1.5 nonaka * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 1.5 nonaka * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 1.5 nonaka * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 1.5 nonaka * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 1.5 nonaka * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 1.5 nonaka * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 1.5 nonaka * SUCH DAMAGE.
27 1.1 itojun */
28 1.1 itojun
29 1.5 nonaka #ifndef _SH3_SHPCICVAR_H_
30 1.5 nonaka #define _SH3_SHPCICVAR_H_
31 1.5 nonaka
32 1.5 nonaka #include <machine/bus.h>
33 1.1 itojun
34 1.5 nonaka bus_space_tag_t shpcic_get_bus_io_tag(void);
35 1.5 nonaka bus_space_tag_t shpcic_get_bus_mem_tag(void);
36 1.5 nonaka bus_dma_tag_t shpcic_get_bus_dma_tag(void);
37 1.5 nonaka
38 1.5 nonaka int shpcic_bus_maxdevs(void *v, int busno);
39 1.5 nonaka pcitag_t shpcic_make_tag(void *v, int bus, int device, int function);
40 1.5 nonaka void shpcic_decompose_tag(void *v, pcitag_t tag, int *bp, int *dp, int *fp);
41 1.5 nonaka pcireg_t shpcic_conf_read(void *v, pcitag_t tag, int reg);
42 1.5 nonaka void shpcic_conf_write(void *v, pcitag_t tag, int reg, pcireg_t data);
43 1.5 nonaka
44 1.5 nonaka int shpcic_set_intr_priority(int intr, int level);
45 1.5 nonaka void *shpcic_intr_establish(int evtcode, int (*ih_func)(void *), void *ih_arg);
46 1.5 nonaka void shpcic_intr_disestablish(void *ih);
47 1.1 itojun
48 1.1 itojun /*
49 1.5 nonaka * shpcic io/mem bus space
50 1.1 itojun */
51 1.5 nonaka int shpcic_iomem_map(void *v, bus_addr_t bpa, bus_size_t size, int flags,
52 1.5 nonaka bus_space_handle_t *bshp);
53 1.5 nonaka void shpcic_iomem_unmap(void *v, bus_space_handle_t bsh, bus_size_t size);
54 1.5 nonaka int shpcic_iomem_subregion(void *v, bus_space_handle_t bsh, bus_size_t offset,
55 1.5 nonaka bus_size_t size, bus_space_handle_t *nbshp);
56 1.5 nonaka int shpcic_iomem_alloc(void *v, bus_addr_t rstart, bus_addr_t rend,
57 1.5 nonaka bus_size_t size, bus_size_t alignment, bus_size_t boundary, int flags,
58 1.5 nonaka bus_addr_t *bpap, bus_space_handle_t *bshp);
59 1.5 nonaka void shpcic_iomem_free(void *v, bus_space_handle_t bsh, bus_size_t size);
60 1.5 nonaka
61 1.5 nonaka /* read single */
62 1.5 nonaka uint8_t shpcic_io_read_1(void *v, bus_space_handle_t bsh, bus_size_t offset);
63 1.5 nonaka uint16_t shpcic_io_read_2(void *v, bus_space_handle_t bsh, bus_size_t offset);
64 1.5 nonaka uint32_t shpcic_io_read_4(void *v, bus_space_handle_t bsh, bus_size_t offset);
65 1.5 nonaka uint8_t shpcic_mem_read_1(void *v, bus_space_handle_t bsh, bus_size_t offset);
66 1.5 nonaka uint16_t shpcic_mem_read_2(void *v, bus_space_handle_t bsh, bus_size_t offset);
67 1.5 nonaka uint32_t shpcic_mem_read_4(void *v, bus_space_handle_t bsh, bus_size_t offset);
68 1.5 nonaka
69 1.5 nonaka /* read multi */
70 1.5 nonaka void shpcic_io_read_multi_1(void *v, bus_space_handle_t bsh,
71 1.5 nonaka bus_size_t offset, uint8_t *addr, bus_size_t count);
72 1.5 nonaka void shpcic_io_read_multi_2(void *v, bus_space_handle_t bsh,
73 1.5 nonaka bus_size_t offset, uint16_t *addr, bus_size_t count);
74 1.5 nonaka void shpcic_io_read_multi_4(void *v, bus_space_handle_t bsh,
75 1.5 nonaka bus_size_t offset, uint32_t *addr, bus_size_t count);
76 1.5 nonaka void shpcic_mem_read_multi_1(void *v, bus_space_handle_t bsh,
77 1.5 nonaka bus_size_t offset, uint8_t *addr, bus_size_t count);
78 1.5 nonaka void shpcic_mem_read_multi_2(void *v, bus_space_handle_t bsh,
79 1.5 nonaka bus_size_t offset, uint16_t *addr, bus_size_t count);
80 1.5 nonaka void shpcic_mem_read_multi_4(void *v, bus_space_handle_t bsh,
81 1.5 nonaka bus_size_t offset, uint32_t *addr, bus_size_t count);
82 1.5 nonaka
83 1.5 nonaka /* read region */
84 1.5 nonaka void shpcic_io_read_region_1(void *v, bus_space_handle_t bsh,
85 1.5 nonaka bus_size_t offset, uint8_t *addr, bus_size_t count);
86 1.5 nonaka void shpcic_io_read_region_2(void *v, bus_space_handle_t bsh,
87 1.5 nonaka bus_size_t offset, uint16_t *addr, bus_size_t count);
88 1.5 nonaka void shpcic_io_read_region_4(void *v, bus_space_handle_t bsh,
89 1.5 nonaka bus_size_t offset, uint32_t *addr, bus_size_t count);
90 1.5 nonaka void shpcic_mem_read_region_1(void *v, bus_space_handle_t bsh,
91 1.5 nonaka bus_size_t offset, uint8_t *addr, bus_size_t count);
92 1.5 nonaka void shpcic_mem_read_region_2(void *v, bus_space_handle_t bsh,
93 1.5 nonaka bus_size_t offset, uint16_t *addr, bus_size_t count);
94 1.5 nonaka void shpcic_mem_read_region_4(void *v, bus_space_handle_t bsh,
95 1.5 nonaka bus_size_t offset, uint32_t *addr, bus_size_t count);
96 1.5 nonaka
97 1.5 nonaka /* write single */
98 1.5 nonaka void shpcic_io_write_1(void *v, bus_space_handle_t bsh,
99 1.5 nonaka bus_size_t offset, uint8_t data);
100 1.5 nonaka void shpcic_io_write_2(void *v, bus_space_handle_t bsh,
101 1.5 nonaka bus_size_t offset, uint16_t data);
102 1.5 nonaka void shpcic_io_write_4(void *v, bus_space_handle_t bsh,
103 1.5 nonaka bus_size_t offset, uint32_t data);
104 1.5 nonaka void shpcic_mem_write_1(void *v, bus_space_handle_t bsh,
105 1.5 nonaka bus_size_t offset, uint8_t data);
106 1.5 nonaka void shpcic_mem_write_2(void *v, bus_space_handle_t bsh,
107 1.5 nonaka bus_size_t offset, uint16_t data);
108 1.5 nonaka void shpcic_mem_write_4(void *v, bus_space_handle_t bsh,
109 1.5 nonaka bus_size_t offset, uint32_t data);
110 1.5 nonaka
111 1.5 nonaka /* write multi */
112 1.5 nonaka void shpcic_io_write_multi_1(void *v, bus_space_handle_t bsh,
113 1.5 nonaka bus_size_t offset, const uint8_t *addr, bus_size_t count);
114 1.5 nonaka void shpcic_io_write_multi_2(void *v, bus_space_handle_t bsh,
115 1.5 nonaka bus_size_t offset, const uint16_t *addr, bus_size_t count);
116 1.5 nonaka void shpcic_io_write_multi_4(void *v, bus_space_handle_t bsh,
117 1.5 nonaka bus_size_t offset, const uint32_t *addr, bus_size_t count);
118 1.5 nonaka void shpcic_mem_write_multi_1(void *v, bus_space_handle_t bsh,
119 1.5 nonaka bus_size_t offset, const uint8_t *addr, bus_size_t count);
120 1.5 nonaka void shpcic_mem_write_multi_2(void *v, bus_space_handle_t bsh,
121 1.5 nonaka bus_size_t offset, const uint16_t *addr, bus_size_t count);
122 1.5 nonaka void shpcic_mem_write_multi_4(void *v, bus_space_handle_t bsh,
123 1.5 nonaka bus_size_t offset, const uint32_t *addr, bus_size_t count);
124 1.5 nonaka
125 1.5 nonaka /* write region */
126 1.5 nonaka void shpcic_io_write_region_1(void *v, bus_space_handle_t bsh,
127 1.5 nonaka bus_size_t offset, const uint8_t *addr, bus_size_t count);
128 1.5 nonaka void shpcic_io_write_region_2(void *v, bus_space_handle_t bsh,
129 1.5 nonaka bus_size_t offset, const uint16_t *addr, bus_size_t count);
130 1.5 nonaka void shpcic_io_write_region_4(void *v, bus_space_handle_t bsh,
131 1.5 nonaka bus_size_t offset, const uint32_t *addr, bus_size_t count);
132 1.5 nonaka void shpcic_mem_write_region_1(void *v, bus_space_handle_t bsh,
133 1.5 nonaka bus_size_t offset, const uint8_t *addr, bus_size_t count);
134 1.5 nonaka void shpcic_mem_write_region_2(void *v, bus_space_handle_t bsh,
135 1.5 nonaka bus_size_t offset, const uint16_t *addr, bus_size_t count);
136 1.5 nonaka void shpcic_mem_write_region_4(void *v, bus_space_handle_t bsh,
137 1.5 nonaka bus_size_t offset, const uint32_t *addr, bus_size_t count);
138 1.5 nonaka
139 1.5 nonaka /* set multi */
140 1.5 nonaka void shpcic_io_set_multi_1(void *v, bus_space_handle_t bsh,
141 1.5 nonaka bus_size_t offset, uint8_t val, bus_size_t count);
142 1.5 nonaka void shpcic_io_set_multi_2(void *v, bus_space_handle_t bsh,
143 1.5 nonaka bus_size_t offset, uint16_t val, bus_size_t count);
144 1.5 nonaka void shpcic_io_set_multi_4(void *v, bus_space_handle_t bsh,
145 1.5 nonaka bus_size_t offset, uint32_t val, bus_size_t count);
146 1.5 nonaka void shpcic_mem_set_multi_1(void *v, bus_space_handle_t bsh,
147 1.5 nonaka bus_size_t offset, uint8_t val, bus_size_t count);
148 1.5 nonaka void shpcic_mem_set_multi_2(void *v, bus_space_handle_t bsh,
149 1.5 nonaka bus_size_t offset, uint16_t val, bus_size_t count);
150 1.5 nonaka void shpcic_mem_set_multi_4(void *v, bus_space_handle_t bsh,
151 1.5 nonaka bus_size_t offset, uint32_t val, bus_size_t count);
152 1.5 nonaka
153 1.5 nonaka /* set region */
154 1.5 nonaka void shpcic_io_set_region_1(void *v, bus_space_handle_t bsh,
155 1.5 nonaka bus_size_t offset, uint8_t val, bus_size_t count);
156 1.5 nonaka void shpcic_io_set_region_2(void *v, bus_space_handle_t bsh,
157 1.5 nonaka bus_size_t offset, uint16_t val, bus_size_t count);
158 1.5 nonaka void shpcic_io_set_region_4(void *v, bus_space_handle_t bsh,
159 1.5 nonaka bus_size_t offset, uint32_t val, bus_size_t count);
160 1.5 nonaka void shpcic_mem_set_region_1(void *v, bus_space_handle_t bsh,
161 1.5 nonaka bus_size_t offset, uint8_t val, bus_size_t count);
162 1.5 nonaka void shpcic_mem_set_region_2(void *v, bus_space_handle_t bsh,
163 1.5 nonaka bus_size_t offset, uint16_t val, bus_size_t count);
164 1.5 nonaka void shpcic_mem_set_region_4(void *v, bus_space_handle_t bsh,
165 1.5 nonaka bus_size_t offset, uint32_t val, bus_size_t count);
166 1.5 nonaka
167 1.5 nonaka /* copy region */
168 1.5 nonaka void shpcic_io_copy_region_1(void *v, bus_space_handle_t bsh1,
169 1.5 nonaka bus_size_t off1, bus_space_handle_t bsh2, bus_size_t off2,
170 1.5 nonaka bus_size_t count);
171 1.5 nonaka void shpcic_io_copy_region_2(void *v, bus_space_handle_t bsh1,
172 1.5 nonaka bus_size_t off1, bus_space_handle_t bsh2, bus_size_t off2,
173 1.5 nonaka bus_size_t count);
174 1.5 nonaka void shpcic_io_copy_region_4(void *v, bus_space_handle_t bsh1,
175 1.5 nonaka bus_size_t off1, bus_space_handle_t bsh2, bus_size_t off2,
176 1.5 nonaka bus_size_t count);
177 1.5 nonaka void shpcic_mem_copy_region_1(void *v, bus_space_handle_t bsh1,
178 1.5 nonaka bus_size_t off1, bus_space_handle_t bsh2, bus_size_t off2,
179 1.5 nonaka bus_size_t count);
180 1.5 nonaka void shpcic_mem_copy_region_2(void *v, bus_space_handle_t bsh1,
181 1.5 nonaka bus_size_t off1, bus_space_handle_t bsh2, bus_size_t off2,
182 1.5 nonaka bus_size_t count);
183 1.5 nonaka void shpcic_mem_copy_region_4(void *v, bus_space_handle_t bsh1,
184 1.5 nonaka bus_size_t off1, bus_space_handle_t bsh2, bus_size_t off2,
185 1.5 nonaka bus_size_t count);
186 1.1 itojun
187 1.5 nonaka #endif /* _SH3_SHPCICVAR_H_ */
188