shpcicvar.h revision 1.8.2.1
1 1.8.2.1 yamt /* $NetBSD: shpcicvar.h,v 1.8.2.1 2012/04/17 00:06:52 yamt Exp $ */ 2 1.1 itojun 3 1.5 nonaka /*- 4 1.8.2.1 yamt * Copyright (C) 2005 NONAKA Kimihiro <nonaka (at) netbsd.org> 5 1.5 nonaka * All rights reserved. 6 1.1 itojun * 7 1.1 itojun * Redistribution and use in source and binary forms, with or without 8 1.1 itojun * modification, are permitted provided that the following conditions 9 1.1 itojun * are met: 10 1.1 itojun * 1. Redistributions of source code must retain the above copyright 11 1.1 itojun * notice, this list of conditions and the following disclaimer. 12 1.1 itojun * 2. Redistributions in binary form must reproduce the above copyright 13 1.1 itojun * notice, this list of conditions and the following disclaimer in the 14 1.1 itojun * documentation and/or other materials provided with the distribution. 15 1.1 itojun * 16 1.8.2.1 yamt * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 1.8.2.1 yamt * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 1.8.2.1 yamt * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 1.8.2.1 yamt * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 1.8.2.1 yamt * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21 1.8.2.1 yamt * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22 1.8.2.1 yamt * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23 1.8.2.1 yamt * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 1.8.2.1 yamt * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25 1.8.2.1 yamt * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 1.1 itojun */ 27 1.1 itojun 28 1.5 nonaka #ifndef _SH3_SHPCICVAR_H_ 29 1.5 nonaka #define _SH3_SHPCICVAR_H_ 30 1.5 nonaka 31 1.8 dyoung #include <sys/bus.h> 32 1.1 itojun 33 1.5 nonaka bus_space_tag_t shpcic_get_bus_io_tag(void); 34 1.5 nonaka bus_space_tag_t shpcic_get_bus_mem_tag(void); 35 1.5 nonaka bus_dma_tag_t shpcic_get_bus_dma_tag(void); 36 1.5 nonaka 37 1.5 nonaka int shpcic_bus_maxdevs(void *v, int busno); 38 1.5 nonaka pcitag_t shpcic_make_tag(void *v, int bus, int device, int function); 39 1.5 nonaka void shpcic_decompose_tag(void *v, pcitag_t tag, int *bp, int *dp, int *fp); 40 1.5 nonaka pcireg_t shpcic_conf_read(void *v, pcitag_t tag, int reg); 41 1.5 nonaka void shpcic_conf_write(void *v, pcitag_t tag, int reg, pcireg_t data); 42 1.5 nonaka 43 1.5 nonaka int shpcic_set_intr_priority(int intr, int level); 44 1.5 nonaka void *shpcic_intr_establish(int evtcode, int (*ih_func)(void *), void *ih_arg); 45 1.5 nonaka void shpcic_intr_disestablish(void *ih); 46 1.1 itojun 47 1.1 itojun /* 48 1.5 nonaka * shpcic io/mem bus space 49 1.1 itojun */ 50 1.5 nonaka int shpcic_iomem_map(void *v, bus_addr_t bpa, bus_size_t size, int flags, 51 1.5 nonaka bus_space_handle_t *bshp); 52 1.5 nonaka void shpcic_iomem_unmap(void *v, bus_space_handle_t bsh, bus_size_t size); 53 1.5 nonaka int shpcic_iomem_subregion(void *v, bus_space_handle_t bsh, bus_size_t offset, 54 1.5 nonaka bus_size_t size, bus_space_handle_t *nbshp); 55 1.5 nonaka int shpcic_iomem_alloc(void *v, bus_addr_t rstart, bus_addr_t rend, 56 1.5 nonaka bus_size_t size, bus_size_t alignment, bus_size_t boundary, int flags, 57 1.5 nonaka bus_addr_t *bpap, bus_space_handle_t *bshp); 58 1.5 nonaka void shpcic_iomem_free(void *v, bus_space_handle_t bsh, bus_size_t size); 59 1.7 nonaka paddr_t shpcic_iomem_mmap(void *v, bus_addr_t addr, off_t off, int prot, 60 1.7 nonaka int flags); 61 1.5 nonaka 62 1.5 nonaka /* read single */ 63 1.5 nonaka uint8_t shpcic_io_read_1(void *v, bus_space_handle_t bsh, bus_size_t offset); 64 1.5 nonaka uint16_t shpcic_io_read_2(void *v, bus_space_handle_t bsh, bus_size_t offset); 65 1.5 nonaka uint32_t shpcic_io_read_4(void *v, bus_space_handle_t bsh, bus_size_t offset); 66 1.5 nonaka uint8_t shpcic_mem_read_1(void *v, bus_space_handle_t bsh, bus_size_t offset); 67 1.5 nonaka uint16_t shpcic_mem_read_2(void *v, bus_space_handle_t bsh, bus_size_t offset); 68 1.5 nonaka uint32_t shpcic_mem_read_4(void *v, bus_space_handle_t bsh, bus_size_t offset); 69 1.5 nonaka 70 1.5 nonaka /* read multi */ 71 1.5 nonaka void shpcic_io_read_multi_1(void *v, bus_space_handle_t bsh, 72 1.5 nonaka bus_size_t offset, uint8_t *addr, bus_size_t count); 73 1.5 nonaka void shpcic_io_read_multi_2(void *v, bus_space_handle_t bsh, 74 1.5 nonaka bus_size_t offset, uint16_t *addr, bus_size_t count); 75 1.5 nonaka void shpcic_io_read_multi_4(void *v, bus_space_handle_t bsh, 76 1.5 nonaka bus_size_t offset, uint32_t *addr, bus_size_t count); 77 1.5 nonaka void shpcic_mem_read_multi_1(void *v, bus_space_handle_t bsh, 78 1.5 nonaka bus_size_t offset, uint8_t *addr, bus_size_t count); 79 1.5 nonaka void shpcic_mem_read_multi_2(void *v, bus_space_handle_t bsh, 80 1.5 nonaka bus_size_t offset, uint16_t *addr, bus_size_t count); 81 1.5 nonaka void shpcic_mem_read_multi_4(void *v, bus_space_handle_t bsh, 82 1.5 nonaka bus_size_t offset, uint32_t *addr, bus_size_t count); 83 1.5 nonaka 84 1.5 nonaka /* read region */ 85 1.5 nonaka void shpcic_io_read_region_1(void *v, bus_space_handle_t bsh, 86 1.5 nonaka bus_size_t offset, uint8_t *addr, bus_size_t count); 87 1.5 nonaka void shpcic_io_read_region_2(void *v, bus_space_handle_t bsh, 88 1.5 nonaka bus_size_t offset, uint16_t *addr, bus_size_t count); 89 1.5 nonaka void shpcic_io_read_region_4(void *v, bus_space_handle_t bsh, 90 1.5 nonaka bus_size_t offset, uint32_t *addr, bus_size_t count); 91 1.5 nonaka void shpcic_mem_read_region_1(void *v, bus_space_handle_t bsh, 92 1.5 nonaka bus_size_t offset, uint8_t *addr, bus_size_t count); 93 1.5 nonaka void shpcic_mem_read_region_2(void *v, bus_space_handle_t bsh, 94 1.5 nonaka bus_size_t offset, uint16_t *addr, bus_size_t count); 95 1.5 nonaka void shpcic_mem_read_region_4(void *v, bus_space_handle_t bsh, 96 1.5 nonaka bus_size_t offset, uint32_t *addr, bus_size_t count); 97 1.5 nonaka 98 1.5 nonaka /* write single */ 99 1.5 nonaka void shpcic_io_write_1(void *v, bus_space_handle_t bsh, 100 1.5 nonaka bus_size_t offset, uint8_t data); 101 1.5 nonaka void shpcic_io_write_2(void *v, bus_space_handle_t bsh, 102 1.5 nonaka bus_size_t offset, uint16_t data); 103 1.5 nonaka void shpcic_io_write_4(void *v, bus_space_handle_t bsh, 104 1.5 nonaka bus_size_t offset, uint32_t data); 105 1.5 nonaka void shpcic_mem_write_1(void *v, bus_space_handle_t bsh, 106 1.5 nonaka bus_size_t offset, uint8_t data); 107 1.5 nonaka void shpcic_mem_write_2(void *v, bus_space_handle_t bsh, 108 1.5 nonaka bus_size_t offset, uint16_t data); 109 1.5 nonaka void shpcic_mem_write_4(void *v, bus_space_handle_t bsh, 110 1.5 nonaka bus_size_t offset, uint32_t data); 111 1.5 nonaka 112 1.5 nonaka /* write multi */ 113 1.5 nonaka void shpcic_io_write_multi_1(void *v, bus_space_handle_t bsh, 114 1.5 nonaka bus_size_t offset, const uint8_t *addr, bus_size_t count); 115 1.5 nonaka void shpcic_io_write_multi_2(void *v, bus_space_handle_t bsh, 116 1.5 nonaka bus_size_t offset, const uint16_t *addr, bus_size_t count); 117 1.5 nonaka void shpcic_io_write_multi_4(void *v, bus_space_handle_t bsh, 118 1.5 nonaka bus_size_t offset, const uint32_t *addr, bus_size_t count); 119 1.5 nonaka void shpcic_mem_write_multi_1(void *v, bus_space_handle_t bsh, 120 1.5 nonaka bus_size_t offset, const uint8_t *addr, bus_size_t count); 121 1.5 nonaka void shpcic_mem_write_multi_2(void *v, bus_space_handle_t bsh, 122 1.5 nonaka bus_size_t offset, const uint16_t *addr, bus_size_t count); 123 1.5 nonaka void shpcic_mem_write_multi_4(void *v, bus_space_handle_t bsh, 124 1.5 nonaka bus_size_t offset, const uint32_t *addr, bus_size_t count); 125 1.5 nonaka 126 1.5 nonaka /* write region */ 127 1.5 nonaka void shpcic_io_write_region_1(void *v, bus_space_handle_t bsh, 128 1.5 nonaka bus_size_t offset, const uint8_t *addr, bus_size_t count); 129 1.5 nonaka void shpcic_io_write_region_2(void *v, bus_space_handle_t bsh, 130 1.5 nonaka bus_size_t offset, const uint16_t *addr, bus_size_t count); 131 1.5 nonaka void shpcic_io_write_region_4(void *v, bus_space_handle_t bsh, 132 1.5 nonaka bus_size_t offset, const uint32_t *addr, bus_size_t count); 133 1.5 nonaka void shpcic_mem_write_region_1(void *v, bus_space_handle_t bsh, 134 1.5 nonaka bus_size_t offset, const uint8_t *addr, bus_size_t count); 135 1.5 nonaka void shpcic_mem_write_region_2(void *v, bus_space_handle_t bsh, 136 1.5 nonaka bus_size_t offset, const uint16_t *addr, bus_size_t count); 137 1.5 nonaka void shpcic_mem_write_region_4(void *v, bus_space_handle_t bsh, 138 1.5 nonaka bus_size_t offset, const uint32_t *addr, bus_size_t count); 139 1.5 nonaka 140 1.5 nonaka /* set multi */ 141 1.5 nonaka void shpcic_io_set_multi_1(void *v, bus_space_handle_t bsh, 142 1.5 nonaka bus_size_t offset, uint8_t val, bus_size_t count); 143 1.5 nonaka void shpcic_io_set_multi_2(void *v, bus_space_handle_t bsh, 144 1.5 nonaka bus_size_t offset, uint16_t val, bus_size_t count); 145 1.5 nonaka void shpcic_io_set_multi_4(void *v, bus_space_handle_t bsh, 146 1.5 nonaka bus_size_t offset, uint32_t val, bus_size_t count); 147 1.5 nonaka void shpcic_mem_set_multi_1(void *v, bus_space_handle_t bsh, 148 1.5 nonaka bus_size_t offset, uint8_t val, bus_size_t count); 149 1.5 nonaka void shpcic_mem_set_multi_2(void *v, bus_space_handle_t bsh, 150 1.5 nonaka bus_size_t offset, uint16_t val, bus_size_t count); 151 1.5 nonaka void shpcic_mem_set_multi_4(void *v, bus_space_handle_t bsh, 152 1.5 nonaka bus_size_t offset, uint32_t val, bus_size_t count); 153 1.5 nonaka 154 1.5 nonaka /* set region */ 155 1.5 nonaka void shpcic_io_set_region_1(void *v, bus_space_handle_t bsh, 156 1.5 nonaka bus_size_t offset, uint8_t val, bus_size_t count); 157 1.5 nonaka void shpcic_io_set_region_2(void *v, bus_space_handle_t bsh, 158 1.5 nonaka bus_size_t offset, uint16_t val, bus_size_t count); 159 1.5 nonaka void shpcic_io_set_region_4(void *v, bus_space_handle_t bsh, 160 1.5 nonaka bus_size_t offset, uint32_t val, bus_size_t count); 161 1.5 nonaka void shpcic_mem_set_region_1(void *v, bus_space_handle_t bsh, 162 1.5 nonaka bus_size_t offset, uint8_t val, bus_size_t count); 163 1.5 nonaka void shpcic_mem_set_region_2(void *v, bus_space_handle_t bsh, 164 1.5 nonaka bus_size_t offset, uint16_t val, bus_size_t count); 165 1.5 nonaka void shpcic_mem_set_region_4(void *v, bus_space_handle_t bsh, 166 1.5 nonaka bus_size_t offset, uint32_t val, bus_size_t count); 167 1.5 nonaka 168 1.5 nonaka /* copy region */ 169 1.5 nonaka void shpcic_io_copy_region_1(void *v, bus_space_handle_t bsh1, 170 1.5 nonaka bus_size_t off1, bus_space_handle_t bsh2, bus_size_t off2, 171 1.5 nonaka bus_size_t count); 172 1.5 nonaka void shpcic_io_copy_region_2(void *v, bus_space_handle_t bsh1, 173 1.5 nonaka bus_size_t off1, bus_space_handle_t bsh2, bus_size_t off2, 174 1.5 nonaka bus_size_t count); 175 1.5 nonaka void shpcic_io_copy_region_4(void *v, bus_space_handle_t bsh1, 176 1.5 nonaka bus_size_t off1, bus_space_handle_t bsh2, bus_size_t off2, 177 1.5 nonaka bus_size_t count); 178 1.5 nonaka void shpcic_mem_copy_region_1(void *v, bus_space_handle_t bsh1, 179 1.5 nonaka bus_size_t off1, bus_space_handle_t bsh2, bus_size_t off2, 180 1.5 nonaka bus_size_t count); 181 1.5 nonaka void shpcic_mem_copy_region_2(void *v, bus_space_handle_t bsh1, 182 1.5 nonaka bus_size_t off1, bus_space_handle_t bsh2, bus_size_t off2, 183 1.5 nonaka bus_size_t count); 184 1.5 nonaka void shpcic_mem_copy_region_4(void *v, bus_space_handle_t bsh1, 185 1.5 nonaka bus_size_t off1, bus_space_handle_t bsh2, bus_size_t off2, 186 1.5 nonaka bus_size_t count); 187 1.1 itojun 188 1.5 nonaka #endif /* _SH3_SHPCICVAR_H_ */ 189
Indexes created Sun Oct 19 02:09:48 GMT 2025