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cpu.h revision 1.31.2.2
      1  1.31.2.1    skrll /*	$NetBSD: cpu.h,v 1.31.2.2 2004/09/18 14:39:54 skrll Exp $	*/
      2       1.1   itojun 
      3       1.1   itojun /*-
      4      1.24      uch  * Copyright (c) 2002 The NetBSD Foundation, Inc. All rights reserved.
      5       1.1   itojun  * Copyright (c) 1990 The Regents of the University of California.
      6       1.1   itojun  * All rights reserved.
      7       1.1   itojun  *
      8       1.1   itojun  * This code is derived from software contributed to Berkeley by
      9       1.1   itojun  * William Jolitz.
     10       1.1   itojun  *
     11       1.1   itojun  * Redistribution and use in source and binary forms, with or without
     12       1.1   itojun  * modification, are permitted provided that the following conditions
     13       1.1   itojun  * are met:
     14       1.1   itojun  * 1. Redistributions of source code must retain the above copyright
     15       1.1   itojun  *    notice, this list of conditions and the following disclaimer.
     16       1.1   itojun  * 2. Redistributions in binary form must reproduce the above copyright
     17       1.1   itojun  *    notice, this list of conditions and the following disclaimer in the
     18       1.1   itojun  *    documentation and/or other materials provided with the distribution.
     19  1.31.2.1    skrll  * 3. Neither the name of the University nor the names of its contributors
     20       1.1   itojun  *    may be used to endorse or promote products derived from this software
     21       1.1   itojun  *    without specific prior written permission.
     22       1.1   itojun  *
     23       1.1   itojun  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     24       1.1   itojun  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     25       1.1   itojun  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     26       1.1   itojun  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     27       1.1   itojun  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     28       1.1   itojun  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     29       1.1   itojun  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     30       1.1   itojun  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     31       1.1   itojun  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     32       1.1   itojun  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     33       1.1   itojun  * SUCH DAMAGE.
     34       1.1   itojun  *
     35       1.1   itojun  *	@(#)cpu.h	5.4 (Berkeley) 5/9/91
     36       1.1   itojun  */
     37       1.1   itojun 
     38       1.1   itojun /*
     39      1.25      uch  * SH3/SH4 support.
     40       1.1   itojun  *
     41       1.1   itojun  *  T.Horiuchi    Brains Corp.   5/22/98
     42       1.1   itojun  */
     43       1.1   itojun 
     44       1.1   itojun #ifndef _SH3_CPU_H_
     45      1.28      uch #define	_SH3_CPU_H_
     46       1.1   itojun 
     47      1.12      mrg #if defined(_KERNEL_OPT)
     48       1.8  thorpej #include "opt_lockdebug.h"
     49       1.8  thorpej #endif
     50       1.8  thorpej 
     51      1.25      uch #include <sys/sched.h>
     52      1.25      uch #include <sh3/psl.h>
     53      1.25      uch #include <sh3/frame.h>
     54       1.8  thorpej 
     55      1.26      uch #ifdef _KERNEL
     56       1.8  thorpej struct cpu_info {
     57       1.8  thorpej 	struct schedstate_percpu ci_schedstate; /* scheduler state */
     58       1.8  thorpej #if defined(DIAGNOSTIC) || defined(LOCKDEBUG)
     59       1.8  thorpej 	u_long ci_spin_locks;		/* # of spin locks held */
     60       1.8  thorpej 	u_long ci_simple_locks;		/* # of simple locks held */
     61       1.8  thorpej #endif
     62       1.8  thorpej };
     63       1.8  thorpej 
     64       1.8  thorpej extern struct cpu_info cpu_info_store;
     65       1.8  thorpej #define	curcpu()			(&cpu_info_store)
     66       1.1   itojun 
     67       1.1   itojun /*
     68       1.1   itojun  * definitions of cpu-dependent requirements
     69       1.1   itojun  * referenced in generic code
     70       1.1   itojun  */
     71       1.2   tsubai #define	cpu_number()			0
     72      1.28      uch /*
     73      1.28      uch  * Can't swapout u-area, (__SWAP_BROKEN)
     74      1.24      uch  * since we use P1 converted address for trapframe.
     75      1.24      uch  */
     76      1.28      uch #define	cpu_swapin(p)			/* nothing */
     77      1.24      uch #define	cpu_swapout(p)			panic("cpu_swapout: can't get here");
     78      1.31  thorpej #define	cpu_proc_fork(p1, p2)		/* nothing */
     79       1.1   itojun 
     80       1.1   itojun /*
     81      1.26      uch  * Arguments to hardclock and gatherstats encapsulate the previous
     82      1.26      uch  * machine state in an opaque clockframe.
     83       1.1   itojun  */
     84      1.26      uch struct clockframe {
     85      1.26      uch 	int	spc;	/* program counter at time of interrupt */
     86      1.26      uch 	int	ssr;	/* status register at time of interrupt */
     87      1.26      uch 	int	ssp;	/* stack pointer at time of interrupt */
     88      1.26      uch };
     89       1.1   itojun 
     90      1.26      uch #define	CLKF_USERMODE(cf)	(!KERNELMODE((cf)->ssr))
     91      1.26      uch #define	CLKF_BASEPRI(cf)	(((cf)->ssr & 0xf0) == 0)
     92      1.26      uch #define	CLKF_PC(cf)		((cf)->spc)
     93      1.29  thorpej #define	CLKF_INTR(cf)		0	/* XXX */
     94       1.1   itojun 
     95       1.1   itojun /*
     96      1.24      uch  * This is used during profiling to integrate system time.  It can safely
     97      1.24      uch  * assume that the process is resident.
     98      1.24      uch  */
     99      1.24      uch #define	PROC_PC(p)							\
    100      1.24      uch 	(((struct trapframe *)(p)->p_md.md_regs)->tf_spc)
    101      1.24      uch 
    102      1.24      uch /*
    103       1.1   itojun  * Preempt the current process if in interrupt from user mode,
    104       1.1   itojun  * or after the current trap/syscall if in system mode.
    105       1.1   itojun  */
    106      1.24      uch #define	need_resched(ci)						\
    107      1.24      uch do {									\
    108      1.24      uch 	want_resched = 1;						\
    109      1.24      uch 	if (curproc != NULL)						\
    110      1.31  thorpej 		aston(curproc);					\
    111      1.24      uch } while (/*CONSTCOND*/0)
    112       1.1   itojun 
    113       1.1   itojun /*
    114       1.1   itojun  * Give a profiling tick to the current process when the user profiling
    115      1.24      uch  * buffer pages are invalid.  On the MIPS, request an ast to send us
    116      1.24      uch  * through trap, marking the proc as needing a profiling tick.
    117       1.1   itojun  */
    118      1.24      uch #define	need_proftick(p)						\
    119      1.24      uch do {									\
    120      1.24      uch 	(p)->p_flag |= P_OWEUPC;					\
    121      1.24      uch 	aston(p);							\
    122      1.24      uch } while (/*CONSTCOND*/0)
    123       1.1   itojun 
    124       1.1   itojun /*
    125       1.1   itojun  * Notify the current process (p) that it has a signal pending,
    126       1.1   itojun  * process as soon as possible.
    127       1.1   itojun  */
    128      1.24      uch #define	signotify(p)	aston(p)
    129      1.24      uch 
    130      1.28      uch #define	aston(p)	((p)->p_md.md_astpending = 1)
    131      1.24      uch 
    132      1.24      uch extern int want_resched;		/* need_resched() was called */
    133       1.1   itojun 
    134       1.1   itojun /*
    135       1.1   itojun  * We need a machine-independent name for this.
    136       1.1   itojun  */
    137       1.1   itojun #define	DELAY(x)		delay(x)
    138      1.26      uch #endif /* _KERNEL */
    139       1.1   itojun 
    140       1.1   itojun /*
    141      1.25      uch  * Logical address space of SH3/SH4 CPU.
    142       1.1   itojun  */
    143      1.28      uch #define	SH3_PHYS_MASK	0x1fffffff
    144      1.25      uch 
    145      1.28      uch #define	SH3_P0SEG_BASE	0x00000000	/* TLB mapped, also U0SEG */
    146      1.28      uch #define	SH3_P0SEG_END	0x7fffffff
    147      1.28      uch #define	SH3_P1SEG_BASE	0x80000000	/* pa == va */
    148      1.28      uch #define	SH3_P1SEG_END	0x9fffffff
    149      1.28      uch #define	SH3_P2SEG_BASE	0xa0000000	/* pa == va, non-cacheable */
    150      1.28      uch #define	SH3_P2SEG_END	0xbfffffff
    151      1.28      uch #define	SH3_P3SEG_BASE	0xc0000000	/* TLB mapped, kernel mode */
    152      1.28      uch #define	SH3_P3SEG_END	0xdfffffff
    153      1.28      uch #define	SH3_P4SEG_BASE	0xe0000000	/* peripheral space */
    154      1.28      uch #define	SH3_P4SEG_END	0xffffffff
    155      1.28      uch 
    156      1.28      uch #define	SH3_P1SEG_TO_PHYS(x)	((u_int32_t)(x) & SH3_PHYS_MASK)
    157      1.28      uch #define	SH3_P2SEG_TO_PHYS(x)	((u_int32_t)(x) & SH3_PHYS_MASK)
    158      1.28      uch #define	SH3_PHYS_TO_P1SEG(x)	((u_int32_t)(x) | SH3_P1SEG_BASE)
    159      1.28      uch #define	SH3_PHYS_TO_P2SEG(x)	((u_int32_t)(x) | SH3_P2SEG_BASE)
    160      1.28      uch #define	SH3_P1SEG_TO_P2SEG(x)	((u_int32_t)(x) | 0x20000000)
    161      1.14      uch 
    162      1.14      uch /* run on P2 */
    163      1.28      uch #define	RUN_P2								\
    164      1.14      uch do {									\
    165      1.14      uch 	u_int32_t p;							\
    166      1.14      uch 	p = (u_int32_t)&&P2;						\
    167      1.14      uch 	goto *(u_int32_t *)(p | 0x20000000);				\
    168      1.26      uch  P2:	(void)0;							\
    169      1.14      uch } while (/*CONSTCOND*/0)
    170      1.14      uch 
    171      1.14      uch /* run on P1 */
    172      1.28      uch #define	RUN_P1								\
    173      1.14      uch do {									\
    174      1.14      uch 	u_int32_t p;							\
    175      1.14      uch 	p = (u_int32_t)&&P1;						\
    176      1.14      uch 	__asm__ __volatile__("nop;nop;nop;nop;nop;nop;nop;nop");	\
    177      1.14      uch 	goto *(u_int32_t *)(p & ~0x20000000);				\
    178      1.26      uch  P1:	(void)0;							\
    179      1.14      uch } while (/*CONSTCOND*/0)
    180      1.27  msaitoh 
    181      1.27  msaitoh #if defined(SH4)
    182      1.27  msaitoh /* SH4 Processor Version Register */
    183      1.27  msaitoh #define	SH4_PVR_ADDR	0xff000030	/* P4  address */
    184      1.27  msaitoh #define	SH4_PVR		(*(volatile unsigned int *) SH4_PVR_ADDR)
    185      1.30  msaitoh #define	SH4_PRR_ADDR	0xff000044	/* P4  address */
    186      1.30  msaitoh #define	SH4_PRR		(*(volatile unsigned int *) SH4_PRR_ADDR)
    187      1.27  msaitoh 
    188      1.27  msaitoh #define	SH4_PVR_MASK	0xffffff00
    189      1.27  msaitoh #define	SH4_PVR_SH7750	0x04020500	/* SH7750  */
    190      1.27  msaitoh #define	SH4_PVR_SH7750S	0x04020600	/* SH7750S */
    191      1.30  msaitoh #define	SH4_PVR_SH775xR	0x04050000	/* SH775xR */
    192      1.27  msaitoh #define	SH4_PVR_SH7751	0x04110000	/* SH7751  */
    193      1.30  msaitoh 
    194      1.30  msaitoh #define	SH4_PRR_MASK	0xfffffff0
    195      1.30  msaitoh #define SH4_PRR_7750R	0x00000100	/* SH7750R */
    196      1.30  msaitoh #define SH4_PRR_7751R	0x00000110	/* SH7751R */
    197      1.27  msaitoh #endif
    198       1.1   itojun 
    199       1.1   itojun /*
    200       1.1   itojun  * pull in #defines for kinds of processors
    201       1.1   itojun  */
    202       1.1   itojun #include <machine/cputypes.h>
    203       1.1   itojun 
    204      1.22      uch /*
    205      1.22      uch  * CTL_MACHDEP definitions.
    206      1.22      uch  */
    207      1.22      uch #define	CPU_CONSDEV		1	/* dev_t: console terminal device */
    208      1.22      uch #define	CPU_LOADANDRESET	2	/* load kernel image and reset */
    209      1.22      uch #define	CPU_MAXID		3	/* number of valid machdep ids */
    210      1.22      uch 
    211      1.22      uch #define	CTL_MACHDEP_NAMES {						\
    212      1.22      uch 	{ 0, 0 },							\
    213      1.22      uch 	{ "console_device",	CTLTYPE_STRUCT },			\
    214      1.22      uch 	{ "load_and_reset",	CTLTYPE_INT },				\
    215      1.22      uch }
    216       1.1   itojun 
    217      1.25      uch #ifdef _KERNEL
    218      1.25      uch void sh_cpu_init(int, int);
    219      1.25      uch void sh_startup(void);
    220      1.25      uch void cpu_reset(void);		/* Soft reset */
    221      1.25      uch void _cpu_spin(u_int32_t);	/* for delay loop. */
    222      1.25      uch void delay(int);
    223      1.25      uch struct pcb;
    224      1.25      uch void savectx(struct pcb *);
    225      1.25      uch void dumpsys(void);
    226      1.25      uch #endif /* _KERNEL */
    227       1.1   itojun #endif /* !_SH3_CPU_H_ */
    228      1.25      uch 
    229