cpu.h revision 1.21
1 /* $NetBSD: cpu.h,v 1.21 2002/03/03 14:28:51 uch Exp $ */ 2 3 /*- 4 * Copyright (c) 1990 The Regents of the University of California. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * William Jolitz. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the University of 21 * California, Berkeley and its contributors. 22 * 4. Neither the name of the University nor the names of its contributors 23 * may be used to endorse or promote products derived from this software 24 * without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 29 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 36 * SUCH DAMAGE. 37 * 38 * @(#)cpu.h 5.4 (Berkeley) 5/9/91 39 */ 40 41 /* 42 * SH3 Version 43 * 44 * T.Horiuchi Brains Corp. 5/22/98 45 */ 46 47 #ifndef _SH3_CPU_H_ 48 #define _SH3_CPU_H_ 49 50 #if defined(_KERNEL_OPT) 51 #include "opt_lockdebug.h" 52 #endif 53 54 /* 55 * Definitions unique to sh3 cpu support. 56 */ 57 #include <machine/psl.h> 58 #include <machine/frame.h> 59 60 #include <sys/sched.h> 61 struct cpu_info { 62 struct schedstate_percpu ci_schedstate; /* scheduler state */ 63 #if defined(DIAGNOSTIC) || defined(LOCKDEBUG) 64 u_long ci_spin_locks; /* # of spin locks held */ 65 u_long ci_simple_locks; /* # of simple locks held */ 66 #endif 67 }; 68 69 #ifdef _KERNEL 70 extern struct cpu_info cpu_info_store; 71 72 #define curcpu() (&cpu_info_store) 73 #endif 74 75 /* 76 * definitions of cpu-dependent requirements 77 * referenced in generic code 78 */ 79 #define cpu_swapin(p) /* nothing */ 80 #define cpu_wait(p) /* nothing */ 81 #define cpu_number() 0 82 83 /* 84 * Arguments to hardclock, softclock and statclock 85 * encapsulate the previous machine state in an opaque 86 * clockframe; for now, use generic intrframe. 87 * 88 * XXX intrframe has a lot of gunk we don't need. 89 */ 90 #define clockframe trapframe 91 92 #define CLKF_USERMODE(frame) (!KERNELMODE((frame)->tf_ssr)) 93 /* XXX we should fix this */ 94 #define CLKF_BASEPRI(frame) (0) 95 #define CLKF_PC(frame) ((frame)->tf_spc) 96 /* XXX we should have an interrupt stack */ 97 #define CLKF_INTR(frame) (0) 98 99 /* 100 * Preempt the current process if in interrupt from user mode, 101 * or after the current trap/syscall if in system mode. 102 */ 103 int want_resched; /* resched() was called */ 104 #define need_resched(ci) (want_resched = 1, setsoftast()) 105 106 /* 107 * Give a profiling tick to the current process when the user profiling 108 * buffer pages are invalid. On the i386, request an ast to send us 109 * through trap(), marking the proc as needing a profiling tick. 110 */ 111 #define need_proftick(p) ((p)->p_flag |= P_OWEUPC, setsoftast()) 112 113 /* 114 * Notify the current process (p) that it has a signal pending, 115 * process as soon as possible. 116 */ 117 #define signotify(p) setsoftast() 118 119 /* 120 * We need a machine-independent name for this. 121 */ 122 #define DELAY(x) delay(x) 123 124 /* 125 * Logical address space of SH3 CPU. 126 */ 127 #define SH3_P0SEG_BASE 0x00000000 /* TLB mapped, also U0SEG */ 128 #define SH3_P0SEG_END 0x7fffffff 129 #define SH3_P1SEG_BASE 0x80000000 /* pa == va */ 130 #define SH3_P1SEG_END 0x9fffffff 131 #define SH3_P2SEG_BASE 0xa0000000 /* pa == va, non-cacheable */ 132 #define SH3_P2SEG_END 0xbfffffff 133 #define SH3_P3SEG_BASE 0xc0000000 /* TLB mapped, supervisor mode */ 134 #define SH3_P3SEG_END 0xdfffffff 135 #define SH3_P4SEG_BASE 0xe0000000 /* peripheral space */ 136 #define SH3_P4SEG_END 0xffffffff 137 138 #define SH3_PHYS_MASK 0x1fffffff 139 #define SH3_P1234SEG_SIZE 0x20000000 140 141 #define SH3_P1SEG_TO_PHYS(x) ((unsigned)(x) & SH3_PHYS_MASK) 142 #define SH3_P2SEG_TO_PHYS(x) ((unsigned)(x) & SH3_PHYS_MASK) 143 #define SH3_PHYS_TO_P1SEG(x) ((unsigned)(x) | SH3_P1SEG_BASE) 144 #define SH3_PHYS_TO_P2SEG(x) ((unsigned)(x) | SH3_P2SEG_BASE) 145 #define SH3_P1SEG_TO_P2SEG(x) ((unsigned)(x) | SH3_P1234SEG_SIZE) 146 147 /* run on P2 */ 148 #define RUN_P2 \ 149 do { \ 150 u_int32_t p; \ 151 p = (u_int32_t)&&P2; \ 152 goto *(u_int32_t *)(p | 0x20000000); \ 153 P2: \ 154 } while (/*CONSTCOND*/0) 155 156 /* run on P1 */ 157 #define RUN_P1 \ 158 do { \ 159 u_int32_t p; \ 160 p = (u_int32_t)&&P1; \ 161 __asm__ __volatile__("nop;nop;nop;nop;nop;nop;nop;nop"); \ 162 goto *(u_int32_t *)(p & ~0x20000000); \ 163 P1: \ 164 } while (/*CONSTCOND*/0) 165 166 /* 167 * pull in #defines for kinds of processors 168 */ 169 #include <machine/cputypes.h> 170 171 #ifdef _KERNEL 172 void sh_cpu_init(int, int); 173 void delay(int); 174 void _cpu_spin(u_int32_t); /* for delay loop. */ 175 void cpu_reset(void); /* Soft reset */ 176 void sh3_startup(void); 177 struct pcb; 178 void savectx(struct pcb *); 179 void dumpsys(void); 180 #endif /* _KERNEL */ 181 182 #endif /* !_SH3_CPU_H_ */ 183
Indexes created Thu Oct 23 22:10:10 GMT 2025