cpu.h revision 1.32
1 /* $NetBSD: cpu.h,v 1.32 2003/08/07 16:29:28 agc Exp $ */ 2 3 /*- 4 * Copyright (c) 1990 The Regents of the University of California. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * William Jolitz. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * @(#)cpu.h 5.4 (Berkeley) 5/9/91 35 */ 36 37 /*- 38 * Copyright (c) 2002 The NetBSD Foundation, Inc. All rights reserved. 39 * 40 * This code is derived from software contributed to Berkeley by 41 * William Jolitz. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. All advertising materials mentioning features or use of this software 52 * must display the following acknowledgement: 53 * This product includes software developed by the University of 54 * California, Berkeley and its contributors. 55 * 4. Neither the name of the University nor the names of its contributors 56 * may be used to endorse or promote products derived from this software 57 * without specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 60 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 61 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 62 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 63 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 64 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 65 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 66 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 67 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 68 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 69 * SUCH DAMAGE. 70 * 71 * @(#)cpu.h 5.4 (Berkeley) 5/9/91 72 */ 73 74 /* 75 * SH3/SH4 support. 76 * 77 * T.Horiuchi Brains Corp. 5/22/98 78 */ 79 80 #ifndef _SH3_CPU_H_ 81 #define _SH3_CPU_H_ 82 83 #if defined(_KERNEL_OPT) 84 #include "opt_lockdebug.h" 85 #endif 86 87 #include <sys/sched.h> 88 #include <sh3/psl.h> 89 #include <sh3/frame.h> 90 91 #ifdef _KERNEL 92 struct cpu_info { 93 struct schedstate_percpu ci_schedstate; /* scheduler state */ 94 #if defined(DIAGNOSTIC) || defined(LOCKDEBUG) 95 u_long ci_spin_locks; /* # of spin locks held */ 96 u_long ci_simple_locks; /* # of simple locks held */ 97 #endif 98 }; 99 100 extern struct cpu_info cpu_info_store; 101 #define curcpu() (&cpu_info_store) 102 103 /* 104 * definitions of cpu-dependent requirements 105 * referenced in generic code 106 */ 107 #define cpu_wait(p) /* nothing */ 108 #define cpu_number() 0 109 /* 110 * Can't swapout u-area, (__SWAP_BROKEN) 111 * since we use P1 converted address for trapframe. 112 */ 113 #define cpu_swapin(p) /* nothing */ 114 #define cpu_swapout(p) panic("cpu_swapout: can't get here"); 115 #define cpu_proc_fork(p1, p2) /* nothing */ 116 117 /* 118 * Arguments to hardclock and gatherstats encapsulate the previous 119 * machine state in an opaque clockframe. 120 */ 121 struct clockframe { 122 int spc; /* program counter at time of interrupt */ 123 int ssr; /* status register at time of interrupt */ 124 int ssp; /* stack pointer at time of interrupt */ 125 }; 126 127 #define CLKF_USERMODE(cf) (!KERNELMODE((cf)->ssr)) 128 #define CLKF_BASEPRI(cf) (((cf)->ssr & 0xf0) == 0) 129 #define CLKF_PC(cf) ((cf)->spc) 130 #define CLKF_INTR(cf) 0 /* XXX */ 131 132 /* 133 * This is used during profiling to integrate system time. It can safely 134 * assume that the process is resident. 135 */ 136 #define PROC_PC(p) \ 137 (((struct trapframe *)(p)->p_md.md_regs)->tf_spc) 138 139 /* 140 * Preempt the current process if in interrupt from user mode, 141 * or after the current trap/syscall if in system mode. 142 */ 143 #define need_resched(ci) \ 144 do { \ 145 want_resched = 1; \ 146 if (curproc != NULL) \ 147 aston(curproc); \ 148 } while (/*CONSTCOND*/0) 149 150 /* 151 * Give a profiling tick to the current process when the user profiling 152 * buffer pages are invalid. On the MIPS, request an ast to send us 153 * through trap, marking the proc as needing a profiling tick. 154 */ 155 #define need_proftick(p) \ 156 do { \ 157 (p)->p_flag |= P_OWEUPC; \ 158 aston(p); \ 159 } while (/*CONSTCOND*/0) 160 161 /* 162 * Notify the current process (p) that it has a signal pending, 163 * process as soon as possible. 164 */ 165 #define signotify(p) aston(p) 166 167 #define aston(p) ((p)->p_md.md_astpending = 1) 168 169 extern int want_resched; /* need_resched() was called */ 170 171 /* 172 * We need a machine-independent name for this. 173 */ 174 #define DELAY(x) delay(x) 175 #endif /* _KERNEL */ 176 177 /* 178 * Logical address space of SH3/SH4 CPU. 179 */ 180 #define SH3_PHYS_MASK 0x1fffffff 181 182 #define SH3_P0SEG_BASE 0x00000000 /* TLB mapped, also U0SEG */ 183 #define SH3_P0SEG_END 0x7fffffff 184 #define SH3_P1SEG_BASE 0x80000000 /* pa == va */ 185 #define SH3_P1SEG_END 0x9fffffff 186 #define SH3_P2SEG_BASE 0xa0000000 /* pa == va, non-cacheable */ 187 #define SH3_P2SEG_END 0xbfffffff 188 #define SH3_P3SEG_BASE 0xc0000000 /* TLB mapped, kernel mode */ 189 #define SH3_P3SEG_END 0xdfffffff 190 #define SH3_P4SEG_BASE 0xe0000000 /* peripheral space */ 191 #define SH3_P4SEG_END 0xffffffff 192 193 #define SH3_P1SEG_TO_PHYS(x) ((u_int32_t)(x) & SH3_PHYS_MASK) 194 #define SH3_P2SEG_TO_PHYS(x) ((u_int32_t)(x) & SH3_PHYS_MASK) 195 #define SH3_PHYS_TO_P1SEG(x) ((u_int32_t)(x) | SH3_P1SEG_BASE) 196 #define SH3_PHYS_TO_P2SEG(x) ((u_int32_t)(x) | SH3_P2SEG_BASE) 197 #define SH3_P1SEG_TO_P2SEG(x) ((u_int32_t)(x) | 0x20000000) 198 199 /* run on P2 */ 200 #define RUN_P2 \ 201 do { \ 202 u_int32_t p; \ 203 p = (u_int32_t)&&P2; \ 204 goto *(u_int32_t *)(p | 0x20000000); \ 205 P2: (void)0; \ 206 } while (/*CONSTCOND*/0) 207 208 /* run on P1 */ 209 #define RUN_P1 \ 210 do { \ 211 u_int32_t p; \ 212 p = (u_int32_t)&&P1; \ 213 __asm__ __volatile__("nop;nop;nop;nop;nop;nop;nop;nop"); \ 214 goto *(u_int32_t *)(p & ~0x20000000); \ 215 P1: (void)0; \ 216 } while (/*CONSTCOND*/0) 217 218 #if defined(SH4) 219 /* SH4 Processor Version Register */ 220 #define SH4_PVR_ADDR 0xff000030 /* P4 address */ 221 #define SH4_PVR (*(volatile unsigned int *) SH4_PVR_ADDR) 222 #define SH4_PRR_ADDR 0xff000044 /* P4 address */ 223 #define SH4_PRR (*(volatile unsigned int *) SH4_PRR_ADDR) 224 225 #define SH4_PVR_MASK 0xffffff00 226 #define SH4_PVR_SH7750 0x04020500 /* SH7750 */ 227 #define SH4_PVR_SH7750S 0x04020600 /* SH7750S */ 228 #define SH4_PVR_SH775xR 0x04050000 /* SH775xR */ 229 #define SH4_PVR_SH7751 0x04110000 /* SH7751 */ 230 231 #define SH4_PRR_MASK 0xfffffff0 232 #define SH4_PRR_7750R 0x00000100 /* SH7750R */ 233 #define SH4_PRR_7751R 0x00000110 /* SH7751R */ 234 #endif 235 236 /* 237 * pull in #defines for kinds of processors 238 */ 239 #include <machine/cputypes.h> 240 241 /* 242 * CTL_MACHDEP definitions. 243 */ 244 #define CPU_CONSDEV 1 /* dev_t: console terminal device */ 245 #define CPU_LOADANDRESET 2 /* load kernel image and reset */ 246 #define CPU_MAXID 3 /* number of valid machdep ids */ 247 248 #define CTL_MACHDEP_NAMES { \ 249 { 0, 0 }, \ 250 { "console_device", CTLTYPE_STRUCT }, \ 251 { "load_and_reset", CTLTYPE_INT }, \ 252 } 253 254 #ifdef _KERNEL 255 void sh_cpu_init(int, int); 256 void sh_startup(void); 257 void cpu_reset(void); /* Soft reset */ 258 void _cpu_spin(u_int32_t); /* for delay loop. */ 259 void delay(int); 260 struct pcb; 261 void savectx(struct pcb *); 262 void dumpsys(void); 263 #endif /* _KERNEL */ 264 #endif /* !_SH3_CPU_H_ */ 265 266
Indexes created Thu Sep 25 16:09:42 GMT 2025