cpu.h revision 1.35
1 /* $NetBSD: cpu.h,v 1.35 2004/09/22 11:32:03 yamt Exp $ */ 2 3 /*- 4 * Copyright (c) 2002 The NetBSD Foundation, Inc. All rights reserved. 5 * Copyright (c) 1990 The Regents of the University of California. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to Berkeley by 9 * William Jolitz. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. Neither the name of the University nor the names of its contributors 20 * may be used to endorse or promote products derived from this software 21 * without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 * 35 * @(#)cpu.h 5.4 (Berkeley) 5/9/91 36 */ 37 38 /* 39 * SH3/SH4 support. 40 * 41 * T.Horiuchi Brains Corp. 5/22/98 42 */ 43 44 #ifndef _SH3_CPU_H_ 45 #define _SH3_CPU_H_ 46 47 #if defined(_KERNEL_OPT) 48 #include "opt_lockdebug.h" 49 #endif 50 51 #include <sys/cpu_data.h> 52 #include <sh3/psl.h> 53 #include <sh3/frame.h> 54 55 #ifdef _KERNEL 56 struct cpu_info { 57 struct cpu_data ci_data; /* MI per-cpu data */ 58 }; 59 60 extern struct cpu_info cpu_info_store; 61 #define curcpu() (&cpu_info_store) 62 63 /* 64 * definitions of cpu-dependent requirements 65 * referenced in generic code 66 */ 67 #define cpu_number() 0 68 /* 69 * Can't swapout u-area, (__SWAP_BROKEN) 70 * since we use P1 converted address for trapframe. 71 */ 72 #define cpu_swapin(p) /* nothing */ 73 #define cpu_swapout(p) panic("cpu_swapout: can't get here"); 74 #define cpu_proc_fork(p1, p2) /* nothing */ 75 76 /* 77 * Arguments to hardclock and gatherstats encapsulate the previous 78 * machine state in an opaque clockframe. 79 */ 80 struct clockframe { 81 int spc; /* program counter at time of interrupt */ 82 int ssr; /* status register at time of interrupt */ 83 int ssp; /* stack pointer at time of interrupt */ 84 }; 85 86 #define CLKF_USERMODE(cf) (!KERNELMODE((cf)->ssr)) 87 #define CLKF_BASEPRI(cf) (((cf)->ssr & 0xf0) == 0) 88 #define CLKF_PC(cf) ((cf)->spc) 89 #define CLKF_INTR(cf) 0 /* XXX */ 90 91 /* 92 * This is used during profiling to integrate system time. It can safely 93 * assume that the process is resident. 94 */ 95 #define PROC_PC(p) \ 96 (((struct trapframe *)(p)->p_md.md_regs)->tf_spc) 97 98 /* 99 * Preempt the current process if in interrupt from user mode, 100 * or after the current trap/syscall if in system mode. 101 */ 102 #define need_resched(ci) \ 103 do { \ 104 want_resched = 1; \ 105 if (curproc != NULL) \ 106 aston(curproc); \ 107 } while (/*CONSTCOND*/0) 108 109 /* 110 * Give a profiling tick to the current process when the user profiling 111 * buffer pages are invalid. On the MIPS, request an ast to send us 112 * through trap, marking the proc as needing a profiling tick. 113 */ 114 #define need_proftick(p) \ 115 do { \ 116 (p)->p_flag |= P_OWEUPC; \ 117 aston(p); \ 118 } while (/*CONSTCOND*/0) 119 120 /* 121 * Notify the current process (p) that it has a signal pending, 122 * process as soon as possible. 123 */ 124 #define signotify(p) aston(p) 125 126 #define aston(p) ((p)->p_md.md_astpending = 1) 127 128 extern int want_resched; /* need_resched() was called */ 129 130 /* 131 * We need a machine-independent name for this. 132 */ 133 #define DELAY(x) delay(x) 134 #endif /* _KERNEL */ 135 136 /* 137 * Logical address space of SH3/SH4 CPU. 138 */ 139 #define SH3_PHYS_MASK 0x1fffffff 140 141 #define SH3_P0SEG_BASE 0x00000000 /* TLB mapped, also U0SEG */ 142 #define SH3_P0SEG_END 0x7fffffff 143 #define SH3_P1SEG_BASE 0x80000000 /* pa == va */ 144 #define SH3_P1SEG_END 0x9fffffff 145 #define SH3_P2SEG_BASE 0xa0000000 /* pa == va, non-cacheable */ 146 #define SH3_P2SEG_END 0xbfffffff 147 #define SH3_P3SEG_BASE 0xc0000000 /* TLB mapped, kernel mode */ 148 #define SH3_P3SEG_END 0xdfffffff 149 #define SH3_P4SEG_BASE 0xe0000000 /* peripheral space */ 150 #define SH3_P4SEG_END 0xffffffff 151 152 #define SH3_P1SEG_TO_PHYS(x) ((u_int32_t)(x) & SH3_PHYS_MASK) 153 #define SH3_P2SEG_TO_PHYS(x) ((u_int32_t)(x) & SH3_PHYS_MASK) 154 #define SH3_PHYS_TO_P1SEG(x) ((u_int32_t)(x) | SH3_P1SEG_BASE) 155 #define SH3_PHYS_TO_P2SEG(x) ((u_int32_t)(x) | SH3_P2SEG_BASE) 156 #define SH3_P1SEG_TO_P2SEG(x) ((u_int32_t)(x) | 0x20000000) 157 158 /* run on P2 */ 159 #define RUN_P2 \ 160 do { \ 161 u_int32_t p; \ 162 p = (u_int32_t)&&P2; \ 163 goto *(u_int32_t *)(p | 0x20000000); \ 164 P2: (void)0; \ 165 } while (/*CONSTCOND*/0) 166 167 /* run on P1 */ 168 #define RUN_P1 \ 169 do { \ 170 u_int32_t p; \ 171 p = (u_int32_t)&&P1; \ 172 __asm__ __volatile__("nop;nop;nop;nop;nop;nop;nop;nop"); \ 173 goto *(u_int32_t *)(p & ~0x20000000); \ 174 P1: (void)0; \ 175 } while (/*CONSTCOND*/0) 176 177 #if defined(SH4) 178 /* SH4 Processor Version Register */ 179 #define SH4_PVR_ADDR 0xff000030 /* P4 address */ 180 #define SH4_PVR (*(volatile unsigned int *) SH4_PVR_ADDR) 181 #define SH4_PRR_ADDR 0xff000044 /* P4 address */ 182 #define SH4_PRR (*(volatile unsigned int *) SH4_PRR_ADDR) 183 184 #define SH4_PVR_MASK 0xffffff00 185 #define SH4_PVR_SH7750 0x04020500 /* SH7750 */ 186 #define SH4_PVR_SH7750S 0x04020600 /* SH7750S */ 187 #define SH4_PVR_SH775xR 0x04050000 /* SH775xR */ 188 #define SH4_PVR_SH7751 0x04110000 /* SH7751 */ 189 190 #define SH4_PRR_MASK 0xfffffff0 191 #define SH4_PRR_7750R 0x00000100 /* SH7750R */ 192 #define SH4_PRR_7751R 0x00000110 /* SH7751R */ 193 #endif 194 195 /* 196 * pull in #defines for kinds of processors 197 */ 198 #include <machine/cputypes.h> 199 200 /* 201 * CTL_MACHDEP definitions. 202 */ 203 #define CPU_CONSDEV 1 /* dev_t: console terminal device */ 204 #define CPU_LOADANDRESET 2 /* load kernel image and reset */ 205 #define CPU_MAXID 3 /* number of valid machdep ids */ 206 207 #define CTL_MACHDEP_NAMES { \ 208 { 0, 0 }, \ 209 { "console_device", CTLTYPE_STRUCT }, \ 210 { "load_and_reset", CTLTYPE_INT }, \ 211 } 212 213 #ifdef _KERNEL 214 void sh_cpu_init(int, int); 215 void sh_startup(void); 216 void cpu_reset(void); /* Soft reset */ 217 void _cpu_spin(u_int32_t); /* for delay loop. */ 218 void delay(int); 219 struct pcb; 220 void savectx(struct pcb *); 221 void dumpsys(void); 222 #endif /* _KERNEL */ 223 #endif /* !_SH3_CPU_H_ */ 224 225
Indexes created Thu Sep 25 16:09:42 GMT 2025